nic_stats_mapping_border, nic_stats_mapping_border);
}
-static void
-burst_mode_options_display(uint64_t options)
-{
- int offset;
-
- while (options != 0) {
- offset = rte_bsf64(options);
-
- printf(" %s",
- rte_eth_burst_mode_option_name(1ULL << offset));
-
- options &= ~(1ULL << offset);
- }
-}
-
void
rx_queue_infos_display(portid_t port_id, uint16_t queue_id)
{
(qinfo.scattered_rx != 0) ? "on" : "off");
printf("\nNumber of RXDs: %hu", qinfo.nb_desc);
- if (rte_eth_rx_burst_mode_get(port_id, queue_id, &mode) == 0) {
- printf("\nBurst mode:");
- burst_mode_options_display(mode.options);
- }
+ if (rte_eth_rx_burst_mode_get(port_id, queue_id, &mode) == 0)
+ printf("\nBurst mode: %s%s",
+ mode.info,
+ mode.flags & RTE_ETH_BURST_FLAG_PER_QUEUE ?
+ " (per queue)" : "");
printf("\n");
}
(qinfo.conf.tx_deferred_start != 0) ? "on" : "off");
printf("\nNumber of TXDs: %hu", qinfo.nb_desc);
- if (rte_eth_tx_burst_mode_get(port_id, queue_id, &mode) == 0) {
- printf("\nBurst mode:");
- burst_mode_options_display(mode.options);
- }
+ if (rte_eth_tx_burst_mode_get(port_id, queue_id, &mode) == 0)
+ printf("\nBurst mode: %s%s",
+ mode.info,
+ mode.flags & RTE_ETH_BURST_FLAG_PER_QUEUE ?
+ " (per queue)" : "");
printf("\n");
}
Supports to get Rx/Tx packet burst mode information.
* **[implements] eth_dev_ops**: ``rx_burst_mode_get``, ``tx_burst_mode_get``.
-* **[related] API**: ``rte_eth_rx_burst_mode_get()``, ``rte_eth_tx_burst_mode_get()``,
- ``rte_eth_burst_mode_option_name()``.
+* **[related] API**: ``rte_eth_rx_burst_mode_get()``, ``rte_eth_tx_burst_mode_get()``.
.. _nic_features_other:
``rte_eth_tx_burst_mode_get`` that allow an application
to retrieve the mode information about RX/TX packet burst
such as Scalar or Vector, and Vector technology like AVX2.
- Another new function ``rte_eth_burst_mode_option_name`` is
- provided for burst mode options stringification.
* **Updated the Intel ice driver.**
}
}
-int
-i40e_rx_burst_mode_get(struct rte_eth_dev *dev, __rte_unused uint16_t queue_id,
- struct rte_eth_burst_mode *mode)
-{
- eth_rx_burst_t pkt_burst = dev->rx_pkt_burst;
- uint64_t options;
-
- if (pkt_burst == i40e_recv_scattered_pkts)
- options = RTE_ETH_BURST_SCALAR | RTE_ETH_BURST_SCATTERED;
- else if (pkt_burst == i40e_recv_pkts_bulk_alloc)
- options = RTE_ETH_BURST_SCALAR | RTE_ETH_BURST_BULK_ALLOC;
- else if (pkt_burst == i40e_recv_pkts)
- options = RTE_ETH_BURST_SCALAR;
+static const struct {
+ eth_rx_burst_t pkt_burst;
+ const char *info;
+} i40e_rx_burst_infos[] = {
+ { i40e_recv_scattered_pkts, "Scalar Scattered" },
+ { i40e_recv_pkts_bulk_alloc, "Scalar Bulk Alloc" },
+ { i40e_recv_pkts, "Scalar" },
#ifdef RTE_ARCH_X86
- else if (pkt_burst == i40e_recv_scattered_pkts_vec_avx2)
- options = RTE_ETH_BURST_VECTOR | RTE_ETH_BURST_AVX2 |
- RTE_ETH_BURST_SCATTERED;
- else if (pkt_burst == i40e_recv_pkts_vec_avx2)
- options = RTE_ETH_BURST_VECTOR | RTE_ETH_BURST_AVX2;
- else if (pkt_burst == i40e_recv_scattered_pkts_vec)
- options = RTE_ETH_BURST_VECTOR | RTE_ETH_BURST_SSE |
- RTE_ETH_BURST_SCATTERED;
- else if (pkt_burst == i40e_recv_pkts_vec)
- options = RTE_ETH_BURST_VECTOR | RTE_ETH_BURST_SSE;
+ { i40e_recv_scattered_pkts_vec_avx2, "Vector AVX2 Scattered" },
+ { i40e_recv_pkts_vec_avx2, "Vector AVX2" },
+ { i40e_recv_scattered_pkts_vec, "Vector SSE Scattered" },
+ { i40e_recv_pkts_vec, "Vector SSE" },
#elif defined(RTE_ARCH_ARM64)
- else if (pkt_burst == i40e_recv_scattered_pkts_vec)
- options = RTE_ETH_BURST_VECTOR | RTE_ETH_BURST_NEON |
- RTE_ETH_BURST_SCATTERED;
- else if (pkt_burst == i40e_recv_pkts_vec)
- options = RTE_ETH_BURST_VECTOR | RTE_ETH_BURST_NEON;
+ { i40e_recv_scattered_pkts_vec, "Vector Neon Scattered" },
+ { i40e_recv_pkts_vec, "Vector Neon" },
#elif defined(RTE_ARCH_PPC_64)
- else if (pkt_burst == i40e_recv_scattered_pkts_vec)
- options = RTE_ETH_BURST_VECTOR | RTE_ETH_BURST_ALTIVEC |
- RTE_ETH_BURST_SCATTERED;
- else if (pkt_burst == i40e_recv_pkts_vec)
- options = RTE_ETH_BURST_VECTOR | RTE_ETH_BURST_ALTIVEC;
+ { i40e_recv_scattered_pkts_vec, "Vector AltiVec Scattered" },
+ { i40e_recv_pkts_vec, "Vector AltiVec" },
#endif
- else
- options = 0;
+};
- mode->options = options;
+int
+i40e_rx_burst_mode_get(struct rte_eth_dev *dev, __rte_unused uint16_t queue_id,
+ struct rte_eth_burst_mode *mode)
+{
+ eth_rx_burst_t pkt_burst = dev->rx_pkt_burst;
+ int ret = -EINVAL;
+ unsigned int i;
+
+ for (i = 0; i < RTE_DIM(i40e_rx_burst_infos); ++i) {
+ if (pkt_burst == i40e_rx_burst_infos[i].pkt_burst) {
+ snprintf(mode->info, sizeof(mode->info), "%s",
+ i40e_rx_burst_infos[i].info);
+ ret = 0;
+ break;
+ }
+ }
- return options != 0 ? 0 : -EINVAL;
+ return ret;
}
void __attribute__((cold))
}
}
-int
-i40e_tx_burst_mode_get(struct rte_eth_dev *dev, __rte_unused uint16_t queue_id,
- struct rte_eth_burst_mode *mode)
-{
- eth_tx_burst_t pkt_burst = dev->tx_pkt_burst;
- uint64_t options;
-
- if (pkt_burst == i40e_xmit_pkts_simple)
- options = RTE_ETH_BURST_SCALAR | RTE_ETH_BURST_SIMPLE;
- else if (pkt_burst == i40e_xmit_pkts)
- options = RTE_ETH_BURST_SCALAR;
+static const struct {
+ eth_tx_burst_t pkt_burst;
+ const char *info;
+} i40e_tx_burst_infos[] = {
+ { i40e_xmit_pkts_simple, "Scalar Simple" },
+ { i40e_xmit_pkts, "Scalar" },
#ifdef RTE_ARCH_X86
- else if (pkt_burst == i40e_xmit_pkts_vec_avx2)
- options = RTE_ETH_BURST_VECTOR | RTE_ETH_BURST_AVX2;
- else if (pkt_burst == i40e_xmit_pkts_vec)
- options = RTE_ETH_BURST_VECTOR | RTE_ETH_BURST_SSE;
+ { i40e_xmit_pkts_vec_avx2, "Vector AVX2" },
+ { i40e_xmit_pkts_vec, "Vector SSE" },
#elif defined(RTE_ARCH_ARM64)
- else if (pkt_burst == i40e_xmit_pkts_vec)
- options = RTE_ETH_BURST_VECTOR | RTE_ETH_BURST_NEON;
+ { i40e_xmit_pkts_vec, "Vector Neon" },
#elif defined(RTE_ARCH_PPC_64)
- else if (pkt_burst == i40e_xmit_pkts_vec)
- options = RTE_ETH_BURST_VECTOR | RTE_ETH_BURST_ALTIVEC;
+ { i40e_xmit_pkts_vec, "Vector AltiVec" },
#endif
- else
- options = 0;
+};
- mode->options = options;
+int
+i40e_tx_burst_mode_get(struct rte_eth_dev *dev, __rte_unused uint16_t queue_id,
+ struct rte_eth_burst_mode *mode)
+{
+ eth_tx_burst_t pkt_burst = dev->tx_pkt_burst;
+ int ret = -EINVAL;
+ unsigned int i;
+
+ for (i = 0; i < RTE_DIM(i40e_tx_burst_infos); ++i) {
+ if (pkt_burst == i40e_tx_burst_infos[i].pkt_burst) {
+ snprintf(mode->info, sizeof(mode->info), "%s",
+ i40e_tx_burst_infos[i].info);
+ ret = 0;
+ break;
+ }
+ }
- return options != 0 ? 0 : -EINVAL;
+ return ret;
}
void __attribute__((cold))
}
}
+static const struct {
+ eth_rx_burst_t pkt_burst;
+ const char *info;
+} ice_rx_burst_infos[] = {
+ { ice_recv_scattered_pkts, "Scalar Scattered" },
+ { ice_recv_pkts_bulk_alloc, "Scalar Bulk Alloc" },
+ { ice_recv_pkts, "Scalar" },
+#ifdef RTE_ARCH_X86
+ { ice_recv_scattered_pkts_vec_avx2, "Vector AVX2 Scattered" },
+ { ice_recv_pkts_vec_avx2, "Vector AVX2" },
+ { ice_recv_scattered_pkts_vec, "Vector SSE Scattered" },
+ { ice_recv_pkts_vec, "Vector SSE" },
+#endif
+};
+
int
ice_rx_burst_mode_get(struct rte_eth_dev *dev, __rte_unused uint16_t queue_id,
struct rte_eth_burst_mode *mode)
{
eth_rx_burst_t pkt_burst = dev->rx_pkt_burst;
- uint64_t options;
-
- if (pkt_burst == ice_recv_scattered_pkts)
- options = RTE_ETH_BURST_SCALAR | RTE_ETH_BURST_SCATTERED;
- else if (pkt_burst == ice_recv_pkts_bulk_alloc)
- options = RTE_ETH_BURST_SCALAR | RTE_ETH_BURST_BULK_ALLOC;
- else if (pkt_burst == ice_recv_pkts)
- options = RTE_ETH_BURST_SCALAR;
-#ifdef RTE_ARCH_X86
- else if (pkt_burst == ice_recv_scattered_pkts_vec_avx2)
- options = RTE_ETH_BURST_VECTOR | RTE_ETH_BURST_AVX2 |
- RTE_ETH_BURST_SCATTERED;
- else if (pkt_burst == ice_recv_pkts_vec_avx2)
- options = RTE_ETH_BURST_VECTOR | RTE_ETH_BURST_AVX2;
- else if (pkt_burst == ice_recv_scattered_pkts_vec)
- options = RTE_ETH_BURST_VECTOR | RTE_ETH_BURST_SSE |
- RTE_ETH_BURST_SCATTERED;
- else if (pkt_burst == ice_recv_pkts_vec)
- options = RTE_ETH_BURST_VECTOR | RTE_ETH_BURST_SSE;
-#endif
- else
- options = 0;
+ int ret = -EINVAL;
+ unsigned int i;
- mode->options = options;
+ for (i = 0; i < RTE_DIM(ice_rx_burst_infos); ++i) {
+ if (pkt_burst == ice_rx_burst_infos[i].pkt_burst) {
+ snprintf(mode->info, sizeof(mode->info), "%s",
+ ice_rx_burst_infos[i].info);
+ ret = 0;
+ break;
+ }
+ }
- return options != 0 ? 0 : -EINVAL;
+ return ret;
}
void __attribute__((cold))
}
}
+static const struct {
+ eth_tx_burst_t pkt_burst;
+ const char *info;
+} ice_tx_burst_infos[] = {
+ { ice_xmit_pkts_simple, "Scalar Simple" },
+ { ice_xmit_pkts, "Scalar" },
+#ifdef RTE_ARCH_X86
+ { ice_xmit_pkts_vec_avx2, "Vector AVX2" },
+ { ice_xmit_pkts_vec, "Vector SSE" },
+#endif
+};
+
int
ice_tx_burst_mode_get(struct rte_eth_dev *dev, __rte_unused uint16_t queue_id,
struct rte_eth_burst_mode *mode)
{
eth_tx_burst_t pkt_burst = dev->tx_pkt_burst;
- uint64_t options;
-
- if (pkt_burst == ice_xmit_pkts_simple)
- options = RTE_ETH_BURST_SCALAR | RTE_ETH_BURST_SIMPLE;
- else if (pkt_burst == ice_xmit_pkts)
- options = RTE_ETH_BURST_SCALAR;
-#ifdef RTE_ARCH_X86
- else if (pkt_burst == ice_xmit_pkts_vec_avx2)
- options = RTE_ETH_BURST_VECTOR | RTE_ETH_BURST_AVX2;
- else if (pkt_burst == ice_xmit_pkts_vec)
- options = RTE_ETH_BURST_VECTOR | RTE_ETH_BURST_SSE;
-#endif
- else
- options = 0;
+ int ret = -EINVAL;
+ unsigned int i;
- mode->options = options;
+ for (i = 0; i < RTE_DIM(ice_tx_burst_infos); ++i) {
+ if (pkt_burst == ice_tx_burst_infos[i].pkt_burst) {
+ snprintf(mode->info, sizeof(mode->info), "%s",
+ ice_tx_burst_infos[i].info);
+ ret = 0;
+ break;
+ }
+ }
- return options != 0 ? 0 : -EINVAL;
+ return ret;
}
/* For each value it means, datasheet of hardware can tell more details
#undef RTE_TX_OFFLOAD_BIT2STR
-static const struct {
- uint64_t option;
- const char *name;
-} rte_burst_option_names[] = {
- { RTE_ETH_BURST_SCALAR, "Scalar" },
- { RTE_ETH_BURST_VECTOR, "Vector" },
-
- { RTE_ETH_BURST_ALTIVEC, "AltiVec" },
- { RTE_ETH_BURST_NEON, "Neon" },
- { RTE_ETH_BURST_SSE, "SSE" },
- { RTE_ETH_BURST_AVX2, "AVX2" },
- { RTE_ETH_BURST_AVX512, "AVX512" },
-
- { RTE_ETH_BURST_SCATTERED, "Scattered" },
- { RTE_ETH_BURST_BULK_ALLOC, "Bulk Alloc" },
- { RTE_ETH_BURST_SIMPLE, "Simple" },
- { RTE_ETH_BURST_PER_QUEUE, "Per Queue" },
-};
-
/**
* The user application callback description.
*
dev->dev_ops->tx_burst_mode_get(dev, queue_id, mode));
}
-const char *
-rte_eth_burst_mode_option_name(uint64_t option)
-{
- const char *name = "";
- unsigned int i;
-
- for (i = 0; i < RTE_DIM(rte_burst_option_names); ++i) {
- if (option == rte_burst_option_names[i].option) {
- name = rte_burst_option_names[i].name;
- break;
- }
- }
-
- return name;
-}
-
int
rte_eth_dev_set_mc_addr_list(uint16_t port_id,
struct rte_ether_addr *mc_addr_set,
uint16_t nb_desc; /**< configured number of TXDs. */
} __rte_cache_min_aligned;
+/* Generic Burst mode flag definition, values can be ORed. */
+
/**
- * Burst mode types, values can be ORed to define the burst mode of a driver.
+ * If the queues have different burst mode description, this bit will be set
+ * by PMD, then the application can iterate to retrieve burst description for
+ * all other queues.
*/
-enum rte_eth_burst_mode_option {
- RTE_ETH_BURST_SCALAR = (1 << 0),
- RTE_ETH_BURST_VECTOR = (1 << 1),
-
- /**< bits[15:2] are reserved for each vector type */
- RTE_ETH_BURST_ALTIVEC = (1 << 2),
- RTE_ETH_BURST_NEON = (1 << 3),
- RTE_ETH_BURST_SSE = (1 << 4),
- RTE_ETH_BURST_AVX2 = (1 << 5),
- RTE_ETH_BURST_AVX512 = (1 << 6),
-
- RTE_ETH_BURST_SCATTERED = (1 << 16), /**< Support scattered packets */
- RTE_ETH_BURST_BULK_ALLOC = (1 << 17), /**< Support mbuf bulk alloc */
- RTE_ETH_BURST_SIMPLE = (1 << 18),
-
- RTE_ETH_BURST_PER_QUEUE = (1 << 19), /**< Support per queue burst */
-};
+#define RTE_ETH_BURST_FLAG_PER_QUEUE (1ULL << 0)
/**
* Ethernet device RX/TX queue packet burst mode information structure.
* Used to retrieve information about packet burst mode setting.
*/
struct rte_eth_burst_mode {
- uint64_t options;
+ uint64_t flags; /**< The ORed values of RTE_ETH_BURST_FLAG_xxx */
+
+#define RTE_ETH_BURST_MODE_INFO_SIZE 1024 /**< Maximum size for information */
+ char info[RTE_ETH_BURST_MODE_INFO_SIZE]; /**< burst mode information */
};
/** Maximum name length for extended statistics counters */
int rte_eth_tx_burst_mode_get(uint16_t port_id, uint16_t queue_id,
struct rte_eth_burst_mode *mode);
-/**
- * Retrieve name about burst mode option.
- *
- * @param option
- * The burst mode option of type *rte_eth_burst_mode_option*.
- *
- * @return
- * - "": Not found
- * - "xxx": name of the mode option.
- */
-__rte_experimental
-const char *
-rte_eth_burst_mode_option_name(uint64_t option);
-
/**
* Retrieve device registers and register attributes (number of registers and
* register size)
rte_eth_read_clock;
# added in 19.11
- rte_eth_burst_mode_option_name;
rte_eth_dev_hairpin_capability_get;
rte_eth_rx_burst_mode_get;
rte_eth_rx_hairpin_queue_setup;
git.droids-corp.org / dpdk.git / commitdiff