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net/ice/base: remove unimplemented function prototypes
2020-06-16 Qi Zhangnet/ice/base: remove unimplemented function prototypes
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: add entries in profile TCAM with priority
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: fix memory leak on error path
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: remove unneeded variable
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: fix return value
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: update VSI handle to remaining VSI
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: add rate limiter profile bit mask check
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: reset capabilities before parsing
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: fix advanced switch rule stale information
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: support more PPPoE packet type
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: remove unnecessary case branches
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: return correct error code
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: add debug logs
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: use macro for sizeof
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: support RSS IPv6 prefix
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: adjust function signature style format
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: remove unnecessary braces
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: give time for package download after...
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: allow GENEVE and VXLAN rules with VLAN
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: add NVM helper functions
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: initialize PHY configuration FEC fields
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: add flow director completion report option
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: support FDIR for L2TPV3 ESP AH and PFCP
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: cleanup comment formatting
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: group function prototypes together
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: change IPv6 training packet
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: refactor flow director filter swap
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: consolidate VF promiscuous mode
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: update maximum PHY type high index
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: fix ACL rules index
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: add AUI media type
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: improve VSI filters rebuild
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: gate devices from FW link override
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: report AOC PHY types as fiber
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: consolidate MAC config set
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: avoid undefined behavior
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: disable profile merge for flow director
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: add macros to parse flow director Rx...
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-06-16 Qi Zhangnet/ice/base: support flow director for non-IP packets
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-05-21 Qi Zhangnet/ice/base: fix tunnel type match word handling
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-05-19 Qi Zhangmaintainers: update for ice
Replace Wenzhuo Lu with Qi Zhang.
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-05-19 Qi Zhangnet/ice: fix RSS for GTPU
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-05-11 Qi Zhangnet/ice: fix variable initialization
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-05-05 Qi Zhangnet/ice/base: fix DCF switch rule
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-05-05 Qi Zhangnet/ice/base: workaround unexpected rule deletion
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-04-21 Qi Zhangcommon/iavf: update version
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-04-21 Qi Zhangcommon/iavf: support flow director in virtual channel
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-04-21 Qi Zhangcommon/iavf: support advanced RSS input set change
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-04-21 Qi Zhangcommon/iavf: add virtual channel protocol header
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-04-21 Qi Zhangcommon/iavf: support virtual channel for Flex RXD
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-04-21 Qi Zhangcommon/iavf: add DDP package query in virtual channel
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-04-21 Qi Zhangcommon/iavf: add packet type aborted code
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-04-21 Qi Zhangnet/ice/base: update version
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-04-21 Qi Zhangnet/ice/base: remove unused code in switch rule
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-04-21 Qi Zhangdoc: update ixgbe features list
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-04-21 Qi Zhangdoc: update iavf features list
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-04-21 Qi Zhangdoc: update ice features list
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-04-21 Qi Zhangdoc: update i40e features list
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-04-21 Qi Zhangnet/ice/base: enable RSS for PFCP/L2TP/ESP/AH
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-04-21 Qi Zhangnet/ice/base: fix binary order for GTPU filter
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-04-21 Qi Zhangnet/ice/base: change function to static
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-04-21 Qi Zhangnet/ice/base: support PFCP and NAT-T of switch
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-04-21 Qi Zhangnet/ice/base: move some macros
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-04-21 Qi Zhangnet/ice/base: group case statements
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-04-21 Qi Zhangnet/ice/base: handle critical FW error
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-04-21 Qi Zhangnet/ice/base: improve GTPU extend header handle
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-04-21 Qi Zhangnet/ice/base: allow profile based switch rules
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-04-21 Qi Zhangnet/ice/base: add default DCB parameters
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-04-21 Qi Zhangnet/ice/base: allow adding MAC VLAN filter on port
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-04-21 Qi Zhangnet/ice/base: refactor flow control function
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-04-21 Qi Zhangnet/ice/base: add ethertype check for dummy packet
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-04-21 Qi Zhangnet/ice/base: ignore EMODE when setting PHY config
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-04-21 Qi Zhangnet/ice/base: reduce scope of variables
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-04-21 Qi Zhangnet/ice/base: add more macros for FDID priority
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-04-21 Qi Zhangcommon/iavf: support VSI mapping table
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-04-21 Qi Zhangcommon/iavf: support DCF capability negotiation
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-04-21 Qi Zhangcommon/iavf: add two opcodes to send AdminQ command
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-04-21 Qi Zhangcommon/iavf: update copyright date
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-04-21 Qi Zhangnet/ice/base: add PPPoE IPv6 dummy packet
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-04-21 Qi Zhangnet/ice/base: add reference count to tunnels
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-04-21 Qi Zhangnet/ice/base: add check to IPv4 next protocol
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-04-21 Qi Zhangnet/ice/base: cleanup flow director functions
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-04-21 Qi Zhangnet/ice/base: fix MAC write command
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-04-21 Qi Zhangnet/ice/base: check DDP package compatibility
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-04-21 Qi Zhangnet/ice/base: discover and store size of available...
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-04-21 Qi Zhangnet/ice/base: move functions from common to NVM module
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-04-21 Qi Zhangnet/ice/base: do not access some hardware registers...
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-04-21 Qi Zhangnet/ice/base: add hook to send AdminQ command
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-04-21 Qi Zhangnet/ice/base: update copyright date
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-04-21 Qi Zhangnet/ice/base: add ACL module
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-04-21 Qi Zhangnet/ice/base: store NVM version in extracted format
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-04-21 Qi Zhangnet/ice/base: support PHY persistent feature
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-04-21 Qi Zhangnet/ice/base: fix a couple of casting
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-04-21 Qi Zhangnet/ice/base: implement new shadow RAM read
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-04-21 Qi Zhangnet/ice/base: add macro specifying max NVM offset
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-04-21 Qi Zhangnet/ice/base: extract logic of flat NVM read to function
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-04-21 Qi Zhangnet/ice/base: add AN masks to get PHY capabilities
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-04-21 Qi Zhangnet/ice/base: add shared driver parameter command
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-04-21 Qi Zhangnet/ice/base: add PHY number definition values
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2020-04-21 Qi Zhangnet/ice/base: capitalize abbreviations
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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