drivers/crypto/qat/qat_crypto.c

   1 /*-
   2  *   BSD LICENSE
   3  *
   4  *   Copyright(c) 2015-2016 Intel Corporation. All rights reserved.
   5  *   All rights reserved.
   6  *
   7  *   Redistribution and use in source and binary forms, with or without
   8  *   modification, are permitted provided that the following conditions
   9  *   are met:
  10  *
  11  *       * Redistributions of source code must retain the above copyright
  12  *         notice, this list of conditions and the following disclaimer.
  13  *       * Redistributions in binary form must reproduce the above copyright
  14  *         notice, this list of conditions and the following disclaimer in
  15  *         the documentation and/or other materials provided with the
  16  *         distribution.
  17  *       * Neither the name of Intel Corporation nor the names of its
  18  *         contributors may be used to endorse or promote products derived
  19  *         from this software without specific prior written permission.
  20  *
  21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32  */
  33
  34 #include <stdio.h>
  35 #include <stdlib.h>
  36 #include <strings.h>
  37 #include <string.h>
  38 #include <inttypes.h>
  39 #include <errno.h>
  40 #include <sys/queue.h>
  41 #include <stdarg.h>
  42
  43 #include <rte_common.h>
  44 #include <rte_log.h>
  45 #include <rte_debug.h>
  46 #include <rte_memory.h>
  47 #include <rte_memzone.h>
  48 #include <rte_tailq.h>
  49 #include <rte_ether.h>
  50 #include <rte_malloc.h>
  51 #include <rte_launch.h>
  52 #include <rte_eal.h>
  53 #include <rte_per_lcore.h>
  54 #include <rte_lcore.h>
  55 #include <rte_atomic.h>
  56 #include <rte_branch_prediction.h>
  57 #include <rte_ring.h>
  58 #include <rte_mempool.h>
  59 #include <rte_mbuf.h>
  60 #include <rte_string_fns.h>
  61 #include <rte_spinlock.h>
  62 #include <rte_mbuf_offload.h>
  63 #include <rte_hexdump.h>
  64
  65 #include "qat_logs.h"
  66 #include "qat_algs.h"
  67 #include "qat_crypto.h"
  68 #include "adf_transport_access_macros.h"
  69
  70
  71 static inline uint32_t
  72 adf_modulo(uint32_t data, uint32_t shift);
  73
  74 static inline int
  75 qat_write_hw_desc_entry(struct rte_crypto_op *op, uint8_t *out_msg);
  76
  77 void qat_crypto_sym_clear_session(struct rte_cryptodev *dev,
  78                 void *session)
  79 {
  80         struct qat_session *sess = session;
  81         phys_addr_t cd_paddr = sess->cd_paddr;
  82
  83         PMD_INIT_FUNC_TRACE();
  84         if (session) {
  85                 memset(sess, 0, qat_crypto_sym_get_session_private_size(dev));
  86
  87                 sess->cd_paddr = cd_paddr;
  88         }
  89 }
  90
  91 static int
  92 qat_get_cmd_id(const struct rte_crypto_sym_xform *xform)
  93 {
  94         if (xform->next == NULL)
  95                 return -1;
  96
  97         /* Cipher Only */
  98         if (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER && xform->next == NULL)
  99                 return -1; /* return ICP_QAT_FW_LA_CMD_CIPHER; */
 100
 101         /* Authentication Only */
 102         if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH && xform->next == NULL)
 103                 return -1; /* return ICP_QAT_FW_LA_CMD_AUTH; */
 104
 105         /* Cipher then Authenticate */
 106         if (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER &&
 107                         xform->next->type == RTE_CRYPTO_SYM_XFORM_AUTH)
 108                 return ICP_QAT_FW_LA_CMD_CIPHER_HASH;
 109
 110         /* Authenticate then Cipher */
 111         if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH &&
 112                         xform->next->type == RTE_CRYPTO_SYM_XFORM_CIPHER)
 113                 return ICP_QAT_FW_LA_CMD_HASH_CIPHER;
 114
 115         return -1;
 116 }
 117
 118 static struct rte_crypto_auth_xform *
 119 qat_get_auth_xform(struct rte_crypto_sym_xform *xform)
 120 {
 121         do {
 122                 if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH)
 123                         return &xform->auth;
 124
 125                 xform = xform->next;
 126         } while (xform);
 127
 128         return NULL;
 129 }
 130
 131 static struct rte_crypto_cipher_xform *
 132 qat_get_cipher_xform(struct rte_crypto_sym_xform *xform)
 133 {
 134         do {
 135                 if (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER)
 136                         return &xform->cipher;
 137
 138                 xform = xform->next;
 139         } while (xform);
 140
 141         return NULL;
 142 }
 143
 144
 145 void *
 146 qat_crypto_sym_configure_session(struct rte_cryptodev *dev,
 147                 struct rte_crypto_sym_xform *xform, void *session_private)
 148 {
 149         struct qat_pmd_private *internals = dev->data->dev_private;
 150
 151         struct qat_session *session = session_private;
 152
 153         struct rte_crypto_auth_xform *auth_xform = NULL;
 154         struct rte_crypto_cipher_xform *cipher_xform = NULL;
 155
 156         int qat_cmd_id;
 157
 158         PMD_INIT_FUNC_TRACE();
 159
 160         /* Get requested QAT command id */
 161         qat_cmd_id = qat_get_cmd_id(xform);
 162         if (qat_cmd_id < 0 || qat_cmd_id >= ICP_QAT_FW_LA_CMD_DELIMITER) {
 163                 PMD_DRV_LOG(ERR, "Unsupported xform chain requested");
 164                 goto error_out;
 165         }
 166         session->qat_cmd = (enum icp_qat_fw_la_cmd_id)qat_cmd_id;
 167
 168         /* Get cipher xform from crypto xform chain */
 169         cipher_xform = qat_get_cipher_xform(xform);
 170
 171         switch (cipher_xform->algo) {
 172         case RTE_CRYPTO_CIPHER_AES_CBC:
 173                 if (qat_alg_validate_aes_key(cipher_xform->key.length,
 174                                 &session->qat_cipher_alg) != 0) {
 175                         PMD_DRV_LOG(ERR, "Invalid AES cipher key size");
 176                         goto error_out;
 177                 }
 178                 session->qat_mode = ICP_QAT_HW_CIPHER_CBC_MODE;
 179                 break;
 180         case RTE_CRYPTO_CIPHER_AES_GCM:
 181                 if (qat_alg_validate_aes_key(cipher_xform->key.length,
 182                                 &session->qat_cipher_alg) != 0) {
 183                         PMD_DRV_LOG(ERR, "Invalid AES cipher key size");
 184                         goto error_out;
 185                 }
 186                 session->qat_mode = ICP_QAT_HW_CIPHER_CTR_MODE;
 187                 break;
 188         case RTE_CRYPTO_CIPHER_NULL:
 189         case RTE_CRYPTO_CIPHER_3DES_ECB:
 190         case RTE_CRYPTO_CIPHER_3DES_CBC:
 191         case RTE_CRYPTO_CIPHER_AES_ECB:
 192         case RTE_CRYPTO_CIPHER_AES_CTR:
 193         case RTE_CRYPTO_CIPHER_AES_CCM:
 194         case RTE_CRYPTO_CIPHER_KASUMI_F8:
 195                 PMD_DRV_LOG(ERR, "Crypto: Unsupported Cipher alg %u",
 196                                 cipher_xform->algo);
 197                 goto error_out;
 198         default:
 199                 PMD_DRV_LOG(ERR, "Crypto: Undefined Cipher specified %u\n",
 200                                 cipher_xform->algo);
 201                 goto error_out;
 202         }
 203
 204         if (cipher_xform->op == RTE_CRYPTO_CIPHER_OP_ENCRYPT)
 205                 session->qat_dir = ICP_QAT_HW_CIPHER_ENCRYPT;
 206         else
 207                 session->qat_dir = ICP_QAT_HW_CIPHER_DECRYPT;
 208
 209
 210         /* Get authentication xform from Crypto xform chain */
 211         auth_xform = qat_get_auth_xform(xform);
 212
 213         switch (auth_xform->algo) {
 214         case RTE_CRYPTO_AUTH_SHA1_HMAC:
 215                 session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_SHA1;
 216                 break;
 217         case RTE_CRYPTO_AUTH_SHA256_HMAC:
 218                 session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_SHA256;
 219                 break;
 220         case RTE_CRYPTO_AUTH_SHA512_HMAC:
 221                 session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_SHA512;
 222                 break;
 223         case RTE_CRYPTO_AUTH_AES_XCBC_MAC:
 224                 session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_AES_XCBC_MAC;
 225                 break;
 226         case RTE_CRYPTO_AUTH_AES_GCM:
 227         case RTE_CRYPTO_AUTH_AES_GMAC:
 228                 session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_GALOIS_128;
 229                 break;
 230         case RTE_CRYPTO_AUTH_NULL:
 231         case RTE_CRYPTO_AUTH_SHA1:
 232         case RTE_CRYPTO_AUTH_SHA256:
 233         case RTE_CRYPTO_AUTH_SHA512:
 234         case RTE_CRYPTO_AUTH_SHA224:
 235         case RTE_CRYPTO_AUTH_SHA224_HMAC:
 236         case RTE_CRYPTO_AUTH_SHA384:
 237         case RTE_CRYPTO_AUTH_SHA384_HMAC:
 238         case RTE_CRYPTO_AUTH_MD5:
 239         case RTE_CRYPTO_AUTH_MD5_HMAC:
 240         case RTE_CRYPTO_AUTH_AES_CCM:
 241         case RTE_CRYPTO_AUTH_KASUMI_F9:
 242         case RTE_CRYPTO_AUTH_SNOW3G_UIA2:
 243         case RTE_CRYPTO_AUTH_AES_CMAC:
 244         case RTE_CRYPTO_AUTH_AES_CBC_MAC:
 245         case RTE_CRYPTO_AUTH_ZUC_EIA3:
 246                 PMD_DRV_LOG(ERR, "Crypto: Unsupported hash alg %u",
 247                                 auth_xform->algo);
 248                 goto error_out;
 249         default:
 250                 PMD_DRV_LOG(ERR, "Crypto: Undefined Hash algo %u specified",
 251                                 auth_xform->algo);
 252                 goto error_out;
 253         }
 254
 255         if (qat_alg_aead_session_create_content_desc(session,
 256                 cipher_xform->key.data,
 257                 cipher_xform->key.length,
 258                 auth_xform->key.data,
 259                 auth_xform->key.length,
 260                 auth_xform->add_auth_data_length,
 261                 auth_xform->digest_length))
 262                 goto error_out;
 263
 264         return (struct rte_crypto_sym_session *)session;
 265
 266 error_out:
 267         rte_mempool_put(internals->sess_mp, session);
 268         return NULL;
 269 }
 270
 271 unsigned qat_crypto_sym_get_session_private_size(
 272                 struct rte_cryptodev *dev __rte_unused)
 273 {
 274         return RTE_ALIGN_CEIL(sizeof(struct qat_session), 8);
 275 }
 276
 277
 278 uint16_t
 279 qat_pmd_enqueue_op_burst(void *qp, struct rte_crypto_op **ops,
 280                 uint16_t nb_ops)
 281 {
 282         register struct qat_queue *queue;
 283         struct qat_qp *tmp_qp = (struct qat_qp *)qp;
 284         register uint32_t nb_ops_sent = 0;
 285         register struct rte_crypto_op **cur_op = ops;
 286         register int ret;
 287         uint16_t nb_ops_possible = nb_ops;
 288         register uint8_t *base_addr;
 289         register uint32_t tail;
 290         int overflow;
 291
 292         /* read params used a lot in main loop into registers */
 293         queue = &(tmp_qp->tx_q);
 294         base_addr = (uint8_t *)queue->base_addr;
 295         tail = queue->tail;
 296
 297         /* Find how many can actually fit on the ring */
 298         overflow = rte_atomic16_add_return(&tmp_qp->inflights16, nb_ops)
 299                                 - queue->max_inflights;
 300         if (overflow > 0) {
 301                 rte_atomic16_sub(&tmp_qp->inflights16, overflow);
 302                 nb_ops_possible = nb_ops - overflow;
 303                 if (nb_ops_possible == 0)
 304                         return 0;
 305         }
 306
 307         while (nb_ops_sent != nb_ops_possible) {
 308                 ret = qat_write_hw_desc_entry(*cur_op, base_addr + tail);
 309                 if (ret != 0) {
 310                         tmp_qp->stats.enqueue_err_count++;
 311                         if (nb_ops_sent == 0)
 312                                 return 0;
 313                         goto kick_tail;
 314                 }
 315
 316                 tail = adf_modulo(tail + queue->msg_size, queue->modulo);
 317                 nb_ops_sent++;
 318                 cur_op++;
 319         }
 320 kick_tail:
 321         WRITE_CSR_RING_TAIL(tmp_qp->mmap_bar_addr, queue->hw_bundle_number,
 322                         queue->hw_queue_number, tail);
 323         queue->tail = tail;
 324         tmp_qp->stats.enqueued_count += nb_ops_sent;
 325         return nb_ops_sent;
 326 }
 327
 328 uint16_t
 329 qat_pmd_dequeue_op_burst(void *qp, struct rte_crypto_op **ops,
 330                 uint16_t nb_ops)
 331 {
 332         struct qat_queue *queue;
 333         struct qat_qp *tmp_qp = (struct qat_qp *)qp;
 334         uint32_t msg_counter = 0;
 335         struct rte_crypto_op *rx_op;
 336         struct icp_qat_fw_comn_resp *resp_msg;
 337
 338         queue = &(tmp_qp->rx_q);
 339         resp_msg = (struct icp_qat_fw_comn_resp *)
 340                         ((uint8_t *)queue->base_addr + queue->head);
 341
 342         while (*(uint32_t *)resp_msg != ADF_RING_EMPTY_SIG &&
 343                         msg_counter != nb_ops) {
 344                 rx_op = (struct rte_crypto_op *)(uintptr_t)
 345                                 (resp_msg->opaque_data);
 346
 347 #ifdef RTE_LIBRTE_PMD_QAT_DEBUG_RX
 348                 rte_hexdump(stdout, "qat_response:", (uint8_t *)resp_msg,
 349                                 sizeof(struct icp_qat_fw_comn_resp));
 350 #endif
 351                 if (ICP_QAT_FW_COMN_STATUS_FLAG_OK !=
 352                                 ICP_QAT_FW_COMN_RESP_CRYPTO_STAT_GET(
 353                                         resp_msg->comn_hdr.comn_status)) {
 354                         rx_op->status = RTE_CRYPTO_OP_STATUS_AUTH_FAILED;
 355                 } else {
 356                         rx_op->status = RTE_CRYPTO_OP_STATUS_SUCCESS;
 357                 }
 358                 *(uint32_t *)resp_msg = ADF_RING_EMPTY_SIG;
 359                 queue->head = adf_modulo(queue->head +
 360                                 queue->msg_size,
 361                                 ADF_RING_SIZE_MODULO(queue->queue_size));
 362                 resp_msg = (struct icp_qat_fw_comn_resp *)
 363                                         ((uint8_t *)queue->base_addr +
 364                                                         queue->head);
 365                 *ops = rx_op;
 366                 ops++;
 367                 msg_counter++;
 368         }
 369         if (msg_counter > 0) {
 370                 WRITE_CSR_RING_HEAD(tmp_qp->mmap_bar_addr,
 371                                         queue->hw_bundle_number,
 372                                         queue->hw_queue_number, queue->head);
 373                 rte_atomic16_sub(&tmp_qp->inflights16, msg_counter);
 374                 tmp_qp->stats.dequeued_count += msg_counter;
 375         }
 376         return msg_counter;
 377 }
 378
 379 static inline int
 380 qat_write_hw_desc_entry(struct rte_crypto_op *op, uint8_t *out_msg)
 381 {
 382         struct qat_session *ctx;
 383         struct icp_qat_fw_la_cipher_req_params *cipher_param;
 384         struct icp_qat_fw_la_auth_req_params *auth_param;
 385         register struct icp_qat_fw_la_bulk_req *qat_req;
 386
 387 #ifdef RTE_LIBRTE_PMD_QAT_DEBUG_TX
 388         if (unlikely(op->type != RTE_CRYPTO_OP_TYPE_SYMMETRIC)) {
 389                 PMD_DRV_LOG(ERR, "QAT PMD only supports symmetric crypto "
 390                                 "operation requests, op (%p) is not a "
 391                                 "symmetric operation.", op);
 392                 return -EINVAL;
 393         }
 394 #endif
 395         if (unlikely(op->sym->type == RTE_CRYPTO_SYM_OP_SESSIONLESS)) {
 396                 PMD_DRV_LOG(ERR, "QAT PMD only supports session oriented"
 397                                 " requests, op (%p) is sessionless.", op);
 398                 return -EINVAL;
 399         }
 400
 401         if (unlikely(op->sym->session->type != RTE_CRYPTODEV_QAT_SYM_PMD)) {
 402                 PMD_DRV_LOG(ERR, "Session was not created for this device");
 403                 return -EINVAL;
 404         }
 405
 406         ctx = (struct qat_session *)op->sym->session->_private;
 407         qat_req = (struct icp_qat_fw_la_bulk_req *)out_msg;
 408         *qat_req = ctx->fw_req;
 409         qat_req->comn_mid.opaque_data = (uint64_t)(uintptr_t)op;
 410
 411         /*
 412          * The following code assumes:
 413          * - single entry buffer.
 414          * - always in place.
 415          */
 416         qat_req->comn_mid.dst_length =
 417                         qat_req->comn_mid.src_length =
 418                                         rte_pktmbuf_data_len(op->sym->m_src);
 419         qat_req->comn_mid.dest_data_addr =
 420                         qat_req->comn_mid.src_data_addr =
 421                                         rte_pktmbuf_mtophys(op->sym->m_src);
 422         cipher_param = (void *)&qat_req->serv_specif_rqpars;
 423         auth_param = (void *)((uint8_t *)cipher_param + sizeof(*cipher_param));
 424
 425         cipher_param->cipher_length = op->sym->cipher.data.length;
 426         cipher_param->cipher_offset = op->sym->cipher.data.offset;
 427         if (op->sym->cipher.iv.length && (op->sym->cipher.iv.length <=
 428                         sizeof(cipher_param->u.cipher_IV_array))) {
 429                 rte_memcpy(cipher_param->u.cipher_IV_array,
 430                                 op->sym->cipher.iv.data,
 431                                 op->sym->cipher.iv.length);
 432         } else {
 433                 ICP_QAT_FW_LA_CIPH_IV_FLD_FLAG_SET(
 434                                 qat_req->comn_hdr.serv_specif_flags,
 435                                 ICP_QAT_FW_CIPH_IV_64BIT_PTR);
 436                 cipher_param->u.s.cipher_IV_ptr = op->sym->cipher.iv.phys_addr;
 437         }
 438         if (op->sym->auth.digest.phys_addr) {
 439                 ICP_QAT_FW_LA_DIGEST_IN_BUFFER_SET(
 440                                 qat_req->comn_hdr.serv_specif_flags,
 441                                 ICP_QAT_FW_LA_NO_DIGEST_IN_BUFFER);
 442                 auth_param->auth_res_addr = op->sym->auth.digest.phys_addr;
 443         }
 444         auth_param->auth_off = op->sym->auth.data.offset;
 445         auth_param->auth_len = op->sym->auth.data.length;
 446
 447         auth_param->u1.aad_adr = op->sym->auth.aad.phys_addr;
 448         /* (GCM) aad length(240 max) will be at this location after precompute */
 449         if (ctx->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_GALOIS_128 ||
 450                 ctx->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_GALOIS_64) {
 451                 auth_param->u2.aad_sz =
 452                 ALIGN_POW2_ROUNDUP(ctx->cd.hash.sha.state1[
 453                                         ICP_QAT_HW_GALOIS_128_STATE1_SZ +
 454                                         ICP_QAT_HW_GALOIS_H_SZ + 3], 16);
 455         }
 456         auth_param->hash_state_sz = (auth_param->u2.aad_sz) >> 3;
 457
 458
 459 #ifdef RTE_LIBRTE_PMD_QAT_DEBUG_TX
 460         rte_hexdump(stdout, "qat_req:", qat_req,
 461                         sizeof(struct icp_qat_fw_la_bulk_req));
 462         rte_hexdump(stdout, "src_data:",
 463                         rte_pktmbuf_mtod(op->sym->m_src, uint8_t*),
 464                         rte_pktmbuf_data_len(op->sym->m_src));
 465         rte_hexdump(stdout, "iv:", op->sym->cipher.iv.data,
 466                         op->sym->cipher.iv.length);
 467         rte_hexdump(stdout, "digest:", op->sym->auth.digest.data,
 468                         op->sym->auth.digest.length);
 469         rte_hexdump(stdout, "aad:", op->sym->auth.aad.data,
 470                         op->sym->auth.aad.length);
 471 #endif
 472         return 0;
 473 }
 474
 475 static inline uint32_t adf_modulo(uint32_t data, uint32_t shift)
 476 {
 477         uint32_t div = data >> shift;
 478         uint32_t mult = div << shift;
 479
 480         return data - mult;
 481 }
 482
 483 void qat_crypto_sym_session_init(struct rte_mempool *mp, void *priv_sess)
 484 {
 485         struct qat_session *s = priv_sess;
 486
 487         PMD_INIT_FUNC_TRACE();
 488         s->cd_paddr = rte_mempool_virt2phy(mp, &s->cd);
 489 }
 490
 491 int qat_dev_config(__rte_unused struct rte_cryptodev *dev)
 492 {
 493         PMD_INIT_FUNC_TRACE();
 494         return -ENOTSUP;
 495 }
 496
 497 int qat_dev_start(__rte_unused struct rte_cryptodev *dev)
 498 {
 499         PMD_INIT_FUNC_TRACE();
 500         return 0;
 501 }
 502
 503 void qat_dev_stop(__rte_unused struct rte_cryptodev *dev)
 504 {
 505         PMD_INIT_FUNC_TRACE();
 506 }
 507
 508 int qat_dev_close(struct rte_cryptodev *dev)
 509 {
 510         int i, ret;
 511
 512         PMD_INIT_FUNC_TRACE();
 513
 514         for (i = 0; i < dev->data->nb_queue_pairs; i++) {
 515                 ret = qat_crypto_sym_qp_release(dev, i);
 516                 if (ret < 0)
 517                         return ret;
 518         }
 519
 520         return 0;
 521 }
 522
 523 void qat_dev_info_get(__rte_unused struct rte_cryptodev *dev,
 524                                 struct rte_cryptodev_info *info)
 525 {
 526         struct qat_pmd_private *internals = dev->data->dev_private;
 527
 528         PMD_INIT_FUNC_TRACE();
 529         if (info != NULL) {
 530                 info->max_nb_queue_pairs =
 531                                 ADF_NUM_SYM_QPS_PER_BUNDLE *
 532                                 ADF_NUM_BUNDLES_PER_DEV;
 533
 534                 info->sym.max_nb_sessions = internals->max_nb_sessions;
 535                 info->dev_type = RTE_CRYPTODEV_QAT_SYM_PMD;
 536         }
 537 }
 538
 539 void qat_crypto_sym_stats_get(struct rte_cryptodev *dev,
 540                 struct rte_cryptodev_stats *stats)
 541 {
 542         int i;
 543         struct qat_qp **qp = (struct qat_qp **)(dev->data->queue_pairs);
 544
 545         PMD_INIT_FUNC_TRACE();
 546         if (stats == NULL) {
 547                 PMD_DRV_LOG(ERR, "invalid stats ptr NULL");
 548                 return;
 549         }
 550         for (i = 0; i < dev->data->nb_queue_pairs; i++) {
 551                 if (qp[i] == NULL) {
 552                         PMD_DRV_LOG(DEBUG, "Uninitialised queue pair");
 553                         continue;
 554                 }
 555
 556                 stats->enqueued_count += qp[i]->stats.enqueued_count;
 557                 stats->dequeued_count += qp[i]->stats.enqueued_count;
 558                 stats->enqueue_err_count += qp[i]->stats.enqueue_err_count;
 559                 stats->dequeue_err_count += qp[i]->stats.enqueue_err_count;
 560         }
 561 }
 562
 563 void qat_crypto_sym_stats_reset(struct rte_cryptodev *dev)
 564 {
 565         int i;
 566         struct qat_qp **qp = (struct qat_qp **)(dev->data->queue_pairs);
 567
 568         PMD_INIT_FUNC_TRACE();
 569         for (i = 0; i < dev->data->nb_queue_pairs; i++)
 570                 memset(&(qp[i]->stats), 0, sizeof(qp[i]->stats));
 571         PMD_DRV_LOG(DEBUG, "QAT crypto: stats cleared");
 572 }