drivers/crypto/qat/qat_crypto.c

   1 /*-
   2  *   BSD LICENSE
   3  *
   4  *   Copyright(c) 2015-2016 Intel Corporation. All rights reserved.
   5  *   All rights reserved.
   6  *
   7  *   Redistribution and use in source and binary forms, with or without
   8  *   modification, are permitted provided that the following conditions
   9  *   are met:
  10  *
  11  *       * Redistributions of source code must retain the above copyright
  12  *         notice, this list of conditions and the following disclaimer.
  13  *       * Redistributions in binary form must reproduce the above copyright
  14  *         notice, this list of conditions and the following disclaimer in
  15  *         the documentation and/or other materials provided with the
  16  *         distribution.
  17  *       * Neither the name of Intel Corporation nor the names of its
  18  *         contributors may be used to endorse or promote products derived
  19  *         from this software without specific prior written permission.
  20  *
  21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32  */
  33
  34 #include <stdio.h>
  35 #include <stdlib.h>
  36 #include <strings.h>
  37 #include <string.h>
  38 #include <inttypes.h>
  39 #include <errno.h>
  40 #include <sys/queue.h>
  41 #include <stdarg.h>
  42
  43 #include <rte_common.h>
  44 #include <rte_log.h>
  45 #include <rte_debug.h>
  46 #include <rte_memory.h>
  47 #include <rte_memzone.h>
  48 #include <rte_tailq.h>
  49 #include <rte_ether.h>
  50 #include <rte_malloc.h>
  51 #include <rte_launch.h>
  52 #include <rte_eal.h>
  53 #include <rte_per_lcore.h>
  54 #include <rte_lcore.h>
  55 #include <rte_atomic.h>
  56 #include <rte_branch_prediction.h>
  57 #include <rte_ring.h>
  58 #include <rte_mempool.h>
  59 #include <rte_mbuf.h>
  60 #include <rte_string_fns.h>
  61 #include <rte_spinlock.h>
  62 #include <rte_hexdump.h>
  63
  64 #include "qat_logs.h"
  65 #include "qat_algs.h"
  66 #include "qat_crypto.h"
  67 #include "adf_transport_access_macros.h"
  68
  69
  70 static inline uint32_t
  71 adf_modulo(uint32_t data, uint32_t shift);
  72
  73 static inline int
  74 qat_write_hw_desc_entry(struct rte_crypto_op *op, uint8_t *out_msg);
  75
  76 void qat_crypto_sym_clear_session(struct rte_cryptodev *dev,
  77                 void *session)
  78 {
  79         struct qat_session *sess = session;
  80         phys_addr_t cd_paddr = sess->cd_paddr;
  81
  82         PMD_INIT_FUNC_TRACE();
  83         if (session) {
  84                 memset(sess, 0, qat_crypto_sym_get_session_private_size(dev));
  85
  86                 sess->cd_paddr = cd_paddr;
  87         }
  88 }
  89
  90 static int
  91 qat_get_cmd_id(const struct rte_crypto_sym_xform *xform)
  92 {
  93         if (xform->next == NULL)
  94                 return -1;
  95
  96         /* Cipher Only */
  97         if (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER && xform->next == NULL)
  98                 return -1; /* return ICP_QAT_FW_LA_CMD_CIPHER; */
  99
 100         /* Authentication Only */
 101         if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH && xform->next == NULL)
 102                 return -1; /* return ICP_QAT_FW_LA_CMD_AUTH; */
 103
 104         /* Cipher then Authenticate */
 105         if (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER &&
 106                         xform->next->type == RTE_CRYPTO_SYM_XFORM_AUTH)
 107                 return ICP_QAT_FW_LA_CMD_CIPHER_HASH;
 108
 109         /* Authenticate then Cipher */
 110         if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH &&
 111                         xform->next->type == RTE_CRYPTO_SYM_XFORM_CIPHER)
 112                 return ICP_QAT_FW_LA_CMD_HASH_CIPHER;
 113
 114         return -1;
 115 }
 116
 117 static struct rte_crypto_auth_xform *
 118 qat_get_auth_xform(struct rte_crypto_sym_xform *xform)
 119 {
 120         do {
 121                 if (xform->type == RTE_CRYPTO_SYM_XFORM_AUTH)
 122                         return &xform->auth;
 123
 124                 xform = xform->next;
 125         } while (xform);
 126
 127         return NULL;
 128 }
 129
 130 static struct rte_crypto_cipher_xform *
 131 qat_get_cipher_xform(struct rte_crypto_sym_xform *xform)
 132 {
 133         do {
 134                 if (xform->type == RTE_CRYPTO_SYM_XFORM_CIPHER)
 135                         return &xform->cipher;
 136
 137                 xform = xform->next;
 138         } while (xform);
 139
 140         return NULL;
 141 }
 142
 143
 144 void *
 145 qat_crypto_sym_configure_session(struct rte_cryptodev *dev,
 146                 struct rte_crypto_sym_xform *xform, void *session_private)
 147 {
 148         struct qat_pmd_private *internals = dev->data->dev_private;
 149
 150         struct qat_session *session = session_private;
 151
 152         struct rte_crypto_auth_xform *auth_xform = NULL;
 153         struct rte_crypto_cipher_xform *cipher_xform = NULL;
 154
 155         int qat_cmd_id;
 156
 157         PMD_INIT_FUNC_TRACE();
 158
 159         /* Get requested QAT command id */
 160         qat_cmd_id = qat_get_cmd_id(xform);
 161         if (qat_cmd_id < 0 || qat_cmd_id >= ICP_QAT_FW_LA_CMD_DELIMITER) {
 162                 PMD_DRV_LOG(ERR, "Unsupported xform chain requested");
 163                 goto error_out;
 164         }
 165         session->qat_cmd = (enum icp_qat_fw_la_cmd_id)qat_cmd_id;
 166
 167         /* Get cipher xform from crypto xform chain */
 168         cipher_xform = qat_get_cipher_xform(xform);
 169
 170         switch (cipher_xform->algo) {
 171         case RTE_CRYPTO_CIPHER_AES_CBC:
 172                 if (qat_alg_validate_aes_key(cipher_xform->key.length,
 173                                 &session->qat_cipher_alg) != 0) {
 174                         PMD_DRV_LOG(ERR, "Invalid AES cipher key size");
 175                         goto error_out;
 176                 }
 177                 session->qat_mode = ICP_QAT_HW_CIPHER_CBC_MODE;
 178                 break;
 179         case RTE_CRYPTO_CIPHER_AES_GCM:
 180                 if (qat_alg_validate_aes_key(cipher_xform->key.length,
 181                                 &session->qat_cipher_alg) != 0) {
 182                         PMD_DRV_LOG(ERR, "Invalid AES cipher key size");
 183                         goto error_out;
 184                 }
 185                 session->qat_mode = ICP_QAT_HW_CIPHER_CTR_MODE;
 186                 break;
 187         case RTE_CRYPTO_CIPHER_NULL:
 188         case RTE_CRYPTO_CIPHER_3DES_ECB:
 189         case RTE_CRYPTO_CIPHER_3DES_CBC:
 190         case RTE_CRYPTO_CIPHER_AES_ECB:
 191         case RTE_CRYPTO_CIPHER_AES_CTR:
 192         case RTE_CRYPTO_CIPHER_AES_CCM:
 193         case RTE_CRYPTO_CIPHER_KASUMI_F8:
 194                 PMD_DRV_LOG(ERR, "Crypto: Unsupported Cipher alg %u",
 195                                 cipher_xform->algo);
 196                 goto error_out;
 197         default:
 198                 PMD_DRV_LOG(ERR, "Crypto: Undefined Cipher specified %u\n",
 199                                 cipher_xform->algo);
 200                 goto error_out;
 201         }
 202
 203         if (cipher_xform->op == RTE_CRYPTO_CIPHER_OP_ENCRYPT)
 204                 session->qat_dir = ICP_QAT_HW_CIPHER_ENCRYPT;
 205         else
 206                 session->qat_dir = ICP_QAT_HW_CIPHER_DECRYPT;
 207
 208
 209         /* Get authentication xform from Crypto xform chain */
 210         auth_xform = qat_get_auth_xform(xform);
 211
 212         switch (auth_xform->algo) {
 213         case RTE_CRYPTO_AUTH_SHA1_HMAC:
 214                 session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_SHA1;
 215                 break;
 216         case RTE_CRYPTO_AUTH_SHA256_HMAC:
 217                 session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_SHA256;
 218                 break;
 219         case RTE_CRYPTO_AUTH_SHA512_HMAC:
 220                 session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_SHA512;
 221                 break;
 222         case RTE_CRYPTO_AUTH_AES_XCBC_MAC:
 223                 session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_AES_XCBC_MAC;
 224                 break;
 225         case RTE_CRYPTO_AUTH_AES_GCM:
 226         case RTE_CRYPTO_AUTH_AES_GMAC:
 227                 session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_GALOIS_128;
 228                 break;
 229         case RTE_CRYPTO_AUTH_NULL:
 230         case RTE_CRYPTO_AUTH_SHA1:
 231         case RTE_CRYPTO_AUTH_SHA256:
 232         case RTE_CRYPTO_AUTH_SHA512:
 233         case RTE_CRYPTO_AUTH_SHA224:
 234         case RTE_CRYPTO_AUTH_SHA224_HMAC:
 235         case RTE_CRYPTO_AUTH_SHA384:
 236         case RTE_CRYPTO_AUTH_SHA384_HMAC:
 237         case RTE_CRYPTO_AUTH_MD5:
 238         case RTE_CRYPTO_AUTH_MD5_HMAC:
 239         case RTE_CRYPTO_AUTH_AES_CCM:
 240         case RTE_CRYPTO_AUTH_KASUMI_F9:
 241         case RTE_CRYPTO_AUTH_SNOW3G_UIA2:
 242         case RTE_CRYPTO_AUTH_AES_CMAC:
 243         case RTE_CRYPTO_AUTH_AES_CBC_MAC:
 244         case RTE_CRYPTO_AUTH_ZUC_EIA3:
 245                 PMD_DRV_LOG(ERR, "Crypto: Unsupported hash alg %u",
 246                                 auth_xform->algo);
 247                 goto error_out;
 248         default:
 249                 PMD_DRV_LOG(ERR, "Crypto: Undefined Hash algo %u specified",
 250                                 auth_xform->algo);
 251                 goto error_out;
 252         }
 253
 254         if (qat_alg_aead_session_create_content_desc(session,
 255                 cipher_xform->key.data,
 256                 cipher_xform->key.length,
 257                 auth_xform->key.data,
 258                 auth_xform->key.length,
 259                 auth_xform->add_auth_data_length,
 260                 auth_xform->digest_length))
 261                 goto error_out;
 262
 263         return (struct rte_crypto_sym_session *)session;
 264
 265 error_out:
 266         rte_mempool_put(internals->sess_mp, session);
 267         return NULL;
 268 }
 269
 270 unsigned qat_crypto_sym_get_session_private_size(
 271                 struct rte_cryptodev *dev __rte_unused)
 272 {
 273         return RTE_ALIGN_CEIL(sizeof(struct qat_session), 8);
 274 }
 275
 276
 277 uint16_t
 278 qat_pmd_enqueue_op_burst(void *qp, struct rte_crypto_op **ops,
 279                 uint16_t nb_ops)
 280 {
 281         register struct qat_queue *queue;
 282         struct qat_qp *tmp_qp = (struct qat_qp *)qp;
 283         register uint32_t nb_ops_sent = 0;
 284         register struct rte_crypto_op **cur_op = ops;
 285         register int ret;
 286         uint16_t nb_ops_possible = nb_ops;
 287         register uint8_t *base_addr;
 288         register uint32_t tail;
 289         int overflow;
 290
 291         /* read params used a lot in main loop into registers */
 292         queue = &(tmp_qp->tx_q);
 293         base_addr = (uint8_t *)queue->base_addr;
 294         tail = queue->tail;
 295
 296         /* Find how many can actually fit on the ring */
 297         overflow = rte_atomic16_add_return(&tmp_qp->inflights16, nb_ops)
 298                                 - queue->max_inflights;
 299         if (overflow > 0) {
 300                 rte_atomic16_sub(&tmp_qp->inflights16, overflow);
 301                 nb_ops_possible = nb_ops - overflow;
 302                 if (nb_ops_possible == 0)
 303                         return 0;
 304         }
 305
 306         while (nb_ops_sent != nb_ops_possible) {
 307                 ret = qat_write_hw_desc_entry(*cur_op, base_addr + tail);
 308                 if (ret != 0) {
 309                         tmp_qp->stats.enqueue_err_count++;
 310                         if (nb_ops_sent == 0)
 311                                 return 0;
 312                         goto kick_tail;
 313                 }
 314
 315                 tail = adf_modulo(tail + queue->msg_size, queue->modulo);
 316                 nb_ops_sent++;
 317                 cur_op++;
 318         }
 319 kick_tail:
 320         WRITE_CSR_RING_TAIL(tmp_qp->mmap_bar_addr, queue->hw_bundle_number,
 321                         queue->hw_queue_number, tail);
 322         queue->tail = tail;
 323         tmp_qp->stats.enqueued_count += nb_ops_sent;
 324         return nb_ops_sent;
 325 }
 326
 327 uint16_t
 328 qat_pmd_dequeue_op_burst(void *qp, struct rte_crypto_op **ops,
 329                 uint16_t nb_ops)
 330 {
 331         struct qat_queue *queue;
 332         struct qat_qp *tmp_qp = (struct qat_qp *)qp;
 333         uint32_t msg_counter = 0;
 334         struct rte_crypto_op *rx_op;
 335         struct icp_qat_fw_comn_resp *resp_msg;
 336
 337         queue = &(tmp_qp->rx_q);
 338         resp_msg = (struct icp_qat_fw_comn_resp *)
 339                         ((uint8_t *)queue->base_addr + queue->head);
 340
 341         while (*(uint32_t *)resp_msg != ADF_RING_EMPTY_SIG &&
 342                         msg_counter != nb_ops) {
 343                 rx_op = (struct rte_crypto_op *)(uintptr_t)
 344                                 (resp_msg->opaque_data);
 345
 346 #ifdef RTE_LIBRTE_PMD_QAT_DEBUG_RX
 347                 rte_hexdump(stdout, "qat_response:", (uint8_t *)resp_msg,
 348                                 sizeof(struct icp_qat_fw_comn_resp));
 349 #endif
 350                 if (ICP_QAT_FW_COMN_STATUS_FLAG_OK !=
 351                                 ICP_QAT_FW_COMN_RESP_CRYPTO_STAT_GET(
 352                                         resp_msg->comn_hdr.comn_status)) {
 353                         rx_op->status = RTE_CRYPTO_OP_STATUS_AUTH_FAILED;
 354                 } else {
 355                         rx_op->status = RTE_CRYPTO_OP_STATUS_SUCCESS;
 356                 }
 357                 *(uint32_t *)resp_msg = ADF_RING_EMPTY_SIG;
 358                 queue->head = adf_modulo(queue->head +
 359                                 queue->msg_size,
 360                                 ADF_RING_SIZE_MODULO(queue->queue_size));
 361                 resp_msg = (struct icp_qat_fw_comn_resp *)
 362                                         ((uint8_t *)queue->base_addr +
 363                                                         queue->head);
 364                 *ops = rx_op;
 365                 ops++;
 366                 msg_counter++;
 367         }
 368         if (msg_counter > 0) {
 369                 WRITE_CSR_RING_HEAD(tmp_qp->mmap_bar_addr,
 370                                         queue->hw_bundle_number,
 371                                         queue->hw_queue_number, queue->head);
 372                 rte_atomic16_sub(&tmp_qp->inflights16, msg_counter);
 373                 tmp_qp->stats.dequeued_count += msg_counter;
 374         }
 375         return msg_counter;
 376 }
 377
 378 static inline int
 379 qat_write_hw_desc_entry(struct rte_crypto_op *op, uint8_t *out_msg)
 380 {
 381         struct qat_session *ctx;
 382         struct icp_qat_fw_la_cipher_req_params *cipher_param;
 383         struct icp_qat_fw_la_auth_req_params *auth_param;
 384         register struct icp_qat_fw_la_bulk_req *qat_req;
 385
 386 #ifdef RTE_LIBRTE_PMD_QAT_DEBUG_TX
 387         if (unlikely(op->type != RTE_CRYPTO_OP_TYPE_SYMMETRIC)) {
 388                 PMD_DRV_LOG(ERR, "QAT PMD only supports symmetric crypto "
 389                                 "operation requests, op (%p) is not a "
 390                                 "symmetric operation.", op);
 391                 return -EINVAL;
 392         }
 393 #endif
 394         if (unlikely(op->sym->type == RTE_CRYPTO_SYM_OP_SESSIONLESS)) {
 395                 PMD_DRV_LOG(ERR, "QAT PMD only supports session oriented"
 396                                 " requests, op (%p) is sessionless.", op);
 397                 return -EINVAL;
 398         }
 399
 400         if (unlikely(op->sym->session->type != RTE_CRYPTODEV_QAT_SYM_PMD)) {
 401                 PMD_DRV_LOG(ERR, "Session was not created for this device");
 402                 return -EINVAL;
 403         }
 404
 405         ctx = (struct qat_session *)op->sym->session->_private;
 406         qat_req = (struct icp_qat_fw_la_bulk_req *)out_msg;
 407         *qat_req = ctx->fw_req;
 408         qat_req->comn_mid.opaque_data = (uint64_t)(uintptr_t)op;
 409
 410         /*
 411          * The following code assumes:
 412          * - single entry buffer.
 413          * - always in place.
 414          */
 415         qat_req->comn_mid.dst_length =
 416                         qat_req->comn_mid.src_length =
 417                                         rte_pktmbuf_data_len(op->sym->m_src);
 418         qat_req->comn_mid.dest_data_addr =
 419                         qat_req->comn_mid.src_data_addr =
 420                                         rte_pktmbuf_mtophys(op->sym->m_src);
 421         cipher_param = (void *)&qat_req->serv_specif_rqpars;
 422         auth_param = (void *)((uint8_t *)cipher_param + sizeof(*cipher_param));
 423
 424         cipher_param->cipher_length = op->sym->cipher.data.length;
 425         cipher_param->cipher_offset = op->sym->cipher.data.offset;
 426         if (op->sym->cipher.iv.length && (op->sym->cipher.iv.length <=
 427                         sizeof(cipher_param->u.cipher_IV_array))) {
 428                 rte_memcpy(cipher_param->u.cipher_IV_array,
 429                                 op->sym->cipher.iv.data,
 430                                 op->sym->cipher.iv.length);
 431         } else {
 432                 ICP_QAT_FW_LA_CIPH_IV_FLD_FLAG_SET(
 433                                 qat_req->comn_hdr.serv_specif_flags,
 434                                 ICP_QAT_FW_CIPH_IV_64BIT_PTR);
 435                 cipher_param->u.s.cipher_IV_ptr = op->sym->cipher.iv.phys_addr;
 436         }
 437         if (op->sym->auth.digest.phys_addr) {
 438                 ICP_QAT_FW_LA_DIGEST_IN_BUFFER_SET(
 439                                 qat_req->comn_hdr.serv_specif_flags,
 440                                 ICP_QAT_FW_LA_NO_DIGEST_IN_BUFFER);
 441                 auth_param->auth_res_addr = op->sym->auth.digest.phys_addr;
 442         }
 443         auth_param->auth_off = op->sym->auth.data.offset;
 444         auth_param->auth_len = op->sym->auth.data.length;
 445
 446         auth_param->u1.aad_adr = op->sym->auth.aad.phys_addr;
 447         /* (GCM) aad length(240 max) will be at this location after precompute */
 448         if (ctx->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_GALOIS_128 ||
 449                 ctx->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_GALOIS_64) {
 450                 auth_param->u2.aad_sz =
 451                 ALIGN_POW2_ROUNDUP(ctx->cd.hash.sha.state1[
 452                                         ICP_QAT_HW_GALOIS_128_STATE1_SZ +
 453                                         ICP_QAT_HW_GALOIS_H_SZ + 3], 16);
 454         }
 455         auth_param->hash_state_sz = (auth_param->u2.aad_sz) >> 3;
 456
 457
 458 #ifdef RTE_LIBRTE_PMD_QAT_DEBUG_TX
 459         rte_hexdump(stdout, "qat_req:", qat_req,
 460                         sizeof(struct icp_qat_fw_la_bulk_req));
 461         rte_hexdump(stdout, "src_data:",
 462                         rte_pktmbuf_mtod(op->sym->m_src, uint8_t*),
 463                         rte_pktmbuf_data_len(op->sym->m_src));
 464         rte_hexdump(stdout, "iv:", op->sym->cipher.iv.data,
 465                         op->sym->cipher.iv.length);
 466         rte_hexdump(stdout, "digest:", op->sym->auth.digest.data,
 467                         op->sym->auth.digest.length);
 468         rte_hexdump(stdout, "aad:", op->sym->auth.aad.data,
 469                         op->sym->auth.aad.length);
 470 #endif
 471         return 0;
 472 }
 473
 474 static inline uint32_t adf_modulo(uint32_t data, uint32_t shift)
 475 {
 476         uint32_t div = data >> shift;
 477         uint32_t mult = div << shift;
 478
 479         return data - mult;
 480 }
 481
 482 void qat_crypto_sym_session_init(struct rte_mempool *mp, void *priv_sess)
 483 {
 484         struct qat_session *s = priv_sess;
 485
 486         PMD_INIT_FUNC_TRACE();
 487         s->cd_paddr = rte_mempool_virt2phy(mp, &s->cd);
 488 }
 489
 490 int qat_dev_config(__rte_unused struct rte_cryptodev *dev)
 491 {
 492         PMD_INIT_FUNC_TRACE();
 493         return -ENOTSUP;
 494 }
 495
 496 int qat_dev_start(__rte_unused struct rte_cryptodev *dev)
 497 {
 498         PMD_INIT_FUNC_TRACE();
 499         return 0;
 500 }
 501
 502 void qat_dev_stop(__rte_unused struct rte_cryptodev *dev)
 503 {
 504         PMD_INIT_FUNC_TRACE();
 505 }
 506
 507 int qat_dev_close(struct rte_cryptodev *dev)
 508 {
 509         int i, ret;
 510
 511         PMD_INIT_FUNC_TRACE();
 512
 513         for (i = 0; i < dev->data->nb_queue_pairs; i++) {
 514                 ret = qat_crypto_sym_qp_release(dev, i);
 515                 if (ret < 0)
 516                         return ret;
 517         }
 518
 519         return 0;
 520 }
 521
 522 void qat_dev_info_get(__rte_unused struct rte_cryptodev *dev,
 523                                 struct rte_cryptodev_info *info)
 524 {
 525         struct qat_pmd_private *internals = dev->data->dev_private;
 526
 527         PMD_INIT_FUNC_TRACE();
 528         if (info != NULL) {
 529                 info->max_nb_queue_pairs =
 530                                 ADF_NUM_SYM_QPS_PER_BUNDLE *
 531                                 ADF_NUM_BUNDLES_PER_DEV;
 532
 533                 info->sym.max_nb_sessions = internals->max_nb_sessions;
 534                 info->dev_type = RTE_CRYPTODEV_QAT_SYM_PMD;
 535         }
 536 }
 537
 538 void qat_crypto_sym_stats_get(struct rte_cryptodev *dev,
 539                 struct rte_cryptodev_stats *stats)
 540 {
 541         int i;
 542         struct qat_qp **qp = (struct qat_qp **)(dev->data->queue_pairs);
 543
 544         PMD_INIT_FUNC_TRACE();
 545         if (stats == NULL) {
 546                 PMD_DRV_LOG(ERR, "invalid stats ptr NULL");
 547                 return;
 548         }
 549         for (i = 0; i < dev->data->nb_queue_pairs; i++) {
 550                 if (qp[i] == NULL) {
 551                         PMD_DRV_LOG(DEBUG, "Uninitialised queue pair");
 552                         continue;
 553                 }
 554
 555                 stats->enqueued_count += qp[i]->stats.enqueued_count;
 556                 stats->dequeued_count += qp[i]->stats.enqueued_count;
 557                 stats->enqueue_err_count += qp[i]->stats.enqueue_err_count;
 558                 stats->dequeue_err_count += qp[i]->stats.enqueue_err_count;
 559         }
 560 }
 561
 562 void qat_crypto_sym_stats_reset(struct rte_cryptodev *dev)
 563 {
 564         int i;
 565         struct qat_qp **qp = (struct qat_qp **)(dev->data->queue_pairs);
 566
 567         PMD_INIT_FUNC_TRACE();
 568         for (i = 0; i < dev->data->nb_queue_pairs; i++)
 569                 memset(&(qp[i]->stats), 0, sizeof(qp[i]->stats));
 570         PMD_DRV_LOG(DEBUG, "QAT crypto: stats cleared");
 571 }