drivers/event/dpaa2/dpaa2_eventdev.c

   1 /*-
   2  *   BSD LICENSE
   3  *
   4  *   Copyright 2017 NXP.
   5  *
   6  *   Redistribution and use in source and binary forms, with or without
   7  *   modification, are permitted provided that the following conditions
   8  *   are met:
   9  *
  10  *     * Redistributions of source code must retain the above copyright
  11  *       notice, this list of conditions and the following disclaimer.
  12  *     * Redistributions in binary form must reproduce the above copyright
  13  *       notice, this list of conditions and the following disclaimer in
  14  *       the documentation and/or other materials provided with the
  15  *       distribution.
  16  *     * Neither the name of NXP nor the names of its
  17  *       contributors may be used to endorse or promote products derived
  18  *       from this software without specific prior written permission.
  19  *
  20  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  21  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  22  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  23  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  24  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  25  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  26  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  27  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  28  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  29  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  30  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  31  */
  32
  33 #include <assert.h>
  34 #include <stdio.h>
  35 #include <stdbool.h>
  36 #include <errno.h>
  37 #include <stdint.h>
  38 #include <string.h>
  39 #include <sys/epoll.h>
  40
  41 #include <rte_atomic.h>
  42 #include <rte_byteorder.h>
  43 #include <rte_common.h>
  44 #include <rte_debug.h>
  45 #include <rte_dev.h>
  46 #include <rte_eal.h>
  47 #include <rte_fslmc.h>
  48 #include <rte_lcore.h>
  49 #include <rte_log.h>
  50 #include <rte_malloc.h>
  51 #include <rte_memcpy.h>
  52 #include <rte_memory.h>
  53 #include <rte_memzone.h>
  54 #include <rte_pci.h>
  55 #include <rte_vdev.h>
  56 #include <rte_ethdev.h>
  57 #include <rte_event_eth_rx_adapter.h>
  58
  59 #include <fslmc_vfio.h>
  60 #include <dpaa2_hw_pvt.h>
  61 #include <dpaa2_hw_mempool.h>
  62 #include <dpaa2_hw_dpio.h>
  63 #include <dpaa2_ethdev.h>
  64 #include "dpaa2_eventdev.h"
  65 #include <portal/dpaa2_hw_pvt.h>
  66 #include <mc/fsl_dpci.h>
  67
  68 /* Clarifications
  69  * Evendev = SoC Instance
  70  * Eventport = DPIO Instance
  71  * Eventqueue = DPCON Instance
  72  * 1 Eventdev can have N Eventqueue
  73  * Soft Event Flow is DPCI Instance
  74  */
  75
  76 static uint16_t
  77 dpaa2_eventdev_enqueue_burst(void *port, const struct rte_event ev[],
  78                              uint16_t nb_events)
  79 {
  80         struct rte_eventdev *ev_dev =
  81                         ((struct dpaa2_io_portal_t *)port)->eventdev;
  82         struct dpaa2_eventdev *priv = ev_dev->data->dev_private;
  83         uint32_t queue_id = ev[0].queue_id;
  84         struct evq_info_t *evq_info = &priv->evq_info[queue_id];
  85         uint32_t fqid;
  86         struct qbman_swp *swp;
  87         struct qbman_fd fd_arr[MAX_TX_RING_SLOTS];
  88         uint32_t loop, frames_to_send;
  89         struct qbman_eq_desc eqdesc[MAX_TX_RING_SLOTS];
  90         uint16_t num_tx = 0;
  91         int ret;
  92
  93         RTE_SET_USED(port);
  94
  95         if (unlikely(!DPAA2_PER_LCORE_DPIO)) {
  96                 ret = dpaa2_affine_qbman_swp();
  97                 if (ret) {
  98                         PMD_DRV_LOG(ERR, "Failure in affining portal\n");
  99                         return 0;
 100                 }
 101         }
 102
 103         swp = DPAA2_PER_LCORE_PORTAL;
 104
 105         while (nb_events) {
 106                 frames_to_send = (nb_events >> 3) ?
 107                         MAX_TX_RING_SLOTS : nb_events;
 108
 109                 for (loop = 0; loop < frames_to_send; loop++) {
 110                         const struct rte_event *event = &ev[num_tx + loop];
 111
 112                         if (event->sched_type != RTE_SCHED_TYPE_ATOMIC)
 113                                 fqid = evq_info->dpci->queue[
 114                                         DPAA2_EVENT_DPCI_PARALLEL_QUEUE].fqid;
 115                         else
 116                                 fqid = evq_info->dpci->queue[
 117                                         DPAA2_EVENT_DPCI_ATOMIC_QUEUE].fqid;
 118
 119                         /* Prepare enqueue descriptor */
 120                         qbman_eq_desc_clear(&eqdesc[loop]);
 121                         qbman_eq_desc_set_fq(&eqdesc[loop], fqid);
 122                         qbman_eq_desc_set_no_orp(&eqdesc[loop], 0);
 123                         qbman_eq_desc_set_response(&eqdesc[loop], 0, 0);
 124
 125                         if (event->impl_opaque) {
 126                                 uint8_t dqrr_index = event->impl_opaque - 1;
 127
 128                                 qbman_eq_desc_set_dca(&eqdesc[loop], 1,
 129                                                       dqrr_index, 0);
 130                                 DPAA2_PER_LCORE_DPIO->dqrr_size--;
 131                                 DPAA2_PER_LCORE_DPIO->dqrr_held &=
 132                                         ~(1 << dqrr_index);
 133                         }
 134
 135                         memset(&fd_arr[loop], 0, sizeof(struct qbman_fd));
 136
 137                         /*
 138                          * todo - need to align with hw context data
 139                          * to avoid copy
 140                          */
 141                         struct rte_event *ev_temp = rte_malloc(NULL,
 142                                 sizeof(struct rte_event), 0);
 143
 144                         if (!ev_temp) {
 145                                 if (!loop)
 146                                         return num_tx;
 147                                 frames_to_send = loop;
 148                                 PMD_DRV_LOG(ERR, "Unable to allocate memory");
 149                                 goto send_partial;
 150                         }
 151                         rte_memcpy(ev_temp, event, sizeof(struct rte_event));
 152                         DPAA2_SET_FD_ADDR((&fd_arr[loop]), ev_temp);
 153                         DPAA2_SET_FD_LEN((&fd_arr[loop]),
 154                                          sizeof(struct rte_event));
 155                 }
 156 send_partial:
 157                 loop = 0;
 158                 while (loop < frames_to_send) {
 159                         loop += qbman_swp_enqueue_multiple_desc(swp,
 160                                         &eqdesc[loop], &fd_arr[loop],
 161                                         frames_to_send - loop);
 162                 }
 163                 num_tx += frames_to_send;
 164                 nb_events -= frames_to_send;
 165         }
 166
 167         return num_tx;
 168 }
 169
 170 static uint16_t
 171 dpaa2_eventdev_enqueue(void *port, const struct rte_event *ev)
 172 {
 173         return dpaa2_eventdev_enqueue_burst(port, ev, 1);
 174 }
 175
 176 static void dpaa2_eventdev_dequeue_wait(uint64_t timeout_ticks)
 177 {
 178         struct epoll_event epoll_ev;
 179         int ret, i = 0;
 180
 181         qbman_swp_interrupt_clear_status(DPAA2_PER_LCORE_PORTAL,
 182                                          QBMAN_SWP_INTERRUPT_DQRI);
 183
 184 RETRY:
 185         ret = epoll_wait(DPAA2_PER_LCORE_DPIO->epoll_fd,
 186                          &epoll_ev, 1, timeout_ticks);
 187         if (ret < 1) {
 188                 /* sometimes due to some spurious interrupts epoll_wait fails
 189                  * with errno EINTR. so here we are retrying epoll_wait in such
 190                  * case to avoid the problem.
 191                  */
 192                 if (errno == EINTR) {
 193                         PMD_DRV_LOG(DEBUG, "epoll_wait fails\n");
 194                         if (i++ > 10)
 195                                 PMD_DRV_LOG(DEBUG, "Dequeue burst Failed\n");
 196                 goto RETRY;
 197                 }
 198         }
 199 }
 200
 201 static void dpaa2_eventdev_process_parallel(struct qbman_swp *swp,
 202                                             const struct qbman_fd *fd,
 203                                             const struct qbman_result *dq,
 204                                             struct dpaa2_queue *rxq,
 205                                             struct rte_event *ev)
 206 {
 207         struct rte_event *ev_temp =
 208                 (struct rte_event *)DPAA2_GET_FD_ADDR(fd);
 209
 210         RTE_SET_USED(rxq);
 211
 212         rte_memcpy(ev, ev_temp, sizeof(struct rte_event));
 213         rte_free(ev_temp);
 214
 215         qbman_swp_dqrr_consume(swp, dq);
 216 }
 217
 218 static void dpaa2_eventdev_process_atomic(struct qbman_swp *swp,
 219                                           const struct qbman_fd *fd,
 220                                           const struct qbman_result *dq,
 221                                           struct dpaa2_queue *rxq,
 222                                           struct rte_event *ev)
 223 {
 224         struct rte_event *ev_temp =
 225                 (struct rte_event *)DPAA2_GET_FD_ADDR(fd);
 226         uint8_t dqrr_index = qbman_get_dqrr_idx(dq);
 227
 228         RTE_SET_USED(swp);
 229         RTE_SET_USED(rxq);
 230
 231         rte_memcpy(ev, ev_temp, sizeof(struct rte_event));
 232         rte_free(ev_temp);
 233         ev->impl_opaque = dqrr_index + 1;
 234         DPAA2_PER_LCORE_DPIO->dqrr_size++;
 235         DPAA2_PER_LCORE_DPIO->dqrr_held |= 1 << dqrr_index;
 236 }
 237
 238 static uint16_t
 239 dpaa2_eventdev_dequeue_burst(void *port, struct rte_event ev[],
 240                              uint16_t nb_events, uint64_t timeout_ticks)
 241 {
 242         const struct qbman_result *dq;
 243         struct qbman_swp *swp;
 244         const struct qbman_fd *fd;
 245         struct dpaa2_queue *rxq;
 246         int num_pkts = 0, ret, i = 0;
 247
 248         RTE_SET_USED(port);
 249
 250         if (unlikely(!DPAA2_PER_LCORE_DPIO)) {
 251                 ret = dpaa2_affine_qbman_swp();
 252                 if (ret) {
 253                         PMD_DRV_LOG(ERR, "Failure in affining portal\n");
 254                         return 0;
 255                 }
 256         }
 257
 258         swp = DPAA2_PER_LCORE_PORTAL;
 259
 260         /* Check if there are atomic contexts to be released */
 261         while (DPAA2_PER_LCORE_DPIO->dqrr_size) {
 262                 if (DPAA2_PER_LCORE_DPIO->dqrr_held & (1 << i)) {
 263                         dq = qbman_get_dqrr_from_idx(swp, i);
 264                         qbman_swp_dqrr_consume(swp, dq);
 265                         DPAA2_PER_LCORE_DPIO->dqrr_size--;
 266                 }
 267                 i++;
 268         }
 269         DPAA2_PER_LCORE_DPIO->dqrr_held = 0;
 270
 271         do {
 272                 dq = qbman_swp_dqrr_next(swp);
 273                 if (!dq) {
 274                         if (!num_pkts && timeout_ticks) {
 275                                 dpaa2_eventdev_dequeue_wait(timeout_ticks);
 276                                 timeout_ticks = 0;
 277                                 continue;
 278                         }
 279                         return num_pkts;
 280                 }
 281
 282                 fd = qbman_result_DQ_fd(dq);
 283
 284                 rxq = (struct dpaa2_queue *)qbman_result_DQ_fqd_ctx(dq);
 285                 if (rxq) {
 286                         rxq->cb(swp, fd, dq, rxq, &ev[num_pkts]);
 287                 } else {
 288                         qbman_swp_dqrr_consume(swp, dq);
 289                         PMD_DRV_LOG(ERR, "Null Return VQ received\n");
 290                         return 0;
 291                 }
 292
 293                 num_pkts++;
 294         } while (num_pkts < nb_events);
 295
 296         return num_pkts;
 297 }
 298
 299 static uint16_t
 300 dpaa2_eventdev_dequeue(void *port, struct rte_event *ev,
 301                        uint64_t timeout_ticks)
 302 {
 303         return dpaa2_eventdev_dequeue_burst(port, ev, 1, timeout_ticks);
 304 }
 305
 306 static void
 307 dpaa2_eventdev_info_get(struct rte_eventdev *dev,
 308                         struct rte_event_dev_info *dev_info)
 309 {
 310         struct dpaa2_eventdev *priv = dev->data->dev_private;
 311
 312         PMD_DRV_FUNC_TRACE();
 313
 314         RTE_SET_USED(dev);
 315
 316         memset(dev_info, 0, sizeof(struct rte_event_dev_info));
 317         dev_info->min_dequeue_timeout_ns =
 318                 DPAA2_EVENT_MIN_DEQUEUE_TIMEOUT;
 319         dev_info->max_dequeue_timeout_ns =
 320                 DPAA2_EVENT_MAX_DEQUEUE_TIMEOUT;
 321         dev_info->dequeue_timeout_ns =
 322                 DPAA2_EVENT_MIN_DEQUEUE_TIMEOUT;
 323         dev_info->max_event_queues = priv->max_event_queues;
 324         dev_info->max_event_queue_flows =
 325                 DPAA2_EVENT_MAX_QUEUE_FLOWS;
 326         dev_info->max_event_queue_priority_levels =
 327                 DPAA2_EVENT_MAX_QUEUE_PRIORITY_LEVELS;
 328         dev_info->max_event_priority_levels =
 329                 DPAA2_EVENT_MAX_EVENT_PRIORITY_LEVELS;
 330         dev_info->max_event_ports = RTE_MAX_LCORE;
 331         dev_info->max_event_port_dequeue_depth =
 332                 DPAA2_EVENT_MAX_PORT_DEQUEUE_DEPTH;
 333         dev_info->max_event_port_enqueue_depth =
 334                 DPAA2_EVENT_MAX_PORT_ENQUEUE_DEPTH;
 335         dev_info->max_num_events = DPAA2_EVENT_MAX_NUM_EVENTS;
 336         dev_info->event_dev_cap = RTE_EVENT_DEV_CAP_DISTRIBUTED_SCHED |
 337                 RTE_EVENT_DEV_CAP_BURST_MODE;
 338 }
 339
 340 static int
 341 dpaa2_eventdev_configure(const struct rte_eventdev *dev)
 342 {
 343         struct dpaa2_eventdev *priv = dev->data->dev_private;
 344         struct rte_event_dev_config *conf = &dev->data->dev_conf;
 345
 346         PMD_DRV_FUNC_TRACE();
 347
 348         priv->dequeue_timeout_ns = conf->dequeue_timeout_ns;
 349         priv->nb_event_queues = conf->nb_event_queues;
 350         priv->nb_event_ports = conf->nb_event_ports;
 351         priv->nb_event_queue_flows = conf->nb_event_queue_flows;
 352         priv->nb_event_port_dequeue_depth = conf->nb_event_port_dequeue_depth;
 353         priv->nb_event_port_enqueue_depth = conf->nb_event_port_enqueue_depth;
 354         priv->event_dev_cfg = conf->event_dev_cfg;
 355
 356         PMD_DRV_LOG(DEBUG, "Configured eventdev devid=%d", dev->data->dev_id);
 357         return 0;
 358 }
 359
 360 static int
 361 dpaa2_eventdev_start(struct rte_eventdev *dev)
 362 {
 363         PMD_DRV_FUNC_TRACE();
 364
 365         RTE_SET_USED(dev);
 366
 367         return 0;
 368 }
 369
 370 static void
 371 dpaa2_eventdev_stop(struct rte_eventdev *dev)
 372 {
 373         PMD_DRV_FUNC_TRACE();
 374
 375         RTE_SET_USED(dev);
 376 }
 377
 378 static int
 379 dpaa2_eventdev_close(struct rte_eventdev *dev)
 380 {
 381         PMD_DRV_FUNC_TRACE();
 382
 383         RTE_SET_USED(dev);
 384
 385         return 0;
 386 }
 387
 388 static void
 389 dpaa2_eventdev_queue_def_conf(struct rte_eventdev *dev, uint8_t queue_id,
 390                               struct rte_event_queue_conf *queue_conf)
 391 {
 392         PMD_DRV_FUNC_TRACE();
 393
 394         RTE_SET_USED(dev);
 395         RTE_SET_USED(queue_id);
 396         RTE_SET_USED(queue_conf);
 397
 398         queue_conf->nb_atomic_flows = DPAA2_EVENT_QUEUE_ATOMIC_FLOWS;
 399         queue_conf->schedule_type = RTE_SCHED_TYPE_ATOMIC |
 400                                       RTE_SCHED_TYPE_PARALLEL;
 401         queue_conf->priority = RTE_EVENT_DEV_PRIORITY_NORMAL;
 402 }
 403
 404 static void
 405 dpaa2_eventdev_queue_release(struct rte_eventdev *dev, uint8_t queue_id)
 406 {
 407         PMD_DRV_FUNC_TRACE();
 408
 409         RTE_SET_USED(dev);
 410         RTE_SET_USED(queue_id);
 411 }
 412
 413 static int
 414 dpaa2_eventdev_queue_setup(struct rte_eventdev *dev, uint8_t queue_id,
 415                            const struct rte_event_queue_conf *queue_conf)
 416 {
 417         struct dpaa2_eventdev *priv = dev->data->dev_private;
 418         struct evq_info_t *evq_info =
 419                 &priv->evq_info[queue_id];
 420
 421         PMD_DRV_FUNC_TRACE();
 422
 423         evq_info->event_queue_cfg = queue_conf->event_queue_cfg;
 424
 425         return 0;
 426 }
 427
 428 static void
 429 dpaa2_eventdev_port_def_conf(struct rte_eventdev *dev, uint8_t port_id,
 430                              struct rte_event_port_conf *port_conf)
 431 {
 432         PMD_DRV_FUNC_TRACE();
 433
 434         RTE_SET_USED(dev);
 435         RTE_SET_USED(port_id);
 436         RTE_SET_USED(port_conf);
 437
 438         port_conf->new_event_threshold =
 439                 DPAA2_EVENT_MAX_NUM_EVENTS;
 440         port_conf->dequeue_depth =
 441                 DPAA2_EVENT_MAX_PORT_DEQUEUE_DEPTH;
 442         port_conf->enqueue_depth =
 443                 DPAA2_EVENT_MAX_PORT_ENQUEUE_DEPTH;
 444 }
 445
 446 static void
 447 dpaa2_eventdev_port_release(void *port)
 448 {
 449         PMD_DRV_FUNC_TRACE();
 450
 451         RTE_SET_USED(port);
 452 }
 453
 454 static int
 455 dpaa2_eventdev_port_setup(struct rte_eventdev *dev, uint8_t port_id,
 456                           const struct rte_event_port_conf *port_conf)
 457 {
 458         PMD_DRV_FUNC_TRACE();
 459
 460         RTE_SET_USED(port_conf);
 461
 462         if (!dpaa2_io_portal[port_id].dpio_dev) {
 463                 dpaa2_io_portal[port_id].dpio_dev =
 464                                 dpaa2_get_qbman_swp(port_id);
 465                 rte_atomic16_inc(&dpaa2_io_portal[port_id].dpio_dev->ref_count);
 466                 if (!dpaa2_io_portal[port_id].dpio_dev)
 467                         return -1;
 468         }
 469
 470         dpaa2_io_portal[port_id].eventdev = dev;
 471         dev->data->ports[port_id] = &dpaa2_io_portal[port_id];
 472         return 0;
 473 }
 474
 475 static int
 476 dpaa2_eventdev_port_unlink(struct rte_eventdev *dev, void *port,
 477                            uint8_t queues[], uint16_t nb_unlinks)
 478 {
 479         struct dpaa2_eventdev *priv = dev->data->dev_private;
 480         struct dpaa2_io_portal_t *dpaa2_portal = port;
 481         struct evq_info_t *evq_info;
 482         int i;
 483
 484         PMD_DRV_FUNC_TRACE();
 485
 486         for (i = 0; i < nb_unlinks; i++) {
 487                 evq_info = &priv->evq_info[queues[i]];
 488                 qbman_swp_push_set(dpaa2_portal->dpio_dev->sw_portal,
 489                                    evq_info->dpcon->channel_index, 0);
 490                 dpio_remove_static_dequeue_channel(dpaa2_portal->dpio_dev->dpio,
 491                                         0, dpaa2_portal->dpio_dev->token,
 492                         evq_info->dpcon->dpcon_id);
 493                 evq_info->link = 0;
 494         }
 495
 496         return (int)nb_unlinks;
 497 }
 498
 499 static int
 500 dpaa2_eventdev_port_link(struct rte_eventdev *dev, void *port,
 501                          const uint8_t queues[], const uint8_t priorities[],
 502                         uint16_t nb_links)
 503 {
 504         struct dpaa2_eventdev *priv = dev->data->dev_private;
 505         struct dpaa2_io_portal_t *dpaa2_portal = port;
 506         struct evq_info_t *evq_info;
 507         uint8_t channel_index;
 508         int ret, i, n;
 509
 510         PMD_DRV_FUNC_TRACE();
 511
 512         for (i = 0; i < nb_links; i++) {
 513                 evq_info = &priv->evq_info[queues[i]];
 514                 if (evq_info->link)
 515                         continue;
 516
 517                 ret = dpio_add_static_dequeue_channel(
 518                         dpaa2_portal->dpio_dev->dpio,
 519                         CMD_PRI_LOW, dpaa2_portal->dpio_dev->token,
 520                         evq_info->dpcon->dpcon_id, &channel_index);
 521                 if (ret < 0) {
 522                         PMD_DRV_ERR("Static dequeue cfg failed with ret: %d\n",
 523                                     ret);
 524                         goto err;
 525                 }
 526
 527                 qbman_swp_push_set(dpaa2_portal->dpio_dev->sw_portal,
 528                                    channel_index, 1);
 529                 evq_info->dpcon->channel_index = channel_index;
 530                 evq_info->link = 1;
 531         }
 532
 533         RTE_SET_USED(priorities);
 534
 535         return (int)nb_links;
 536 err:
 537         for (n = 0; n < i; n++) {
 538                 evq_info = &priv->evq_info[queues[n]];
 539                 qbman_swp_push_set(dpaa2_portal->dpio_dev->sw_portal,
 540                                    evq_info->dpcon->channel_index, 0);
 541                 dpio_remove_static_dequeue_channel(dpaa2_portal->dpio_dev->dpio,
 542                                         0, dpaa2_portal->dpio_dev->token,
 543                         evq_info->dpcon->dpcon_id);
 544                 evq_info->link = 0;
 545         }
 546         return ret;
 547 }
 548
 549 static int
 550 dpaa2_eventdev_timeout_ticks(struct rte_eventdev *dev, uint64_t ns,
 551                              uint64_t *timeout_ticks)
 552 {
 553         uint32_t scale = 1;
 554
 555         PMD_DRV_FUNC_TRACE();
 556
 557         RTE_SET_USED(dev);
 558         *timeout_ticks = ns * scale;
 559
 560         return 0;
 561 }
 562
 563 static void
 564 dpaa2_eventdev_dump(struct rte_eventdev *dev, FILE *f)
 565 {
 566         PMD_DRV_FUNC_TRACE();
 567
 568         RTE_SET_USED(dev);
 569         RTE_SET_USED(f);
 570 }
 571
 572 static int
 573 dpaa2_eventdev_eth_caps_get(const struct rte_eventdev *dev,
 574                             const struct rte_eth_dev *eth_dev,
 575                             uint32_t *caps)
 576 {
 577         const char *ethdev_driver = eth_dev->device->driver->name;
 578
 579         PMD_DRV_FUNC_TRACE();
 580
 581         RTE_SET_USED(dev);
 582
 583         if (!strcmp(ethdev_driver, "net_dpaa2"))
 584                 *caps = RTE_EVENT_ETH_RX_ADAPTER_DPAA2_CAP;
 585         else
 586                 *caps = RTE_EVENT_ETH_RX_ADAPTER_SW_CAP;
 587
 588         return 0;
 589 }
 590
 591 static int
 592 dpaa2_eventdev_eth_queue_add_all(const struct rte_eventdev *dev,
 593                 const struct rte_eth_dev *eth_dev,
 594                 const struct rte_event_eth_rx_adapter_queue_conf *queue_conf)
 595 {
 596         struct dpaa2_eventdev *priv = dev->data->dev_private;
 597         uint8_t ev_qid = queue_conf->ev.queue_id;
 598         uint16_t dpcon_id = priv->evq_info[ev_qid].dpcon->dpcon_id;
 599         int i, ret;
 600
 601         PMD_DRV_FUNC_TRACE();
 602
 603         for (i = 0; i < eth_dev->data->nb_rx_queues; i++) {
 604                 ret = dpaa2_eth_eventq_attach(eth_dev, i,
 605                                 dpcon_id, queue_conf);
 606                 if (ret) {
 607                         PMD_DRV_ERR("dpaa2_eth_eventq_attach failed: ret %d\n",
 608                                     ret);
 609                         goto fail;
 610                 }
 611         }
 612         return 0;
 613 fail:
 614         for (i = (i - 1); i >= 0 ; i--)
 615                 dpaa2_eth_eventq_detach(eth_dev, i);
 616
 617         return ret;
 618 }
 619
 620 static int
 621 dpaa2_eventdev_eth_queue_add(const struct rte_eventdev *dev,
 622                 const struct rte_eth_dev *eth_dev,
 623                 int32_t rx_queue_id,
 624                 const struct rte_event_eth_rx_adapter_queue_conf *queue_conf)
 625 {
 626         struct dpaa2_eventdev *priv = dev->data->dev_private;
 627         uint8_t ev_qid = queue_conf->ev.queue_id;
 628         uint16_t dpcon_id = priv->evq_info[ev_qid].dpcon->dpcon_id;
 629         int ret;
 630
 631         PMD_DRV_FUNC_TRACE();
 632
 633         if (rx_queue_id == -1)
 634                 return dpaa2_eventdev_eth_queue_add_all(dev,
 635                                 eth_dev, queue_conf);
 636
 637         ret = dpaa2_eth_eventq_attach(eth_dev, rx_queue_id,
 638                         dpcon_id, queue_conf);
 639         if (ret) {
 640                 PMD_DRV_ERR("dpaa2_eth_eventq_attach failed: ret: %d\n", ret);
 641                 return ret;
 642         }
 643         return 0;
 644 }
 645
 646 static int
 647 dpaa2_eventdev_eth_queue_del_all(const struct rte_eventdev *dev,
 648                              const struct rte_eth_dev *eth_dev)
 649 {
 650         int i, ret;
 651
 652         PMD_DRV_FUNC_TRACE();
 653
 654         RTE_SET_USED(dev);
 655
 656         for (i = 0; i < eth_dev->data->nb_rx_queues; i++) {
 657                 ret = dpaa2_eth_eventq_detach(eth_dev, i);
 658                 if (ret) {
 659                         PMD_DRV_ERR("dpaa2_eth_eventq_detach failed: ret %d\n",
 660                                     ret);
 661                         return ret;
 662                 }
 663         }
 664
 665         return 0;
 666 }
 667
 668 static int
 669 dpaa2_eventdev_eth_queue_del(const struct rte_eventdev *dev,
 670                              const struct rte_eth_dev *eth_dev,
 671                              int32_t rx_queue_id)
 672 {
 673         int ret;
 674
 675         PMD_DRV_FUNC_TRACE();
 676
 677         if (rx_queue_id == -1)
 678                 return dpaa2_eventdev_eth_queue_del_all(dev, eth_dev);
 679
 680         ret = dpaa2_eth_eventq_detach(eth_dev, rx_queue_id);
 681         if (ret) {
 682                 PMD_DRV_ERR("dpaa2_eth_eventq_detach failed: ret: %d\n", ret);
 683                 return ret;
 684         }
 685
 686         return 0;
 687 }
 688
 689 static int
 690 dpaa2_eventdev_eth_start(const struct rte_eventdev *dev,
 691                          const struct rte_eth_dev *eth_dev)
 692 {
 693         PMD_DRV_FUNC_TRACE();
 694
 695         RTE_SET_USED(dev);
 696         RTE_SET_USED(eth_dev);
 697
 698         return 0;
 699 }
 700
 701 static int
 702 dpaa2_eventdev_eth_stop(const struct rte_eventdev *dev,
 703                         const struct rte_eth_dev *eth_dev)
 704 {
 705         PMD_DRV_FUNC_TRACE();
 706
 707         RTE_SET_USED(dev);
 708         RTE_SET_USED(eth_dev);
 709
 710         return 0;
 711 }
 712
 713 static const struct rte_eventdev_ops dpaa2_eventdev_ops = {
 714         .dev_infos_get    = dpaa2_eventdev_info_get,
 715         .dev_configure    = dpaa2_eventdev_configure,
 716         .dev_start        = dpaa2_eventdev_start,
 717         .dev_stop         = dpaa2_eventdev_stop,
 718         .dev_close        = dpaa2_eventdev_close,
 719         .queue_def_conf   = dpaa2_eventdev_queue_def_conf,
 720         .queue_setup      = dpaa2_eventdev_queue_setup,
 721         .queue_release    = dpaa2_eventdev_queue_release,
 722         .port_def_conf    = dpaa2_eventdev_port_def_conf,
 723         .port_setup       = dpaa2_eventdev_port_setup,
 724         .port_release     = dpaa2_eventdev_port_release,
 725         .port_link        = dpaa2_eventdev_port_link,
 726         .port_unlink      = dpaa2_eventdev_port_unlink,
 727         .timeout_ticks    = dpaa2_eventdev_timeout_ticks,
 728         .dump             = dpaa2_eventdev_dump,
 729         .eth_rx_adapter_caps_get = dpaa2_eventdev_eth_caps_get,
 730         .eth_rx_adapter_queue_add = dpaa2_eventdev_eth_queue_add,
 731         .eth_rx_adapter_queue_del = dpaa2_eventdev_eth_queue_del,
 732         .eth_rx_adapter_start = dpaa2_eventdev_eth_start,
 733         .eth_rx_adapter_stop = dpaa2_eventdev_eth_stop,
 734 };
 735
 736 static int
 737 dpaa2_eventdev_setup_dpci(struct dpaa2_dpci_dev *dpci_dev,
 738                           struct dpaa2_dpcon_dev *dpcon_dev)
 739 {
 740         struct dpci_rx_queue_cfg rx_queue_cfg;
 741         int ret, i;
 742
 743         /*Do settings to get the frame on a DPCON object*/
 744         rx_queue_cfg.options = DPCI_QUEUE_OPT_DEST |
 745                   DPCI_QUEUE_OPT_USER_CTX;
 746         rx_queue_cfg.dest_cfg.dest_type = DPCI_DEST_DPCON;
 747         rx_queue_cfg.dest_cfg.dest_id = dpcon_dev->dpcon_id;
 748         rx_queue_cfg.dest_cfg.priority = DPAA2_EVENT_DEFAULT_DPCI_PRIO;
 749
 750         dpci_dev->queue[DPAA2_EVENT_DPCI_PARALLEL_QUEUE].cb =
 751                 dpaa2_eventdev_process_parallel;
 752         dpci_dev->queue[DPAA2_EVENT_DPCI_ATOMIC_QUEUE].cb =
 753                 dpaa2_eventdev_process_atomic;
 754
 755         for (i = 0 ; i < DPAA2_EVENT_DPCI_MAX_QUEUES; i++) {
 756                 rx_queue_cfg.user_ctx = (uint64_t)(&dpci_dev->queue[i]);
 757                 ret = dpci_set_rx_queue(&dpci_dev->dpci,
 758                                         CMD_PRI_LOW,
 759                                         dpci_dev->token, i,
 760                                         &rx_queue_cfg);
 761                 if (ret) {
 762                         PMD_DRV_LOG(ERR,
 763                                     "set_rx_q failed with err code: %d", ret);
 764                         return ret;
 765                 }
 766         }
 767         return 0;
 768 }
 769
 770 static int
 771 dpaa2_eventdev_create(const char *name)
 772 {
 773         struct rte_eventdev *eventdev;
 774         struct dpaa2_eventdev *priv;
 775         struct dpaa2_dpcon_dev *dpcon_dev = NULL;
 776         struct dpaa2_dpci_dev *dpci_dev = NULL;
 777         int ret;
 778
 779         eventdev = rte_event_pmd_vdev_init(name,
 780                                            sizeof(struct dpaa2_eventdev),
 781                                            rte_socket_id());
 782         if (eventdev == NULL) {
 783                 PMD_DRV_ERR("Failed to create eventdev vdev %s", name);
 784                 goto fail;
 785         }
 786
 787         eventdev->dev_ops       = &dpaa2_eventdev_ops;
 788         eventdev->enqueue       = dpaa2_eventdev_enqueue;
 789         eventdev->enqueue_burst = dpaa2_eventdev_enqueue_burst;
 790         eventdev->enqueue_new_burst = dpaa2_eventdev_enqueue_burst;
 791         eventdev->enqueue_forward_burst = dpaa2_eventdev_enqueue_burst;
 792         eventdev->dequeue       = dpaa2_eventdev_dequeue;
 793         eventdev->dequeue_burst = dpaa2_eventdev_dequeue_burst;
 794
 795         /* For secondary processes, the primary has done all the work */
 796         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 797                 return 0;
 798
 799         priv = eventdev->data->dev_private;
 800         priv->max_event_queues = 0;
 801
 802         do {
 803                 dpcon_dev = rte_dpaa2_alloc_dpcon_dev();
 804                 if (!dpcon_dev)
 805                         break;
 806                 priv->evq_info[priv->max_event_queues].dpcon = dpcon_dev;
 807
 808                 dpci_dev = rte_dpaa2_alloc_dpci_dev();
 809                 if (!dpci_dev) {
 810                         rte_dpaa2_free_dpcon_dev(dpcon_dev);
 811                         break;
 812                 }
 813                 priv->evq_info[priv->max_event_queues].dpci = dpci_dev;
 814
 815                 ret = dpaa2_eventdev_setup_dpci(dpci_dev, dpcon_dev);
 816                 if (ret) {
 817                         PMD_DRV_LOG(ERR,
 818                                     "dpci setup failed with err code: %d", ret);
 819                         return ret;
 820                 }
 821                 priv->max_event_queues++;
 822         } while (dpcon_dev && dpci_dev);
 823
 824         return 0;
 825 fail:
 826         return -EFAULT;
 827 }
 828
 829 static int
 830 dpaa2_eventdev_probe(struct rte_vdev_device *vdev)
 831 {
 832         const char *name;
 833
 834         name = rte_vdev_device_name(vdev);
 835         PMD_DRV_LOG(INFO, "Initializing %s", name);
 836         return dpaa2_eventdev_create(name);
 837 }
 838
 839 static int
 840 dpaa2_eventdev_remove(struct rte_vdev_device *vdev)
 841 {
 842         const char *name;
 843
 844         name = rte_vdev_device_name(vdev);
 845         PMD_DRV_LOG(INFO, "Closing %s", name);
 846
 847         return rte_event_pmd_vdev_uninit(name);
 848 }
 849
 850 static struct rte_vdev_driver vdev_eventdev_dpaa2_pmd = {
 851         .probe = dpaa2_eventdev_probe,
 852         .remove = dpaa2_eventdev_remove
 853 };
 854
 855 RTE_PMD_REGISTER_VDEV(EVENTDEV_NAME_DPAA2_PMD, vdev_eventdev_dpaa2_pmd);