drivers/net/bnxt/bnxt_ethdev.c

   1 /*-
   2  *   BSD LICENSE
   3  *
   4  *   Copyright(c) Broadcom Limited.
   5  *   All rights reserved.
   6  *
   7  *   Redistribution and use in source and binary forms, with or without
   8  *   modification, are permitted provided that the following conditions
   9  *   are met:
  10  *
  11  *     * Redistributions of source code must retain the above copyright
  12  *       notice, this list of conditions and the following disclaimer.
  13  *     * Redistributions in binary form must reproduce the above copyright
  14  *       notice, this list of conditions and the following disclaimer in
  15  *       the documentation and/or other materials provided with the
  16  *       distribution.
  17  *     * Neither the name of Broadcom Corporation nor the names of its
  18  *       contributors may be used to endorse or promote products derived
  19  *       from this software without specific prior written permission.
  20  *
  21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32  */
  33
  34 #include <inttypes.h>
  35 #include <stdbool.h>
  36
  37 #include <rte_dev.h>
  38 #include <rte_ethdev.h>
  39 #include <rte_ethdev_pci.h>
  40 #include <rte_malloc.h>
  41 #include <rte_cycles.h>
  42
  43 #include "bnxt.h"
  44 #include "bnxt_cpr.h"
  45 #include "bnxt_filter.h"
  46 #include "bnxt_hwrm.h"
  47 #include "bnxt_irq.h"
  48 #include "bnxt_ring.h"
  49 #include "bnxt_rxq.h"
  50 #include "bnxt_rxr.h"
  51 #include "bnxt_stats.h"
  52 #include "bnxt_txq.h"
  53 #include "bnxt_txr.h"
  54 #include "bnxt_vnic.h"
  55 #include "hsi_struct_def_dpdk.h"
  56
  57 #define DRV_MODULE_NAME         "bnxt"
  58 static const char bnxt_version[] =
  59         "Broadcom Cumulus driver " DRV_MODULE_NAME "\n";
  60
  61 #define PCI_VENDOR_ID_BROADCOM 0x14E4
  62
  63 #define BROADCOM_DEV_ID_STRATUS_NIC 0x1614
  64 #define BROADCOM_DEV_ID_57414_VF 0x16c1
  65 #define BROADCOM_DEV_ID_57301 0x16c8
  66 #define BROADCOM_DEV_ID_57302 0x16c9
  67 #define BROADCOM_DEV_ID_57304_PF 0x16ca
  68 #define BROADCOM_DEV_ID_57304_VF 0x16cb
  69 #define BROADCOM_DEV_ID_57417_MF 0x16cc
  70 #define BROADCOM_DEV_ID_NS2 0x16cd
  71 #define BROADCOM_DEV_ID_57311 0x16ce
  72 #define BROADCOM_DEV_ID_57312 0x16cf
  73 #define BROADCOM_DEV_ID_57402 0x16d0
  74 #define BROADCOM_DEV_ID_57404 0x16d1
  75 #define BROADCOM_DEV_ID_57406_PF 0x16d2
  76 #define BROADCOM_DEV_ID_57406_VF 0x16d3
  77 #define BROADCOM_DEV_ID_57402_MF 0x16d4
  78 #define BROADCOM_DEV_ID_57407_RJ45 0x16d5
  79 #define BROADCOM_DEV_ID_57412 0x16d6
  80 #define BROADCOM_DEV_ID_57414 0x16d7
  81 #define BROADCOM_DEV_ID_57416_RJ45 0x16d8
  82 #define BROADCOM_DEV_ID_57417_RJ45 0x16d9
  83 #define BROADCOM_DEV_ID_5741X_VF 0x16dc
  84 #define BROADCOM_DEV_ID_57412_MF 0x16de
  85 #define BROADCOM_DEV_ID_57314 0x16df
  86 #define BROADCOM_DEV_ID_57317_RJ45 0x16e0
  87 #define BROADCOM_DEV_ID_5731X_VF 0x16e1
  88 #define BROADCOM_DEV_ID_57417_SFP 0x16e2
  89 #define BROADCOM_DEV_ID_57416_SFP 0x16e3
  90 #define BROADCOM_DEV_ID_57317_SFP 0x16e4
  91 #define BROADCOM_DEV_ID_57404_MF 0x16e7
  92 #define BROADCOM_DEV_ID_57406_MF 0x16e8
  93 #define BROADCOM_DEV_ID_57407_SFP 0x16e9
  94 #define BROADCOM_DEV_ID_57407_MF 0x16ea
  95 #define BROADCOM_DEV_ID_57414_MF 0x16ec
  96 #define BROADCOM_DEV_ID_57416_MF 0x16ee
  97
  98 static const struct rte_pci_id bnxt_pci_id_map[] = {
  99         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_STRATUS_NIC) },
 100         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57414_VF) },
 101         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57301) },
 102         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57302) },
 103         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57304_PF) },
 104         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57304_VF) },
 105         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_NS2) },
 106         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57402) },
 107         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57404) },
 108         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57406_PF) },
 109         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57406_VF) },
 110         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57402_MF) },
 111         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57407_RJ45) },
 112         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57404_MF) },
 113         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57406_MF) },
 114         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57407_SFP) },
 115         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57407_MF) },
 116         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_5741X_VF) },
 117         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_5731X_VF) },
 118         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57314) },
 119         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57417_MF) },
 120         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57311) },
 121         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57312) },
 122         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57412) },
 123         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57414) },
 124         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57416_RJ45) },
 125         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57417_RJ45) },
 126         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57412_MF) },
 127         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57317_RJ45) },
 128         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57417_SFP) },
 129         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57416_SFP) },
 130         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57317_SFP) },
 131         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57414_MF) },
 132         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57416_MF) },
 133         { .vendor_id = 0, /* sentinel */ },
 134 };
 135
 136 #define BNXT_ETH_RSS_SUPPORT (  \
 137         ETH_RSS_IPV4 |          \
 138         ETH_RSS_NONFRAG_IPV4_TCP |      \
 139         ETH_RSS_NONFRAG_IPV4_UDP |      \
 140         ETH_RSS_IPV6 |          \
 141         ETH_RSS_NONFRAG_IPV6_TCP |      \
 142         ETH_RSS_NONFRAG_IPV6_UDP)
 143
 144 /***********************/
 145
 146 /*
 147  * High level utility functions
 148  */
 149
 150 static void bnxt_free_mem(struct bnxt *bp)
 151 {
 152         bnxt_free_filter_mem(bp);
 153         bnxt_free_vnic_attributes(bp);
 154         bnxt_free_vnic_mem(bp);
 155
 156         bnxt_free_stats(bp);
 157         bnxt_free_tx_rings(bp);
 158         bnxt_free_rx_rings(bp);
 159         bnxt_free_def_cp_ring(bp);
 160 }
 161
 162 static int bnxt_alloc_mem(struct bnxt *bp)
 163 {
 164         int rc;
 165
 166         /* Default completion ring */
 167         rc = bnxt_init_def_ring_struct(bp, SOCKET_ID_ANY);
 168         if (rc)
 169                 goto alloc_mem_err;
 170
 171         rc = bnxt_alloc_rings(bp, 0, NULL, NULL,
 172                               bp->def_cp_ring, "def_cp");
 173         if (rc)
 174                 goto alloc_mem_err;
 175
 176         rc = bnxt_alloc_vnic_mem(bp);
 177         if (rc)
 178                 goto alloc_mem_err;
 179
 180         rc = bnxt_alloc_vnic_attributes(bp);
 181         if (rc)
 182                 goto alloc_mem_err;
 183
 184         rc = bnxt_alloc_filter_mem(bp);
 185         if (rc)
 186                 goto alloc_mem_err;
 187
 188         return 0;
 189
 190 alloc_mem_err:
 191         bnxt_free_mem(bp);
 192         return rc;
 193 }
 194
 195 static int bnxt_init_chip(struct bnxt *bp)
 196 {
 197         unsigned int i, rss_idx, fw_idx;
 198         struct rte_eth_link new;
 199         int rc;
 200
 201         rc = bnxt_alloc_all_hwrm_stat_ctxs(bp);
 202         if (rc) {
 203                 RTE_LOG(ERR, PMD, "HWRM stat ctx alloc failure rc: %x\n", rc);
 204                 goto err_out;
 205         }
 206
 207         rc = bnxt_alloc_hwrm_rings(bp);
 208         if (rc) {
 209                 RTE_LOG(ERR, PMD, "HWRM ring alloc failure rc: %x\n", rc);
 210                 goto err_out;
 211         }
 212
 213         rc = bnxt_alloc_all_hwrm_ring_grps(bp);
 214         if (rc) {
 215                 RTE_LOG(ERR, PMD, "HWRM ring grp alloc failure: %x\n", rc);
 216                 goto err_out;
 217         }
 218
 219         rc = bnxt_mq_rx_configure(bp);
 220         if (rc) {
 221                 RTE_LOG(ERR, PMD, "MQ mode configure failure rc: %x\n", rc);
 222                 goto err_out;
 223         }
 224
 225         /* VNIC configuration */
 226         for (i = 0; i < bp->nr_vnics; i++) {
 227                 struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
 228
 229                 rc = bnxt_hwrm_vnic_alloc(bp, vnic);
 230                 if (rc) {
 231                         RTE_LOG(ERR, PMD, "HWRM vnic %d alloc failure rc: %x\n",
 232                                 i, rc);
 233                         goto err_out;
 234                 }
 235
 236                 rc = bnxt_hwrm_vnic_ctx_alloc(bp, vnic);
 237                 if (rc) {
 238                         RTE_LOG(ERR, PMD,
 239                                 "HWRM vnic %d ctx alloc failure rc: %x\n",
 240                                 i, rc);
 241                         goto err_out;
 242                 }
 243
 244                 rc = bnxt_hwrm_vnic_cfg(bp, vnic);
 245                 if (rc) {
 246                         RTE_LOG(ERR, PMD, "HWRM vnic %d cfg failure rc: %x\n",
 247                                 i, rc);
 248                         goto err_out;
 249                 }
 250
 251                 rc = bnxt_set_hwrm_vnic_filters(bp, vnic);
 252                 if (rc) {
 253                         RTE_LOG(ERR, PMD,
 254                                 "HWRM vnic %d filter failure rc: %x\n",
 255                                 i, rc);
 256                         goto err_out;
 257                 }
 258                 if (vnic->rss_table && vnic->hash_type) {
 259                         /*
 260                          * Fill the RSS hash & redirection table with
 261                          * ring group ids for all VNICs
 262                          */
 263                         for (rss_idx = 0, fw_idx = 0;
 264                              rss_idx < HW_HASH_INDEX_SIZE;
 265                              rss_idx++, fw_idx++) {
 266                                 if (vnic->fw_grp_ids[fw_idx] ==
 267                                     INVALID_HW_RING_ID)
 268                                         fw_idx = 0;
 269                                 vnic->rss_table[rss_idx] =
 270                                                 vnic->fw_grp_ids[fw_idx];
 271                         }
 272                         rc = bnxt_hwrm_vnic_rss_cfg(bp, vnic);
 273                         if (rc) {
 274                                 RTE_LOG(ERR, PMD,
 275                                         "HWRM vnic %d set RSS failure rc: %x\n",
 276                                         i, rc);
 277                                 goto err_out;
 278                         }
 279                 }
 280         }
 281         rc = bnxt_hwrm_cfa_l2_set_rx_mask(bp, &bp->vnic_info[0]);
 282         if (rc) {
 283                 RTE_LOG(ERR, PMD,
 284                         "HWRM cfa l2 rx mask failure rc: %x\n", rc);
 285                 goto err_out;
 286         }
 287
 288         rc = bnxt_get_hwrm_link_config(bp, &new);
 289         if (rc) {
 290                 RTE_LOG(ERR, PMD, "HWRM Get link config failure rc: %x\n", rc);
 291                 goto err_out;
 292         }
 293
 294         if (!bp->link_info.link_up) {
 295                 rc = bnxt_set_hwrm_link_config(bp, true);
 296                 if (rc) {
 297                         RTE_LOG(ERR, PMD,
 298                                 "HWRM link config failure rc: %x\n", rc);
 299                         goto err_out;
 300                 }
 301         }
 302
 303         return 0;
 304
 305 err_out:
 306         bnxt_free_all_hwrm_resources(bp);
 307
 308         return rc;
 309 }
 310
 311 static int bnxt_shutdown_nic(struct bnxt *bp)
 312 {
 313         bnxt_free_all_hwrm_resources(bp);
 314         bnxt_free_all_filters(bp);
 315         bnxt_free_all_vnics(bp);
 316         return 0;
 317 }
 318
 319 static int bnxt_init_nic(struct bnxt *bp)
 320 {
 321         int rc;
 322
 323         bnxt_init_ring_grps(bp);
 324         bnxt_init_vnics(bp);
 325         bnxt_init_filters(bp);
 326
 327         rc = bnxt_init_chip(bp);
 328         if (rc)
 329                 return rc;
 330
 331         return 0;
 332 }
 333
 334 /*
 335  * Device configuration and status function
 336  */
 337
 338 static void bnxt_dev_info_get_op(struct rte_eth_dev *eth_dev,
 339                                   struct rte_eth_dev_info *dev_info)
 340 {
 341         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 342         uint16_t max_vnics, i, j, vpool, vrxq;
 343
 344         dev_info->pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
 345
 346         /* MAC Specifics */
 347         dev_info->max_mac_addrs = MAX_NUM_MAC_ADDR;
 348         dev_info->max_hash_mac_addrs = 0;
 349
 350         /* PF/VF specifics */
 351         if (BNXT_PF(bp))
 352                 dev_info->max_vfs = bp->pdev->max_vfs;
 353         dev_info->max_rx_queues = bp->max_rx_rings;
 354         dev_info->max_tx_queues = bp->max_tx_rings;
 355         dev_info->reta_size = bp->max_rsscos_ctx;
 356         max_vnics = bp->max_vnics;
 357
 358         /* Fast path specifics */
 359         dev_info->min_rx_bufsize = 1;
 360         dev_info->max_rx_pktlen = BNXT_MAX_MTU + ETHER_HDR_LEN + ETHER_CRC_LEN
 361                                   + VLAN_TAG_SIZE;
 362         dev_info->rx_offload_capa = 0;
 363         dev_info->tx_offload_capa = DEV_TX_OFFLOAD_IPV4_CKSUM |
 364                                         DEV_TX_OFFLOAD_TCP_CKSUM |
 365                                         DEV_TX_OFFLOAD_UDP_CKSUM |
 366                                         DEV_TX_OFFLOAD_TCP_TSO |
 367                                         DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM |
 368                                         DEV_TX_OFFLOAD_VXLAN_TNL_TSO |
 369                                         DEV_TX_OFFLOAD_GRE_TNL_TSO |
 370                                         DEV_TX_OFFLOAD_IPIP_TNL_TSO |
 371                                         DEV_TX_OFFLOAD_GENEVE_TNL_TSO;
 372
 373         /* *INDENT-OFF* */
 374         dev_info->default_rxconf = (struct rte_eth_rxconf) {
 375                 .rx_thresh = {
 376                         .pthresh = 8,
 377                         .hthresh = 8,
 378                         .wthresh = 0,
 379                 },
 380                 .rx_free_thresh = 32,
 381                 .rx_drop_en = 0,
 382         };
 383
 384         dev_info->default_txconf = (struct rte_eth_txconf) {
 385                 .tx_thresh = {
 386                         .pthresh = 32,
 387                         .hthresh = 0,
 388                         .wthresh = 0,
 389                 },
 390                 .tx_free_thresh = 32,
 391                 .tx_rs_thresh = 32,
 392                 .txq_flags = ETH_TXQ_FLAGS_NOMULTSEGS |
 393                              ETH_TXQ_FLAGS_NOOFFLOADS,
 394         };
 395         eth_dev->data->dev_conf.intr_conf.lsc = 1;
 396
 397         /* *INDENT-ON* */
 398
 399         /*
 400          * TODO: default_rxconf, default_txconf, rx_desc_lim, and tx_desc_lim
 401          *       need further investigation.
 402          */
 403
 404         /* VMDq resources */
 405         vpool = 64; /* ETH_64_POOLS */
 406         vrxq = 128; /* ETH_VMDQ_DCB_NUM_QUEUES */
 407         for (i = 0; i < 4; vpool >>= 1, i++) {
 408                 if (max_vnics > vpool) {
 409                         for (j = 0; j < 5; vrxq >>= 1, j++) {
 410                                 if (dev_info->max_rx_queues > vrxq) {
 411                                         if (vpool > vrxq)
 412                                                 vpool = vrxq;
 413                                         goto found;
 414                                 }
 415                         }
 416                         /* Not enough resources to support VMDq */
 417                         break;
 418                 }
 419         }
 420         /* Not enough resources to support VMDq */
 421         vpool = 0;
 422         vrxq = 0;
 423 found:
 424         dev_info->max_vmdq_pools = vpool;
 425         dev_info->vmdq_queue_num = vrxq;
 426
 427         dev_info->vmdq_pool_base = 0;
 428         dev_info->vmdq_queue_base = 0;
 429 }
 430
 431 /* Configure the device based on the configuration provided */
 432 static int bnxt_dev_configure_op(struct rte_eth_dev *eth_dev)
 433 {
 434         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 435
 436         bp->rx_queues = (void *)eth_dev->data->rx_queues;
 437         bp->tx_queues = (void *)eth_dev->data->tx_queues;
 438
 439         /* Inherit new configurations */
 440         bp->rx_nr_rings = eth_dev->data->nb_rx_queues;
 441         bp->tx_nr_rings = eth_dev->data->nb_tx_queues;
 442         bp->rx_cp_nr_rings = bp->rx_nr_rings;
 443         bp->tx_cp_nr_rings = bp->tx_nr_rings;
 444
 445         if (eth_dev->data->dev_conf.rxmode.jumbo_frame)
 446                 eth_dev->data->mtu =
 447                                 eth_dev->data->dev_conf.rxmode.max_rx_pkt_len -
 448                                 ETHER_HDR_LEN - ETHER_CRC_LEN - VLAN_TAG_SIZE;
 449         return 0;
 450 }
 451
 452 static inline int
 453 rte_bnxt_atomic_write_link_status(struct rte_eth_dev *eth_dev,
 454                                 struct rte_eth_link *link)
 455 {
 456         struct rte_eth_link *dst = &eth_dev->data->dev_link;
 457         struct rte_eth_link *src = link;
 458
 459         if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
 460                                         *(uint64_t *)src) == 0)
 461                 return 1;
 462
 463         return 0;
 464 }
 465
 466 static void bnxt_print_link_info(struct rte_eth_dev *eth_dev)
 467 {
 468         struct rte_eth_link *link = &eth_dev->data->dev_link;
 469
 470         if (link->link_status)
 471                 RTE_LOG(INFO, PMD, "Port %d Link Up - speed %u Mbps - %s\n",
 472                         (uint8_t)(eth_dev->data->port_id),
 473                         (uint32_t)link->link_speed,
 474                         (link->link_duplex == ETH_LINK_FULL_DUPLEX) ?
 475                         ("full-duplex") : ("half-duplex\n"));
 476         else
 477                 RTE_LOG(INFO, PMD, "Port %d Link Down\n",
 478                         (uint8_t)(eth_dev->data->port_id));
 479 }
 480
 481 static int bnxt_dev_lsc_intr_setup(struct rte_eth_dev *eth_dev)
 482 {
 483         bnxt_print_link_info(eth_dev);
 484         return 0;
 485 }
 486
 487 static int bnxt_dev_start_op(struct rte_eth_dev *eth_dev)
 488 {
 489         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 490         int rc;
 491
 492         bp->dev_stopped = 0;
 493
 494         rc = bnxt_init_nic(bp);
 495         if (rc)
 496                 goto error;
 497
 498         bnxt_link_update_op(eth_dev, 0);
 499         return 0;
 500
 501 error:
 502         bnxt_shutdown_nic(bp);
 503         bnxt_free_tx_mbufs(bp);
 504         bnxt_free_rx_mbufs(bp);
 505         return rc;
 506 }
 507
 508 static int bnxt_dev_set_link_up_op(struct rte_eth_dev *eth_dev)
 509 {
 510         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 511
 512         eth_dev->data->dev_link.link_status = 1;
 513         bnxt_set_hwrm_link_config(bp, true);
 514         return 0;
 515 }
 516
 517 static int bnxt_dev_set_link_down_op(struct rte_eth_dev *eth_dev)
 518 {
 519         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 520
 521         eth_dev->data->dev_link.link_status = 0;
 522         bnxt_set_hwrm_link_config(bp, false);
 523         return 0;
 524 }
 525
 526 /* Unload the driver, release resources */
 527 static void bnxt_dev_stop_op(struct rte_eth_dev *eth_dev)
 528 {
 529         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 530
 531         if (bp->eth_dev->data->dev_started) {
 532                 /* TBD: STOP HW queues DMA */
 533                 eth_dev->data->dev_link.link_status = 0;
 534         }
 535         bnxt_set_hwrm_link_config(bp, false);
 536         bnxt_shutdown_nic(bp);
 537         bp->dev_stopped = 1;
 538 }
 539
 540 static void bnxt_dev_close_op(struct rte_eth_dev *eth_dev)
 541 {
 542         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 543
 544         if (bp->dev_stopped == 0)
 545                 bnxt_dev_stop_op(eth_dev);
 546
 547         bnxt_free_tx_mbufs(bp);
 548         bnxt_free_rx_mbufs(bp);
 549         bnxt_free_mem(bp);
 550         if (eth_dev->data->mac_addrs != NULL) {
 551                 rte_free(eth_dev->data->mac_addrs);
 552                 eth_dev->data->mac_addrs = NULL;
 553         }
 554         if (bp->grp_info != NULL) {
 555                 rte_free(bp->grp_info);
 556                 bp->grp_info = NULL;
 557         }
 558 }
 559
 560 static void bnxt_mac_addr_remove_op(struct rte_eth_dev *eth_dev,
 561                                     uint32_t index)
 562 {
 563         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 564         uint64_t pool_mask = eth_dev->data->mac_pool_sel[index];
 565         struct bnxt_vnic_info *vnic;
 566         struct bnxt_filter_info *filter, *temp_filter;
 567         int i;
 568
 569         /*
 570          * Loop through all VNICs from the specified filter flow pools to
 571          * remove the corresponding MAC addr filter
 572          */
 573         for (i = 0; i < MAX_FF_POOLS; i++) {
 574                 if (!(pool_mask & (1ULL << i)))
 575                         continue;
 576
 577                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
 578                         filter = STAILQ_FIRST(&vnic->filter);
 579                         while (filter) {
 580                                 temp_filter = STAILQ_NEXT(filter, next);
 581                                 if (filter->mac_index == index) {
 582                                         STAILQ_REMOVE(&vnic->filter, filter,
 583                                                       bnxt_filter_info, next);
 584                                         bnxt_hwrm_clear_filter(bp, filter);
 585                                         filter->mac_index = INVALID_MAC_INDEX;
 586                                         memset(&filter->l2_addr, 0,
 587                                                ETHER_ADDR_LEN);
 588                                         STAILQ_INSERT_TAIL(
 589                                                         &bp->free_filter_list,
 590                                                         filter, next);
 591                                 }
 592                                 filter = temp_filter;
 593                         }
 594                 }
 595         }
 596 }
 597
 598 static int bnxt_mac_addr_add_op(struct rte_eth_dev *eth_dev,
 599                                 struct ether_addr *mac_addr,
 600                                 uint32_t index, uint32_t pool)
 601 {
 602         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 603         struct bnxt_vnic_info *vnic = STAILQ_FIRST(&bp->ff_pool[pool]);
 604         struct bnxt_filter_info *filter;
 605
 606         if (BNXT_VF(bp)) {
 607                 RTE_LOG(ERR, PMD, "Cannot add MAC address to a VF interface\n");
 608                 return -ENOTSUP;
 609         }
 610
 611         if (!vnic) {
 612                 RTE_LOG(ERR, PMD, "VNIC not found for pool %d!\n", pool);
 613                 return -EINVAL;
 614         }
 615         /* Attach requested MAC address to the new l2_filter */
 616         STAILQ_FOREACH(filter, &vnic->filter, next) {
 617                 if (filter->mac_index == index) {
 618                         RTE_LOG(ERR, PMD,
 619                                 "MAC addr already existed for pool %d\n", pool);
 620                         return -EINVAL;
 621                 }
 622         }
 623         filter = bnxt_alloc_filter(bp);
 624         if (!filter) {
 625                 RTE_LOG(ERR, PMD, "L2 filter alloc failed\n");
 626                 return -ENODEV;
 627         }
 628         STAILQ_INSERT_TAIL(&vnic->filter, filter, next);
 629         filter->mac_index = index;
 630         memcpy(filter->l2_addr, mac_addr, ETHER_ADDR_LEN);
 631         return bnxt_hwrm_set_filter(bp, vnic, filter);
 632 }
 633
 634 int bnxt_link_update_op(struct rte_eth_dev *eth_dev, int wait_to_complete)
 635 {
 636         int rc = 0;
 637         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 638         struct rte_eth_link new;
 639         unsigned int cnt = BNXT_LINK_WAIT_CNT;
 640
 641         memset(&new, 0, sizeof(new));
 642         do {
 643                 /* Retrieve link info from hardware */
 644                 rc = bnxt_get_hwrm_link_config(bp, &new);
 645                 if (rc) {
 646                         new.link_speed = ETH_LINK_SPEED_100M;
 647                         new.link_duplex = ETH_LINK_FULL_DUPLEX;
 648                         RTE_LOG(ERR, PMD,
 649                                 "Failed to retrieve link rc = 0x%x!\n", rc);
 650                         goto out;
 651                 }
 652                 rte_delay_ms(BNXT_LINK_WAIT_INTERVAL);
 653
 654                 if (!wait_to_complete)
 655                         break;
 656         } while (!new.link_status && cnt--);
 657
 658 out:
 659         /* Timed out or success */
 660         if (new.link_status != eth_dev->data->dev_link.link_status ||
 661         new.link_speed != eth_dev->data->dev_link.link_speed) {
 662                 rte_bnxt_atomic_write_link_status(eth_dev, &new);
 663                 bnxt_print_link_info(eth_dev);
 664         }
 665
 666         return rc;
 667 }
 668
 669 static void bnxt_promiscuous_enable_op(struct rte_eth_dev *eth_dev)
 670 {
 671         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 672         struct bnxt_vnic_info *vnic;
 673
 674         if (bp->vnic_info == NULL)
 675                 return;
 676
 677         vnic = &bp->vnic_info[0];
 678
 679         vnic->flags |= BNXT_VNIC_INFO_PROMISC;
 680         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic);
 681 }
 682
 683 static void bnxt_promiscuous_disable_op(struct rte_eth_dev *eth_dev)
 684 {
 685         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 686         struct bnxt_vnic_info *vnic;
 687
 688         if (bp->vnic_info == NULL)
 689                 return;
 690
 691         vnic = &bp->vnic_info[0];
 692
 693         vnic->flags &= ~BNXT_VNIC_INFO_PROMISC;
 694         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic);
 695 }
 696
 697 static void bnxt_allmulticast_enable_op(struct rte_eth_dev *eth_dev)
 698 {
 699         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 700         struct bnxt_vnic_info *vnic;
 701
 702         if (bp->vnic_info == NULL)
 703                 return;
 704
 705         vnic = &bp->vnic_info[0];
 706
 707         vnic->flags |= BNXT_VNIC_INFO_ALLMULTI;
 708         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic);
 709 }
 710
 711 static void bnxt_allmulticast_disable_op(struct rte_eth_dev *eth_dev)
 712 {
 713         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 714         struct bnxt_vnic_info *vnic;
 715
 716         if (bp->vnic_info == NULL)
 717                 return;
 718
 719         vnic = &bp->vnic_info[0];
 720
 721         vnic->flags &= ~BNXT_VNIC_INFO_ALLMULTI;
 722         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic);
 723 }
 724
 725 static int bnxt_reta_update_op(struct rte_eth_dev *eth_dev,
 726                             struct rte_eth_rss_reta_entry64 *reta_conf,
 727                             uint16_t reta_size)
 728 {
 729         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 730         struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
 731         struct bnxt_vnic_info *vnic;
 732         int i;
 733
 734         if (!(dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG))
 735                 return -EINVAL;
 736
 737         if (reta_size != HW_HASH_INDEX_SIZE) {
 738                 RTE_LOG(ERR, PMD, "The configured hash table lookup size "
 739                         "(%d) must equal the size supported by the hardware "
 740                         "(%d)\n", reta_size, HW_HASH_INDEX_SIZE);
 741                 return -EINVAL;
 742         }
 743         /* Update the RSS VNIC(s) */
 744         for (i = 0; i < MAX_FF_POOLS; i++) {
 745                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
 746                         memcpy(vnic->rss_table, reta_conf, reta_size);
 747
 748                         bnxt_hwrm_vnic_rss_cfg(bp, vnic);
 749                 }
 750         }
 751         return 0;
 752 }
 753
 754 static int bnxt_reta_query_op(struct rte_eth_dev *eth_dev,
 755                               struct rte_eth_rss_reta_entry64 *reta_conf,
 756                               uint16_t reta_size)
 757 {
 758         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 759         struct bnxt_vnic_info *vnic = &bp->vnic_info[0];
 760         struct rte_intr_handle *intr_handle
 761                 = &bp->pdev->intr_handle;
 762
 763         /* Retrieve from the default VNIC */
 764         if (!vnic)
 765                 return -EINVAL;
 766         if (!vnic->rss_table)
 767                 return -EINVAL;
 768
 769         if (reta_size != HW_HASH_INDEX_SIZE) {
 770                 RTE_LOG(ERR, PMD, "The configured hash table lookup size "
 771                         "(%d) must equal the size supported by the hardware "
 772                         "(%d)\n", reta_size, HW_HASH_INDEX_SIZE);
 773                 return -EINVAL;
 774         }
 775         /* EW - need to revisit here copying from u64 to u16 */
 776         memcpy(reta_conf, vnic->rss_table, reta_size);
 777
 778         if (rte_intr_allow_others(intr_handle)) {
 779                 if (eth_dev->data->dev_conf.intr_conf.lsc != 0)
 780                         bnxt_dev_lsc_intr_setup(eth_dev);
 781         }
 782
 783         return 0;
 784 }
 785
 786 static int bnxt_rss_hash_update_op(struct rte_eth_dev *eth_dev,
 787                                    struct rte_eth_rss_conf *rss_conf)
 788 {
 789         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 790         struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
 791         struct bnxt_vnic_info *vnic;
 792         uint16_t hash_type = 0;
 793         int i;
 794
 795         /*
 796          * If RSS enablement were different than dev_configure,
 797          * then return -EINVAL
 798          */
 799         if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) {
 800                 if (!rss_conf->rss_hf)
 801                         return -EINVAL;
 802         } else {
 803                 if (rss_conf->rss_hf & BNXT_ETH_RSS_SUPPORT)
 804                         return -EINVAL;
 805         }
 806         if (rss_conf->rss_hf & ETH_RSS_IPV4)
 807                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4;
 808         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV4_TCP)
 809                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4;
 810         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV4_UDP)
 811                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4;
 812         if (rss_conf->rss_hf & ETH_RSS_IPV6)
 813                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6;
 814         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV6_TCP)
 815                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6;
 816         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV6_UDP)
 817                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6;
 818
 819         /* Update the RSS VNIC(s) */
 820         for (i = 0; i < MAX_FF_POOLS; i++) {
 821                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
 822                         vnic->hash_type = hash_type;
 823
 824                         /*
 825                          * Use the supplied key if the key length is
 826                          * acceptable and the rss_key is not NULL
 827                          */
 828                         if (rss_conf->rss_key &&
 829                             rss_conf->rss_key_len <= HW_HASH_KEY_SIZE)
 830                                 memcpy(vnic->rss_hash_key, rss_conf->rss_key,
 831                                        rss_conf->rss_key_len);
 832
 833                         bnxt_hwrm_vnic_rss_cfg(bp, vnic);
 834                 }
 835         }
 836         return 0;
 837 }
 838
 839 static int bnxt_rss_hash_conf_get_op(struct rte_eth_dev *eth_dev,
 840                                      struct rte_eth_rss_conf *rss_conf)
 841 {
 842         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 843         struct bnxt_vnic_info *vnic = &bp->vnic_info[0];
 844         int len;
 845         uint32_t hash_types;
 846
 847         /* RSS configuration is the same for all VNICs */
 848         if (vnic && vnic->rss_hash_key) {
 849                 if (rss_conf->rss_key) {
 850                         len = rss_conf->rss_key_len <= HW_HASH_KEY_SIZE ?
 851                               rss_conf->rss_key_len : HW_HASH_KEY_SIZE;
 852                         memcpy(rss_conf->rss_key, vnic->rss_hash_key, len);
 853                 }
 854
 855                 hash_types = vnic->hash_type;
 856                 rss_conf->rss_hf = 0;
 857                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4) {
 858                         rss_conf->rss_hf |= ETH_RSS_IPV4;
 859                         hash_types &= ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4;
 860                 }
 861                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4) {
 862                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV4_TCP;
 863                         hash_types &=
 864                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4;
 865                 }
 866                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4) {
 867                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV4_UDP;
 868                         hash_types &=
 869                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4;
 870                 }
 871                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6) {
 872                         rss_conf->rss_hf |= ETH_RSS_IPV6;
 873                         hash_types &= ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6;
 874                 }
 875                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6) {
 876                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV6_TCP;
 877                         hash_types &=
 878                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6;
 879                 }
 880                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6) {
 881                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV6_UDP;
 882                         hash_types &=
 883                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6;
 884                 }
 885                 if (hash_types) {
 886                         RTE_LOG(ERR, PMD,
 887                                 "Unknwon RSS config from firmware (%08x), RSS disabled",
 888                                 vnic->hash_type);
 889                         return -ENOTSUP;
 890                 }
 891         } else {
 892                 rss_conf->rss_hf = 0;
 893         }
 894         return 0;
 895 }
 896
 897 static int bnxt_flow_ctrl_get_op(struct rte_eth_dev *dev,
 898                                struct rte_eth_fc_conf *fc_conf)
 899 {
 900         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
 901         struct rte_eth_link link_info;
 902         int rc;
 903
 904         rc = bnxt_get_hwrm_link_config(bp, &link_info);
 905         if (rc)
 906                 return rc;
 907
 908         memset(fc_conf, 0, sizeof(*fc_conf));
 909         if (bp->link_info.auto_pause)
 910                 fc_conf->autoneg = 1;
 911         switch (bp->link_info.pause) {
 912         case 0:
 913                 fc_conf->mode = RTE_FC_NONE;
 914                 break;
 915         case HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_TX:
 916                 fc_conf->mode = RTE_FC_TX_PAUSE;
 917                 break;
 918         case HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_RX:
 919                 fc_conf->mode = RTE_FC_RX_PAUSE;
 920                 break;
 921         case (HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_TX |
 922                         HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_RX):
 923                 fc_conf->mode = RTE_FC_FULL;
 924                 break;
 925         }
 926         return 0;
 927 }
 928
 929 static int bnxt_flow_ctrl_set_op(struct rte_eth_dev *dev,
 930                                struct rte_eth_fc_conf *fc_conf)
 931 {
 932         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
 933
 934         if (BNXT_NPAR_PF(bp) || BNXT_VF(bp)) {
 935                 RTE_LOG(ERR, PMD, "Flow Control Settings cannot be modified\n");
 936                 return -ENOTSUP;
 937         }
 938
 939         switch (fc_conf->mode) {
 940         case RTE_FC_NONE:
 941                 bp->link_info.auto_pause = 0;
 942                 bp->link_info.force_pause = 0;
 943                 break;
 944         case RTE_FC_RX_PAUSE:
 945                 if (fc_conf->autoneg) {
 946                         bp->link_info.auto_pause =
 947                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_RX;
 948                         bp->link_info.force_pause = 0;
 949                 } else {
 950                         bp->link_info.auto_pause = 0;
 951                         bp->link_info.force_pause =
 952                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_RX;
 953                 }
 954                 break;
 955         case RTE_FC_TX_PAUSE:
 956                 if (fc_conf->autoneg) {
 957                         bp->link_info.auto_pause =
 958                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_TX;
 959                         bp->link_info.force_pause = 0;
 960                 } else {
 961                         bp->link_info.auto_pause = 0;
 962                         bp->link_info.force_pause =
 963                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_TX;
 964                 }
 965                 break;
 966         case RTE_FC_FULL:
 967                 if (fc_conf->autoneg) {
 968                         bp->link_info.auto_pause =
 969                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_TX |
 970                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_RX;
 971                         bp->link_info.force_pause = 0;
 972                 } else {
 973                         bp->link_info.auto_pause = 0;
 974                         bp->link_info.force_pause =
 975                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_TX |
 976                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_RX;
 977                 }
 978                 break;
 979         }
 980         return bnxt_set_hwrm_link_config(bp, true);
 981 }
 982
 983 /* Add UDP tunneling port */
 984 static int
 985 bnxt_udp_tunnel_port_add_op(struct rte_eth_dev *eth_dev,
 986                          struct rte_eth_udp_tunnel *udp_tunnel)
 987 {
 988         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 989         uint16_t tunnel_type = 0;
 990         int rc = 0;
 991
 992         switch (udp_tunnel->prot_type) {
 993         case RTE_TUNNEL_TYPE_VXLAN:
 994                 if (bp->vxlan_port_cnt) {
 995                         RTE_LOG(ERR, PMD, "Tunnel Port %d already programmed\n",
 996                                 udp_tunnel->udp_port);
 997                         if (bp->vxlan_port != udp_tunnel->udp_port) {
 998                                 RTE_LOG(ERR, PMD, "Only one port allowed\n");
 999                                 return -ENOSPC;
1000                         }
1001                         bp->vxlan_port_cnt++;
1002                         return 0;
1003                 }
1004                 tunnel_type =
1005                         HWRM_TUNNEL_DST_PORT_ALLOC_INPUT_TUNNEL_TYPE_VXLAN;
1006                 bp->vxlan_port_cnt++;
1007                 break;
1008         case RTE_TUNNEL_TYPE_GENEVE:
1009                 if (bp->geneve_port_cnt) {
1010                         RTE_LOG(ERR, PMD, "Tunnel Port %d already programmed\n",
1011                                 udp_tunnel->udp_port);
1012                         if (bp->geneve_port != udp_tunnel->udp_port) {
1013                                 RTE_LOG(ERR, PMD, "Only one port allowed\n");
1014                                 return -ENOSPC;
1015                         }
1016                         bp->geneve_port_cnt++;
1017                         return 0;
1018                 }
1019                 tunnel_type =
1020                         HWRM_TUNNEL_DST_PORT_ALLOC_INPUT_TUNNEL_TYPE_GENEVE;
1021                 bp->geneve_port_cnt++;
1022                 break;
1023         default:
1024                 RTE_LOG(ERR, PMD, "Tunnel type is not supported\n");
1025                 return -ENOTSUP;
1026         }
1027         rc = bnxt_hwrm_tunnel_dst_port_alloc(bp, udp_tunnel->udp_port,
1028                                              tunnel_type);
1029         return rc;
1030 }
1031
1032 static int
1033 bnxt_udp_tunnel_port_del_op(struct rte_eth_dev *eth_dev,
1034                          struct rte_eth_udp_tunnel *udp_tunnel)
1035 {
1036         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
1037         uint16_t tunnel_type = 0;
1038         uint16_t port = 0;
1039         int rc = 0;
1040
1041         switch (udp_tunnel->prot_type) {
1042         case RTE_TUNNEL_TYPE_VXLAN:
1043                 if (!bp->vxlan_port_cnt) {
1044                         RTE_LOG(ERR, PMD, "No Tunnel port configured yet\n");
1045                         return -EINVAL;
1046                 }
1047                 if (bp->vxlan_port != udp_tunnel->udp_port) {
1048                         RTE_LOG(ERR, PMD, "Req Port: %d. Configured port: %d\n",
1049                                 udp_tunnel->udp_port, bp->vxlan_port);
1050                         return -EINVAL;
1051                 }
1052                 if (--bp->vxlan_port_cnt)
1053                         return 0;
1054
1055                 tunnel_type =
1056                         HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_VXLAN;
1057                 port = bp->vxlan_fw_dst_port_id;
1058                 break;
1059         case RTE_TUNNEL_TYPE_GENEVE:
1060                 if (!bp->geneve_port_cnt) {
1061                         RTE_LOG(ERR, PMD, "No Tunnel port configured yet\n");
1062                         return -EINVAL;
1063                 }
1064                 if (bp->geneve_port != udp_tunnel->udp_port) {
1065                         RTE_LOG(ERR, PMD, "Req Port: %d. Configured port: %d\n",
1066                                 udp_tunnel->udp_port, bp->geneve_port);
1067                         return -EINVAL;
1068                 }
1069                 if (--bp->geneve_port_cnt)
1070                         return 0;
1071
1072                 tunnel_type =
1073                         HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_GENEVE;
1074                 port = bp->geneve_fw_dst_port_id;
1075                 break;
1076         default:
1077                 RTE_LOG(ERR, PMD, "Tunnel type is not supported\n");
1078                 return -ENOTSUP;
1079         }
1080
1081         rc = bnxt_hwrm_tunnel_dst_port_free(bp, port, tunnel_type);
1082         if (!rc) {
1083                 if (tunnel_type ==
1084                     HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_VXLAN)
1085                         bp->vxlan_port = 0;
1086                 if (tunnel_type ==
1087                     HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_GENEVE)
1088                         bp->geneve_port = 0;
1089         }
1090         return rc;
1091 }
1092
1093 /*
1094  * Initialization
1095  */
1096
1097 static const struct eth_dev_ops bnxt_dev_ops = {
1098         .dev_infos_get = bnxt_dev_info_get_op,
1099         .dev_close = bnxt_dev_close_op,
1100         .dev_configure = bnxt_dev_configure_op,
1101         .dev_start = bnxt_dev_start_op,
1102         .dev_stop = bnxt_dev_stop_op,
1103         .dev_set_link_up = bnxt_dev_set_link_up_op,
1104         .dev_set_link_down = bnxt_dev_set_link_down_op,
1105         .stats_get = bnxt_stats_get_op,
1106         .stats_reset = bnxt_stats_reset_op,
1107         .rx_queue_setup = bnxt_rx_queue_setup_op,
1108         .rx_queue_release = bnxt_rx_queue_release_op,
1109         .tx_queue_setup = bnxt_tx_queue_setup_op,
1110         .tx_queue_release = bnxt_tx_queue_release_op,
1111         .reta_update = bnxt_reta_update_op,
1112         .reta_query = bnxt_reta_query_op,
1113         .rss_hash_update = bnxt_rss_hash_update_op,
1114         .rss_hash_conf_get = bnxt_rss_hash_conf_get_op,
1115         .link_update = bnxt_link_update_op,
1116         .promiscuous_enable = bnxt_promiscuous_enable_op,
1117         .promiscuous_disable = bnxt_promiscuous_disable_op,
1118         .allmulticast_enable = bnxt_allmulticast_enable_op,
1119         .allmulticast_disable = bnxt_allmulticast_disable_op,
1120         .mac_addr_add = bnxt_mac_addr_add_op,
1121         .mac_addr_remove = bnxt_mac_addr_remove_op,
1122         .flow_ctrl_get = bnxt_flow_ctrl_get_op,
1123         .flow_ctrl_set = bnxt_flow_ctrl_set_op,
1124         .udp_tunnel_port_add  = bnxt_udp_tunnel_port_add_op,
1125         .udp_tunnel_port_del  = bnxt_udp_tunnel_port_del_op,
1126 };
1127
1128 static bool bnxt_vf_pciid(uint16_t id)
1129 {
1130         if (id == BROADCOM_DEV_ID_57304_VF ||
1131             id == BROADCOM_DEV_ID_57406_VF ||
1132             id == BROADCOM_DEV_ID_5731X_VF ||
1133             id == BROADCOM_DEV_ID_5741X_VF ||
1134             id == BROADCOM_DEV_ID_57414_VF)
1135                 return true;
1136         return false;
1137 }
1138
1139 static int bnxt_init_board(struct rte_eth_dev *eth_dev)
1140 {
1141         struct bnxt *bp = eth_dev->data->dev_private;
1142         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
1143         int rc;
1144
1145         /* enable device (incl. PCI PM wakeup), and bus-mastering */
1146         if (!pci_dev->mem_resource[0].addr) {
1147                 RTE_LOG(ERR, PMD,
1148                         "Cannot find PCI device base address, aborting\n");
1149                 rc = -ENODEV;
1150                 goto init_err_disable;
1151         }
1152
1153         bp->eth_dev = eth_dev;
1154         bp->pdev = pci_dev;
1155
1156         bp->bar0 = (void *)pci_dev->mem_resource[0].addr;
1157         if (!bp->bar0) {
1158                 RTE_LOG(ERR, PMD, "Cannot map device registers, aborting\n");
1159                 rc = -ENOMEM;
1160                 goto init_err_release;
1161         }
1162         return 0;
1163
1164 init_err_release:
1165         if (bp->bar0)
1166                 bp->bar0 = NULL;
1167
1168 init_err_disable:
1169
1170         return rc;
1171 }
1172
1173 static int bnxt_dev_uninit(struct rte_eth_dev *eth_dev);
1174
1175 #define ALLOW_FUNC(x)   \
1176         { \
1177                 typeof(x) arg = (x); \
1178                 bp->pf.vf_req_fwd[((arg) >> 5)] &= \
1179                 ~rte_cpu_to_le_32(1 << ((arg) & 0x1f)); \
1180         }
1181 static int
1182 bnxt_dev_init(struct rte_eth_dev *eth_dev)
1183 {
1184         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
1185         static int version_printed;
1186         struct bnxt *bp;
1187         int rc;
1188
1189         if (version_printed++ == 0)
1190                 RTE_LOG(INFO, PMD, "%s\n", bnxt_version);
1191
1192         rte_eth_copy_pci_info(eth_dev, pci_dev);
1193         eth_dev->data->dev_flags |= RTE_ETH_DEV_DETACHABLE;
1194
1195         bp = eth_dev->data->dev_private;
1196         bp->dev_stopped = 1;
1197
1198         if (bnxt_vf_pciid(pci_dev->id.device_id))
1199                 bp->flags |= BNXT_FLAG_VF;
1200
1201         rc = bnxt_init_board(eth_dev);
1202         if (rc) {
1203                 RTE_LOG(ERR, PMD,
1204                         "Board initialization failed rc: %x\n", rc);
1205                 goto error;
1206         }
1207         eth_dev->dev_ops = &bnxt_dev_ops;
1208         eth_dev->rx_pkt_burst = &bnxt_recv_pkts;
1209         eth_dev->tx_pkt_burst = &bnxt_xmit_pkts;
1210
1211         rc = bnxt_alloc_hwrm_resources(bp);
1212         if (rc) {
1213                 RTE_LOG(ERR, PMD,
1214                         "hwrm resource allocation failure rc: %x\n", rc);
1215                 goto error_free;
1216         }
1217         rc = bnxt_hwrm_ver_get(bp);
1218         if (rc)
1219                 goto error_free;
1220         bnxt_hwrm_queue_qportcfg(bp);
1221
1222         bnxt_hwrm_func_qcfg(bp);
1223
1224         /* Get the MAX capabilities for this function */
1225         rc = bnxt_hwrm_func_qcaps(bp);
1226         if (rc) {
1227                 RTE_LOG(ERR, PMD, "hwrm query capability failure rc: %x\n", rc);
1228                 goto error_free;
1229         }
1230         if (bp->max_tx_rings == 0) {
1231                 RTE_LOG(ERR, PMD, "No TX rings available!\n");
1232                 rc = -EBUSY;
1233                 goto error_free;
1234         }
1235         eth_dev->data->mac_addrs = rte_zmalloc("bnxt_mac_addr_tbl",
1236                                         ETHER_ADDR_LEN * MAX_NUM_MAC_ADDR, 0);
1237         if (eth_dev->data->mac_addrs == NULL) {
1238                 RTE_LOG(ERR, PMD,
1239                         "Failed to alloc %u bytes needed to store MAC addr tbl",
1240                         ETHER_ADDR_LEN * MAX_NUM_MAC_ADDR);
1241                 rc = -ENOMEM;
1242                 goto error_free;
1243         }
1244         /* Copy the permanent MAC from the qcap response address now. */
1245         memcpy(bp->mac_addr, bp->dflt_mac_addr, sizeof(bp->mac_addr));
1246         memcpy(&eth_dev->data->mac_addrs[0], bp->mac_addr, ETHER_ADDR_LEN);
1247         bp->grp_info = rte_zmalloc("bnxt_grp_info",
1248                                 sizeof(*bp->grp_info) * bp->max_ring_grps, 0);
1249         if (!bp->grp_info) {
1250                 RTE_LOG(ERR, PMD,
1251                         "Failed to alloc %zu bytes needed to store group info table\n",
1252                         sizeof(*bp->grp_info) * bp->max_ring_grps);
1253                 rc = -ENOMEM;
1254                 goto error_free;
1255         }
1256
1257         /* Forward all requests if firmware is new enough */
1258         if (((bp->fw_ver >= ((20 << 24) | (6 << 16) | (100 << 8))) &&
1259             (bp->fw_ver < ((20 << 24) | (7 << 16)))) ||
1260             ((bp->fw_ver >= ((20 << 24) | (8 << 16))))) {
1261                 memset(bp->pf.vf_req_fwd, 0xff, sizeof(bp->pf.vf_req_fwd));
1262         } else {
1263                 RTE_LOG(WARNING, PMD,
1264                         "Firmware too old for VF mailbox functionality\n");
1265                 memset(bp->pf.vf_req_fwd, 0, sizeof(bp->pf.vf_req_fwd));
1266         }
1267
1268         /*
1269          * The following are used for driver cleanup.  If we disallow these,
1270          * VF drivers can't clean up cleanly.
1271          */
1272         ALLOW_FUNC(HWRM_FUNC_DRV_UNRGTR);
1273         ALLOW_FUNC(HWRM_VNIC_FREE);
1274         ALLOW_FUNC(HWRM_RING_FREE);
1275         ALLOW_FUNC(HWRM_RING_GRP_FREE);
1276         ALLOW_FUNC(HWRM_VNIC_RSS_COS_LB_CTX_FREE);
1277         ALLOW_FUNC(HWRM_CFA_L2_FILTER_FREE);
1278         ALLOW_FUNC(HWRM_STAT_CTX_FREE);
1279         rc = bnxt_hwrm_func_driver_register(bp);
1280         if (rc) {
1281                 RTE_LOG(ERR, PMD,
1282                         "Failed to register driver");
1283                 rc = -EBUSY;
1284                 goto error_free;
1285         }
1286
1287         RTE_LOG(INFO, PMD,
1288                 DRV_MODULE_NAME " found at mem %" PRIx64 ", node addr %pM\n",
1289                 pci_dev->mem_resource[0].phys_addr,
1290                 pci_dev->mem_resource[0].addr);
1291
1292         rc = bnxt_hwrm_func_reset(bp);
1293         if (rc) {
1294                 RTE_LOG(ERR, PMD, "hwrm chip reset failure rc: %x\n", rc);
1295                 rc = -1;
1296                 goto error_free;
1297         }
1298
1299         if (BNXT_PF(bp)) {
1300                 //if (bp->pf.active_vfs) {
1301                         // TODO: Deallocate VF resources?
1302                 //}
1303                 if (bp->pdev->max_vfs) {
1304                         rc = bnxt_hwrm_allocate_vfs(bp, bp->pdev->max_vfs);
1305                         if (rc) {
1306                                 RTE_LOG(ERR, PMD, "Failed to allocate VFs\n");
1307                                 goto error_free;
1308                         }
1309                 } else {
1310                         rc = bnxt_hwrm_allocate_pf_only(bp);
1311                         if (rc) {
1312                                 RTE_LOG(ERR, PMD,
1313                                         "Failed to allocate PF resources\n");
1314                                 goto error_free;
1315                         }
1316                 }
1317         }
1318
1319         rc = bnxt_setup_int(bp);
1320         if (rc)
1321                 goto error_free;
1322
1323         rc = bnxt_alloc_mem(bp);
1324         if (rc)
1325                 goto error_free_int;
1326
1327         rc = bnxt_request_int(bp);
1328         if (rc)
1329                 goto error_free_int;
1330
1331         rc = bnxt_alloc_def_cp_ring(bp);
1332         if (rc)
1333                 goto error_free_int;
1334
1335         bnxt_enable_int(bp);
1336
1337         return 0;
1338
1339 error_free_int:
1340         bnxt_disable_int(bp);
1341         bnxt_free_def_cp_ring(bp);
1342         bnxt_hwrm_func_buf_unrgtr(bp);
1343         bnxt_free_int(bp);
1344         bnxt_free_mem(bp);
1345 error_free:
1346         bnxt_dev_uninit(eth_dev);
1347 error:
1348         return rc;
1349 }
1350
1351 static int
1352 bnxt_dev_uninit(struct rte_eth_dev *eth_dev) {
1353         struct bnxt *bp = eth_dev->data->dev_private;
1354         int rc;
1355
1356         bnxt_disable_int(bp);
1357         bnxt_free_int(bp);
1358         bnxt_free_mem(bp);
1359         if (eth_dev->data->mac_addrs != NULL) {
1360                 rte_free(eth_dev->data->mac_addrs);
1361                 eth_dev->data->mac_addrs = NULL;
1362         }
1363         if (bp->grp_info != NULL) {
1364                 rte_free(bp->grp_info);
1365                 bp->grp_info = NULL;
1366         }
1367         rc = bnxt_hwrm_func_driver_unregister(bp, 0);
1368         bnxt_free_hwrm_resources(bp);
1369         if (bp->dev_stopped == 0)
1370                 bnxt_dev_close_op(eth_dev);
1371         if (bp->pf.vf_info)
1372                 rte_free(bp->pf.vf_info);
1373         eth_dev->dev_ops = NULL;
1374         eth_dev->rx_pkt_burst = NULL;
1375         eth_dev->tx_pkt_burst = NULL;
1376
1377         return rc;
1378 }
1379
1380 int bnxt_rcv_msg_from_vf(struct bnxt *bp, uint16_t vf_id, void *msg)
1381 {
1382         struct rte_pmd_bnxt_mb_event_param cb_param;
1383
1384         cb_param.retval = RTE_PMD_BNXT_MB_EVENT_PROCEED;
1385         cb_param.vf_id = vf_id;
1386         cb_param.msg = msg;
1387
1388         _rte_eth_dev_callback_process(bp->eth_dev, RTE_ETH_EVENT_VF_MBOX,
1389                         &cb_param);
1390
1391         /* Default to approve */
1392         if (cb_param.retval == RTE_PMD_BNXT_MB_EVENT_PROCEED)
1393                 cb_param.retval = RTE_PMD_BNXT_MB_EVENT_NOOP_ACK;
1394
1395         return cb_param.retval == RTE_PMD_BNXT_MB_EVENT_NOOP_ACK ? true : false;
1396 }
1397
1398 static int bnxt_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
1399         struct rte_pci_device *pci_dev)
1400 {
1401         return rte_eth_dev_pci_generic_probe(pci_dev, sizeof(struct bnxt),
1402                 bnxt_dev_init);
1403 }
1404
1405 static int bnxt_pci_remove(struct rte_pci_device *pci_dev)
1406 {
1407         return rte_eth_dev_pci_generic_remove(pci_dev, bnxt_dev_uninit);
1408 }
1409
1410 static struct rte_pci_driver bnxt_rte_pmd = {
1411         .id_table = bnxt_pci_id_map,
1412         .drv_flags = RTE_PCI_DRV_NEED_MAPPING |
1413                 RTE_PCI_DRV_INTR_LSC,
1414         .probe = bnxt_pci_probe,
1415         .remove = bnxt_pci_remove,
1416 };
1417
1418 RTE_PMD_REGISTER_PCI(net_bnxt, bnxt_rte_pmd);
1419 RTE_PMD_REGISTER_PCI_TABLE(net_bnxt, bnxt_pci_id_map);
1420 RTE_PMD_REGISTER_KMOD_DEP(net_bnxt, "* igb_uio | uio_pci_generic | vfio-pci");