drivers/net/bnxt/bnxt_ethdev.c

   1 /*-
   2  *   BSD LICENSE
   3  *
   4  *   Copyright(c) Broadcom Limited.
   5  *   All rights reserved.
   6  *
   7  *   Redistribution and use in source and binary forms, with or without
   8  *   modification, are permitted provided that the following conditions
   9  *   are met:
  10  *
  11  *     * Redistributions of source code must retain the above copyright
  12  *       notice, this list of conditions and the following disclaimer.
  13  *     * Redistributions in binary form must reproduce the above copyright
  14  *       notice, this list of conditions and the following disclaimer in
  15  *       the documentation and/or other materials provided with the
  16  *       distribution.
  17  *     * Neither the name of Broadcom Corporation nor the names of its
  18  *       contributors may be used to endorse or promote products derived
  19  *       from this software without specific prior written permission.
  20  *
  21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32  */
  33
  34 #include <inttypes.h>
  35 #include <stdbool.h>
  36
  37 #include <rte_dev.h>
  38 #include <rte_ethdev.h>
  39 #include <rte_malloc.h>
  40 #include <rte_cycles.h>
  41
  42 #include "bnxt.h"
  43 #include "bnxt_hwrm.h"
  44 #include "bnxt_rxq.h"
  45 #include "bnxt_stats.h"
  46 #include "bnxt_txq.h"
  47
  48 #define DRV_MODULE_NAME         "bnxt"
  49 static const char bnxt_version[] =
  50         "Broadcom Cumulus driver " DRV_MODULE_NAME "\n";
  51
  52 static struct rte_pci_id bnxt_pci_id_map[] = {
  53 #define RTE_PCI_DEV_ID_DECL_BNXT(vend, dev) {RTE_PCI_DEVICE(vend, dev)},
  54 #include "rte_pci_dev_ids.h"
  55         {.device_id = 0},
  56 };
  57
  58 static void bnxt_dev_close_op(struct rte_eth_dev *eth_dev)
  59 {
  60         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
  61
  62         rte_free(eth_dev->data->mac_addrs);
  63         bnxt_free_hwrm_resources(bp);
  64 }
  65
  66 /*
  67  * Device configuration and status function
  68  */
  69
  70 static void bnxt_dev_info_get_op(struct rte_eth_dev *eth_dev,
  71                                   struct rte_eth_dev_info *dev_info)
  72 {
  73         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
  74         uint16_t max_vnics, i, j, vpool, vrxq;
  75
  76         /* MAC Specifics */
  77         dev_info->max_mac_addrs = MAX_NUM_MAC_ADDR;
  78         dev_info->max_hash_mac_addrs = 0;
  79
  80         /* PF/VF specifics */
  81         if (BNXT_PF(bp)) {
  82                 dev_info->max_rx_queues = bp->pf.max_rx_rings;
  83                 dev_info->max_tx_queues = bp->pf.max_tx_rings;
  84                 dev_info->max_vfs = bp->pf.active_vfs;
  85                 dev_info->reta_size = bp->pf.max_rsscos_ctx;
  86                 max_vnics = bp->pf.max_vnics;
  87         } else {
  88                 dev_info->max_rx_queues = bp->vf.max_rx_rings;
  89                 dev_info->max_tx_queues = bp->vf.max_tx_rings;
  90                 dev_info->reta_size = bp->vf.max_rsscos_ctx;
  91                 max_vnics = bp->vf.max_vnics;
  92         }
  93
  94         /* Fast path specifics */
  95         dev_info->min_rx_bufsize = 1;
  96         dev_info->max_rx_pktlen = BNXT_MAX_MTU + ETHER_HDR_LEN + ETHER_CRC_LEN
  97                                   + VLAN_TAG_SIZE;
  98         dev_info->rx_offload_capa = 0;
  99         dev_info->tx_offload_capa = DEV_TX_OFFLOAD_IPV4_CKSUM |
 100                                         DEV_TX_OFFLOAD_TCP_CKSUM |
 101                                         DEV_TX_OFFLOAD_UDP_CKSUM |
 102                                         DEV_TX_OFFLOAD_TCP_TSO;
 103
 104         /* *INDENT-OFF* */
 105         dev_info->default_rxconf = (struct rte_eth_rxconf) {
 106                 .rx_thresh = {
 107                         .pthresh = 8,
 108                         .hthresh = 8,
 109                         .wthresh = 0,
 110                 },
 111                 .rx_free_thresh = 32,
 112                 .rx_drop_en = 0,
 113         };
 114
 115         dev_info->default_txconf = (struct rte_eth_txconf) {
 116                 .tx_thresh = {
 117                         .pthresh = 32,
 118                         .hthresh = 0,
 119                         .wthresh = 0,
 120                 },
 121                 .tx_free_thresh = 32,
 122                 .tx_rs_thresh = 32,
 123                 .txq_flags = ETH_TXQ_FLAGS_NOMULTSEGS |
 124                              ETH_TXQ_FLAGS_NOOFFLOADS,
 125         };
 126         /* *INDENT-ON* */
 127
 128         /*
 129          * TODO: default_rxconf, default_txconf, rx_desc_lim, and tx_desc_lim
 130          *       need further investigation.
 131          */
 132
 133         /* VMDq resources */
 134         vpool = 64; /* ETH_64_POOLS */
 135         vrxq = 128; /* ETH_VMDQ_DCB_NUM_QUEUES */
 136         for (i = 0; i < 4; vpool >>= 1, i++) {
 137                 if (max_vnics > vpool) {
 138                         for (j = 0; j < 5; vrxq >>= 1, j++) {
 139                                 if (dev_info->max_rx_queues > vrxq) {
 140                                         if (vpool > vrxq)
 141                                                 vpool = vrxq;
 142                                         goto found;
 143                                 }
 144                         }
 145                         /* Not enough resources to support VMDq */
 146                         break;
 147                 }
 148         }
 149         /* Not enough resources to support VMDq */
 150         vpool = 0;
 151         vrxq = 0;
 152 found:
 153         dev_info->max_vmdq_pools = vpool;
 154         dev_info->vmdq_queue_num = vrxq;
 155
 156         dev_info->vmdq_pool_base = 0;
 157         dev_info->vmdq_queue_base = 0;
 158 }
 159
 160 /* Configure the device based on the configuration provided */
 161 static int bnxt_dev_configure_op(struct rte_eth_dev *eth_dev)
 162 {
 163         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 164         int rc;
 165
 166         bp->rx_queues = (void *)eth_dev->data->rx_queues;
 167         bp->tx_queues = (void *)eth_dev->data->tx_queues;
 168
 169         /* Inherit new configurations */
 170         bp->rx_nr_rings = eth_dev->data->nb_rx_queues;
 171         bp->tx_nr_rings = eth_dev->data->nb_tx_queues;
 172         bp->rx_cp_nr_rings = bp->rx_nr_rings;
 173         bp->tx_cp_nr_rings = bp->tx_nr_rings;
 174
 175         if (eth_dev->data->dev_conf.rxmode.jumbo_frame)
 176                 eth_dev->data->mtu =
 177                                 eth_dev->data->dev_conf.rxmode.max_rx_pkt_len -
 178                                 ETHER_HDR_LEN - ETHER_CRC_LEN - VLAN_TAG_SIZE;
 179         rc = bnxt_set_hwrm_link_config(bp, true);
 180         return rc;
 181 }
 182
 183 /*
 184  * Initialization
 185  */
 186
 187 static struct eth_dev_ops bnxt_dev_ops = {
 188         .dev_infos_get = bnxt_dev_info_get_op,
 189         .dev_close = bnxt_dev_close_op,
 190         .dev_configure = bnxt_dev_configure_op,
 191         .stats_get = bnxt_stats_get_op,
 192         .stats_reset = bnxt_stats_reset_op,
 193         .rx_queue_setup = bnxt_rx_queue_setup_op,
 194         .rx_queue_release = bnxt_rx_queue_release_op,
 195         .tx_queue_setup = bnxt_tx_queue_setup_op,
 196         .tx_queue_release = bnxt_tx_queue_release_op,
 197 };
 198
 199 static bool bnxt_vf_pciid(uint16_t id)
 200 {
 201         if (id == BROADCOM_DEV_ID_57304_VF ||
 202             id == BROADCOM_DEV_ID_57406_VF)
 203                 return true;
 204         return false;
 205 }
 206
 207 static int bnxt_init_board(struct rte_eth_dev *eth_dev)
 208 {
 209         int rc;
 210         struct bnxt *bp = eth_dev->data->dev_private;
 211
 212         /* enable device (incl. PCI PM wakeup), and bus-mastering */
 213         if (!eth_dev->pci_dev->mem_resource[0].addr) {
 214                 RTE_LOG(ERR, PMD,
 215                         "Cannot find PCI device base address, aborting\n");
 216                 rc = -ENODEV;
 217                 goto init_err_disable;
 218         }
 219
 220         bp->eth_dev = eth_dev;
 221         bp->pdev = eth_dev->pci_dev;
 222
 223         bp->bar0 = (void *)eth_dev->pci_dev->mem_resource[0].addr;
 224         if (!bp->bar0) {
 225                 RTE_LOG(ERR, PMD, "Cannot map device registers, aborting\n");
 226                 rc = -ENOMEM;
 227                 goto init_err_release;
 228         }
 229         return 0;
 230
 231 init_err_release:
 232         if (bp->bar0)
 233                 bp->bar0 = NULL;
 234
 235 init_err_disable:
 236
 237         return rc;
 238 }
 239
 240 static int
 241 bnxt_dev_init(struct rte_eth_dev *eth_dev)
 242 {
 243         static int version_printed;
 244         struct bnxt *bp;
 245         int rc;
 246
 247         if (version_printed++ == 0)
 248                 RTE_LOG(INFO, PMD, "%s", bnxt_version);
 249
 250         if (eth_dev->pci_dev->addr.function >= 2 &&
 251                         eth_dev->pci_dev->addr.function < 4) {
 252                 RTE_LOG(ERR, PMD, "Function not enabled %x:\n",
 253                         eth_dev->pci_dev->addr.function);
 254                 rc = -ENOMEM;
 255                 goto error;
 256         }
 257
 258         rte_eth_copy_pci_info(eth_dev, eth_dev->pci_dev);
 259         bp = eth_dev->data->dev_private;
 260
 261         if (bnxt_vf_pciid(eth_dev->pci_dev->id.device_id))
 262                 bp->flags |= BNXT_FLAG_VF;
 263
 264         rc = bnxt_init_board(eth_dev);
 265         if (rc) {
 266                 RTE_LOG(ERR, PMD,
 267                         "Board initialization failed rc: %x\n", rc);
 268                 goto error;
 269         }
 270         eth_dev->dev_ops = &bnxt_dev_ops;
 271         /* eth_dev->rx_pkt_burst = &bnxt_recv_pkts; */
 272         /* eth_dev->tx_pkt_burst = &bnxt_xmit_pkts; */
 273
 274         rc = bnxt_alloc_hwrm_resources(bp);
 275         if (rc) {
 276                 RTE_LOG(ERR, PMD,
 277                         "hwrm resource allocation failure rc: %x\n", rc);
 278                 goto error_free;
 279         }
 280         rc = bnxt_hwrm_ver_get(bp);
 281         if (rc)
 282                 goto error_free;
 283         bnxt_hwrm_queue_qportcfg(bp);
 284
 285         /* Get the MAX capabilities for this function */
 286         rc = bnxt_hwrm_func_qcaps(bp);
 287         if (rc) {
 288                 RTE_LOG(ERR, PMD, "hwrm query capability failure rc: %x\n", rc);
 289                 goto error_free;
 290         }
 291         eth_dev->data->mac_addrs = rte_zmalloc("bnxt_mac_addr_tbl",
 292                                         ETHER_ADDR_LEN * MAX_NUM_MAC_ADDR, 0);
 293         if (eth_dev->data->mac_addrs == NULL) {
 294                 RTE_LOG(ERR, PMD,
 295                         "Failed to alloc %u bytes needed to store MAC addr tbl",
 296                         ETHER_ADDR_LEN * MAX_NUM_MAC_ADDR);
 297                 rc = -ENOMEM;
 298                 goto error_free;
 299         }
 300         /* Copy the permanent MAC from the qcap response address now. */
 301         if (BNXT_PF(bp))
 302                 memcpy(bp->mac_addr, bp->pf.mac_addr, sizeof(bp->mac_addr));
 303         else
 304                 memcpy(bp->mac_addr, bp->vf.mac_addr, sizeof(bp->mac_addr));
 305         memcpy(&eth_dev->data->mac_addrs[0], bp->mac_addr, ETHER_ADDR_LEN);
 306
 307         rc = bnxt_hwrm_func_driver_register(bp, 0,
 308                                             bp->pf.vf_req_fwd);
 309         if (rc) {
 310                 RTE_LOG(ERR, PMD,
 311                         "Failed to register driver");
 312                 rc = -EBUSY;
 313                 goto error_free;
 314         }
 315
 316         RTE_LOG(INFO, PMD,
 317                 DRV_MODULE_NAME " found at mem %" PRIx64 ", node addr %pM\n",
 318                 eth_dev->pci_dev->mem_resource[0].phys_addr,
 319                 eth_dev->pci_dev->mem_resource[0].addr);
 320
 321         return 0;
 322
 323 error_free:
 324         eth_dev->driver->eth_dev_uninit(eth_dev);
 325 error:
 326         return rc;
 327 }
 328
 329 static int
 330 bnxt_dev_uninit(struct rte_eth_dev *eth_dev) {
 331         struct bnxt *bp = eth_dev->data->dev_private;
 332         int rc;
 333
 334         if (eth_dev->data->mac_addrs)
 335                 rte_free(eth_dev->data->mac_addrs);
 336         rc = bnxt_hwrm_func_driver_unregister(bp, 0);
 337         bnxt_free_hwrm_resources(bp);
 338         return rc;
 339 }
 340
 341 static struct eth_driver bnxt_rte_pmd = {
 342         .pci_drv = {
 343                     .name = "rte_" DRV_MODULE_NAME "_pmd",
 344                     .id_table = bnxt_pci_id_map,
 345                     .drv_flags = RTE_PCI_DRV_NEED_MAPPING,
 346                     },
 347         .eth_dev_init = bnxt_dev_init,
 348         .eth_dev_uninit = bnxt_dev_uninit,
 349         .dev_private_size = sizeof(struct bnxt),
 350 };
 351
 352 static int bnxt_rte_pmd_init(const char *name, const char *params __rte_unused)
 353 {
 354         RTE_LOG(INFO, PMD, "bnxt_rte_pmd_init() called for %s\n", name);
 355         rte_eth_driver_register(&bnxt_rte_pmd);
 356         return 0;
 357 }
 358
 359 static struct rte_driver bnxt_pmd_drv = {
 360         .name = "eth_bnxt",
 361         .type = PMD_PDEV,
 362         .init = bnxt_rte_pmd_init,
 363 };
 364
 365 PMD_REGISTER_DRIVER(bnxt_pmd_drv);