drivers/net/bnxt/bnxt_ethdev.c

   1 /*-
   2  *   BSD LICENSE
   3  *
   4  *   Copyright(c) Broadcom Limited.
   5  *   All rights reserved.
   6  *
   7  *   Redistribution and use in source and binary forms, with or without
   8  *   modification, are permitted provided that the following conditions
   9  *   are met:
  10  *
  11  *     * Redistributions of source code must retain the above copyright
  12  *       notice, this list of conditions and the following disclaimer.
  13  *     * Redistributions in binary form must reproduce the above copyright
  14  *       notice, this list of conditions and the following disclaimer in
  15  *       the documentation and/or other materials provided with the
  16  *       distribution.
  17  *     * Neither the name of Broadcom Corporation nor the names of its
  18  *       contributors may be used to endorse or promote products derived
  19  *       from this software without specific prior written permission.
  20  *
  21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32  */
  33
  34 #include <inttypes.h>
  35 #include <stdbool.h>
  36
  37 #include <rte_dev.h>
  38 #include <rte_ethdev.h>
  39 #include <rte_malloc.h>
  40 #include <rte_cycles.h>
  41
  42 #include "bnxt.h"
  43 #include "bnxt_cpr.h"
  44 #include "bnxt_filter.h"
  45 #include "bnxt_hwrm.h"
  46 #include "bnxt_irq.h"
  47 #include "bnxt_ring.h"
  48 #include "bnxt_rxq.h"
  49 #include "bnxt_rxr.h"
  50 #include "bnxt_stats.h"
  51 #include "bnxt_txq.h"
  52 #include "bnxt_txr.h"
  53 #include "bnxt_vnic.h"
  54 #include "hsi_struct_def_dpdk.h"
  55
  56 #define DRV_MODULE_NAME         "bnxt"
  57 static const char bnxt_version[] =
  58         "Broadcom Cumulus driver " DRV_MODULE_NAME "\n";
  59
  60 #define PCI_VENDOR_ID_BROADCOM 0x14E4
  61
  62 #define BROADCOM_DEV_ID_57301 0x16c8
  63 #define BROADCOM_DEV_ID_57302 0x16c9
  64 #define BROADCOM_DEV_ID_57304_PF 0x16ca
  65 #define BROADCOM_DEV_ID_57304_VF 0x16cb
  66 #define BROADCOM_DEV_ID_NS2 0x16cd
  67 #define BROADCOM_DEV_ID_57402 0x16d0
  68 #define BROADCOM_DEV_ID_57404 0x16d1
  69 #define BROADCOM_DEV_ID_57406_PF 0x16d2
  70 #define BROADCOM_DEV_ID_57406_VF 0x16d3
  71 #define BROADCOM_DEV_ID_57402_MF 0x16d4
  72 #define BROADCOM_DEV_ID_57407_RJ45 0x16d5
  73 #define BROADCOM_DEV_ID_5741X_VF 0x16dc
  74 #define BROADCOM_DEV_ID_5731X_VF 0x16e1
  75 #define BROADCOM_DEV_ID_57404_MF 0x16e7
  76 #define BROADCOM_DEV_ID_57406_MF 0x16e8
  77 #define BROADCOM_DEV_ID_57407_SFP 0x16e9
  78 #define BROADCOM_DEV_ID_57407_MF 0x16ea
  79
  80 static struct rte_pci_id bnxt_pci_id_map[] = {
  81         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57301) },
  82         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57302) },
  83         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57304_PF) },
  84         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57304_VF) },
  85         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_NS2) },
  86         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57402) },
  87         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57404) },
  88         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57406_PF) },
  89         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57406_VF) },
  90         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57402_MF) },
  91         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57407_RJ45) },
  92         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57404_MF) },
  93         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57406_MF) },
  94         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57407_SFP) },
  95         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57407_MF) },
  96         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_5741X_VF) },
  97         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_5731X_VF) },
  98         { .vendor_id = 0, /* sentinel */ },
  99 };
 100
 101 #define BNXT_ETH_RSS_SUPPORT (  \
 102         ETH_RSS_IPV4 |          \
 103         ETH_RSS_NONFRAG_IPV4_TCP |      \
 104         ETH_RSS_NONFRAG_IPV4_UDP |      \
 105         ETH_RSS_IPV6 |          \
 106         ETH_RSS_NONFRAG_IPV6_TCP |      \
 107         ETH_RSS_NONFRAG_IPV6_UDP)
 108
 109 /***********************/
 110
 111 /*
 112  * High level utility functions
 113  */
 114
 115 static void bnxt_free_mem(struct bnxt *bp)
 116 {
 117         bnxt_free_filter_mem(bp);
 118         bnxt_free_vnic_attributes(bp);
 119         bnxt_free_vnic_mem(bp);
 120
 121         bnxt_free_stats(bp);
 122         bnxt_free_tx_rings(bp);
 123         bnxt_free_rx_rings(bp);
 124         bnxt_free_def_cp_ring(bp);
 125 }
 126
 127 static int bnxt_alloc_mem(struct bnxt *bp)
 128 {
 129         int rc;
 130
 131         /* Default completion ring */
 132         rc = bnxt_init_def_ring_struct(bp, SOCKET_ID_ANY);
 133         if (rc)
 134                 goto alloc_mem_err;
 135
 136         rc = bnxt_alloc_rings(bp, 0, NULL, NULL,
 137                               bp->def_cp_ring, "def_cp");
 138         if (rc)
 139                 goto alloc_mem_err;
 140
 141         rc = bnxt_alloc_vnic_mem(bp);
 142         if (rc)
 143                 goto alloc_mem_err;
 144
 145         rc = bnxt_alloc_vnic_attributes(bp);
 146         if (rc)
 147                 goto alloc_mem_err;
 148
 149         rc = bnxt_alloc_filter_mem(bp);
 150         if (rc)
 151                 goto alloc_mem_err;
 152
 153         return 0;
 154
 155 alloc_mem_err:
 156         bnxt_free_mem(bp);
 157         return rc;
 158 }
 159
 160 static int bnxt_init_chip(struct bnxt *bp)
 161 {
 162         unsigned int i, rss_idx, fw_idx;
 163         struct rte_eth_link new;
 164         int rc;
 165
 166         rc = bnxt_alloc_all_hwrm_stat_ctxs(bp);
 167         if (rc) {
 168                 RTE_LOG(ERR, PMD, "HWRM stat ctx alloc failure rc: %x\n", rc);
 169                 goto err_out;
 170         }
 171
 172         rc = bnxt_alloc_hwrm_rings(bp);
 173         if (rc) {
 174                 RTE_LOG(ERR, PMD, "HWRM ring alloc failure rc: %x\n", rc);
 175                 goto err_out;
 176         }
 177
 178         rc = bnxt_alloc_all_hwrm_ring_grps(bp);
 179         if (rc) {
 180                 RTE_LOG(ERR, PMD, "HWRM ring grp alloc failure: %x\n", rc);
 181                 goto err_out;
 182         }
 183
 184         rc = bnxt_mq_rx_configure(bp);
 185         if (rc) {
 186                 RTE_LOG(ERR, PMD, "MQ mode configure failure rc: %x\n", rc);
 187                 goto err_out;
 188         }
 189
 190         /* VNIC configuration */
 191         for (i = 0; i < bp->nr_vnics; i++) {
 192                 struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
 193
 194                 rc = bnxt_hwrm_vnic_alloc(bp, vnic);
 195                 if (rc) {
 196                         RTE_LOG(ERR, PMD, "HWRM vnic alloc failure rc: %x\n",
 197                                 rc);
 198                         goto err_out;
 199                 }
 200
 201                 rc = bnxt_hwrm_vnic_ctx_alloc(bp, vnic);
 202                 if (rc) {
 203                         RTE_LOG(ERR, PMD,
 204                                 "HWRM vnic ctx alloc failure rc: %x\n", rc);
 205                         goto err_out;
 206                 }
 207
 208                 rc = bnxt_hwrm_vnic_cfg(bp, vnic);
 209                 if (rc) {
 210                         RTE_LOG(ERR, PMD, "HWRM vnic cfg failure rc: %x\n", rc);
 211                         goto err_out;
 212                 }
 213
 214                 rc = bnxt_set_hwrm_vnic_filters(bp, vnic);
 215                 if (rc) {
 216                         RTE_LOG(ERR, PMD, "HWRM vnic filter failure rc: %x\n",
 217                                 rc);
 218                         goto err_out;
 219                 }
 220                 if (vnic->rss_table && vnic->hash_type) {
 221                         /*
 222                          * Fill the RSS hash & redirection table with
 223                          * ring group ids for all VNICs
 224                          */
 225                         for (rss_idx = 0, fw_idx = 0;
 226                              rss_idx < HW_HASH_INDEX_SIZE;
 227                              rss_idx++, fw_idx++) {
 228                                 if (vnic->fw_grp_ids[fw_idx] ==
 229                                     INVALID_HW_RING_ID)
 230                                         fw_idx = 0;
 231                                 vnic->rss_table[rss_idx] =
 232                                                 vnic->fw_grp_ids[fw_idx];
 233                         }
 234                         rc = bnxt_hwrm_vnic_rss_cfg(bp, vnic);
 235                         if (rc) {
 236                                 RTE_LOG(ERR, PMD,
 237                                         "HWRM vnic set RSS failure rc: %x\n",
 238                                         rc);
 239                                 goto err_out;
 240                         }
 241                 }
 242         }
 243         rc = bnxt_hwrm_cfa_l2_set_rx_mask(bp, &bp->vnic_info[0]);
 244         if (rc) {
 245                 RTE_LOG(ERR, PMD,
 246                         "HWRM cfa l2 rx mask failure rc: %x\n", rc);
 247                 goto err_out;
 248         }
 249
 250         rc = bnxt_get_hwrm_link_config(bp, &new);
 251         if (rc) {
 252                 RTE_LOG(ERR, PMD, "HWRM Get link config failure rc: %x\n", rc);
 253                 goto err_out;
 254         }
 255
 256         if (!bp->link_info.link_up) {
 257                 rc = bnxt_set_hwrm_link_config(bp, true);
 258                 if (rc) {
 259                         RTE_LOG(ERR, PMD,
 260                                 "HWRM link config failure rc: %x\n", rc);
 261                         goto err_out;
 262                 }
 263         }
 264
 265         return 0;
 266
 267 err_out:
 268         bnxt_free_all_hwrm_resources(bp);
 269
 270         return rc;
 271 }
 272
 273 static int bnxt_shutdown_nic(struct bnxt *bp)
 274 {
 275         bnxt_free_all_hwrm_resources(bp);
 276         bnxt_free_all_filters(bp);
 277         bnxt_free_all_vnics(bp);
 278         return 0;
 279 }
 280
 281 static int bnxt_init_nic(struct bnxt *bp)
 282 {
 283         int rc;
 284
 285         bnxt_init_ring_grps(bp);
 286         bnxt_init_vnics(bp);
 287         bnxt_init_filters(bp);
 288
 289         rc = bnxt_init_chip(bp);
 290         if (rc)
 291                 return rc;
 292
 293         return 0;
 294 }
 295
 296 /*
 297  * Device configuration and status function
 298  */
 299
 300 static void bnxt_dev_info_get_op(struct rte_eth_dev *eth_dev,
 301                                   struct rte_eth_dev_info *dev_info)
 302 {
 303         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 304         uint16_t max_vnics, i, j, vpool, vrxq;
 305
 306         dev_info->pci_dev = eth_dev->pci_dev;
 307
 308         /* MAC Specifics */
 309         dev_info->max_mac_addrs = MAX_NUM_MAC_ADDR;
 310         dev_info->max_hash_mac_addrs = 0;
 311
 312         /* PF/VF specifics */
 313         if (BNXT_PF(bp)) {
 314                 dev_info->max_rx_queues = bp->pf.max_rx_rings;
 315                 dev_info->max_tx_queues = bp->pf.max_tx_rings;
 316                 dev_info->max_vfs = bp->pf.active_vfs;
 317                 dev_info->reta_size = bp->pf.max_rsscos_ctx;
 318                 max_vnics = bp->pf.max_vnics;
 319         } else {
 320                 dev_info->max_rx_queues = bp->vf.max_rx_rings;
 321                 dev_info->max_tx_queues = bp->vf.max_tx_rings;
 322                 dev_info->reta_size = bp->vf.max_rsscos_ctx;
 323                 max_vnics = bp->vf.max_vnics;
 324         }
 325
 326         /* Fast path specifics */
 327         dev_info->min_rx_bufsize = 1;
 328         dev_info->max_rx_pktlen = BNXT_MAX_MTU + ETHER_HDR_LEN + ETHER_CRC_LEN
 329                                   + VLAN_TAG_SIZE;
 330         dev_info->rx_offload_capa = 0;
 331         dev_info->tx_offload_capa = DEV_TX_OFFLOAD_IPV4_CKSUM |
 332                                         DEV_TX_OFFLOAD_TCP_CKSUM |
 333                                         DEV_TX_OFFLOAD_UDP_CKSUM |
 334                                         DEV_TX_OFFLOAD_TCP_TSO;
 335
 336         /* *INDENT-OFF* */
 337         dev_info->default_rxconf = (struct rte_eth_rxconf) {
 338                 .rx_thresh = {
 339                         .pthresh = 8,
 340                         .hthresh = 8,
 341                         .wthresh = 0,
 342                 },
 343                 .rx_free_thresh = 32,
 344                 .rx_drop_en = 0,
 345         };
 346
 347         dev_info->default_txconf = (struct rte_eth_txconf) {
 348                 .tx_thresh = {
 349                         .pthresh = 32,
 350                         .hthresh = 0,
 351                         .wthresh = 0,
 352                 },
 353                 .tx_free_thresh = 32,
 354                 .tx_rs_thresh = 32,
 355                 .txq_flags = ETH_TXQ_FLAGS_NOMULTSEGS |
 356                              ETH_TXQ_FLAGS_NOOFFLOADS,
 357         };
 358         eth_dev->data->dev_conf.intr_conf.lsc = 1;
 359
 360         /* *INDENT-ON* */
 361
 362         /*
 363          * TODO: default_rxconf, default_txconf, rx_desc_lim, and tx_desc_lim
 364          *       need further investigation.
 365          */
 366
 367         /* VMDq resources */
 368         vpool = 64; /* ETH_64_POOLS */
 369         vrxq = 128; /* ETH_VMDQ_DCB_NUM_QUEUES */
 370         for (i = 0; i < 4; vpool >>= 1, i++) {
 371                 if (max_vnics > vpool) {
 372                         for (j = 0; j < 5; vrxq >>= 1, j++) {
 373                                 if (dev_info->max_rx_queues > vrxq) {
 374                                         if (vpool > vrxq)
 375                                                 vpool = vrxq;
 376                                         goto found;
 377                                 }
 378                         }
 379                         /* Not enough resources to support VMDq */
 380                         break;
 381                 }
 382         }
 383         /* Not enough resources to support VMDq */
 384         vpool = 0;
 385         vrxq = 0;
 386 found:
 387         dev_info->max_vmdq_pools = vpool;
 388         dev_info->vmdq_queue_num = vrxq;
 389
 390         dev_info->vmdq_pool_base = 0;
 391         dev_info->vmdq_queue_base = 0;
 392 }
 393
 394 /* Configure the device based on the configuration provided */
 395 static int bnxt_dev_configure_op(struct rte_eth_dev *eth_dev)
 396 {
 397         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 398
 399         bp->rx_queues = (void *)eth_dev->data->rx_queues;
 400         bp->tx_queues = (void *)eth_dev->data->tx_queues;
 401
 402         /* Inherit new configurations */
 403         bp->rx_nr_rings = eth_dev->data->nb_rx_queues;
 404         bp->tx_nr_rings = eth_dev->data->nb_tx_queues;
 405         bp->rx_cp_nr_rings = bp->rx_nr_rings;
 406         bp->tx_cp_nr_rings = bp->tx_nr_rings;
 407
 408         if (eth_dev->data->dev_conf.rxmode.jumbo_frame)
 409                 eth_dev->data->mtu =
 410                                 eth_dev->data->dev_conf.rxmode.max_rx_pkt_len -
 411                                 ETHER_HDR_LEN - ETHER_CRC_LEN - VLAN_TAG_SIZE;
 412         return 0;
 413 }
 414
 415 static inline int
 416 rte_bnxt_atomic_write_link_status(struct rte_eth_dev *eth_dev,
 417                                 struct rte_eth_link *link)
 418 {
 419         struct rte_eth_link *dst = &eth_dev->data->dev_link;
 420         struct rte_eth_link *src = link;
 421
 422         if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
 423                                         *(uint64_t *)src) == 0)
 424                 return 1;
 425
 426         return 0;
 427 }
 428
 429 static void bnxt_print_link_info(struct rte_eth_dev *eth_dev)
 430 {
 431         struct rte_eth_link *link = &eth_dev->data->dev_link;
 432
 433         if (link->link_status)
 434                 RTE_LOG(INFO, PMD, "Port %d Link Up - speed %u Mbps - %s\n",
 435                         (uint8_t)(eth_dev->data->port_id),
 436                         (uint32_t)link->link_speed,
 437                         (link->link_duplex == ETH_LINK_FULL_DUPLEX) ?
 438                         ("full-duplex") : ("half-duplex\n"));
 439         else
 440                 RTE_LOG(INFO, PMD, "Port %d Link Down\n",
 441                         (uint8_t)(eth_dev->data->port_id));
 442 }
 443
 444 static int bnxt_dev_lsc_intr_setup(struct rte_eth_dev *eth_dev)
 445 {
 446         bnxt_print_link_info(eth_dev);
 447         return 0;
 448 }
 449
 450 static int bnxt_dev_start_op(struct rte_eth_dev *eth_dev)
 451 {
 452         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 453         int rc;
 454
 455         bp->dev_stopped = 0;
 456         rc = bnxt_hwrm_func_reset(bp);
 457         if (rc) {
 458                 RTE_LOG(ERR, PMD, "hwrm chip reset failure rc: %x\n", rc);
 459                 rc = -1;
 460                 goto error;
 461         }
 462
 463         rc = bnxt_setup_int(bp);
 464         if (rc)
 465                 goto error;
 466
 467         rc = bnxt_alloc_mem(bp);
 468         if (rc)
 469                 goto error;
 470
 471         rc = bnxt_request_int(bp);
 472         if (rc)
 473                 goto error;
 474
 475         rc = bnxt_init_nic(bp);
 476         if (rc)
 477                 goto error;
 478
 479         bnxt_enable_int(bp);
 480
 481         bnxt_link_update_op(eth_dev, 0);
 482         return 0;
 483
 484 error:
 485         bnxt_shutdown_nic(bp);
 486         bnxt_disable_int(bp);
 487         bnxt_free_int(bp);
 488         bnxt_free_tx_mbufs(bp);
 489         bnxt_free_rx_mbufs(bp);
 490         bnxt_free_mem(bp);
 491         return rc;
 492 }
 493
 494 static int bnxt_dev_set_link_up_op(struct rte_eth_dev *eth_dev)
 495 {
 496         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 497
 498         eth_dev->data->dev_link.link_status = 1;
 499         bnxt_set_hwrm_link_config(bp, true);
 500         return 0;
 501 }
 502
 503 static int bnxt_dev_set_link_down_op(struct rte_eth_dev *eth_dev)
 504 {
 505         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 506
 507         eth_dev->data->dev_link.link_status = 0;
 508         bnxt_set_hwrm_link_config(bp, false);
 509         return 0;
 510 }
 511
 512 /* Unload the driver, release resources */
 513 static void bnxt_dev_stop_op(struct rte_eth_dev *eth_dev)
 514 {
 515         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 516
 517         if (bp->eth_dev->data->dev_started) {
 518                 /* TBD: STOP HW queues DMA */
 519                 eth_dev->data->dev_link.link_status = 0;
 520         }
 521         bnxt_set_hwrm_link_config(bp, false);
 522         bnxt_disable_int(bp);
 523         bnxt_free_int(bp);
 524         bnxt_shutdown_nic(bp);
 525         bp->dev_stopped = 1;
 526 }
 527
 528 static void bnxt_dev_close_op(struct rte_eth_dev *eth_dev)
 529 {
 530         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 531
 532         if (bp->dev_stopped == 0)
 533                 bnxt_dev_stop_op(eth_dev);
 534
 535         bnxt_free_tx_mbufs(bp);
 536         bnxt_free_rx_mbufs(bp);
 537         bnxt_free_mem(bp);
 538         if (eth_dev->data->mac_addrs != NULL) {
 539                 rte_free(eth_dev->data->mac_addrs);
 540                 eth_dev->data->mac_addrs = NULL;
 541         }
 542         if (bp->grp_info != NULL) {
 543                 rte_free(bp->grp_info);
 544                 bp->grp_info = NULL;
 545         }
 546 }
 547
 548 static void bnxt_mac_addr_remove_op(struct rte_eth_dev *eth_dev,
 549                                     uint32_t index)
 550 {
 551         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 552         uint64_t pool_mask = eth_dev->data->mac_pool_sel[index];
 553         struct bnxt_vnic_info *vnic;
 554         struct bnxt_filter_info *filter, *temp_filter;
 555         int i;
 556
 557         /*
 558          * Loop through all VNICs from the specified filter flow pools to
 559          * remove the corresponding MAC addr filter
 560          */
 561         for (i = 0; i < MAX_FF_POOLS; i++) {
 562                 if (!(pool_mask & (1ULL << i)))
 563                         continue;
 564
 565                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
 566                         filter = STAILQ_FIRST(&vnic->filter);
 567                         while (filter) {
 568                                 temp_filter = STAILQ_NEXT(filter, next);
 569                                 if (filter->mac_index == index) {
 570                                         STAILQ_REMOVE(&vnic->filter, filter,
 571                                                       bnxt_filter_info, next);
 572                                         bnxt_hwrm_clear_filter(bp, filter);
 573                                         filter->mac_index = INVALID_MAC_INDEX;
 574                                         memset(&filter->l2_addr, 0,
 575                                                ETHER_ADDR_LEN);
 576                                         STAILQ_INSERT_TAIL(
 577                                                         &bp->free_filter_list,
 578                                                         filter, next);
 579                                 }
 580                                 filter = temp_filter;
 581                         }
 582                 }
 583         }
 584 }
 585
 586 static void bnxt_mac_addr_add_op(struct rte_eth_dev *eth_dev,
 587                                  struct ether_addr *mac_addr,
 588                                  uint32_t index, uint32_t pool)
 589 {
 590         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 591         struct bnxt_vnic_info *vnic = STAILQ_FIRST(&bp->ff_pool[pool]);
 592         struct bnxt_filter_info *filter;
 593
 594         if (BNXT_VF(bp)) {
 595                 RTE_LOG(ERR, PMD, "Cannot add MAC address to a VF interface\n");
 596                 return;
 597         }
 598
 599         if (!vnic) {
 600                 RTE_LOG(ERR, PMD, "VNIC not found for pool %d!\n", pool);
 601                 return;
 602         }
 603         /* Attach requested MAC address to the new l2_filter */
 604         STAILQ_FOREACH(filter, &vnic->filter, next) {
 605                 if (filter->mac_index == index) {
 606                         RTE_LOG(ERR, PMD,
 607                                 "MAC addr already existed for pool %d\n", pool);
 608                         return;
 609                 }
 610         }
 611         filter = bnxt_alloc_filter(bp);
 612         if (!filter) {
 613                 RTE_LOG(ERR, PMD, "L2 filter alloc failed\n");
 614                 return;
 615         }
 616         STAILQ_INSERT_TAIL(&vnic->filter, filter, next);
 617         filter->mac_index = index;
 618         memcpy(filter->l2_addr, mac_addr, ETHER_ADDR_LEN);
 619         bnxt_hwrm_set_filter(bp, vnic, filter);
 620 }
 621
 622 int bnxt_link_update_op(struct rte_eth_dev *eth_dev, int wait_to_complete)
 623 {
 624         int rc = 0;
 625         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 626         struct rte_eth_link new;
 627         unsigned int cnt = BNXT_LINK_WAIT_CNT;
 628
 629         memset(&new, 0, sizeof(new));
 630         do {
 631                 /* Retrieve link info from hardware */
 632                 rc = bnxt_get_hwrm_link_config(bp, &new);
 633                 if (rc) {
 634                         new.link_speed = ETH_LINK_SPEED_100M;
 635                         new.link_duplex = ETH_LINK_FULL_DUPLEX;
 636                         RTE_LOG(ERR, PMD,
 637                                 "Failed to retrieve link rc = 0x%x!", rc);
 638                         goto out;
 639                 }
 640                 rte_delay_ms(BNXT_LINK_WAIT_INTERVAL);
 641
 642                 if (!wait_to_complete)
 643                         break;
 644         } while (!new.link_status && cnt--);
 645
 646 out:
 647         /* Timed out or success */
 648         if (new.link_status != eth_dev->data->dev_link.link_status ||
 649         new.link_speed != eth_dev->data->dev_link.link_speed) {
 650                 rte_bnxt_atomic_write_link_status(eth_dev, &new);
 651                 bnxt_print_link_info(eth_dev);
 652         }
 653
 654         return rc;
 655 }
 656
 657 static void bnxt_promiscuous_enable_op(struct rte_eth_dev *eth_dev)
 658 {
 659         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 660         struct bnxt_vnic_info *vnic;
 661
 662         if (bp->vnic_info == NULL)
 663                 return;
 664
 665         vnic = &bp->vnic_info[0];
 666
 667         vnic->flags |= BNXT_VNIC_INFO_PROMISC;
 668         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic);
 669 }
 670
 671 static void bnxt_promiscuous_disable_op(struct rte_eth_dev *eth_dev)
 672 {
 673         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 674         struct bnxt_vnic_info *vnic;
 675
 676         if (bp->vnic_info == NULL)
 677                 return;
 678
 679         vnic = &bp->vnic_info[0];
 680
 681         vnic->flags &= ~BNXT_VNIC_INFO_PROMISC;
 682         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic);
 683 }
 684
 685 static void bnxt_allmulticast_enable_op(struct rte_eth_dev *eth_dev)
 686 {
 687         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 688         struct bnxt_vnic_info *vnic;
 689
 690         if (bp->vnic_info == NULL)
 691                 return;
 692
 693         vnic = &bp->vnic_info[0];
 694
 695         vnic->flags |= BNXT_VNIC_INFO_ALLMULTI;
 696         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic);
 697 }
 698
 699 static void bnxt_allmulticast_disable_op(struct rte_eth_dev *eth_dev)
 700 {
 701         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 702         struct bnxt_vnic_info *vnic;
 703
 704         if (bp->vnic_info == NULL)
 705                 return;
 706
 707         vnic = &bp->vnic_info[0];
 708
 709         vnic->flags &= ~BNXT_VNIC_INFO_ALLMULTI;
 710         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic);
 711 }
 712
 713 static int bnxt_reta_update_op(struct rte_eth_dev *eth_dev,
 714                             struct rte_eth_rss_reta_entry64 *reta_conf,
 715                             uint16_t reta_size)
 716 {
 717         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 718         struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
 719         struct bnxt_vnic_info *vnic;
 720         int i;
 721
 722         if (!(dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG))
 723                 return -EINVAL;
 724
 725         if (reta_size != HW_HASH_INDEX_SIZE) {
 726                 RTE_LOG(ERR, PMD, "The configured hash table lookup size "
 727                         "(%d) must equal the size supported by the hardware "
 728                         "(%d)\n", reta_size, HW_HASH_INDEX_SIZE);
 729                 return -EINVAL;
 730         }
 731         /* Update the RSS VNIC(s) */
 732         for (i = 0; i < MAX_FF_POOLS; i++) {
 733                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
 734                         memcpy(vnic->rss_table, reta_conf, reta_size);
 735
 736                         bnxt_hwrm_vnic_rss_cfg(bp, vnic);
 737                 }
 738         }
 739         return 0;
 740 }
 741
 742 static int bnxt_reta_query_op(struct rte_eth_dev *eth_dev,
 743                               struct rte_eth_rss_reta_entry64 *reta_conf,
 744                               uint16_t reta_size)
 745 {
 746         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 747         struct bnxt_vnic_info *vnic = &bp->vnic_info[0];
 748         struct rte_intr_handle *intr_handle
 749                 = &bp->pdev->intr_handle;
 750
 751         /* Retrieve from the default VNIC */
 752         if (!vnic)
 753                 return -EINVAL;
 754         if (!vnic->rss_table)
 755                 return -EINVAL;
 756
 757         if (reta_size != HW_HASH_INDEX_SIZE) {
 758                 RTE_LOG(ERR, PMD, "The configured hash table lookup size "
 759                         "(%d) must equal the size supported by the hardware "
 760                         "(%d)\n", reta_size, HW_HASH_INDEX_SIZE);
 761                 return -EINVAL;
 762         }
 763         /* EW - need to revisit here copying from u64 to u16 */
 764         memcpy(reta_conf, vnic->rss_table, reta_size);
 765
 766         if (rte_intr_allow_others(intr_handle)) {
 767                 if (eth_dev->data->dev_conf.intr_conf.lsc != 0)
 768                         bnxt_dev_lsc_intr_setup(eth_dev);
 769         }
 770
 771         return 0;
 772 }
 773
 774 static int bnxt_rss_hash_update_op(struct rte_eth_dev *eth_dev,
 775                                    struct rte_eth_rss_conf *rss_conf)
 776 {
 777         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 778         struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
 779         struct bnxt_vnic_info *vnic;
 780         uint16_t hash_type = 0;
 781         int i;
 782
 783         /*
 784          * If RSS enablement were different than dev_configure,
 785          * then return -EINVAL
 786          */
 787         if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) {
 788                 if (!rss_conf->rss_hf)
 789                         return -EINVAL;
 790         } else {
 791                 if (rss_conf->rss_hf & BNXT_ETH_RSS_SUPPORT)
 792                         return -EINVAL;
 793         }
 794         if (rss_conf->rss_hf & ETH_RSS_IPV4)
 795                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4;
 796         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV4_TCP)
 797                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4;
 798         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV4_UDP)
 799                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4;
 800         if (rss_conf->rss_hf & ETH_RSS_IPV6)
 801                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6;
 802         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV6_TCP)
 803                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6;
 804         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV6_UDP)
 805                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6;
 806
 807         /* Update the RSS VNIC(s) */
 808         for (i = 0; i < MAX_FF_POOLS; i++) {
 809                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
 810                         vnic->hash_type = hash_type;
 811
 812                         /*
 813                          * Use the supplied key if the key length is
 814                          * acceptable and the rss_key is not NULL
 815                          */
 816                         if (rss_conf->rss_key &&
 817                             rss_conf->rss_key_len <= HW_HASH_KEY_SIZE)
 818                                 memcpy(vnic->rss_hash_key, rss_conf->rss_key,
 819                                        rss_conf->rss_key_len);
 820
 821                         bnxt_hwrm_vnic_rss_cfg(bp, vnic);
 822                 }
 823         }
 824         return 0;
 825 }
 826
 827 static int bnxt_rss_hash_conf_get_op(struct rte_eth_dev *eth_dev,
 828                                      struct rte_eth_rss_conf *rss_conf)
 829 {
 830         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 831         struct bnxt_vnic_info *vnic = &bp->vnic_info[0];
 832         int len;
 833         uint32_t hash_types;
 834
 835         /* RSS configuration is the same for all VNICs */
 836         if (vnic && vnic->rss_hash_key) {
 837                 if (rss_conf->rss_key) {
 838                         len = rss_conf->rss_key_len <= HW_HASH_KEY_SIZE ?
 839                               rss_conf->rss_key_len : HW_HASH_KEY_SIZE;
 840                         memcpy(rss_conf->rss_key, vnic->rss_hash_key, len);
 841                 }
 842
 843                 hash_types = vnic->hash_type;
 844                 rss_conf->rss_hf = 0;
 845                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4) {
 846                         rss_conf->rss_hf |= ETH_RSS_IPV4;
 847                         hash_types &= ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4;
 848                 }
 849                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4) {
 850                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV4_TCP;
 851                         hash_types &=
 852                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4;
 853                 }
 854                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4) {
 855                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV4_UDP;
 856                         hash_types &=
 857                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4;
 858                 }
 859                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6) {
 860                         rss_conf->rss_hf |= ETH_RSS_IPV6;
 861                         hash_types &= ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6;
 862                 }
 863                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6) {
 864                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV6_TCP;
 865                         hash_types &=
 866                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6;
 867                 }
 868                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6) {
 869                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV6_UDP;
 870                         hash_types &=
 871                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6;
 872                 }
 873                 if (hash_types) {
 874                         RTE_LOG(ERR, PMD,
 875                                 "Unknwon RSS config from firmware (%08x), RSS disabled",
 876                                 vnic->hash_type);
 877                         return -ENOTSUP;
 878                 }
 879         } else {
 880                 rss_conf->rss_hf = 0;
 881         }
 882         return 0;
 883 }
 884
 885 static int bnxt_flow_ctrl_get_op(struct rte_eth_dev *dev,
 886                                struct rte_eth_fc_conf *fc_conf __rte_unused)
 887 {
 888         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
 889         struct rte_eth_link link_info;
 890         int rc;
 891
 892         rc = bnxt_get_hwrm_link_config(bp, &link_info);
 893         if (rc)
 894                 return rc;
 895
 896         memset(fc_conf, 0, sizeof(*fc_conf));
 897         if (bp->link_info.auto_pause)
 898                 fc_conf->autoneg = 1;
 899         switch (bp->link_info.pause) {
 900         case 0:
 901                 fc_conf->mode = RTE_FC_NONE;
 902                 break;
 903         case HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_TX:
 904                 fc_conf->mode = RTE_FC_TX_PAUSE;
 905                 break;
 906         case HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_RX:
 907                 fc_conf->mode = RTE_FC_RX_PAUSE;
 908                 break;
 909         case (HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_TX |
 910                         HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_RX):
 911                 fc_conf->mode = RTE_FC_FULL;
 912                 break;
 913         }
 914         return 0;
 915 }
 916
 917 static int bnxt_flow_ctrl_set_op(struct rte_eth_dev *dev,
 918                                struct rte_eth_fc_conf *fc_conf)
 919 {
 920         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
 921
 922         if (BNXT_NPAR_PF(bp) || BNXT_VF(bp)) {
 923                 RTE_LOG(ERR, PMD, "Flow Control Settings cannot be modified\n");
 924                 return -ENOTSUP;
 925         }
 926
 927         switch (fc_conf->mode) {
 928         case RTE_FC_NONE:
 929                 bp->link_info.auto_pause = 0;
 930                 bp->link_info.force_pause = 0;
 931                 break;
 932         case RTE_FC_RX_PAUSE:
 933                 if (fc_conf->autoneg) {
 934                         bp->link_info.auto_pause =
 935                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_RX;
 936                         bp->link_info.force_pause = 0;
 937                 } else {
 938                         bp->link_info.auto_pause = 0;
 939                         bp->link_info.force_pause =
 940                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_RX;
 941                 }
 942                 break;
 943         case RTE_FC_TX_PAUSE:
 944                 if (fc_conf->autoneg) {
 945                         bp->link_info.auto_pause =
 946                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_TX;
 947                         bp->link_info.force_pause = 0;
 948                 } else {
 949                         bp->link_info.auto_pause = 0;
 950                         bp->link_info.force_pause =
 951                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_TX;
 952                 }
 953                 break;
 954         case RTE_FC_FULL:
 955                 if (fc_conf->autoneg) {
 956                         bp->link_info.auto_pause =
 957                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_TX |
 958                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_RX;
 959                         bp->link_info.force_pause = 0;
 960                 } else {
 961                         bp->link_info.auto_pause = 0;
 962                         bp->link_info.force_pause =
 963                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_TX |
 964                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_RX;
 965                 }
 966                 break;
 967         }
 968         return bnxt_set_hwrm_link_config(bp, true);
 969 }
 970
 971 /*
 972  * Initialization
 973  */
 974
 975 static struct eth_dev_ops bnxt_dev_ops = {
 976         .dev_infos_get = bnxt_dev_info_get_op,
 977         .dev_close = bnxt_dev_close_op,
 978         .dev_configure = bnxt_dev_configure_op,
 979         .dev_start = bnxt_dev_start_op,
 980         .dev_stop = bnxt_dev_stop_op,
 981         .dev_set_link_up = bnxt_dev_set_link_up_op,
 982         .dev_set_link_down = bnxt_dev_set_link_down_op,
 983         .stats_get = bnxt_stats_get_op,
 984         .stats_reset = bnxt_stats_reset_op,
 985         .rx_queue_setup = bnxt_rx_queue_setup_op,
 986         .rx_queue_release = bnxt_rx_queue_release_op,
 987         .tx_queue_setup = bnxt_tx_queue_setup_op,
 988         .tx_queue_release = bnxt_tx_queue_release_op,
 989         .reta_update = bnxt_reta_update_op,
 990         .reta_query = bnxt_reta_query_op,
 991         .rss_hash_update = bnxt_rss_hash_update_op,
 992         .rss_hash_conf_get = bnxt_rss_hash_conf_get_op,
 993         .link_update = bnxt_link_update_op,
 994         .promiscuous_enable = bnxt_promiscuous_enable_op,
 995         .promiscuous_disable = bnxt_promiscuous_disable_op,
 996         .allmulticast_enable = bnxt_allmulticast_enable_op,
 997         .allmulticast_disable = bnxt_allmulticast_disable_op,
 998         .mac_addr_add = bnxt_mac_addr_add_op,
 999         .mac_addr_remove = bnxt_mac_addr_remove_op,
1000         .flow_ctrl_get = bnxt_flow_ctrl_get_op,
1001         .flow_ctrl_set = bnxt_flow_ctrl_set_op,
1002 };
1003
1004 static bool bnxt_vf_pciid(uint16_t id)
1005 {
1006         if (id == BROADCOM_DEV_ID_57304_VF ||
1007             id == BROADCOM_DEV_ID_57406_VF ||
1008             id == BROADCOM_DEV_ID_5731X_VF ||
1009             id == BROADCOM_DEV_ID_5741X_VF)
1010                 return true;
1011         return false;
1012 }
1013
1014 static int bnxt_init_board(struct rte_eth_dev *eth_dev)
1015 {
1016         struct bnxt *bp = eth_dev->data->dev_private;
1017         struct rte_pci_device *pci_dev = eth_dev->pci_dev;
1018         int rc;
1019
1020         /* enable device (incl. PCI PM wakeup), and bus-mastering */
1021         if (!pci_dev->mem_resource[0].addr) {
1022                 RTE_LOG(ERR, PMD,
1023                         "Cannot find PCI device base address, aborting\n");
1024                 rc = -ENODEV;
1025                 goto init_err_disable;
1026         }
1027
1028         bp->eth_dev = eth_dev;
1029         bp->pdev = pci_dev;
1030
1031         bp->bar0 = (void *)pci_dev->mem_resource[0].addr;
1032         if (!bp->bar0) {
1033                 RTE_LOG(ERR, PMD, "Cannot map device registers, aborting\n");
1034                 rc = -ENOMEM;
1035                 goto init_err_release;
1036         }
1037         return 0;
1038
1039 init_err_release:
1040         if (bp->bar0)
1041                 bp->bar0 = NULL;
1042
1043 init_err_disable:
1044
1045         return rc;
1046 }
1047
1048 static int
1049 bnxt_dev_init(struct rte_eth_dev *eth_dev)
1050 {
1051         struct rte_pci_device *pci_dev = eth_dev->pci_dev;
1052         static int version_printed;
1053         struct bnxt *bp;
1054         int rc;
1055
1056         if (version_printed++ == 0)
1057                 RTE_LOG(INFO, PMD, "%s", bnxt_version);
1058
1059         rte_eth_copy_pci_info(eth_dev, pci_dev);
1060         bp = eth_dev->data->dev_private;
1061
1062         if (bnxt_vf_pciid(pci_dev->id.device_id))
1063                 bp->flags |= BNXT_FLAG_VF;
1064
1065         rc = bnxt_init_board(eth_dev);
1066         if (rc) {
1067                 RTE_LOG(ERR, PMD,
1068                         "Board initialization failed rc: %x\n", rc);
1069                 goto error;
1070         }
1071         eth_dev->dev_ops = &bnxt_dev_ops;
1072         eth_dev->rx_pkt_burst = &bnxt_recv_pkts;
1073         eth_dev->tx_pkt_burst = &bnxt_xmit_pkts;
1074
1075         rc = bnxt_alloc_hwrm_resources(bp);
1076         if (rc) {
1077                 RTE_LOG(ERR, PMD,
1078                         "hwrm resource allocation failure rc: %x\n", rc);
1079                 goto error_free;
1080         }
1081         rc = bnxt_hwrm_ver_get(bp);
1082         if (rc)
1083                 goto error_free;
1084         bnxt_hwrm_queue_qportcfg(bp);
1085
1086         bnxt_hwrm_func_qcfg(bp);
1087
1088         /* Get the MAX capabilities for this function */
1089         rc = bnxt_hwrm_func_qcaps(bp);
1090         if (rc) {
1091                 RTE_LOG(ERR, PMD, "hwrm query capability failure rc: %x\n", rc);
1092                 goto error_free;
1093         }
1094         eth_dev->data->mac_addrs = rte_zmalloc("bnxt_mac_addr_tbl",
1095                                         ETHER_ADDR_LEN * MAX_NUM_MAC_ADDR, 0);
1096         if (eth_dev->data->mac_addrs == NULL) {
1097                 RTE_LOG(ERR, PMD,
1098                         "Failed to alloc %u bytes needed to store MAC addr tbl",
1099                         ETHER_ADDR_LEN * MAX_NUM_MAC_ADDR);
1100                 rc = -ENOMEM;
1101                 goto error_free;
1102         }
1103         /* Copy the permanent MAC from the qcap response address now. */
1104         if (BNXT_PF(bp))
1105                 memcpy(bp->mac_addr, bp->pf.mac_addr, sizeof(bp->mac_addr));
1106         else
1107                 memcpy(bp->mac_addr, bp->vf.mac_addr, sizeof(bp->mac_addr));
1108         memcpy(&eth_dev->data->mac_addrs[0], bp->mac_addr, ETHER_ADDR_LEN);
1109         bp->grp_info = rte_zmalloc("bnxt_grp_info",
1110                                 sizeof(*bp->grp_info) * bp->max_ring_grps, 0);
1111         if (!bp->grp_info) {
1112                 RTE_LOG(ERR, PMD,
1113                         "Failed to alloc %zu bytes needed to store group info table\n",
1114                         sizeof(*bp->grp_info) * bp->max_ring_grps);
1115                 rc = -ENOMEM;
1116                 goto error_free;
1117         }
1118
1119         rc = bnxt_hwrm_func_driver_register(bp, 0,
1120                                             bp->pf.vf_req_fwd);
1121         if (rc) {
1122                 RTE_LOG(ERR, PMD,
1123                         "Failed to register driver");
1124                 rc = -EBUSY;
1125                 goto error_free;
1126         }
1127
1128         RTE_LOG(INFO, PMD,
1129                 DRV_MODULE_NAME " found at mem %" PRIx64 ", node addr %pM\n",
1130                 pci_dev->mem_resource[0].phys_addr,
1131                 pci_dev->mem_resource[0].addr);
1132
1133         bp->dev_stopped = 0;
1134
1135         return 0;
1136
1137 error_free:
1138         eth_dev->driver->eth_dev_uninit(eth_dev);
1139 error:
1140         return rc;
1141 }
1142
1143 static int
1144 bnxt_dev_uninit(struct rte_eth_dev *eth_dev) {
1145         struct bnxt *bp = eth_dev->data->dev_private;
1146         int rc;
1147
1148         if (eth_dev->data->mac_addrs != NULL) {
1149                 rte_free(eth_dev->data->mac_addrs);
1150                 eth_dev->data->mac_addrs = NULL;
1151         }
1152         if (bp->grp_info != NULL) {
1153                 rte_free(bp->grp_info);
1154                 bp->grp_info = NULL;
1155         }
1156         rc = bnxt_hwrm_func_driver_unregister(bp, 0);
1157         bnxt_free_hwrm_resources(bp);
1158         if (bp->dev_stopped == 0)
1159                 bnxt_dev_close_op(eth_dev);
1160         eth_dev->dev_ops = NULL;
1161         eth_dev->rx_pkt_burst = NULL;
1162         eth_dev->tx_pkt_burst = NULL;
1163
1164         return rc;
1165 }
1166
1167 static struct eth_driver bnxt_rte_pmd = {
1168         .pci_drv = {
1169                     .id_table = bnxt_pci_id_map,
1170                     .drv_flags = RTE_PCI_DRV_NEED_MAPPING |
1171                             RTE_PCI_DRV_DETACHABLE | RTE_PCI_DRV_INTR_LSC,
1172                     .probe = rte_eth_dev_pci_probe,
1173                     .remove = rte_eth_dev_pci_remove
1174                     },
1175         .eth_dev_init = bnxt_dev_init,
1176         .eth_dev_uninit = bnxt_dev_uninit,
1177         .dev_private_size = sizeof(struct bnxt),
1178 };
1179
1180 RTE_PMD_REGISTER_PCI(net_bnxt, bnxt_rte_pmd.pci_drv);
1181 RTE_PMD_REGISTER_PCI_TABLE(net_bnxt, bnxt_pci_id_map);
1182 RTE_PMD_REGISTER_KMOD_DEP(net_bnxt, "* igb_uio | uio_pci_generic | vfio");