79e800b307b108567d9c0ac8d77de89eac9dc4e6
[dpdk.git] / drivers / net / bnxt / bnxt_ethdev.c
1 /*-
2  *   BSD LICENSE
3  *
4  *   Copyright(c) Broadcom Limited.
5  *   All rights reserved.
6  *
7  *   Redistribution and use in source and binary forms, with or without
8  *   modification, are permitted provided that the following conditions
9  *   are met:
10  *
11  *     * Redistributions of source code must retain the above copyright
12  *       notice, this list of conditions and the following disclaimer.
13  *     * Redistributions in binary form must reproduce the above copyright
14  *       notice, this list of conditions and the following disclaimer in
15  *       the documentation and/or other materials provided with the
16  *       distribution.
17  *     * Neither the name of Broadcom Corporation nor the names of its
18  *       contributors may be used to endorse or promote products derived
19  *       from this software without specific prior written permission.
20  *
21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32  */
33
34 #include <inttypes.h>
35 #include <stdbool.h>
36
37 #include <rte_dev.h>
38 #include <rte_ethdev.h>
39 #include <rte_ethdev_pci.h>
40 #include <rte_malloc.h>
41 #include <rte_cycles.h>
42
43 #include "bnxt.h"
44 #include "bnxt_cpr.h"
45 #include "bnxt_filter.h"
46 #include "bnxt_hwrm.h"
47 #include "bnxt_irq.h"
48 #include "bnxt_ring.h"
49 #include "bnxt_rxq.h"
50 #include "bnxt_rxr.h"
51 #include "bnxt_stats.h"
52 #include "bnxt_txq.h"
53 #include "bnxt_txr.h"
54 #include "bnxt_vnic.h"
55 #include "hsi_struct_def_dpdk.h"
56
57 #define DRV_MODULE_NAME         "bnxt"
58 static const char bnxt_version[] =
59         "Broadcom Cumulus driver " DRV_MODULE_NAME "\n";
60
61 #define PCI_VENDOR_ID_BROADCOM 0x14E4
62
63 #define BROADCOM_DEV_ID_STRATUS_NIC 0x1614
64 #define BROADCOM_DEV_ID_57414_VF 0x16c1
65 #define BROADCOM_DEV_ID_57301 0x16c8
66 #define BROADCOM_DEV_ID_57302 0x16c9
67 #define BROADCOM_DEV_ID_57304_PF 0x16ca
68 #define BROADCOM_DEV_ID_57304_VF 0x16cb
69 #define BROADCOM_DEV_ID_57417_MF 0x16cc
70 #define BROADCOM_DEV_ID_NS2 0x16cd
71 #define BROADCOM_DEV_ID_57311 0x16ce
72 #define BROADCOM_DEV_ID_57312 0x16cf
73 #define BROADCOM_DEV_ID_57402 0x16d0
74 #define BROADCOM_DEV_ID_57404 0x16d1
75 #define BROADCOM_DEV_ID_57406_PF 0x16d2
76 #define BROADCOM_DEV_ID_57406_VF 0x16d3
77 #define BROADCOM_DEV_ID_57402_MF 0x16d4
78 #define BROADCOM_DEV_ID_57407_RJ45 0x16d5
79 #define BROADCOM_DEV_ID_57412 0x16d6
80 #define BROADCOM_DEV_ID_57414 0x16d7
81 #define BROADCOM_DEV_ID_57416_RJ45 0x16d8
82 #define BROADCOM_DEV_ID_57417_RJ45 0x16d9
83 #define BROADCOM_DEV_ID_5741X_VF 0x16dc
84 #define BROADCOM_DEV_ID_57412_MF 0x16de
85 #define BROADCOM_DEV_ID_57314 0x16df
86 #define BROADCOM_DEV_ID_57317_RJ45 0x16e0
87 #define BROADCOM_DEV_ID_5731X_VF 0x16e1
88 #define BROADCOM_DEV_ID_57417_SFP 0x16e2
89 #define BROADCOM_DEV_ID_57416_SFP 0x16e3
90 #define BROADCOM_DEV_ID_57317_SFP 0x16e4
91 #define BROADCOM_DEV_ID_57404_MF 0x16e7
92 #define BROADCOM_DEV_ID_57406_MF 0x16e8
93 #define BROADCOM_DEV_ID_57407_SFP 0x16e9
94 #define BROADCOM_DEV_ID_57407_MF 0x16ea
95 #define BROADCOM_DEV_ID_57414_MF 0x16ec
96 #define BROADCOM_DEV_ID_57416_MF 0x16ee
97
98 static const struct rte_pci_id bnxt_pci_id_map[] = {
99         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_STRATUS_NIC) },
100         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57414_VF) },
101         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57301) },
102         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57302) },
103         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57304_PF) },
104         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57304_VF) },
105         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_NS2) },
106         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57402) },
107         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57404) },
108         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57406_PF) },
109         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57406_VF) },
110         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57402_MF) },
111         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57407_RJ45) },
112         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57404_MF) },
113         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57406_MF) },
114         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57407_SFP) },
115         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57407_MF) },
116         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_5741X_VF) },
117         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_5731X_VF) },
118         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57314) },
119         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57417_MF) },
120         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57311) },
121         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57312) },
122         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57412) },
123         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57414) },
124         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57416_RJ45) },
125         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57417_RJ45) },
126         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57412_MF) },
127         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57317_RJ45) },
128         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57417_SFP) },
129         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57416_SFP) },
130         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57317_SFP) },
131         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57414_MF) },
132         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57416_MF) },
133         { .vendor_id = 0, /* sentinel */ },
134 };
135
136 #define BNXT_ETH_RSS_SUPPORT (  \
137         ETH_RSS_IPV4 |          \
138         ETH_RSS_NONFRAG_IPV4_TCP |      \
139         ETH_RSS_NONFRAG_IPV4_UDP |      \
140         ETH_RSS_IPV6 |          \
141         ETH_RSS_NONFRAG_IPV6_TCP |      \
142         ETH_RSS_NONFRAG_IPV6_UDP)
143
144 static void bnxt_vlan_offload_set_op(struct rte_eth_dev *dev, int mask);
145
146 /***********************/
147
148 /*
149  * High level utility functions
150  */
151
152 static void bnxt_free_mem(struct bnxt *bp)
153 {
154         bnxt_free_filter_mem(bp);
155         bnxt_free_vnic_attributes(bp);
156         bnxt_free_vnic_mem(bp);
157
158         bnxt_free_stats(bp);
159         bnxt_free_tx_rings(bp);
160         bnxt_free_rx_rings(bp);
161         bnxt_free_def_cp_ring(bp);
162 }
163
164 static int bnxt_alloc_mem(struct bnxt *bp)
165 {
166         int rc;
167
168         /* Default completion ring */
169         rc = bnxt_init_def_ring_struct(bp, SOCKET_ID_ANY);
170         if (rc)
171                 goto alloc_mem_err;
172
173         rc = bnxt_alloc_rings(bp, 0, NULL, NULL,
174                               bp->def_cp_ring, "def_cp");
175         if (rc)
176                 goto alloc_mem_err;
177
178         rc = bnxt_alloc_vnic_mem(bp);
179         if (rc)
180                 goto alloc_mem_err;
181
182         rc = bnxt_alloc_vnic_attributes(bp);
183         if (rc)
184                 goto alloc_mem_err;
185
186         rc = bnxt_alloc_filter_mem(bp);
187         if (rc)
188                 goto alloc_mem_err;
189
190         return 0;
191
192 alloc_mem_err:
193         bnxt_free_mem(bp);
194         return rc;
195 }
196
197 static int bnxt_init_chip(struct bnxt *bp)
198 {
199         unsigned int i, rss_idx, fw_idx;
200         struct rte_eth_link new;
201         int rc;
202
203         if (bp->eth_dev->data->mtu > ETHER_MTU) {
204                 bp->eth_dev->data->dev_conf.rxmode.jumbo_frame = 1;
205                 bp->flags |= BNXT_FLAG_JUMBO;
206         } else {
207                 bp->eth_dev->data->dev_conf.rxmode.jumbo_frame = 0;
208                 bp->flags &= ~BNXT_FLAG_JUMBO;
209         }
210
211         rc = bnxt_alloc_all_hwrm_stat_ctxs(bp);
212         if (rc) {
213                 RTE_LOG(ERR, PMD, "HWRM stat ctx alloc failure rc: %x\n", rc);
214                 goto err_out;
215         }
216
217         rc = bnxt_alloc_hwrm_rings(bp);
218         if (rc) {
219                 RTE_LOG(ERR, PMD, "HWRM ring alloc failure rc: %x\n", rc);
220                 goto err_out;
221         }
222
223         rc = bnxt_alloc_all_hwrm_ring_grps(bp);
224         if (rc) {
225                 RTE_LOG(ERR, PMD, "HWRM ring grp alloc failure: %x\n", rc);
226                 goto err_out;
227         }
228
229         rc = bnxt_mq_rx_configure(bp);
230         if (rc) {
231                 RTE_LOG(ERR, PMD, "MQ mode configure failure rc: %x\n", rc);
232                 goto err_out;
233         }
234
235         /* VNIC configuration */
236         for (i = 0; i < bp->nr_vnics; i++) {
237                 struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
238
239                 rc = bnxt_hwrm_vnic_alloc(bp, vnic);
240                 if (rc) {
241                         RTE_LOG(ERR, PMD, "HWRM vnic %d alloc failure rc: %x\n",
242                                 i, rc);
243                         goto err_out;
244                 }
245
246                 rc = bnxt_hwrm_vnic_ctx_alloc(bp, vnic);
247                 if (rc) {
248                         RTE_LOG(ERR, PMD,
249                                 "HWRM vnic %d ctx alloc failure rc: %x\n",
250                                 i, rc);
251                         goto err_out;
252                 }
253
254                 rc = bnxt_hwrm_vnic_cfg(bp, vnic);
255                 if (rc) {
256                         RTE_LOG(ERR, PMD, "HWRM vnic %d cfg failure rc: %x\n",
257                                 i, rc);
258                         goto err_out;
259                 }
260
261                 rc = bnxt_set_hwrm_vnic_filters(bp, vnic);
262                 if (rc) {
263                         RTE_LOG(ERR, PMD,
264                                 "HWRM vnic %d filter failure rc: %x\n",
265                                 i, rc);
266                         goto err_out;
267                 }
268                 if (vnic->rss_table && vnic->hash_type) {
269                         /*
270                          * Fill the RSS hash & redirection table with
271                          * ring group ids for all VNICs
272                          */
273                         for (rss_idx = 0, fw_idx = 0;
274                              rss_idx < HW_HASH_INDEX_SIZE;
275                              rss_idx++, fw_idx++) {
276                                 if (vnic->fw_grp_ids[fw_idx] ==
277                                     INVALID_HW_RING_ID)
278                                         fw_idx = 0;
279                                 vnic->rss_table[rss_idx] =
280                                                 vnic->fw_grp_ids[fw_idx];
281                         }
282                         rc = bnxt_hwrm_vnic_rss_cfg(bp, vnic);
283                         if (rc) {
284                                 RTE_LOG(ERR, PMD,
285                                         "HWRM vnic %d set RSS failure rc: %x\n",
286                                         i, rc);
287                                 goto err_out;
288                         }
289                 }
290
291                 bnxt_hwrm_vnic_plcmode_cfg(bp, vnic);
292
293                 if (bp->eth_dev->data->dev_conf.rxmode.enable_lro)
294                         bnxt_hwrm_vnic_tpa_cfg(bp, vnic, 1);
295                 else
296                         bnxt_hwrm_vnic_tpa_cfg(bp, vnic, 0);
297         }
298         rc = bnxt_hwrm_cfa_l2_set_rx_mask(bp, &bp->vnic_info[0], 0, NULL);
299         if (rc) {
300                 RTE_LOG(ERR, PMD,
301                         "HWRM cfa l2 rx mask failure rc: %x\n", rc);
302                 goto err_out;
303         }
304
305         rc = bnxt_get_hwrm_link_config(bp, &new);
306         if (rc) {
307                 RTE_LOG(ERR, PMD, "HWRM Get link config failure rc: %x\n", rc);
308                 goto err_out;
309         }
310
311         if (!bp->link_info.link_up) {
312                 rc = bnxt_set_hwrm_link_config(bp, true);
313                 if (rc) {
314                         RTE_LOG(ERR, PMD,
315                                 "HWRM link config failure rc: %x\n", rc);
316                         goto err_out;
317                 }
318         }
319
320         return 0;
321
322 err_out:
323         bnxt_free_all_hwrm_resources(bp);
324
325         return rc;
326 }
327
328 static int bnxt_shutdown_nic(struct bnxt *bp)
329 {
330         bnxt_free_all_hwrm_resources(bp);
331         bnxt_free_all_filters(bp);
332         bnxt_free_all_vnics(bp);
333         return 0;
334 }
335
336 static int bnxt_init_nic(struct bnxt *bp)
337 {
338         int rc;
339
340         bnxt_init_ring_grps(bp);
341         bnxt_init_vnics(bp);
342         bnxt_init_filters(bp);
343
344         rc = bnxt_init_chip(bp);
345         if (rc)
346                 return rc;
347
348         return 0;
349 }
350
351 /*
352  * Device configuration and status function
353  */
354
355 static void bnxt_dev_info_get_op(struct rte_eth_dev *eth_dev,
356                                   struct rte_eth_dev_info *dev_info)
357 {
358         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
359         uint16_t max_vnics, i, j, vpool, vrxq;
360
361         dev_info->pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
362
363         /* MAC Specifics */
364         dev_info->max_mac_addrs = MAX_NUM_MAC_ADDR;
365         dev_info->max_hash_mac_addrs = 0;
366
367         /* PF/VF specifics */
368         if (BNXT_PF(bp))
369                 dev_info->max_vfs = bp->pdev->max_vfs;
370         dev_info->max_rx_queues = bp->max_rx_rings;
371         dev_info->max_tx_queues = bp->max_tx_rings;
372         dev_info->reta_size = bp->max_rsscos_ctx;
373         max_vnics = bp->max_vnics;
374
375         /* Fast path specifics */
376         dev_info->min_rx_bufsize = 1;
377         dev_info->max_rx_pktlen = BNXT_MAX_MTU + ETHER_HDR_LEN + ETHER_CRC_LEN
378                                   + VLAN_TAG_SIZE;
379         dev_info->rx_offload_capa = 0;
380         dev_info->tx_offload_capa = DEV_TX_OFFLOAD_IPV4_CKSUM |
381                                         DEV_TX_OFFLOAD_TCP_CKSUM |
382                                         DEV_TX_OFFLOAD_UDP_CKSUM |
383                                         DEV_TX_OFFLOAD_TCP_TSO |
384                                         DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM |
385                                         DEV_TX_OFFLOAD_VXLAN_TNL_TSO |
386                                         DEV_TX_OFFLOAD_GRE_TNL_TSO |
387                                         DEV_TX_OFFLOAD_IPIP_TNL_TSO |
388                                         DEV_TX_OFFLOAD_GENEVE_TNL_TSO;
389
390         /* *INDENT-OFF* */
391         dev_info->default_rxconf = (struct rte_eth_rxconf) {
392                 .rx_thresh = {
393                         .pthresh = 8,
394                         .hthresh = 8,
395                         .wthresh = 0,
396                 },
397                 .rx_free_thresh = 32,
398                 .rx_drop_en = 0,
399         };
400
401         dev_info->default_txconf = (struct rte_eth_txconf) {
402                 .tx_thresh = {
403                         .pthresh = 32,
404                         .hthresh = 0,
405                         .wthresh = 0,
406                 },
407                 .tx_free_thresh = 32,
408                 .tx_rs_thresh = 32,
409                 .txq_flags = ETH_TXQ_FLAGS_NOMULTSEGS |
410                              ETH_TXQ_FLAGS_NOOFFLOADS,
411         };
412         eth_dev->data->dev_conf.intr_conf.lsc = 1;
413
414         /* *INDENT-ON* */
415
416         /*
417          * TODO: default_rxconf, default_txconf, rx_desc_lim, and tx_desc_lim
418          *       need further investigation.
419          */
420
421         /* VMDq resources */
422         vpool = 64; /* ETH_64_POOLS */
423         vrxq = 128; /* ETH_VMDQ_DCB_NUM_QUEUES */
424         for (i = 0; i < 4; vpool >>= 1, i++) {
425                 if (max_vnics > vpool) {
426                         for (j = 0; j < 5; vrxq >>= 1, j++) {
427                                 if (dev_info->max_rx_queues > vrxq) {
428                                         if (vpool > vrxq)
429                                                 vpool = vrxq;
430                                         goto found;
431                                 }
432                         }
433                         /* Not enough resources to support VMDq */
434                         break;
435                 }
436         }
437         /* Not enough resources to support VMDq */
438         vpool = 0;
439         vrxq = 0;
440 found:
441         dev_info->max_vmdq_pools = vpool;
442         dev_info->vmdq_queue_num = vrxq;
443
444         dev_info->vmdq_pool_base = 0;
445         dev_info->vmdq_queue_base = 0;
446 }
447
448 /* Configure the device based on the configuration provided */
449 static int bnxt_dev_configure_op(struct rte_eth_dev *eth_dev)
450 {
451         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
452
453         bp->rx_queues = (void *)eth_dev->data->rx_queues;
454         bp->tx_queues = (void *)eth_dev->data->tx_queues;
455
456         /* Inherit new configurations */
457         bp->rx_nr_rings = eth_dev->data->nb_rx_queues;
458         bp->tx_nr_rings = eth_dev->data->nb_tx_queues;
459         bp->rx_cp_nr_rings = bp->rx_nr_rings;
460         bp->tx_cp_nr_rings = bp->tx_nr_rings;
461
462         if (eth_dev->data->dev_conf.rxmode.jumbo_frame)
463                 eth_dev->data->mtu =
464                                 eth_dev->data->dev_conf.rxmode.max_rx_pkt_len -
465                                 ETHER_HDR_LEN - ETHER_CRC_LEN - VLAN_TAG_SIZE;
466         return 0;
467 }
468
469 static inline int
470 rte_bnxt_atomic_write_link_status(struct rte_eth_dev *eth_dev,
471                                 struct rte_eth_link *link)
472 {
473         struct rte_eth_link *dst = &eth_dev->data->dev_link;
474         struct rte_eth_link *src = link;
475
476         if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
477                                         *(uint64_t *)src) == 0)
478                 return 1;
479
480         return 0;
481 }
482
483 static void bnxt_print_link_info(struct rte_eth_dev *eth_dev)
484 {
485         struct rte_eth_link *link = &eth_dev->data->dev_link;
486
487         if (link->link_status)
488                 RTE_LOG(INFO, PMD, "Port %d Link Up - speed %u Mbps - %s\n",
489                         (uint8_t)(eth_dev->data->port_id),
490                         (uint32_t)link->link_speed,
491                         (link->link_duplex == ETH_LINK_FULL_DUPLEX) ?
492                         ("full-duplex") : ("half-duplex\n"));
493         else
494                 RTE_LOG(INFO, PMD, "Port %d Link Down\n",
495                         (uint8_t)(eth_dev->data->port_id));
496 }
497
498 static int bnxt_dev_lsc_intr_setup(struct rte_eth_dev *eth_dev)
499 {
500         bnxt_print_link_info(eth_dev);
501         return 0;
502 }
503
504 static int bnxt_dev_start_op(struct rte_eth_dev *eth_dev)
505 {
506         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
507         int vlan_mask = 0;
508         int rc;
509
510         bp->dev_stopped = 0;
511
512         rc = bnxt_init_nic(bp);
513         if (rc)
514                 goto error;
515
516         bnxt_link_update_op(eth_dev, 0);
517
518         if (eth_dev->data->dev_conf.rxmode.hw_vlan_filter)
519                 vlan_mask |= ETH_VLAN_FILTER_MASK;
520         if (eth_dev->data->dev_conf.rxmode.hw_vlan_strip)
521                 vlan_mask |= ETH_VLAN_STRIP_MASK;
522         bnxt_vlan_offload_set_op(eth_dev, vlan_mask);
523
524         return 0;
525
526 error:
527         bnxt_shutdown_nic(bp);
528         bnxt_free_tx_mbufs(bp);
529         bnxt_free_rx_mbufs(bp);
530         return rc;
531 }
532
533 static int bnxt_dev_set_link_up_op(struct rte_eth_dev *eth_dev)
534 {
535         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
536
537         eth_dev->data->dev_link.link_status = 1;
538         bnxt_set_hwrm_link_config(bp, true);
539         return 0;
540 }
541
542 static int bnxt_dev_set_link_down_op(struct rte_eth_dev *eth_dev)
543 {
544         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
545
546         eth_dev->data->dev_link.link_status = 0;
547         bnxt_set_hwrm_link_config(bp, false);
548         return 0;
549 }
550
551 /* Unload the driver, release resources */
552 static void bnxt_dev_stop_op(struct rte_eth_dev *eth_dev)
553 {
554         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
555
556         if (bp->eth_dev->data->dev_started) {
557                 /* TBD: STOP HW queues DMA */
558                 eth_dev->data->dev_link.link_status = 0;
559         }
560         bnxt_set_hwrm_link_config(bp, false);
561         bnxt_hwrm_port_clr_stats(bp);
562         bnxt_shutdown_nic(bp);
563         bp->dev_stopped = 1;
564 }
565
566 static void bnxt_dev_close_op(struct rte_eth_dev *eth_dev)
567 {
568         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
569
570         if (bp->dev_stopped == 0)
571                 bnxt_dev_stop_op(eth_dev);
572
573         bnxt_free_tx_mbufs(bp);
574         bnxt_free_rx_mbufs(bp);
575         bnxt_free_mem(bp);
576         if (eth_dev->data->mac_addrs != NULL) {
577                 rte_free(eth_dev->data->mac_addrs);
578                 eth_dev->data->mac_addrs = NULL;
579         }
580         if (bp->grp_info != NULL) {
581                 rte_free(bp->grp_info);
582                 bp->grp_info = NULL;
583         }
584 }
585
586 static void bnxt_mac_addr_remove_op(struct rte_eth_dev *eth_dev,
587                                     uint32_t index)
588 {
589         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
590         uint64_t pool_mask = eth_dev->data->mac_pool_sel[index];
591         struct bnxt_vnic_info *vnic;
592         struct bnxt_filter_info *filter, *temp_filter;
593         int i;
594
595         /*
596          * Loop through all VNICs from the specified filter flow pools to
597          * remove the corresponding MAC addr filter
598          */
599         for (i = 0; i < MAX_FF_POOLS; i++) {
600                 if (!(pool_mask & (1ULL << i)))
601                         continue;
602
603                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
604                         filter = STAILQ_FIRST(&vnic->filter);
605                         while (filter) {
606                                 temp_filter = STAILQ_NEXT(filter, next);
607                                 if (filter->mac_index == index) {
608                                         STAILQ_REMOVE(&vnic->filter, filter,
609                                                       bnxt_filter_info, next);
610                                         bnxt_hwrm_clear_filter(bp, filter);
611                                         filter->mac_index = INVALID_MAC_INDEX;
612                                         memset(&filter->l2_addr, 0,
613                                                ETHER_ADDR_LEN);
614                                         STAILQ_INSERT_TAIL(
615                                                         &bp->free_filter_list,
616                                                         filter, next);
617                                 }
618                                 filter = temp_filter;
619                         }
620                 }
621         }
622 }
623
624 static int bnxt_mac_addr_add_op(struct rte_eth_dev *eth_dev,
625                                 struct ether_addr *mac_addr,
626                                 uint32_t index, uint32_t pool)
627 {
628         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
629         struct bnxt_vnic_info *vnic = STAILQ_FIRST(&bp->ff_pool[pool]);
630         struct bnxt_filter_info *filter;
631
632         if (BNXT_VF(bp)) {
633                 RTE_LOG(ERR, PMD, "Cannot add MAC address to a VF interface\n");
634                 return -ENOTSUP;
635         }
636
637         if (!vnic) {
638                 RTE_LOG(ERR, PMD, "VNIC not found for pool %d!\n", pool);
639                 return -EINVAL;
640         }
641         /* Attach requested MAC address to the new l2_filter */
642         STAILQ_FOREACH(filter, &vnic->filter, next) {
643                 if (filter->mac_index == index) {
644                         RTE_LOG(ERR, PMD,
645                                 "MAC addr already existed for pool %d\n", pool);
646                         return -EINVAL;
647                 }
648         }
649         filter = bnxt_alloc_filter(bp);
650         if (!filter) {
651                 RTE_LOG(ERR, PMD, "L2 filter alloc failed\n");
652                 return -ENODEV;
653         }
654         STAILQ_INSERT_TAIL(&vnic->filter, filter, next);
655         filter->mac_index = index;
656         memcpy(filter->l2_addr, mac_addr, ETHER_ADDR_LEN);
657         return bnxt_hwrm_set_filter(bp, vnic->fw_vnic_id, filter);
658 }
659
660 int bnxt_link_update_op(struct rte_eth_dev *eth_dev, int wait_to_complete)
661 {
662         int rc = 0;
663         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
664         struct rte_eth_link new;
665         unsigned int cnt = BNXT_LINK_WAIT_CNT;
666
667         memset(&new, 0, sizeof(new));
668         do {
669                 /* Retrieve link info from hardware */
670                 rc = bnxt_get_hwrm_link_config(bp, &new);
671                 if (rc) {
672                         new.link_speed = ETH_LINK_SPEED_100M;
673                         new.link_duplex = ETH_LINK_FULL_DUPLEX;
674                         RTE_LOG(ERR, PMD,
675                                 "Failed to retrieve link rc = 0x%x!\n", rc);
676                         goto out;
677                 }
678                 rte_delay_ms(BNXT_LINK_WAIT_INTERVAL);
679
680                 if (!wait_to_complete)
681                         break;
682         } while (!new.link_status && cnt--);
683
684 out:
685         /* Timed out or success */
686         if (new.link_status != eth_dev->data->dev_link.link_status ||
687         new.link_speed != eth_dev->data->dev_link.link_speed) {
688                 rte_bnxt_atomic_write_link_status(eth_dev, &new);
689                 bnxt_print_link_info(eth_dev);
690         }
691
692         return rc;
693 }
694
695 static void bnxt_promiscuous_enable_op(struct rte_eth_dev *eth_dev)
696 {
697         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
698         struct bnxt_vnic_info *vnic;
699
700         if (bp->vnic_info == NULL)
701                 return;
702
703         vnic = &bp->vnic_info[0];
704
705         vnic->flags |= BNXT_VNIC_INFO_PROMISC;
706         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic, 0, NULL);
707 }
708
709 static void bnxt_promiscuous_disable_op(struct rte_eth_dev *eth_dev)
710 {
711         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
712         struct bnxt_vnic_info *vnic;
713
714         if (bp->vnic_info == NULL)
715                 return;
716
717         vnic = &bp->vnic_info[0];
718
719         vnic->flags &= ~BNXT_VNIC_INFO_PROMISC;
720         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic, 0, NULL);
721 }
722
723 static void bnxt_allmulticast_enable_op(struct rte_eth_dev *eth_dev)
724 {
725         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
726         struct bnxt_vnic_info *vnic;
727
728         if (bp->vnic_info == NULL)
729                 return;
730
731         vnic = &bp->vnic_info[0];
732
733         vnic->flags |= BNXT_VNIC_INFO_ALLMULTI;
734         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic, 0, NULL);
735 }
736
737 static void bnxt_allmulticast_disable_op(struct rte_eth_dev *eth_dev)
738 {
739         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
740         struct bnxt_vnic_info *vnic;
741
742         if (bp->vnic_info == NULL)
743                 return;
744
745         vnic = &bp->vnic_info[0];
746
747         vnic->flags &= ~BNXT_VNIC_INFO_ALLMULTI;
748         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic, 0, NULL);
749 }
750
751 static int bnxt_reta_update_op(struct rte_eth_dev *eth_dev,
752                             struct rte_eth_rss_reta_entry64 *reta_conf,
753                             uint16_t reta_size)
754 {
755         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
756         struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
757         struct bnxt_vnic_info *vnic;
758         int i;
759
760         if (!(dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG))
761                 return -EINVAL;
762
763         if (reta_size != HW_HASH_INDEX_SIZE) {
764                 RTE_LOG(ERR, PMD, "The configured hash table lookup size "
765                         "(%d) must equal the size supported by the hardware "
766                         "(%d)\n", reta_size, HW_HASH_INDEX_SIZE);
767                 return -EINVAL;
768         }
769         /* Update the RSS VNIC(s) */
770         for (i = 0; i < MAX_FF_POOLS; i++) {
771                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
772                         memcpy(vnic->rss_table, reta_conf, reta_size);
773
774                         bnxt_hwrm_vnic_rss_cfg(bp, vnic);
775                 }
776         }
777         return 0;
778 }
779
780 static int bnxt_reta_query_op(struct rte_eth_dev *eth_dev,
781                               struct rte_eth_rss_reta_entry64 *reta_conf,
782                               uint16_t reta_size)
783 {
784         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
785         struct bnxt_vnic_info *vnic = &bp->vnic_info[0];
786         struct rte_intr_handle *intr_handle
787                 = &bp->pdev->intr_handle;
788
789         /* Retrieve from the default VNIC */
790         if (!vnic)
791                 return -EINVAL;
792         if (!vnic->rss_table)
793                 return -EINVAL;
794
795         if (reta_size != HW_HASH_INDEX_SIZE) {
796                 RTE_LOG(ERR, PMD, "The configured hash table lookup size "
797                         "(%d) must equal the size supported by the hardware "
798                         "(%d)\n", reta_size, HW_HASH_INDEX_SIZE);
799                 return -EINVAL;
800         }
801         /* EW - need to revisit here copying from u64 to u16 */
802         memcpy(reta_conf, vnic->rss_table, reta_size);
803
804         if (rte_intr_allow_others(intr_handle)) {
805                 if (eth_dev->data->dev_conf.intr_conf.lsc != 0)
806                         bnxt_dev_lsc_intr_setup(eth_dev);
807         }
808
809         return 0;
810 }
811
812 static int bnxt_rss_hash_update_op(struct rte_eth_dev *eth_dev,
813                                    struct rte_eth_rss_conf *rss_conf)
814 {
815         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
816         struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
817         struct bnxt_vnic_info *vnic;
818         uint16_t hash_type = 0;
819         int i;
820
821         /*
822          * If RSS enablement were different than dev_configure,
823          * then return -EINVAL
824          */
825         if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) {
826                 if (!rss_conf->rss_hf)
827                         return -EINVAL;
828         } else {
829                 if (rss_conf->rss_hf & BNXT_ETH_RSS_SUPPORT)
830                         return -EINVAL;
831         }
832         if (rss_conf->rss_hf & ETH_RSS_IPV4)
833                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4;
834         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV4_TCP)
835                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4;
836         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV4_UDP)
837                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4;
838         if (rss_conf->rss_hf & ETH_RSS_IPV6)
839                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6;
840         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV6_TCP)
841                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6;
842         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV6_UDP)
843                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6;
844
845         /* Update the RSS VNIC(s) */
846         for (i = 0; i < MAX_FF_POOLS; i++) {
847                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
848                         vnic->hash_type = hash_type;
849
850                         /*
851                          * Use the supplied key if the key length is
852                          * acceptable and the rss_key is not NULL
853                          */
854                         if (rss_conf->rss_key &&
855                             rss_conf->rss_key_len <= HW_HASH_KEY_SIZE)
856                                 memcpy(vnic->rss_hash_key, rss_conf->rss_key,
857                                        rss_conf->rss_key_len);
858
859                         bnxt_hwrm_vnic_rss_cfg(bp, vnic);
860                 }
861         }
862         return 0;
863 }
864
865 static int bnxt_rss_hash_conf_get_op(struct rte_eth_dev *eth_dev,
866                                      struct rte_eth_rss_conf *rss_conf)
867 {
868         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
869         struct bnxt_vnic_info *vnic = &bp->vnic_info[0];
870         int len;
871         uint32_t hash_types;
872
873         /* RSS configuration is the same for all VNICs */
874         if (vnic && vnic->rss_hash_key) {
875                 if (rss_conf->rss_key) {
876                         len = rss_conf->rss_key_len <= HW_HASH_KEY_SIZE ?
877                               rss_conf->rss_key_len : HW_HASH_KEY_SIZE;
878                         memcpy(rss_conf->rss_key, vnic->rss_hash_key, len);
879                 }
880
881                 hash_types = vnic->hash_type;
882                 rss_conf->rss_hf = 0;
883                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4) {
884                         rss_conf->rss_hf |= ETH_RSS_IPV4;
885                         hash_types &= ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4;
886                 }
887                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4) {
888                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV4_TCP;
889                         hash_types &=
890                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4;
891                 }
892                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4) {
893                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV4_UDP;
894                         hash_types &=
895                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4;
896                 }
897                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6) {
898                         rss_conf->rss_hf |= ETH_RSS_IPV6;
899                         hash_types &= ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6;
900                 }
901                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6) {
902                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV6_TCP;
903                         hash_types &=
904                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6;
905                 }
906                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6) {
907                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV6_UDP;
908                         hash_types &=
909                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6;
910                 }
911                 if (hash_types) {
912                         RTE_LOG(ERR, PMD,
913                                 "Unknwon RSS config from firmware (%08x), RSS disabled",
914                                 vnic->hash_type);
915                         return -ENOTSUP;
916                 }
917         } else {
918                 rss_conf->rss_hf = 0;
919         }
920         return 0;
921 }
922
923 static int bnxt_flow_ctrl_get_op(struct rte_eth_dev *dev,
924                                struct rte_eth_fc_conf *fc_conf)
925 {
926         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
927         struct rte_eth_link link_info;
928         int rc;
929
930         rc = bnxt_get_hwrm_link_config(bp, &link_info);
931         if (rc)
932                 return rc;
933
934         memset(fc_conf, 0, sizeof(*fc_conf));
935         if (bp->link_info.auto_pause)
936                 fc_conf->autoneg = 1;
937         switch (bp->link_info.pause) {
938         case 0:
939                 fc_conf->mode = RTE_FC_NONE;
940                 break;
941         case HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_TX:
942                 fc_conf->mode = RTE_FC_TX_PAUSE;
943                 break;
944         case HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_RX:
945                 fc_conf->mode = RTE_FC_RX_PAUSE;
946                 break;
947         case (HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_TX |
948                         HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_RX):
949                 fc_conf->mode = RTE_FC_FULL;
950                 break;
951         }
952         return 0;
953 }
954
955 static int bnxt_flow_ctrl_set_op(struct rte_eth_dev *dev,
956                                struct rte_eth_fc_conf *fc_conf)
957 {
958         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
959
960         if (BNXT_NPAR_PF(bp) || BNXT_VF(bp)) {
961                 RTE_LOG(ERR, PMD, "Flow Control Settings cannot be modified\n");
962                 return -ENOTSUP;
963         }
964
965         switch (fc_conf->mode) {
966         case RTE_FC_NONE:
967                 bp->link_info.auto_pause = 0;
968                 bp->link_info.force_pause = 0;
969                 break;
970         case RTE_FC_RX_PAUSE:
971                 if (fc_conf->autoneg) {
972                         bp->link_info.auto_pause =
973                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_RX;
974                         bp->link_info.force_pause = 0;
975                 } else {
976                         bp->link_info.auto_pause = 0;
977                         bp->link_info.force_pause =
978                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_RX;
979                 }
980                 break;
981         case RTE_FC_TX_PAUSE:
982                 if (fc_conf->autoneg) {
983                         bp->link_info.auto_pause =
984                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_TX;
985                         bp->link_info.force_pause = 0;
986                 } else {
987                         bp->link_info.auto_pause = 0;
988                         bp->link_info.force_pause =
989                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_TX;
990                 }
991                 break;
992         case RTE_FC_FULL:
993                 if (fc_conf->autoneg) {
994                         bp->link_info.auto_pause =
995                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_TX |
996                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_RX;
997                         bp->link_info.force_pause = 0;
998                 } else {
999                         bp->link_info.auto_pause = 0;
1000                         bp->link_info.force_pause =
1001                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_TX |
1002                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_RX;
1003                 }
1004                 break;
1005         }
1006         return bnxt_set_hwrm_link_config(bp, true);
1007 }
1008
1009 /* Add UDP tunneling port */
1010 static int
1011 bnxt_udp_tunnel_port_add_op(struct rte_eth_dev *eth_dev,
1012                          struct rte_eth_udp_tunnel *udp_tunnel)
1013 {
1014         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
1015         uint16_t tunnel_type = 0;
1016         int rc = 0;
1017
1018         switch (udp_tunnel->prot_type) {
1019         case RTE_TUNNEL_TYPE_VXLAN:
1020                 if (bp->vxlan_port_cnt) {
1021                         RTE_LOG(ERR, PMD, "Tunnel Port %d already programmed\n",
1022                                 udp_tunnel->udp_port);
1023                         if (bp->vxlan_port != udp_tunnel->udp_port) {
1024                                 RTE_LOG(ERR, PMD, "Only one port allowed\n");
1025                                 return -ENOSPC;
1026                         }
1027                         bp->vxlan_port_cnt++;
1028                         return 0;
1029                 }
1030                 tunnel_type =
1031                         HWRM_TUNNEL_DST_PORT_ALLOC_INPUT_TUNNEL_TYPE_VXLAN;
1032                 bp->vxlan_port_cnt++;
1033                 break;
1034         case RTE_TUNNEL_TYPE_GENEVE:
1035                 if (bp->geneve_port_cnt) {
1036                         RTE_LOG(ERR, PMD, "Tunnel Port %d already programmed\n",
1037                                 udp_tunnel->udp_port);
1038                         if (bp->geneve_port != udp_tunnel->udp_port) {
1039                                 RTE_LOG(ERR, PMD, "Only one port allowed\n");
1040                                 return -ENOSPC;
1041                         }
1042                         bp->geneve_port_cnt++;
1043                         return 0;
1044                 }
1045                 tunnel_type =
1046                         HWRM_TUNNEL_DST_PORT_ALLOC_INPUT_TUNNEL_TYPE_GENEVE;
1047                 bp->geneve_port_cnt++;
1048                 break;
1049         default:
1050                 RTE_LOG(ERR, PMD, "Tunnel type is not supported\n");
1051                 return -ENOTSUP;
1052         }
1053         rc = bnxt_hwrm_tunnel_dst_port_alloc(bp, udp_tunnel->udp_port,
1054                                              tunnel_type);
1055         return rc;
1056 }
1057
1058 static int
1059 bnxt_udp_tunnel_port_del_op(struct rte_eth_dev *eth_dev,
1060                          struct rte_eth_udp_tunnel *udp_tunnel)
1061 {
1062         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
1063         uint16_t tunnel_type = 0;
1064         uint16_t port = 0;
1065         int rc = 0;
1066
1067         switch (udp_tunnel->prot_type) {
1068         case RTE_TUNNEL_TYPE_VXLAN:
1069                 if (!bp->vxlan_port_cnt) {
1070                         RTE_LOG(ERR, PMD, "No Tunnel port configured yet\n");
1071                         return -EINVAL;
1072                 }
1073                 if (bp->vxlan_port != udp_tunnel->udp_port) {
1074                         RTE_LOG(ERR, PMD, "Req Port: %d. Configured port: %d\n",
1075                                 udp_tunnel->udp_port, bp->vxlan_port);
1076                         return -EINVAL;
1077                 }
1078                 if (--bp->vxlan_port_cnt)
1079                         return 0;
1080
1081                 tunnel_type =
1082                         HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_VXLAN;
1083                 port = bp->vxlan_fw_dst_port_id;
1084                 break;
1085         case RTE_TUNNEL_TYPE_GENEVE:
1086                 if (!bp->geneve_port_cnt) {
1087                         RTE_LOG(ERR, PMD, "No Tunnel port configured yet\n");
1088                         return -EINVAL;
1089                 }
1090                 if (bp->geneve_port != udp_tunnel->udp_port) {
1091                         RTE_LOG(ERR, PMD, "Req Port: %d. Configured port: %d\n",
1092                                 udp_tunnel->udp_port, bp->geneve_port);
1093                         return -EINVAL;
1094                 }
1095                 if (--bp->geneve_port_cnt)
1096                         return 0;
1097
1098                 tunnel_type =
1099                         HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_GENEVE;
1100                 port = bp->geneve_fw_dst_port_id;
1101                 break;
1102         default:
1103                 RTE_LOG(ERR, PMD, "Tunnel type is not supported\n");
1104                 return -ENOTSUP;
1105         }
1106
1107         rc = bnxt_hwrm_tunnel_dst_port_free(bp, port, tunnel_type);
1108         if (!rc) {
1109                 if (tunnel_type ==
1110                     HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_VXLAN)
1111                         bp->vxlan_port = 0;
1112                 if (tunnel_type ==
1113                     HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_GENEVE)
1114                         bp->geneve_port = 0;
1115         }
1116         return rc;
1117 }
1118
1119 static int bnxt_del_vlan_filter(struct bnxt *bp, uint16_t vlan_id)
1120 {
1121         struct bnxt_filter_info *filter, *temp_filter, *new_filter;
1122         struct bnxt_vnic_info *vnic;
1123         unsigned int i;
1124         int rc = 0;
1125         uint32_t chk = HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN;
1126
1127         /* Cycle through all VNICs */
1128         for (i = 0; i < bp->nr_vnics; i++) {
1129                 /*
1130                  * For each VNIC and each associated filter(s)
1131                  * if VLAN exists && VLAN matches vlan_id
1132                  *      remove the MAC+VLAN filter
1133                  *      add a new MAC only filter
1134                  * else
1135                  *      VLAN filter doesn't exist, just skip and continue
1136                  */
1137                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
1138                         filter = STAILQ_FIRST(&vnic->filter);
1139                         while (filter) {
1140                                 temp_filter = STAILQ_NEXT(filter, next);
1141
1142                                 if (filter->enables & chk &&
1143                                     filter->l2_ovlan == vlan_id) {
1144                                         /* Must delete the filter */
1145                                         STAILQ_REMOVE(&vnic->filter, filter,
1146                                                       bnxt_filter_info, next);
1147                                         bnxt_hwrm_clear_filter(bp, filter);
1148                                         STAILQ_INSERT_TAIL(
1149                                                         &bp->free_filter_list,
1150                                                         filter, next);
1151
1152                                         /*
1153                                          * Need to examine to see if the MAC
1154                                          * filter already existed or not before
1155                                          * allocating a new one
1156                                          */
1157
1158                                         new_filter = bnxt_alloc_filter(bp);
1159                                         if (!new_filter) {
1160                                                 RTE_LOG(ERR, PMD,
1161                                                         "MAC/VLAN filter alloc failed\n");
1162                                                 rc = -ENOMEM;
1163                                                 goto exit;
1164                                         }
1165                                         STAILQ_INSERT_TAIL(&vnic->filter,
1166                                                            new_filter, next);
1167                                         /* Inherit MAC from previous filter */
1168                                         new_filter->mac_index =
1169                                                         filter->mac_index;
1170                                         memcpy(new_filter->l2_addr,
1171                                                filter->l2_addr, ETHER_ADDR_LEN);
1172                                         /* MAC only filter */
1173                                         rc = bnxt_hwrm_set_filter(bp,
1174                                                         vnic->fw_vnic_id,
1175                                                         new_filter);
1176                                         if (rc)
1177                                                 goto exit;
1178                                         RTE_LOG(INFO, PMD,
1179                                                 "Del Vlan filter for %d\n",
1180                                                 vlan_id);
1181                                 }
1182                                 filter = temp_filter;
1183                         }
1184                 }
1185         }
1186 exit:
1187         return rc;
1188 }
1189
1190 static int bnxt_add_vlan_filter(struct bnxt *bp, uint16_t vlan_id)
1191 {
1192         struct bnxt_filter_info *filter, *temp_filter, *new_filter;
1193         struct bnxt_vnic_info *vnic;
1194         unsigned int i;
1195         int rc = 0;
1196         uint32_t en = HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN |
1197                 HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN_MASK;
1198         uint32_t chk = HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN;
1199
1200         /* Cycle through all VNICs */
1201         for (i = 0; i < bp->nr_vnics; i++) {
1202                 /*
1203                  * For each VNIC and each associated filter(s)
1204                  * if VLAN exists:
1205                  *   if VLAN matches vlan_id
1206                  *      VLAN filter already exists, just skip and continue
1207                  *   else
1208                  *      add a new MAC+VLAN filter
1209                  * else
1210                  *   Remove the old MAC only filter
1211                  *    Add a new MAC+VLAN filter
1212                  */
1213                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
1214                         filter = STAILQ_FIRST(&vnic->filter);
1215                         while (filter) {
1216                                 temp_filter = STAILQ_NEXT(filter, next);
1217
1218                                 if (filter->enables & chk) {
1219                                         if (filter->l2_ovlan == vlan_id)
1220                                                 goto cont;
1221                                 } else {
1222                                         /* Must delete the MAC filter */
1223                                         STAILQ_REMOVE(&vnic->filter, filter,
1224                                                       bnxt_filter_info, next);
1225                                         bnxt_hwrm_clear_filter(bp, filter);
1226                                         filter->l2_ovlan = 0;
1227                                         STAILQ_INSERT_TAIL(
1228                                                         &bp->free_filter_list,
1229                                                         filter, next);
1230                                 }
1231                                 new_filter = bnxt_alloc_filter(bp);
1232                                 if (!new_filter) {
1233                                         RTE_LOG(ERR, PMD,
1234                                                 "MAC/VLAN filter alloc failed\n");
1235                                         rc = -ENOMEM;
1236                                         goto exit;
1237                                 }
1238                                 STAILQ_INSERT_TAIL(&vnic->filter, new_filter,
1239                                                    next);
1240                                 /* Inherit MAC from the previous filter */
1241                                 new_filter->mac_index = filter->mac_index;
1242                                 memcpy(new_filter->l2_addr, filter->l2_addr,
1243                                        ETHER_ADDR_LEN);
1244                                 /* MAC + VLAN ID filter */
1245                                 new_filter->l2_ovlan = vlan_id;
1246                                 new_filter->l2_ovlan_mask = 0xF000;
1247                                 new_filter->enables |= en;
1248                                 rc = bnxt_hwrm_set_filter(bp, vnic->fw_vnic_id,
1249                                                           new_filter);
1250                                 if (rc)
1251                                         goto exit;
1252                                 RTE_LOG(INFO, PMD,
1253                                         "Added Vlan filter for %d\n", vlan_id);
1254 cont:
1255                                 filter = temp_filter;
1256                         }
1257                 }
1258         }
1259 exit:
1260         return rc;
1261 }
1262
1263 static int bnxt_vlan_filter_set_op(struct rte_eth_dev *eth_dev,
1264                                    uint16_t vlan_id, int on)
1265 {
1266         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
1267
1268         /* These operations apply to ALL existing MAC/VLAN filters */
1269         if (on)
1270                 return bnxt_add_vlan_filter(bp, vlan_id);
1271         else
1272                 return bnxt_del_vlan_filter(bp, vlan_id);
1273 }
1274
1275 static void
1276 bnxt_vlan_offload_set_op(struct rte_eth_dev *dev, int mask)
1277 {
1278         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1279         unsigned int i;
1280
1281         if (mask & ETH_VLAN_FILTER_MASK) {
1282                 if (!dev->data->dev_conf.rxmode.hw_vlan_filter) {
1283                         /* Remove any VLAN filters programmed */
1284                         for (i = 0; i < 4095; i++)
1285                                 bnxt_del_vlan_filter(bp, i);
1286                 }
1287                 RTE_LOG(INFO, PMD, "VLAN Filtering: %d\n",
1288                         dev->data->dev_conf.rxmode.hw_vlan_filter);
1289         }
1290
1291         if (mask & ETH_VLAN_STRIP_MASK) {
1292                 /* Enable or disable VLAN stripping */
1293                 for (i = 0; i < bp->nr_vnics; i++) {
1294                         struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
1295                         if (dev->data->dev_conf.rxmode.hw_vlan_strip)
1296                                 vnic->vlan_strip = true;
1297                         else
1298                                 vnic->vlan_strip = false;
1299                         bnxt_hwrm_vnic_cfg(bp, vnic);
1300                 }
1301                 RTE_LOG(INFO, PMD, "VLAN Strip Offload: %d\n",
1302                         dev->data->dev_conf.rxmode.hw_vlan_strip);
1303         }
1304
1305         if (mask & ETH_VLAN_EXTEND_MASK)
1306                 RTE_LOG(ERR, PMD, "Extend VLAN Not supported\n");
1307 }
1308
1309 static void
1310 bnxt_set_default_mac_addr_op(struct rte_eth_dev *dev, struct ether_addr *addr)
1311 {
1312         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1313         /* Default Filter is tied to VNIC 0 */
1314         struct bnxt_vnic_info *vnic = &bp->vnic_info[0];
1315         struct bnxt_filter_info *filter;
1316         int rc;
1317
1318         if (BNXT_VF(bp))
1319                 return;
1320
1321         memcpy(bp->mac_addr, addr, sizeof(bp->mac_addr));
1322         memcpy(&dev->data->mac_addrs[0], bp->mac_addr, ETHER_ADDR_LEN);
1323
1324         STAILQ_FOREACH(filter, &vnic->filter, next) {
1325                 /* Default Filter is at Index 0 */
1326                 if (filter->mac_index != 0)
1327                         continue;
1328                 rc = bnxt_hwrm_clear_filter(bp, filter);
1329                 if (rc)
1330                         break;
1331                 memcpy(filter->l2_addr, bp->mac_addr, ETHER_ADDR_LEN);
1332                 memset(filter->l2_addr_mask, 0xff, ETHER_ADDR_LEN);
1333                 filter->flags |= HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_RX;
1334                 filter->enables |=
1335                         HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR |
1336                         HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR_MASK;
1337                 rc = bnxt_hwrm_set_filter(bp, vnic->fw_vnic_id, filter);
1338                 if (rc)
1339                         break;
1340                 filter->mac_index = 0;
1341                 RTE_LOG(DEBUG, PMD, "Set MAC addr\n");
1342         }
1343 }
1344
1345 static int
1346 bnxt_dev_set_mc_addr_list_op(struct rte_eth_dev *eth_dev,
1347                           struct ether_addr *mc_addr_set,
1348                           uint32_t nb_mc_addr)
1349 {
1350         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
1351         char *mc_addr_list = (char *)mc_addr_set;
1352         struct bnxt_vnic_info *vnic;
1353         uint32_t off = 0, i = 0;
1354
1355         vnic = &bp->vnic_info[0];
1356
1357         if (nb_mc_addr > BNXT_MAX_MC_ADDRS) {
1358                 vnic->flags |= BNXT_VNIC_INFO_ALLMULTI;
1359                 goto allmulti;
1360         }
1361
1362         /* TODO Check for Duplicate mcast addresses */
1363         vnic->flags &= ~BNXT_VNIC_INFO_ALLMULTI;
1364         for (i = 0; i < nb_mc_addr; i++) {
1365                 memcpy(vnic->mc_list + off, &mc_addr_list[i], ETHER_ADDR_LEN);
1366                 off += ETHER_ADDR_LEN;
1367         }
1368
1369         vnic->mc_addr_cnt = i;
1370
1371 allmulti:
1372         return bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic, 0, NULL);
1373 }
1374
1375 static int
1376 bnxt_fw_version_get(struct rte_eth_dev *dev, char *fw_version, size_t fw_size)
1377 {
1378         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1379         uint8_t fw_major = (bp->fw_ver >> 24) & 0xff;
1380         uint8_t fw_minor = (bp->fw_ver >> 16) & 0xff;
1381         uint8_t fw_updt = (bp->fw_ver >> 8) & 0xff;
1382         int ret;
1383
1384         ret = snprintf(fw_version, fw_size, "%d.%d.%d",
1385                         fw_major, fw_minor, fw_updt);
1386
1387         ret += 1; /* add the size of '\0' */
1388         if (fw_size < (uint32_t)ret)
1389                 return ret;
1390         else
1391                 return 0;
1392 }
1393
1394 static void
1395 bnxt_rxq_info_get_op(struct rte_eth_dev *dev, uint16_t queue_id,
1396         struct rte_eth_rxq_info *qinfo)
1397 {
1398         struct bnxt_rx_queue *rxq;
1399
1400         rxq = dev->data->rx_queues[queue_id];
1401
1402         qinfo->mp = rxq->mb_pool;
1403         qinfo->scattered_rx = dev->data->scattered_rx;
1404         qinfo->nb_desc = rxq->nb_rx_desc;
1405
1406         qinfo->conf.rx_free_thresh = rxq->rx_free_thresh;
1407         qinfo->conf.rx_drop_en = 0;
1408         qinfo->conf.rx_deferred_start = 0;
1409 }
1410
1411 static void
1412 bnxt_txq_info_get_op(struct rte_eth_dev *dev, uint16_t queue_id,
1413         struct rte_eth_txq_info *qinfo)
1414 {
1415         struct bnxt_tx_queue *txq;
1416
1417         txq = dev->data->tx_queues[queue_id];
1418
1419         qinfo->nb_desc = txq->nb_tx_desc;
1420
1421         qinfo->conf.tx_thresh.pthresh = txq->pthresh;
1422         qinfo->conf.tx_thresh.hthresh = txq->hthresh;
1423         qinfo->conf.tx_thresh.wthresh = txq->wthresh;
1424
1425         qinfo->conf.tx_free_thresh = txq->tx_free_thresh;
1426         qinfo->conf.tx_rs_thresh = 0;
1427         qinfo->conf.txq_flags = txq->txq_flags;
1428         qinfo->conf.tx_deferred_start = txq->tx_deferred_start;
1429 }
1430
1431 static int bnxt_mtu_set_op(struct rte_eth_dev *eth_dev, uint16_t new_mtu)
1432 {
1433         struct bnxt *bp = eth_dev->data->dev_private;
1434         struct rte_eth_dev_info dev_info;
1435         uint32_t max_dev_mtu;
1436         uint32_t rc = 0;
1437         uint32_t i;
1438
1439         bnxt_dev_info_get_op(eth_dev, &dev_info);
1440         max_dev_mtu = dev_info.max_rx_pktlen -
1441                       ETHER_HDR_LEN - ETHER_CRC_LEN - VLAN_TAG_SIZE * 2;
1442
1443         if (new_mtu < ETHER_MIN_MTU || new_mtu > max_dev_mtu) {
1444                 RTE_LOG(ERR, PMD, "MTU requested must be within (%d, %d)\n",
1445                         ETHER_MIN_MTU, max_dev_mtu);
1446                 return -EINVAL;
1447         }
1448
1449
1450         if (new_mtu > ETHER_MTU) {
1451                 bp->flags |= BNXT_FLAG_JUMBO;
1452                 eth_dev->data->dev_conf.rxmode.jumbo_frame = 1;
1453         } else {
1454                 eth_dev->data->dev_conf.rxmode.jumbo_frame = 0;
1455                 bp->flags &= ~BNXT_FLAG_JUMBO;
1456         }
1457
1458         eth_dev->data->dev_conf.rxmode.max_rx_pkt_len =
1459                 new_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN + VLAN_TAG_SIZE * 2;
1460
1461         eth_dev->data->mtu = new_mtu;
1462         RTE_LOG(INFO, PMD, "New MTU is %d\n", eth_dev->data->mtu);
1463
1464         for (i = 0; i < bp->nr_vnics; i++) {
1465                 struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
1466
1467                 vnic->mru = bp->eth_dev->data->mtu + ETHER_HDR_LEN +
1468                                         ETHER_CRC_LEN + VLAN_TAG_SIZE * 2;
1469                 rc = bnxt_hwrm_vnic_cfg(bp, vnic);
1470                 if (rc)
1471                         break;
1472
1473                 rc = bnxt_hwrm_vnic_plcmode_cfg(bp, vnic);
1474                 if (rc)
1475                         return rc;
1476         }
1477
1478         return rc;
1479 }
1480
1481 static int
1482 bnxt_vlan_pvid_set_op(struct rte_eth_dev *dev, uint16_t pvid, int on)
1483 {
1484         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1485         uint16_t vlan = bp->vlan;
1486         int rc;
1487
1488         if (BNXT_NPAR_PF(bp) || BNXT_VF(bp)) {
1489                 RTE_LOG(ERR, PMD,
1490                         "PVID cannot be modified for this function\n");
1491                 return -ENOTSUP;
1492         }
1493         bp->vlan = on ? pvid : 0;
1494
1495         rc = bnxt_hwrm_set_default_vlan(bp, 0, 0);
1496         if (rc)
1497                 bp->vlan = vlan;
1498         return rc;
1499 }
1500
1501 static int
1502 bnxt_dev_led_on_op(struct rte_eth_dev *dev)
1503 {
1504         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1505
1506         return bnxt_hwrm_port_led_cfg(bp, true);
1507 }
1508
1509 static int
1510 bnxt_dev_led_off_op(struct rte_eth_dev *dev)
1511 {
1512         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1513
1514         return bnxt_hwrm_port_led_cfg(bp, false);
1515 }
1516
1517 /*
1518  * Initialization
1519  */
1520
1521 static const struct eth_dev_ops bnxt_dev_ops = {
1522         .dev_infos_get = bnxt_dev_info_get_op,
1523         .dev_close = bnxt_dev_close_op,
1524         .dev_configure = bnxt_dev_configure_op,
1525         .dev_start = bnxt_dev_start_op,
1526         .dev_stop = bnxt_dev_stop_op,
1527         .dev_set_link_up = bnxt_dev_set_link_up_op,
1528         .dev_set_link_down = bnxt_dev_set_link_down_op,
1529         .stats_get = bnxt_stats_get_op,
1530         .stats_reset = bnxt_stats_reset_op,
1531         .rx_queue_setup = bnxt_rx_queue_setup_op,
1532         .rx_queue_release = bnxt_rx_queue_release_op,
1533         .tx_queue_setup = bnxt_tx_queue_setup_op,
1534         .tx_queue_release = bnxt_tx_queue_release_op,
1535         .reta_update = bnxt_reta_update_op,
1536         .reta_query = bnxt_reta_query_op,
1537         .rss_hash_update = bnxt_rss_hash_update_op,
1538         .rss_hash_conf_get = bnxt_rss_hash_conf_get_op,
1539         .link_update = bnxt_link_update_op,
1540         .promiscuous_enable = bnxt_promiscuous_enable_op,
1541         .promiscuous_disable = bnxt_promiscuous_disable_op,
1542         .allmulticast_enable = bnxt_allmulticast_enable_op,
1543         .allmulticast_disable = bnxt_allmulticast_disable_op,
1544         .mac_addr_add = bnxt_mac_addr_add_op,
1545         .mac_addr_remove = bnxt_mac_addr_remove_op,
1546         .flow_ctrl_get = bnxt_flow_ctrl_get_op,
1547         .flow_ctrl_set = bnxt_flow_ctrl_set_op,
1548         .udp_tunnel_port_add  = bnxt_udp_tunnel_port_add_op,
1549         .udp_tunnel_port_del  = bnxt_udp_tunnel_port_del_op,
1550         .vlan_filter_set = bnxt_vlan_filter_set_op,
1551         .vlan_offload_set = bnxt_vlan_offload_set_op,
1552         .vlan_pvid_set = bnxt_vlan_pvid_set_op,
1553         .mtu_set = bnxt_mtu_set_op,
1554         .mac_addr_set = bnxt_set_default_mac_addr_op,
1555         .xstats_get = bnxt_dev_xstats_get_op,
1556         .xstats_get_names = bnxt_dev_xstats_get_names_op,
1557         .xstats_reset = bnxt_dev_xstats_reset_op,
1558         .fw_version_get = bnxt_fw_version_get,
1559         .set_mc_addr_list = bnxt_dev_set_mc_addr_list_op,
1560         .rxq_info_get = bnxt_rxq_info_get_op,
1561         .txq_info_get = bnxt_txq_info_get_op,
1562         .dev_led_on = bnxt_dev_led_on_op,
1563         .dev_led_off = bnxt_dev_led_off_op,
1564 };
1565
1566 static bool bnxt_vf_pciid(uint16_t id)
1567 {
1568         if (id == BROADCOM_DEV_ID_57304_VF ||
1569             id == BROADCOM_DEV_ID_57406_VF ||
1570             id == BROADCOM_DEV_ID_5731X_VF ||
1571             id == BROADCOM_DEV_ID_5741X_VF ||
1572             id == BROADCOM_DEV_ID_57414_VF)
1573                 return true;
1574         return false;
1575 }
1576
1577 static int bnxt_init_board(struct rte_eth_dev *eth_dev)
1578 {
1579         struct bnxt *bp = eth_dev->data->dev_private;
1580         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
1581         int rc;
1582
1583         /* enable device (incl. PCI PM wakeup), and bus-mastering */
1584         if (!pci_dev->mem_resource[0].addr) {
1585                 RTE_LOG(ERR, PMD,
1586                         "Cannot find PCI device base address, aborting\n");
1587                 rc = -ENODEV;
1588                 goto init_err_disable;
1589         }
1590
1591         bp->eth_dev = eth_dev;
1592         bp->pdev = pci_dev;
1593
1594         bp->bar0 = (void *)pci_dev->mem_resource[0].addr;
1595         if (!bp->bar0) {
1596                 RTE_LOG(ERR, PMD, "Cannot map device registers, aborting\n");
1597                 rc = -ENOMEM;
1598                 goto init_err_release;
1599         }
1600         return 0;
1601
1602 init_err_release:
1603         if (bp->bar0)
1604                 bp->bar0 = NULL;
1605
1606 init_err_disable:
1607
1608         return rc;
1609 }
1610
1611 static int bnxt_dev_uninit(struct rte_eth_dev *eth_dev);
1612
1613 #define ALLOW_FUNC(x)   \
1614         { \
1615                 typeof(x) arg = (x); \
1616                 bp->pf.vf_req_fwd[((arg) >> 5)] &= \
1617                 ~rte_cpu_to_le_32(1 << ((arg) & 0x1f)); \
1618         }
1619 static int
1620 bnxt_dev_init(struct rte_eth_dev *eth_dev)
1621 {
1622         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
1623         char mz_name[RTE_MEMZONE_NAMESIZE];
1624         const struct rte_memzone *mz = NULL;
1625         static int version_printed;
1626         uint32_t total_alloc_len;
1627         phys_addr_t mz_phys_addr;
1628         struct bnxt *bp;
1629         int rc;
1630
1631         if (version_printed++ == 0)
1632                 RTE_LOG(INFO, PMD, "%s\n", bnxt_version);
1633
1634         rte_eth_copy_pci_info(eth_dev, pci_dev);
1635         eth_dev->data->dev_flags |= RTE_ETH_DEV_DETACHABLE;
1636
1637         bp = eth_dev->data->dev_private;
1638
1639         rte_atomic64_init(&bp->rx_mbuf_alloc_fail);
1640         bp->dev_stopped = 1;
1641
1642         if (bnxt_vf_pciid(pci_dev->id.device_id))
1643                 bp->flags |= BNXT_FLAG_VF;
1644
1645         rc = bnxt_init_board(eth_dev);
1646         if (rc) {
1647                 RTE_LOG(ERR, PMD,
1648                         "Board initialization failed rc: %x\n", rc);
1649                 goto error;
1650         }
1651         eth_dev->dev_ops = &bnxt_dev_ops;
1652         eth_dev->rx_pkt_burst = &bnxt_recv_pkts;
1653         eth_dev->tx_pkt_burst = &bnxt_xmit_pkts;
1654
1655         if (BNXT_PF(bp) && pci_dev->id.device_id != BROADCOM_DEV_ID_NS2) {
1656                 snprintf(mz_name, RTE_MEMZONE_NAMESIZE,
1657                          "bnxt_%04x:%02x:%02x:%02x-%s", pci_dev->addr.domain,
1658                          pci_dev->addr.bus, pci_dev->addr.devid,
1659                          pci_dev->addr.function, "rx_port_stats");
1660                 mz_name[RTE_MEMZONE_NAMESIZE - 1] = 0;
1661                 mz = rte_memzone_lookup(mz_name);
1662                 total_alloc_len = RTE_CACHE_LINE_ROUNDUP(
1663                                 sizeof(struct rx_port_stats) + 512);
1664                 if (!mz) {
1665                         mz = rte_memzone_reserve(mz_name, total_alloc_len,
1666                                                  SOCKET_ID_ANY,
1667                                                  RTE_MEMZONE_2MB |
1668                                                  RTE_MEMZONE_SIZE_HINT_ONLY);
1669                         if (mz == NULL)
1670                                 return -ENOMEM;
1671                 }
1672                 memset(mz->addr, 0, mz->len);
1673                 mz_phys_addr = mz->phys_addr;
1674                 if ((unsigned long)mz->addr == mz_phys_addr) {
1675                         RTE_LOG(WARNING, PMD,
1676                                 "Memzone physical address same as virtual.\n");
1677                         RTE_LOG(WARNING, PMD,
1678                                 "Using rte_mem_virt2phy()\n");
1679                         mz_phys_addr = rte_mem_virt2phy(mz->addr);
1680                         if (mz_phys_addr == 0) {
1681                                 RTE_LOG(ERR, PMD,
1682                                 "unable to map address to physical memory\n");
1683                                 return -ENOMEM;
1684                         }
1685                 }
1686
1687                 bp->rx_mem_zone = (const void *)mz;
1688                 bp->hw_rx_port_stats = mz->addr;
1689                 bp->hw_rx_port_stats_map = mz_phys_addr;
1690
1691                 snprintf(mz_name, RTE_MEMZONE_NAMESIZE,
1692                          "bnxt_%04x:%02x:%02x:%02x-%s", pci_dev->addr.domain,
1693                          pci_dev->addr.bus, pci_dev->addr.devid,
1694                          pci_dev->addr.function, "tx_port_stats");
1695                 mz_name[RTE_MEMZONE_NAMESIZE - 1] = 0;
1696                 mz = rte_memzone_lookup(mz_name);
1697                 total_alloc_len = RTE_CACHE_LINE_ROUNDUP(
1698                                 sizeof(struct tx_port_stats) + 512);
1699                 if (!mz) {
1700                         mz = rte_memzone_reserve(mz_name, total_alloc_len,
1701                                                  SOCKET_ID_ANY,
1702                                                  RTE_MEMZONE_2MB |
1703                                                  RTE_MEMZONE_SIZE_HINT_ONLY);
1704                         if (mz == NULL)
1705                                 return -ENOMEM;
1706                 }
1707                 memset(mz->addr, 0, mz->len);
1708                 mz_phys_addr = mz->phys_addr;
1709                 if ((unsigned long)mz->addr == mz_phys_addr) {
1710                         RTE_LOG(WARNING, PMD,
1711                                 "Memzone physical address same as virtual.\n");
1712                         RTE_LOG(WARNING, PMD,
1713                                 "Using rte_mem_virt2phy()\n");
1714                         mz_phys_addr = rte_mem_virt2phy(mz->addr);
1715                         if (mz_phys_addr == 0) {
1716                                 RTE_LOG(ERR, PMD,
1717                                 "unable to map address to physical memory\n");
1718                                 return -ENOMEM;
1719                         }
1720                 }
1721
1722                 bp->tx_mem_zone = (const void *)mz;
1723                 bp->hw_tx_port_stats = mz->addr;
1724                 bp->hw_tx_port_stats_map = mz_phys_addr;
1725
1726                 bp->flags |= BNXT_FLAG_PORT_STATS;
1727         }
1728
1729         rc = bnxt_alloc_hwrm_resources(bp);
1730         if (rc) {
1731                 RTE_LOG(ERR, PMD,
1732                         "hwrm resource allocation failure rc: %x\n", rc);
1733                 goto error_free;
1734         }
1735         rc = bnxt_hwrm_ver_get(bp);
1736         if (rc)
1737                 goto error_free;
1738         bnxt_hwrm_queue_qportcfg(bp);
1739
1740         bnxt_hwrm_func_qcfg(bp);
1741
1742         /* Get the MAX capabilities for this function */
1743         rc = bnxt_hwrm_func_qcaps(bp);
1744         if (rc) {
1745                 RTE_LOG(ERR, PMD, "hwrm query capability failure rc: %x\n", rc);
1746                 goto error_free;
1747         }
1748         if (bp->max_tx_rings == 0) {
1749                 RTE_LOG(ERR, PMD, "No TX rings available!\n");
1750                 rc = -EBUSY;
1751                 goto error_free;
1752         }
1753         eth_dev->data->mac_addrs = rte_zmalloc("bnxt_mac_addr_tbl",
1754                                         ETHER_ADDR_LEN * MAX_NUM_MAC_ADDR, 0);
1755         if (eth_dev->data->mac_addrs == NULL) {
1756                 RTE_LOG(ERR, PMD,
1757                         "Failed to alloc %u bytes needed to store MAC addr tbl",
1758                         ETHER_ADDR_LEN * MAX_NUM_MAC_ADDR);
1759                 rc = -ENOMEM;
1760                 goto error_free;
1761         }
1762         /* Copy the permanent MAC from the qcap response address now. */
1763         memcpy(bp->mac_addr, bp->dflt_mac_addr, sizeof(bp->mac_addr));
1764         memcpy(&eth_dev->data->mac_addrs[0], bp->mac_addr, ETHER_ADDR_LEN);
1765         bp->grp_info = rte_zmalloc("bnxt_grp_info",
1766                                 sizeof(*bp->grp_info) * bp->max_ring_grps, 0);
1767         if (!bp->grp_info) {
1768                 RTE_LOG(ERR, PMD,
1769                         "Failed to alloc %zu bytes needed to store group info table\n",
1770                         sizeof(*bp->grp_info) * bp->max_ring_grps);
1771                 rc = -ENOMEM;
1772                 goto error_free;
1773         }
1774
1775         /* Forward all requests if firmware is new enough */
1776         if (((bp->fw_ver >= ((20 << 24) | (6 << 16) | (100 << 8))) &&
1777             (bp->fw_ver < ((20 << 24) | (7 << 16)))) ||
1778             ((bp->fw_ver >= ((20 << 24) | (8 << 16))))) {
1779                 memset(bp->pf.vf_req_fwd, 0xff, sizeof(bp->pf.vf_req_fwd));
1780         } else {
1781                 RTE_LOG(WARNING, PMD,
1782                         "Firmware too old for VF mailbox functionality\n");
1783                 memset(bp->pf.vf_req_fwd, 0, sizeof(bp->pf.vf_req_fwd));
1784         }
1785
1786         /*
1787          * The following are used for driver cleanup.  If we disallow these,
1788          * VF drivers can't clean up cleanly.
1789          */
1790         ALLOW_FUNC(HWRM_FUNC_DRV_UNRGTR);
1791         ALLOW_FUNC(HWRM_VNIC_FREE);
1792         ALLOW_FUNC(HWRM_RING_FREE);
1793         ALLOW_FUNC(HWRM_RING_GRP_FREE);
1794         ALLOW_FUNC(HWRM_VNIC_RSS_COS_LB_CTX_FREE);
1795         ALLOW_FUNC(HWRM_CFA_L2_FILTER_FREE);
1796         ALLOW_FUNC(HWRM_STAT_CTX_FREE);
1797         rc = bnxt_hwrm_func_driver_register(bp);
1798         if (rc) {
1799                 RTE_LOG(ERR, PMD,
1800                         "Failed to register driver");
1801                 rc = -EBUSY;
1802                 goto error_free;
1803         }
1804
1805         RTE_LOG(INFO, PMD,
1806                 DRV_MODULE_NAME " found at mem %" PRIx64 ", node addr %pM\n",
1807                 pci_dev->mem_resource[0].phys_addr,
1808                 pci_dev->mem_resource[0].addr);
1809
1810         rc = bnxt_hwrm_func_reset(bp);
1811         if (rc) {
1812                 RTE_LOG(ERR, PMD, "hwrm chip reset failure rc: %x\n", rc);
1813                 rc = -1;
1814                 goto error_free;
1815         }
1816
1817         if (BNXT_PF(bp)) {
1818                 //if (bp->pf.active_vfs) {
1819                         // TODO: Deallocate VF resources?
1820                 //}
1821                 if (bp->pdev->max_vfs) {
1822                         rc = bnxt_hwrm_allocate_vfs(bp, bp->pdev->max_vfs);
1823                         if (rc) {
1824                                 RTE_LOG(ERR, PMD, "Failed to allocate VFs\n");
1825                                 goto error_free;
1826                         }
1827                 } else {
1828                         rc = bnxt_hwrm_allocate_pf_only(bp);
1829                         if (rc) {
1830                                 RTE_LOG(ERR, PMD,
1831                                         "Failed to allocate PF resources\n");
1832                                 goto error_free;
1833                         }
1834                 }
1835         }
1836
1837         bnxt_hwrm_port_led_qcaps(bp);
1838
1839         rc = bnxt_setup_int(bp);
1840         if (rc)
1841                 goto error_free;
1842
1843         rc = bnxt_alloc_mem(bp);
1844         if (rc)
1845                 goto error_free_int;
1846
1847         rc = bnxt_request_int(bp);
1848         if (rc)
1849                 goto error_free_int;
1850
1851         rc = bnxt_alloc_def_cp_ring(bp);
1852         if (rc)
1853                 goto error_free_int;
1854
1855         bnxt_enable_int(bp);
1856
1857         return 0;
1858
1859 error_free_int:
1860         bnxt_disable_int(bp);
1861         bnxt_free_def_cp_ring(bp);
1862         bnxt_hwrm_func_buf_unrgtr(bp);
1863         bnxt_free_int(bp);
1864         bnxt_free_mem(bp);
1865 error_free:
1866         bnxt_dev_uninit(eth_dev);
1867 error:
1868         return rc;
1869 }
1870
1871 static int
1872 bnxt_dev_uninit(struct rte_eth_dev *eth_dev) {
1873         struct bnxt *bp = eth_dev->data->dev_private;
1874         int rc;
1875
1876         bnxt_disable_int(bp);
1877         bnxt_free_int(bp);
1878         bnxt_free_mem(bp);
1879         if (eth_dev->data->mac_addrs != NULL) {
1880                 rte_free(eth_dev->data->mac_addrs);
1881                 eth_dev->data->mac_addrs = NULL;
1882         }
1883         if (bp->grp_info != NULL) {
1884                 rte_free(bp->grp_info);
1885                 bp->grp_info = NULL;
1886         }
1887         rc = bnxt_hwrm_func_driver_unregister(bp, 0);
1888         bnxt_free_hwrm_resources(bp);
1889         rte_memzone_free((const struct rte_memzone *)bp->tx_mem_zone);
1890         rte_memzone_free((const struct rte_memzone *)bp->rx_mem_zone);
1891         if (bp->dev_stopped == 0)
1892                 bnxt_dev_close_op(eth_dev);
1893         if (bp->pf.vf_info)
1894                 rte_free(bp->pf.vf_info);
1895         eth_dev->dev_ops = NULL;
1896         eth_dev->rx_pkt_burst = NULL;
1897         eth_dev->tx_pkt_burst = NULL;
1898
1899         return rc;
1900 }
1901
1902 static int bnxt_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
1903         struct rte_pci_device *pci_dev)
1904 {
1905         return rte_eth_dev_pci_generic_probe(pci_dev, sizeof(struct bnxt),
1906                 bnxt_dev_init);
1907 }
1908
1909 static int bnxt_pci_remove(struct rte_pci_device *pci_dev)
1910 {
1911         return rte_eth_dev_pci_generic_remove(pci_dev, bnxt_dev_uninit);
1912 }
1913
1914 static struct rte_pci_driver bnxt_rte_pmd = {
1915         .id_table = bnxt_pci_id_map,
1916         .drv_flags = RTE_PCI_DRV_NEED_MAPPING |
1917                 RTE_PCI_DRV_INTR_LSC,
1918         .probe = bnxt_pci_probe,
1919         .remove = bnxt_pci_remove,
1920 };
1921
1922 static bool
1923 is_device_supported(struct rte_eth_dev *dev, struct rte_pci_driver *drv)
1924 {
1925         if (strcmp(dev->data->drv_name, drv->driver.name))
1926                 return false;
1927
1928         return true;
1929 }
1930
1931 bool is_bnxt_supported(struct rte_eth_dev *dev)
1932 {
1933         return is_device_supported(dev, &bnxt_rte_pmd);
1934 }
1935
1936 RTE_PMD_REGISTER_PCI(net_bnxt, bnxt_rte_pmd);
1937 RTE_PMD_REGISTER_PCI_TABLE(net_bnxt, bnxt_pci_id_map);
1938 RTE_PMD_REGISTER_KMOD_DEP(net_bnxt, "* igb_uio | uio_pci_generic | vfio-pci");