drivers/net/bnxt/bnxt_ethdev.c

   1 /*-
   2  *   BSD LICENSE
   3  *
   4  *   Copyright(c) Broadcom Limited.
   5  *   All rights reserved.
   6  *
   7  *   Redistribution and use in source and binary forms, with or without
   8  *   modification, are permitted provided that the following conditions
   9  *   are met:
  10  *
  11  *     * Redistributions of source code must retain the above copyright
  12  *       notice, this list of conditions and the following disclaimer.
  13  *     * Redistributions in binary form must reproduce the above copyright
  14  *       notice, this list of conditions and the following disclaimer in
  15  *       the documentation and/or other materials provided with the
  16  *       distribution.
  17  *     * Neither the name of Broadcom Corporation nor the names of its
  18  *       contributors may be used to endorse or promote products derived
  19  *       from this software without specific prior written permission.
  20  *
  21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32  */
  33
  34 #include <inttypes.h>
  35 #include <stdbool.h>
  36
  37 #include <rte_dev.h>
  38 #include <rte_ethdev.h>
  39 #include <rte_ethdev_pci.h>
  40 #include <rte_malloc.h>
  41 #include <rte_cycles.h>
  42
  43 #include "bnxt.h"
  44 #include "bnxt_cpr.h"
  45 #include "bnxt_filter.h"
  46 #include "bnxt_hwrm.h"
  47 #include "bnxt_irq.h"
  48 #include "bnxt_ring.h"
  49 #include "bnxt_rxq.h"
  50 #include "bnxt_rxr.h"
  51 #include "bnxt_stats.h"
  52 #include "bnxt_txq.h"
  53 #include "bnxt_txr.h"
  54 #include "bnxt_vnic.h"
  55 #include "hsi_struct_def_dpdk.h"
  56 #include "bnxt_nvm_defs.h"
  57
  58 #define DRV_MODULE_NAME         "bnxt"
  59 static const char bnxt_version[] =
  60         "Broadcom Cumulus driver " DRV_MODULE_NAME "\n";
  61
  62 #define PCI_VENDOR_ID_BROADCOM 0x14E4
  63
  64 #define BROADCOM_DEV_ID_STRATUS_NIC_VF 0x1609
  65 #define BROADCOM_DEV_ID_STRATUS_NIC 0x1614
  66 #define BROADCOM_DEV_ID_57414_VF 0x16c1
  67 #define BROADCOM_DEV_ID_57301 0x16c8
  68 #define BROADCOM_DEV_ID_57302 0x16c9
  69 #define BROADCOM_DEV_ID_57304_PF 0x16ca
  70 #define BROADCOM_DEV_ID_57304_VF 0x16cb
  71 #define BROADCOM_DEV_ID_57417_MF 0x16cc
  72 #define BROADCOM_DEV_ID_NS2 0x16cd
  73 #define BROADCOM_DEV_ID_57311 0x16ce
  74 #define BROADCOM_DEV_ID_57312 0x16cf
  75 #define BROADCOM_DEV_ID_57402 0x16d0
  76 #define BROADCOM_DEV_ID_57404 0x16d1
  77 #define BROADCOM_DEV_ID_57406_PF 0x16d2
  78 #define BROADCOM_DEV_ID_57406_VF 0x16d3
  79 #define BROADCOM_DEV_ID_57402_MF 0x16d4
  80 #define BROADCOM_DEV_ID_57407_RJ45 0x16d5
  81 #define BROADCOM_DEV_ID_57412 0x16d6
  82 #define BROADCOM_DEV_ID_57414 0x16d7
  83 #define BROADCOM_DEV_ID_57416_RJ45 0x16d8
  84 #define BROADCOM_DEV_ID_57417_RJ45 0x16d9
  85 #define BROADCOM_DEV_ID_5741X_VF 0x16dc
  86 #define BROADCOM_DEV_ID_57412_MF 0x16de
  87 #define BROADCOM_DEV_ID_57314 0x16df
  88 #define BROADCOM_DEV_ID_57317_RJ45 0x16e0
  89 #define BROADCOM_DEV_ID_5731X_VF 0x16e1
  90 #define BROADCOM_DEV_ID_57417_SFP 0x16e2
  91 #define BROADCOM_DEV_ID_57416_SFP 0x16e3
  92 #define BROADCOM_DEV_ID_57317_SFP 0x16e4
  93 #define BROADCOM_DEV_ID_57404_MF 0x16e7
  94 #define BROADCOM_DEV_ID_57406_MF 0x16e8
  95 #define BROADCOM_DEV_ID_57407_SFP 0x16e9
  96 #define BROADCOM_DEV_ID_57407_MF 0x16ea
  97 #define BROADCOM_DEV_ID_57414_MF 0x16ec
  98 #define BROADCOM_DEV_ID_57416_MF 0x16ee
  99
 100 static const struct rte_pci_id bnxt_pci_id_map[] = {
 101         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM,
 102                          BROADCOM_DEV_ID_STRATUS_NIC_VF) },
 103         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_STRATUS_NIC) },
 104         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57414_VF) },
 105         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57301) },
 106         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57302) },
 107         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57304_PF) },
 108         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57304_VF) },
 109         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_NS2) },
 110         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57402) },
 111         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57404) },
 112         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57406_PF) },
 113         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57406_VF) },
 114         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57402_MF) },
 115         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57407_RJ45) },
 116         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57404_MF) },
 117         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57406_MF) },
 118         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57407_SFP) },
 119         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57407_MF) },
 120         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_5741X_VF) },
 121         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_5731X_VF) },
 122         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57314) },
 123         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57417_MF) },
 124         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57311) },
 125         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57312) },
 126         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57412) },
 127         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57414) },
 128         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57416_RJ45) },
 129         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57417_RJ45) },
 130         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57412_MF) },
 131         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57317_RJ45) },
 132         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57417_SFP) },
 133         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57416_SFP) },
 134         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57317_SFP) },
 135         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57414_MF) },
 136         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57416_MF) },
 137         { .vendor_id = 0, /* sentinel */ },
 138 };
 139
 140 #define BNXT_ETH_RSS_SUPPORT (  \
 141         ETH_RSS_IPV4 |          \
 142         ETH_RSS_NONFRAG_IPV4_TCP |      \
 143         ETH_RSS_NONFRAG_IPV4_UDP |      \
 144         ETH_RSS_IPV6 |          \
 145         ETH_RSS_NONFRAG_IPV6_TCP |      \
 146         ETH_RSS_NONFRAG_IPV6_UDP)
 147
 148 static void bnxt_vlan_offload_set_op(struct rte_eth_dev *dev, int mask);
 149
 150 /***********************/
 151
 152 /*
 153  * High level utility functions
 154  */
 155
 156 static void bnxt_free_mem(struct bnxt *bp)
 157 {
 158         bnxt_free_filter_mem(bp);
 159         bnxt_free_vnic_attributes(bp);
 160         bnxt_free_vnic_mem(bp);
 161
 162         bnxt_free_stats(bp);
 163         bnxt_free_tx_rings(bp);
 164         bnxt_free_rx_rings(bp);
 165         bnxt_free_def_cp_ring(bp);
 166 }
 167
 168 static int bnxt_alloc_mem(struct bnxt *bp)
 169 {
 170         int rc;
 171
 172         /* Default completion ring */
 173         rc = bnxt_init_def_ring_struct(bp, SOCKET_ID_ANY);
 174         if (rc)
 175                 goto alloc_mem_err;
 176
 177         rc = bnxt_alloc_rings(bp, 0, NULL, NULL,
 178                               bp->def_cp_ring, "def_cp");
 179         if (rc)
 180                 goto alloc_mem_err;
 181
 182         rc = bnxt_alloc_vnic_mem(bp);
 183         if (rc)
 184                 goto alloc_mem_err;
 185
 186         rc = bnxt_alloc_vnic_attributes(bp);
 187         if (rc)
 188                 goto alloc_mem_err;
 189
 190         rc = bnxt_alloc_filter_mem(bp);
 191         if (rc)
 192                 goto alloc_mem_err;
 193
 194         return 0;
 195
 196 alloc_mem_err:
 197         bnxt_free_mem(bp);
 198         return rc;
 199 }
 200
 201 static int bnxt_init_chip(struct bnxt *bp)
 202 {
 203         unsigned int i, rss_idx, fw_idx;
 204         struct rte_eth_link new;
 205         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(bp->eth_dev);
 206         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
 207         uint32_t intr_vector = 0;
 208         uint32_t queue_id, base = BNXT_MISC_VEC_ID;
 209         uint32_t vec = BNXT_MISC_VEC_ID;
 210         int rc;
 211
 212         /* disable uio/vfio intr/eventfd mapping */
 213         rte_intr_disable(intr_handle);
 214
 215         if (bp->eth_dev->data->mtu > ETHER_MTU) {
 216                 bp->eth_dev->data->dev_conf.rxmode.jumbo_frame = 1;
 217                 bp->flags |= BNXT_FLAG_JUMBO;
 218         } else {
 219                 bp->eth_dev->data->dev_conf.rxmode.jumbo_frame = 0;
 220                 bp->flags &= ~BNXT_FLAG_JUMBO;
 221         }
 222
 223         rc = bnxt_alloc_all_hwrm_stat_ctxs(bp);
 224         if (rc) {
 225                 RTE_LOG(ERR, PMD, "HWRM stat ctx alloc failure rc: %x\n", rc);
 226                 goto err_out;
 227         }
 228
 229         rc = bnxt_alloc_hwrm_rings(bp);
 230         if (rc) {
 231                 RTE_LOG(ERR, PMD, "HWRM ring alloc failure rc: %x\n", rc);
 232                 goto err_out;
 233         }
 234
 235         rc = bnxt_alloc_all_hwrm_ring_grps(bp);
 236         if (rc) {
 237                 RTE_LOG(ERR, PMD, "HWRM ring grp alloc failure: %x\n", rc);
 238                 goto err_out;
 239         }
 240
 241         rc = bnxt_mq_rx_configure(bp);
 242         if (rc) {
 243                 RTE_LOG(ERR, PMD, "MQ mode configure failure rc: %x\n", rc);
 244                 goto err_out;
 245         }
 246
 247         /* VNIC configuration */
 248         for (i = 0; i < bp->nr_vnics; i++) {
 249                 struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
 250
 251                 rc = bnxt_hwrm_vnic_alloc(bp, vnic);
 252                 if (rc) {
 253                         RTE_LOG(ERR, PMD, "HWRM vnic %d alloc failure rc: %x\n",
 254                                 i, rc);
 255                         goto err_out;
 256                 }
 257
 258                 rc = bnxt_hwrm_vnic_ctx_alloc(bp, vnic);
 259                 if (rc) {
 260                         RTE_LOG(ERR, PMD,
 261                                 "HWRM vnic %d ctx alloc failure rc: %x\n",
 262                                 i, rc);
 263                         goto err_out;
 264                 }
 265
 266                 rc = bnxt_hwrm_vnic_cfg(bp, vnic);
 267                 if (rc) {
 268                         RTE_LOG(ERR, PMD, "HWRM vnic %d cfg failure rc: %x\n",
 269                                 i, rc);
 270                         goto err_out;
 271                 }
 272
 273                 rc = bnxt_set_hwrm_vnic_filters(bp, vnic);
 274                 if (rc) {
 275                         RTE_LOG(ERR, PMD,
 276                                 "HWRM vnic %d filter failure rc: %x\n",
 277                                 i, rc);
 278                         goto err_out;
 279                 }
 280                 if (vnic->rss_table && vnic->hash_type) {
 281                         /*
 282                          * Fill the RSS hash & redirection table with
 283                          * ring group ids for all VNICs
 284                          */
 285                         for (rss_idx = 0, fw_idx = 0;
 286                              rss_idx < HW_HASH_INDEX_SIZE;
 287                              rss_idx++, fw_idx++) {
 288                                 if (vnic->fw_grp_ids[fw_idx] ==
 289                                     INVALID_HW_RING_ID)
 290                                         fw_idx = 0;
 291                                 vnic->rss_table[rss_idx] =
 292                                                 vnic->fw_grp_ids[fw_idx];
 293                         }
 294                         rc = bnxt_hwrm_vnic_rss_cfg(bp, vnic);
 295                         if (rc) {
 296                                 RTE_LOG(ERR, PMD,
 297                                         "HWRM vnic %d set RSS failure rc: %x\n",
 298                                         i, rc);
 299                                 goto err_out;
 300                         }
 301                 }
 302
 303                 bnxt_hwrm_vnic_plcmode_cfg(bp, vnic);
 304
 305                 if (bp->eth_dev->data->dev_conf.rxmode.enable_lro)
 306                         bnxt_hwrm_vnic_tpa_cfg(bp, vnic, 1);
 307                 else
 308                         bnxt_hwrm_vnic_tpa_cfg(bp, vnic, 0);
 309         }
 310         rc = bnxt_hwrm_cfa_l2_set_rx_mask(bp, &bp->vnic_info[0], 0, NULL);
 311         if (rc) {
 312                 RTE_LOG(ERR, PMD,
 313                         "HWRM cfa l2 rx mask failure rc: %x\n", rc);
 314                 goto err_out;
 315         }
 316
 317         /* check and configure queue intr-vector mapping */
 318         if ((rte_intr_cap_multiple(intr_handle) ||
 319              !RTE_ETH_DEV_SRIOV(bp->eth_dev).active) &&
 320             bp->eth_dev->data->dev_conf.intr_conf.rxq != 0) {
 321                 intr_vector = bp->eth_dev->data->nb_rx_queues;
 322                 RTE_LOG(INFO, PMD, "%s(): intr_vector = %d\n", __func__,
 323                         intr_vector);
 324                 if (intr_vector > bp->rx_cp_nr_rings) {
 325                         RTE_LOG(ERR, PMD, "At most %d intr queues supported",
 326                                         bp->rx_cp_nr_rings);
 327                         return -ENOTSUP;
 328                 }
 329                 if (rte_intr_efd_enable(intr_handle, intr_vector))
 330                         return -1;
 331         }
 332
 333         if (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) {
 334                 intr_handle->intr_vec =
 335                         rte_zmalloc("intr_vec",
 336                                     bp->eth_dev->data->nb_rx_queues *
 337                                     sizeof(int), 0);
 338                 if (intr_handle->intr_vec == NULL) {
 339                         RTE_LOG(ERR, PMD, "Failed to allocate %d rx_queues"
 340                                 " intr_vec", bp->eth_dev->data->nb_rx_queues);
 341                         return -ENOMEM;
 342                 }
 343                 RTE_LOG(DEBUG, PMD, "%s(): intr_handle->intr_vec = %p "
 344                         "intr_handle->nb_efd = %d intr_handle->max_intr = %d\n",
 345                          __func__, intr_handle->intr_vec, intr_handle->nb_efd,
 346                         intr_handle->max_intr);
 347         }
 348
 349         for (queue_id = 0; queue_id < bp->eth_dev->data->nb_rx_queues;
 350              queue_id++) {
 351                 intr_handle->intr_vec[queue_id] = vec;
 352                 if (vec < base + intr_handle->nb_efd - 1)
 353                         vec++;
 354         }
 355
 356         /* enable uio/vfio intr/eventfd mapping */
 357         rte_intr_enable(intr_handle);
 358
 359         rc = bnxt_get_hwrm_link_config(bp, &new);
 360         if (rc) {
 361                 RTE_LOG(ERR, PMD, "HWRM Get link config failure rc: %x\n", rc);
 362                 goto err_out;
 363         }
 364
 365         if (!bp->link_info.link_up) {
 366                 rc = bnxt_set_hwrm_link_config(bp, true);
 367                 if (rc) {
 368                         RTE_LOG(ERR, PMD,
 369                                 "HWRM link config failure rc: %x\n", rc);
 370                         goto err_out;
 371                 }
 372         }
 373
 374         return 0;
 375
 376 err_out:
 377         bnxt_free_all_hwrm_resources(bp);
 378
 379         return rc;
 380 }
 381
 382 static int bnxt_shutdown_nic(struct bnxt *bp)
 383 {
 384         bnxt_free_all_hwrm_resources(bp);
 385         bnxt_free_all_filters(bp);
 386         bnxt_free_all_vnics(bp);
 387         return 0;
 388 }
 389
 390 static int bnxt_init_nic(struct bnxt *bp)
 391 {
 392         int rc;
 393
 394         bnxt_init_ring_grps(bp);
 395         bnxt_init_vnics(bp);
 396         bnxt_init_filters(bp);
 397
 398         rc = bnxt_init_chip(bp);
 399         if (rc)
 400                 return rc;
 401
 402         return 0;
 403 }
 404
 405 /*
 406  * Device configuration and status function
 407  */
 408
 409 static void bnxt_dev_info_get_op(struct rte_eth_dev *eth_dev,
 410                                   struct rte_eth_dev_info *dev_info)
 411 {
 412         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 413         uint16_t max_vnics, i, j, vpool, vrxq;
 414         unsigned int max_rx_rings;
 415
 416         dev_info->pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
 417
 418         /* MAC Specifics */
 419         dev_info->max_mac_addrs = bp->max_l2_ctx;
 420         dev_info->max_hash_mac_addrs = 0;
 421
 422         /* PF/VF specifics */
 423         if (BNXT_PF(bp))
 424                 dev_info->max_vfs = bp->pdev->max_vfs;
 425         max_rx_rings = RTE_MIN(bp->max_vnics, RTE_MIN(bp->max_l2_ctx,
 426                                                 RTE_MIN(bp->max_rsscos_ctx,
 427                                                 bp->max_stat_ctx)));
 428         /* For the sake of symmetry, max_rx_queues = max_tx_queues */
 429         dev_info->max_rx_queues = max_rx_rings;
 430         dev_info->max_tx_queues = max_rx_rings;
 431         dev_info->reta_size = bp->max_rsscos_ctx;
 432         dev_info->hash_key_size = 40;
 433         max_vnics = bp->max_vnics;
 434
 435         /* Fast path specifics */
 436         dev_info->min_rx_bufsize = 1;
 437         dev_info->max_rx_pktlen = BNXT_MAX_MTU + ETHER_HDR_LEN + ETHER_CRC_LEN
 438                                   + VLAN_TAG_SIZE;
 439         dev_info->rx_offload_capa = DEV_RX_OFFLOAD_VLAN_STRIP |
 440                                         DEV_RX_OFFLOAD_IPV4_CKSUM |
 441                                         DEV_RX_OFFLOAD_UDP_CKSUM |
 442                                         DEV_RX_OFFLOAD_TCP_CKSUM |
 443                                         DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM;
 444         dev_info->tx_offload_capa = DEV_TX_OFFLOAD_VLAN_INSERT |
 445                                         DEV_TX_OFFLOAD_IPV4_CKSUM |
 446                                         DEV_TX_OFFLOAD_TCP_CKSUM |
 447                                         DEV_TX_OFFLOAD_UDP_CKSUM |
 448                                         DEV_TX_OFFLOAD_TCP_TSO |
 449                                         DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM |
 450                                         DEV_TX_OFFLOAD_VXLAN_TNL_TSO |
 451                                         DEV_TX_OFFLOAD_GRE_TNL_TSO |
 452                                         DEV_TX_OFFLOAD_IPIP_TNL_TSO |
 453                                         DEV_TX_OFFLOAD_GENEVE_TNL_TSO;
 454
 455         /* *INDENT-OFF* */
 456         dev_info->default_rxconf = (struct rte_eth_rxconf) {
 457                 .rx_thresh = {
 458                         .pthresh = 8,
 459                         .hthresh = 8,
 460                         .wthresh = 0,
 461                 },
 462                 .rx_free_thresh = 32,
 463                 .rx_drop_en = 0,
 464         };
 465
 466         dev_info->default_txconf = (struct rte_eth_txconf) {
 467                 .tx_thresh = {
 468                         .pthresh = 32,
 469                         .hthresh = 0,
 470                         .wthresh = 0,
 471                 },
 472                 .tx_free_thresh = 32,
 473                 .tx_rs_thresh = 32,
 474                 .txq_flags = ETH_TXQ_FLAGS_NOMULTSEGS |
 475                              ETH_TXQ_FLAGS_NOOFFLOADS,
 476         };
 477         eth_dev->data->dev_conf.intr_conf.lsc = 1;
 478
 479         eth_dev->data->dev_conf.intr_conf.rxq = 1;
 480
 481         /* *INDENT-ON* */
 482
 483         /*
 484          * TODO: default_rxconf, default_txconf, rx_desc_lim, and tx_desc_lim
 485          *       need further investigation.
 486          */
 487
 488         /* VMDq resources */
 489         vpool = 64; /* ETH_64_POOLS */
 490         vrxq = 128; /* ETH_VMDQ_DCB_NUM_QUEUES */
 491         for (i = 0; i < 4; vpool >>= 1, i++) {
 492                 if (max_vnics > vpool) {
 493                         for (j = 0; j < 5; vrxq >>= 1, j++) {
 494                                 if (dev_info->max_rx_queues > vrxq) {
 495                                         if (vpool > vrxq)
 496                                                 vpool = vrxq;
 497                                         goto found;
 498                                 }
 499                         }
 500                         /* Not enough resources to support VMDq */
 501                         break;
 502                 }
 503         }
 504         /* Not enough resources to support VMDq */
 505         vpool = 0;
 506         vrxq = 0;
 507 found:
 508         dev_info->max_vmdq_pools = vpool;
 509         dev_info->vmdq_queue_num = vrxq;
 510
 511         dev_info->vmdq_pool_base = 0;
 512         dev_info->vmdq_queue_base = 0;
 513 }
 514
 515 /* Configure the device based on the configuration provided */
 516 static int bnxt_dev_configure_op(struct rte_eth_dev *eth_dev)
 517 {
 518         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 519
 520         bp->rx_queues = (void *)eth_dev->data->rx_queues;
 521         bp->tx_queues = (void *)eth_dev->data->tx_queues;
 522
 523         /* Inherit new configurations */
 524         bp->rx_nr_rings = eth_dev->data->nb_rx_queues;
 525         bp->tx_nr_rings = eth_dev->data->nb_tx_queues;
 526         bp->rx_cp_nr_rings = bp->rx_nr_rings;
 527         bp->tx_cp_nr_rings = bp->tx_nr_rings;
 528
 529         if (eth_dev->data->dev_conf.rxmode.jumbo_frame)
 530                 eth_dev->data->mtu =
 531                                 eth_dev->data->dev_conf.rxmode.max_rx_pkt_len -
 532                                 ETHER_HDR_LEN - ETHER_CRC_LEN - VLAN_TAG_SIZE;
 533         return 0;
 534 }
 535
 536 static inline int
 537 rte_bnxt_atomic_write_link_status(struct rte_eth_dev *eth_dev,
 538                                 struct rte_eth_link *link)
 539 {
 540         struct rte_eth_link *dst = &eth_dev->data->dev_link;
 541         struct rte_eth_link *src = link;
 542
 543         if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
 544                                         *(uint64_t *)src) == 0)
 545                 return 1;
 546
 547         return 0;
 548 }
 549
 550 static void bnxt_print_link_info(struct rte_eth_dev *eth_dev)
 551 {
 552         struct rte_eth_link *link = &eth_dev->data->dev_link;
 553
 554         if (link->link_status)
 555                 RTE_LOG(INFO, PMD, "Port %d Link Up - speed %u Mbps - %s\n",
 556                         eth_dev->data->port_id,
 557                         (uint32_t)link->link_speed,
 558                         (link->link_duplex == ETH_LINK_FULL_DUPLEX) ?
 559                         ("full-duplex") : ("half-duplex\n"));
 560         else
 561                 RTE_LOG(INFO, PMD, "Port %d Link Down\n",
 562                         eth_dev->data->port_id);
 563 }
 564
 565 static int bnxt_dev_lsc_intr_setup(struct rte_eth_dev *eth_dev)
 566 {
 567         bnxt_print_link_info(eth_dev);
 568         return 0;
 569 }
 570
 571 static int bnxt_dev_start_op(struct rte_eth_dev *eth_dev)
 572 {
 573         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 574         int vlan_mask = 0;
 575         int rc;
 576
 577         if (bp->rx_cp_nr_rings > RTE_ETHDEV_QUEUE_STAT_CNTRS) {
 578                 RTE_LOG(ERR, PMD,
 579                         "RxQ cnt %d > CONFIG_RTE_ETHDEV_QUEUE_STAT_CNTRS %d\n",
 580                         bp->rx_cp_nr_rings, RTE_ETHDEV_QUEUE_STAT_CNTRS);
 581         }
 582         bp->dev_stopped = 0;
 583
 584         rc = bnxt_init_nic(bp);
 585         if (rc)
 586                 goto error;
 587
 588         bnxt_link_update_op(eth_dev, 0);
 589
 590         if (eth_dev->data->dev_conf.rxmode.hw_vlan_filter)
 591                 vlan_mask |= ETH_VLAN_FILTER_MASK;
 592         if (eth_dev->data->dev_conf.rxmode.hw_vlan_strip)
 593                 vlan_mask |= ETH_VLAN_STRIP_MASK;
 594         bnxt_vlan_offload_set_op(eth_dev, vlan_mask);
 595
 596         return 0;
 597
 598 error:
 599         bnxt_shutdown_nic(bp);
 600         bnxt_free_tx_mbufs(bp);
 601         bnxt_free_rx_mbufs(bp);
 602         return rc;
 603 }
 604
 605 static int bnxt_dev_set_link_up_op(struct rte_eth_dev *eth_dev)
 606 {
 607         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 608
 609         eth_dev->data->dev_link.link_status = 1;
 610         bnxt_set_hwrm_link_config(bp, true);
 611         return 0;
 612 }
 613
 614 static int bnxt_dev_set_link_down_op(struct rte_eth_dev *eth_dev)
 615 {
 616         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 617
 618         eth_dev->data->dev_link.link_status = 0;
 619         bnxt_set_hwrm_link_config(bp, false);
 620         return 0;
 621 }
 622
 623 /* Unload the driver, release resources */
 624 static void bnxt_dev_stop_op(struct rte_eth_dev *eth_dev)
 625 {
 626         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 627
 628         if (bp->eth_dev->data->dev_started) {
 629                 /* TBD: STOP HW queues DMA */
 630                 eth_dev->data->dev_link.link_status = 0;
 631         }
 632         bnxt_set_hwrm_link_config(bp, false);
 633         bnxt_hwrm_port_clr_stats(bp);
 634         bnxt_shutdown_nic(bp);
 635         bp->dev_stopped = 1;
 636 }
 637
 638 static void bnxt_dev_close_op(struct rte_eth_dev *eth_dev)
 639 {
 640         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 641
 642         if (bp->dev_stopped == 0)
 643                 bnxt_dev_stop_op(eth_dev);
 644
 645         bnxt_free_tx_mbufs(bp);
 646         bnxt_free_rx_mbufs(bp);
 647         bnxt_free_mem(bp);
 648         if (eth_dev->data->mac_addrs != NULL) {
 649                 rte_free(eth_dev->data->mac_addrs);
 650                 eth_dev->data->mac_addrs = NULL;
 651         }
 652         if (bp->grp_info != NULL) {
 653                 rte_free(bp->grp_info);
 654                 bp->grp_info = NULL;
 655         }
 656 }
 657
 658 static void bnxt_mac_addr_remove_op(struct rte_eth_dev *eth_dev,
 659                                     uint32_t index)
 660 {
 661         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 662         uint64_t pool_mask = eth_dev->data->mac_pool_sel[index];
 663         struct bnxt_vnic_info *vnic;
 664         struct bnxt_filter_info *filter, *temp_filter;
 665         uint32_t pool = RTE_MIN(MAX_FF_POOLS, ETH_64_POOLS);
 666         uint32_t i;
 667
 668         /*
 669          * Loop through all VNICs from the specified filter flow pools to
 670          * remove the corresponding MAC addr filter
 671          */
 672         for (i = 0; i < pool; i++) {
 673                 if (!(pool_mask & (1ULL << i)))
 674                         continue;
 675
 676                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
 677                         filter = STAILQ_FIRST(&vnic->filter);
 678                         while (filter) {
 679                                 temp_filter = STAILQ_NEXT(filter, next);
 680                                 if (filter->mac_index == index) {
 681                                         STAILQ_REMOVE(&vnic->filter, filter,
 682                                                       bnxt_filter_info, next);
 683                                         bnxt_hwrm_clear_l2_filter(bp, filter);
 684                                         filter->mac_index = INVALID_MAC_INDEX;
 685                                         memset(&filter->l2_addr, 0,
 686                                                ETHER_ADDR_LEN);
 687                                         STAILQ_INSERT_TAIL(
 688                                                         &bp->free_filter_list,
 689                                                         filter, next);
 690                                 }
 691                                 filter = temp_filter;
 692                         }
 693                 }
 694         }
 695 }
 696
 697 static int bnxt_mac_addr_add_op(struct rte_eth_dev *eth_dev,
 698                                 struct ether_addr *mac_addr,
 699                                 uint32_t index, uint32_t pool)
 700 {
 701         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 702         struct bnxt_vnic_info *vnic = STAILQ_FIRST(&bp->ff_pool[pool]);
 703         struct bnxt_filter_info *filter;
 704
 705         if (BNXT_VF(bp)) {
 706                 RTE_LOG(ERR, PMD, "Cannot add MAC address to a VF interface\n");
 707                 return -ENOTSUP;
 708         }
 709
 710         if (!vnic) {
 711                 RTE_LOG(ERR, PMD, "VNIC not found for pool %d!\n", pool);
 712                 return -EINVAL;
 713         }
 714         /* Attach requested MAC address to the new l2_filter */
 715         STAILQ_FOREACH(filter, &vnic->filter, next) {
 716                 if (filter->mac_index == index) {
 717                         RTE_LOG(ERR, PMD,
 718                                 "MAC addr already existed for pool %d\n", pool);
 719                         return -EINVAL;
 720                 }
 721         }
 722         filter = bnxt_alloc_filter(bp);
 723         if (!filter) {
 724                 RTE_LOG(ERR, PMD, "L2 filter alloc failed\n");
 725                 return -ENODEV;
 726         }
 727         STAILQ_INSERT_TAIL(&vnic->filter, filter, next);
 728         filter->mac_index = index;
 729         memcpy(filter->l2_addr, mac_addr, ETHER_ADDR_LEN);
 730         return bnxt_hwrm_set_l2_filter(bp, vnic->fw_vnic_id, filter);
 731 }
 732
 733 int bnxt_link_update_op(struct rte_eth_dev *eth_dev, int wait_to_complete)
 734 {
 735         int rc = 0;
 736         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 737         struct rte_eth_link new;
 738         unsigned int cnt = BNXT_LINK_WAIT_CNT;
 739
 740         memset(&new, 0, sizeof(new));
 741         do {
 742                 /* Retrieve link info from hardware */
 743                 rc = bnxt_get_hwrm_link_config(bp, &new);
 744                 if (rc) {
 745                         new.link_speed = ETH_LINK_SPEED_100M;
 746                         new.link_duplex = ETH_LINK_FULL_DUPLEX;
 747                         RTE_LOG(ERR, PMD,
 748                                 "Failed to retrieve link rc = 0x%x!\n", rc);
 749                         goto out;
 750                 }
 751                 rte_delay_ms(BNXT_LINK_WAIT_INTERVAL);
 752
 753                 if (!wait_to_complete)
 754                         break;
 755         } while (!new.link_status && cnt--);
 756
 757 out:
 758         /* Timed out or success */
 759         if (new.link_status != eth_dev->data->dev_link.link_status ||
 760         new.link_speed != eth_dev->data->dev_link.link_speed) {
 761                 rte_bnxt_atomic_write_link_status(eth_dev, &new);
 762                 bnxt_print_link_info(eth_dev);
 763         }
 764
 765         return rc;
 766 }
 767
 768 static void bnxt_promiscuous_enable_op(struct rte_eth_dev *eth_dev)
 769 {
 770         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 771         struct bnxt_vnic_info *vnic;
 772
 773         if (bp->vnic_info == NULL)
 774                 return;
 775
 776         vnic = &bp->vnic_info[0];
 777
 778         vnic->flags |= BNXT_VNIC_INFO_PROMISC;
 779         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic, 0, NULL);
 780 }
 781
 782 static void bnxt_promiscuous_disable_op(struct rte_eth_dev *eth_dev)
 783 {
 784         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 785         struct bnxt_vnic_info *vnic;
 786
 787         if (bp->vnic_info == NULL)
 788                 return;
 789
 790         vnic = &bp->vnic_info[0];
 791
 792         vnic->flags &= ~BNXT_VNIC_INFO_PROMISC;
 793         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic, 0, NULL);
 794 }
 795
 796 static void bnxt_allmulticast_enable_op(struct rte_eth_dev *eth_dev)
 797 {
 798         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 799         struct bnxt_vnic_info *vnic;
 800
 801         if (bp->vnic_info == NULL)
 802                 return;
 803
 804         vnic = &bp->vnic_info[0];
 805
 806         vnic->flags |= BNXT_VNIC_INFO_ALLMULTI;
 807         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic, 0, NULL);
 808 }
 809
 810 static void bnxt_allmulticast_disable_op(struct rte_eth_dev *eth_dev)
 811 {
 812         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 813         struct bnxt_vnic_info *vnic;
 814
 815         if (bp->vnic_info == NULL)
 816                 return;
 817
 818         vnic = &bp->vnic_info[0];
 819
 820         vnic->flags &= ~BNXT_VNIC_INFO_ALLMULTI;
 821         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic, 0, NULL);
 822 }
 823
 824 static int bnxt_reta_update_op(struct rte_eth_dev *eth_dev,
 825                             struct rte_eth_rss_reta_entry64 *reta_conf,
 826                             uint16_t reta_size)
 827 {
 828         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 829         struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
 830         struct bnxt_vnic_info *vnic;
 831         int i;
 832
 833         if (!(dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG))
 834                 return -EINVAL;
 835
 836         if (reta_size != HW_HASH_INDEX_SIZE) {
 837                 RTE_LOG(ERR, PMD, "The configured hash table lookup size "
 838                         "(%d) must equal the size supported by the hardware "
 839                         "(%d)\n", reta_size, HW_HASH_INDEX_SIZE);
 840                 return -EINVAL;
 841         }
 842         /* Update the RSS VNIC(s) */
 843         for (i = 0; i < MAX_FF_POOLS; i++) {
 844                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
 845                         memcpy(vnic->rss_table, reta_conf, reta_size);
 846
 847                         bnxt_hwrm_vnic_rss_cfg(bp, vnic);
 848                 }
 849         }
 850         return 0;
 851 }
 852
 853 static int bnxt_reta_query_op(struct rte_eth_dev *eth_dev,
 854                               struct rte_eth_rss_reta_entry64 *reta_conf,
 855                               uint16_t reta_size)
 856 {
 857         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 858         struct bnxt_vnic_info *vnic = &bp->vnic_info[0];
 859         struct rte_intr_handle *intr_handle
 860                 = &bp->pdev->intr_handle;
 861
 862         /* Retrieve from the default VNIC */
 863         if (!vnic)
 864                 return -EINVAL;
 865         if (!vnic->rss_table)
 866                 return -EINVAL;
 867
 868         if (reta_size != HW_HASH_INDEX_SIZE) {
 869                 RTE_LOG(ERR, PMD, "The configured hash table lookup size "
 870                         "(%d) must equal the size supported by the hardware "
 871                         "(%d)\n", reta_size, HW_HASH_INDEX_SIZE);
 872                 return -EINVAL;
 873         }
 874         /* EW - need to revisit here copying from u64 to u16 */
 875         memcpy(reta_conf, vnic->rss_table, reta_size);
 876
 877         if (rte_intr_allow_others(intr_handle)) {
 878                 if (eth_dev->data->dev_conf.intr_conf.lsc != 0)
 879                         bnxt_dev_lsc_intr_setup(eth_dev);
 880         }
 881
 882         return 0;
 883 }
 884
 885 static int bnxt_rss_hash_update_op(struct rte_eth_dev *eth_dev,
 886                                    struct rte_eth_rss_conf *rss_conf)
 887 {
 888         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 889         struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
 890         struct bnxt_vnic_info *vnic;
 891         uint16_t hash_type = 0;
 892         int i;
 893
 894         /*
 895          * If RSS enablement were different than dev_configure,
 896          * then return -EINVAL
 897          */
 898         if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) {
 899                 if (!rss_conf->rss_hf)
 900                         RTE_LOG(ERR, PMD, "Hash type NONE\n");
 901         } else {
 902                 if (rss_conf->rss_hf & BNXT_ETH_RSS_SUPPORT)
 903                         return -EINVAL;
 904         }
 905
 906         bp->flags |= BNXT_FLAG_UPDATE_HASH;
 907         memcpy(&bp->rss_conf, rss_conf, sizeof(*rss_conf));
 908
 909         if (rss_conf->rss_hf & ETH_RSS_IPV4)
 910                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4;
 911         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV4_TCP)
 912                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4;
 913         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV4_UDP)
 914                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4;
 915         if (rss_conf->rss_hf & ETH_RSS_IPV6)
 916                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6;
 917         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV6_TCP)
 918                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6;
 919         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV6_UDP)
 920                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6;
 921
 922         /* Update the RSS VNIC(s) */
 923         for (i = 0; i < MAX_FF_POOLS; i++) {
 924                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
 925                         vnic->hash_type = hash_type;
 926
 927                         /*
 928                          * Use the supplied key if the key length is
 929                          * acceptable and the rss_key is not NULL
 930                          */
 931                         if (rss_conf->rss_key &&
 932                             rss_conf->rss_key_len <= HW_HASH_KEY_SIZE)
 933                                 memcpy(vnic->rss_hash_key, rss_conf->rss_key,
 934                                        rss_conf->rss_key_len);
 935
 936                         bnxt_hwrm_vnic_rss_cfg(bp, vnic);
 937                 }
 938         }
 939         return 0;
 940 }
 941
 942 static int bnxt_rss_hash_conf_get_op(struct rte_eth_dev *eth_dev,
 943                                      struct rte_eth_rss_conf *rss_conf)
 944 {
 945         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 946         struct bnxt_vnic_info *vnic = &bp->vnic_info[0];
 947         int len;
 948         uint32_t hash_types;
 949
 950         /* RSS configuration is the same for all VNICs */
 951         if (vnic && vnic->rss_hash_key) {
 952                 if (rss_conf->rss_key) {
 953                         len = rss_conf->rss_key_len <= HW_HASH_KEY_SIZE ?
 954                               rss_conf->rss_key_len : HW_HASH_KEY_SIZE;
 955                         memcpy(rss_conf->rss_key, vnic->rss_hash_key, len);
 956                 }
 957
 958                 hash_types = vnic->hash_type;
 959                 rss_conf->rss_hf = 0;
 960                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4) {
 961                         rss_conf->rss_hf |= ETH_RSS_IPV4;
 962                         hash_types &= ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4;
 963                 }
 964                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4) {
 965                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV4_TCP;
 966                         hash_types &=
 967                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4;
 968                 }
 969                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4) {
 970                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV4_UDP;
 971                         hash_types &=
 972                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4;
 973                 }
 974                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6) {
 975                         rss_conf->rss_hf |= ETH_RSS_IPV6;
 976                         hash_types &= ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6;
 977                 }
 978                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6) {
 979                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV6_TCP;
 980                         hash_types &=
 981                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6;
 982                 }
 983                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6) {
 984                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV6_UDP;
 985                         hash_types &=
 986                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6;
 987                 }
 988                 if (hash_types) {
 989                         RTE_LOG(ERR, PMD,
 990                                 "Unknwon RSS config from firmware (%08x), RSS disabled",
 991                                 vnic->hash_type);
 992                         return -ENOTSUP;
 993                 }
 994         } else {
 995                 rss_conf->rss_hf = 0;
 996         }
 997         return 0;
 998 }
 999
1000 static int bnxt_flow_ctrl_get_op(struct rte_eth_dev *dev,
1001                                struct rte_eth_fc_conf *fc_conf)
1002 {
1003         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1004         struct rte_eth_link link_info;
1005         int rc;
1006
1007         rc = bnxt_get_hwrm_link_config(bp, &link_info);
1008         if (rc)
1009                 return rc;
1010
1011         memset(fc_conf, 0, sizeof(*fc_conf));
1012         if (bp->link_info.auto_pause)
1013                 fc_conf->autoneg = 1;
1014         switch (bp->link_info.pause) {
1015         case 0:
1016                 fc_conf->mode = RTE_FC_NONE;
1017                 break;
1018         case HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_TX:
1019                 fc_conf->mode = RTE_FC_TX_PAUSE;
1020                 break;
1021         case HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_RX:
1022                 fc_conf->mode = RTE_FC_RX_PAUSE;
1023                 break;
1024         case (HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_TX |
1025                         HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_RX):
1026                 fc_conf->mode = RTE_FC_FULL;
1027                 break;
1028         }
1029         return 0;
1030 }
1031
1032 static int bnxt_flow_ctrl_set_op(struct rte_eth_dev *dev,
1033                                struct rte_eth_fc_conf *fc_conf)
1034 {
1035         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1036
1037         if (BNXT_NPAR_PF(bp) || BNXT_VF(bp)) {
1038                 RTE_LOG(ERR, PMD, "Flow Control Settings cannot be modified\n");
1039                 return -ENOTSUP;
1040         }
1041
1042         switch (fc_conf->mode) {
1043         case RTE_FC_NONE:
1044                 bp->link_info.auto_pause = 0;
1045                 bp->link_info.force_pause = 0;
1046                 break;
1047         case RTE_FC_RX_PAUSE:
1048                 if (fc_conf->autoneg) {
1049                         bp->link_info.auto_pause =
1050                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_RX;
1051                         bp->link_info.force_pause = 0;
1052                 } else {
1053                         bp->link_info.auto_pause = 0;
1054                         bp->link_info.force_pause =
1055                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_RX;
1056                 }
1057                 break;
1058         case RTE_FC_TX_PAUSE:
1059                 if (fc_conf->autoneg) {
1060                         bp->link_info.auto_pause =
1061                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_TX;
1062                         bp->link_info.force_pause = 0;
1063                 } else {
1064                         bp->link_info.auto_pause = 0;
1065                         bp->link_info.force_pause =
1066                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_TX;
1067                 }
1068                 break;
1069         case RTE_FC_FULL:
1070                 if (fc_conf->autoneg) {
1071                         bp->link_info.auto_pause =
1072                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_TX |
1073                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_RX;
1074                         bp->link_info.force_pause = 0;
1075                 } else {
1076                         bp->link_info.auto_pause = 0;
1077                         bp->link_info.force_pause =
1078                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_TX |
1079                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_RX;
1080                 }
1081                 break;
1082         }
1083         return bnxt_set_hwrm_link_config(bp, true);
1084 }
1085
1086 /* Add UDP tunneling port */
1087 static int
1088 bnxt_udp_tunnel_port_add_op(struct rte_eth_dev *eth_dev,
1089                          struct rte_eth_udp_tunnel *udp_tunnel)
1090 {
1091         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
1092         uint16_t tunnel_type = 0;
1093         int rc = 0;
1094
1095         switch (udp_tunnel->prot_type) {
1096         case RTE_TUNNEL_TYPE_VXLAN:
1097                 if (bp->vxlan_port_cnt) {
1098                         RTE_LOG(ERR, PMD, "Tunnel Port %d already programmed\n",
1099                                 udp_tunnel->udp_port);
1100                         if (bp->vxlan_port != udp_tunnel->udp_port) {
1101                                 RTE_LOG(ERR, PMD, "Only one port allowed\n");
1102                                 return -ENOSPC;
1103                         }
1104                         bp->vxlan_port_cnt++;
1105                         return 0;
1106                 }
1107                 tunnel_type =
1108                         HWRM_TUNNEL_DST_PORT_ALLOC_INPUT_TUNNEL_TYPE_VXLAN;
1109                 bp->vxlan_port_cnt++;
1110                 break;
1111         case RTE_TUNNEL_TYPE_GENEVE:
1112                 if (bp->geneve_port_cnt) {
1113                         RTE_LOG(ERR, PMD, "Tunnel Port %d already programmed\n",
1114                                 udp_tunnel->udp_port);
1115                         if (bp->geneve_port != udp_tunnel->udp_port) {
1116                                 RTE_LOG(ERR, PMD, "Only one port allowed\n");
1117                                 return -ENOSPC;
1118                         }
1119                         bp->geneve_port_cnt++;
1120                         return 0;
1121                 }
1122                 tunnel_type =
1123                         HWRM_TUNNEL_DST_PORT_ALLOC_INPUT_TUNNEL_TYPE_GENEVE;
1124                 bp->geneve_port_cnt++;
1125                 break;
1126         default:
1127                 RTE_LOG(ERR, PMD, "Tunnel type is not supported\n");
1128                 return -ENOTSUP;
1129         }
1130         rc = bnxt_hwrm_tunnel_dst_port_alloc(bp, udp_tunnel->udp_port,
1131                                              tunnel_type);
1132         return rc;
1133 }
1134
1135 static int
1136 bnxt_udp_tunnel_port_del_op(struct rte_eth_dev *eth_dev,
1137                          struct rte_eth_udp_tunnel *udp_tunnel)
1138 {
1139         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
1140         uint16_t tunnel_type = 0;
1141         uint16_t port = 0;
1142         int rc = 0;
1143
1144         switch (udp_tunnel->prot_type) {
1145         case RTE_TUNNEL_TYPE_VXLAN:
1146                 if (!bp->vxlan_port_cnt) {
1147                         RTE_LOG(ERR, PMD, "No Tunnel port configured yet\n");
1148                         return -EINVAL;
1149                 }
1150                 if (bp->vxlan_port != udp_tunnel->udp_port) {
1151                         RTE_LOG(ERR, PMD, "Req Port: %d. Configured port: %d\n",
1152                                 udp_tunnel->udp_port, bp->vxlan_port);
1153                         return -EINVAL;
1154                 }
1155                 if (--bp->vxlan_port_cnt)
1156                         return 0;
1157
1158                 tunnel_type =
1159                         HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_VXLAN;
1160                 port = bp->vxlan_fw_dst_port_id;
1161                 break;
1162         case RTE_TUNNEL_TYPE_GENEVE:
1163                 if (!bp->geneve_port_cnt) {
1164                         RTE_LOG(ERR, PMD, "No Tunnel port configured yet\n");
1165                         return -EINVAL;
1166                 }
1167                 if (bp->geneve_port != udp_tunnel->udp_port) {
1168                         RTE_LOG(ERR, PMD, "Req Port: %d. Configured port: %d\n",
1169                                 udp_tunnel->udp_port, bp->geneve_port);
1170                         return -EINVAL;
1171                 }
1172                 if (--bp->geneve_port_cnt)
1173                         return 0;
1174
1175                 tunnel_type =
1176                         HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_GENEVE;
1177                 port = bp->geneve_fw_dst_port_id;
1178                 break;
1179         default:
1180                 RTE_LOG(ERR, PMD, "Tunnel type is not supported\n");
1181                 return -ENOTSUP;
1182         }
1183
1184         rc = bnxt_hwrm_tunnel_dst_port_free(bp, port, tunnel_type);
1185         if (!rc) {
1186                 if (tunnel_type ==
1187                     HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_VXLAN)
1188                         bp->vxlan_port = 0;
1189                 if (tunnel_type ==
1190                     HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_GENEVE)
1191                         bp->geneve_port = 0;
1192         }
1193         return rc;
1194 }
1195
1196 static int bnxt_del_vlan_filter(struct bnxt *bp, uint16_t vlan_id)
1197 {
1198         struct bnxt_filter_info *filter, *temp_filter, *new_filter;
1199         struct bnxt_vnic_info *vnic;
1200         unsigned int i;
1201         int rc = 0;
1202         uint32_t chk = HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN;
1203
1204         /* Cycle through all VNICs */
1205         for (i = 0; i < bp->nr_vnics; i++) {
1206                 /*
1207                  * For each VNIC and each associated filter(s)
1208                  * if VLAN exists && VLAN matches vlan_id
1209                  *      remove the MAC+VLAN filter
1210                  *      add a new MAC only filter
1211                  * else
1212                  *      VLAN filter doesn't exist, just skip and continue
1213                  */
1214                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
1215                         filter = STAILQ_FIRST(&vnic->filter);
1216                         while (filter) {
1217                                 temp_filter = STAILQ_NEXT(filter, next);
1218
1219                                 if (filter->enables & chk &&
1220                                     filter->l2_ovlan == vlan_id) {
1221                                         /* Must delete the filter */
1222                                         STAILQ_REMOVE(&vnic->filter, filter,
1223                                                       bnxt_filter_info, next);
1224                                         bnxt_hwrm_clear_l2_filter(bp, filter);
1225                                         STAILQ_INSERT_TAIL(
1226                                                         &bp->free_filter_list,
1227                                                         filter, next);
1228
1229                                         /*
1230                                          * Need to examine to see if the MAC
1231                                          * filter already existed or not before
1232                                          * allocating a new one
1233                                          */
1234
1235                                         new_filter = bnxt_alloc_filter(bp);
1236                                         if (!new_filter) {
1237                                                 RTE_LOG(ERR, PMD,
1238                                                         "MAC/VLAN filter alloc failed\n");
1239                                                 rc = -ENOMEM;
1240                                                 goto exit;
1241                                         }
1242                                         STAILQ_INSERT_TAIL(&vnic->filter,
1243                                                            new_filter, next);
1244                                         /* Inherit MAC from previous filter */
1245                                         new_filter->mac_index =
1246                                                         filter->mac_index;
1247                                         memcpy(new_filter->l2_addr,
1248                                                filter->l2_addr, ETHER_ADDR_LEN);
1249                                         /* MAC only filter */
1250                                         rc = bnxt_hwrm_set_l2_filter(bp,
1251                                                         vnic->fw_vnic_id,
1252                                                         new_filter);
1253                                         if (rc)
1254                                                 goto exit;
1255                                         RTE_LOG(INFO, PMD,
1256                                                 "Del Vlan filter for %d\n",
1257                                                 vlan_id);
1258                                 }
1259                                 filter = temp_filter;
1260                         }
1261                 }
1262         }
1263 exit:
1264         return rc;
1265 }
1266
1267 static int bnxt_add_vlan_filter(struct bnxt *bp, uint16_t vlan_id)
1268 {
1269         struct bnxt_filter_info *filter, *temp_filter, *new_filter;
1270         struct bnxt_vnic_info *vnic;
1271         unsigned int i;
1272         int rc = 0;
1273         uint32_t en = HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN |
1274                 HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN_MASK;
1275         uint32_t chk = HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN;
1276
1277         /* Cycle through all VNICs */
1278         for (i = 0; i < bp->nr_vnics; i++) {
1279                 /*
1280                  * For each VNIC and each associated filter(s)
1281                  * if VLAN exists:
1282                  *   if VLAN matches vlan_id
1283                  *      VLAN filter already exists, just skip and continue
1284                  *   else
1285                  *      add a new MAC+VLAN filter
1286                  * else
1287                  *   Remove the old MAC only filter
1288                  *    Add a new MAC+VLAN filter
1289                  */
1290                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
1291                         filter = STAILQ_FIRST(&vnic->filter);
1292                         while (filter) {
1293                                 temp_filter = STAILQ_NEXT(filter, next);
1294
1295                                 if (filter->enables & chk) {
1296                                         if (filter->l2_ovlan == vlan_id)
1297                                                 goto cont;
1298                                 } else {
1299                                         /* Must delete the MAC filter */
1300                                         STAILQ_REMOVE(&vnic->filter, filter,
1301                                                       bnxt_filter_info, next);
1302                                         bnxt_hwrm_clear_l2_filter(bp, filter);
1303                                         filter->l2_ovlan = 0;
1304                                         STAILQ_INSERT_TAIL(
1305                                                         &bp->free_filter_list,
1306                                                         filter, next);
1307                                 }
1308                                 new_filter = bnxt_alloc_filter(bp);
1309                                 if (!new_filter) {
1310                                         RTE_LOG(ERR, PMD,
1311                                                 "MAC/VLAN filter alloc failed\n");
1312                                         rc = -ENOMEM;
1313                                         goto exit;
1314                                 }
1315                                 STAILQ_INSERT_TAIL(&vnic->filter, new_filter,
1316                                                    next);
1317                                 /* Inherit MAC from the previous filter */
1318                                 new_filter->mac_index = filter->mac_index;
1319                                 memcpy(new_filter->l2_addr, filter->l2_addr,
1320                                        ETHER_ADDR_LEN);
1321                                 /* MAC + VLAN ID filter */
1322                                 new_filter->l2_ovlan = vlan_id;
1323                                 new_filter->l2_ovlan_mask = 0xF000;
1324                                 new_filter->enables |= en;
1325                                 rc = bnxt_hwrm_set_l2_filter(bp,
1326                                                              vnic->fw_vnic_id,
1327                                                              new_filter);
1328                                 if (rc)
1329                                         goto exit;
1330                                 RTE_LOG(INFO, PMD,
1331                                         "Added Vlan filter for %d\n", vlan_id);
1332 cont:
1333                                 filter = temp_filter;
1334                         }
1335                 }
1336         }
1337 exit:
1338         return rc;
1339 }
1340
1341 static int bnxt_vlan_filter_set_op(struct rte_eth_dev *eth_dev,
1342                                    uint16_t vlan_id, int on)
1343 {
1344         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
1345
1346         /* These operations apply to ALL existing MAC/VLAN filters */
1347         if (on)
1348                 return bnxt_add_vlan_filter(bp, vlan_id);
1349         else
1350                 return bnxt_del_vlan_filter(bp, vlan_id);
1351 }
1352
1353 static void
1354 bnxt_vlan_offload_set_op(struct rte_eth_dev *dev, int mask)
1355 {
1356         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1357         unsigned int i;
1358
1359         if (mask & ETH_VLAN_FILTER_MASK) {
1360                 if (!dev->data->dev_conf.rxmode.hw_vlan_filter) {
1361                         /* Remove any VLAN filters programmed */
1362                         for (i = 0; i < 4095; i++)
1363                                 bnxt_del_vlan_filter(bp, i);
1364                 }
1365                 RTE_LOG(INFO, PMD, "VLAN Filtering: %d\n",
1366                         dev->data->dev_conf.rxmode.hw_vlan_filter);
1367         }
1368
1369         if (mask & ETH_VLAN_STRIP_MASK) {
1370                 /* Enable or disable VLAN stripping */
1371                 for (i = 0; i < bp->nr_vnics; i++) {
1372                         struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
1373                         if (dev->data->dev_conf.rxmode.hw_vlan_strip)
1374                                 vnic->vlan_strip = true;
1375                         else
1376                                 vnic->vlan_strip = false;
1377                         bnxt_hwrm_vnic_cfg(bp, vnic);
1378                 }
1379                 RTE_LOG(INFO, PMD, "VLAN Strip Offload: %d\n",
1380                         dev->data->dev_conf.rxmode.hw_vlan_strip);
1381         }
1382
1383         if (mask & ETH_VLAN_EXTEND_MASK)
1384                 RTE_LOG(ERR, PMD, "Extend VLAN Not supported\n");
1385 }
1386
1387 static void
1388 bnxt_set_default_mac_addr_op(struct rte_eth_dev *dev, struct ether_addr *addr)
1389 {
1390         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1391         /* Default Filter is tied to VNIC 0 */
1392         struct bnxt_vnic_info *vnic = &bp->vnic_info[0];
1393         struct bnxt_filter_info *filter;
1394         int rc;
1395
1396         if (BNXT_VF(bp))
1397                 return;
1398
1399         memcpy(bp->mac_addr, addr, sizeof(bp->mac_addr));
1400         memcpy(&dev->data->mac_addrs[0], bp->mac_addr, ETHER_ADDR_LEN);
1401
1402         STAILQ_FOREACH(filter, &vnic->filter, next) {
1403                 /* Default Filter is at Index 0 */
1404                 if (filter->mac_index != 0)
1405                         continue;
1406                 rc = bnxt_hwrm_clear_l2_filter(bp, filter);
1407                 if (rc)
1408                         break;
1409                 memcpy(filter->l2_addr, bp->mac_addr, ETHER_ADDR_LEN);
1410                 memset(filter->l2_addr_mask, 0xff, ETHER_ADDR_LEN);
1411                 filter->flags |= HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_RX;
1412                 filter->enables |=
1413                         HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR |
1414                         HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR_MASK;
1415                 rc = bnxt_hwrm_set_l2_filter(bp, vnic->fw_vnic_id, filter);
1416                 if (rc)
1417                         break;
1418                 filter->mac_index = 0;
1419                 RTE_LOG(DEBUG, PMD, "Set MAC addr\n");
1420         }
1421 }
1422
1423 static int
1424 bnxt_dev_set_mc_addr_list_op(struct rte_eth_dev *eth_dev,
1425                           struct ether_addr *mc_addr_set,
1426                           uint32_t nb_mc_addr)
1427 {
1428         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
1429         char *mc_addr_list = (char *)mc_addr_set;
1430         struct bnxt_vnic_info *vnic;
1431         uint32_t off = 0, i = 0;
1432
1433         vnic = &bp->vnic_info[0];
1434
1435         if (nb_mc_addr > BNXT_MAX_MC_ADDRS) {
1436                 vnic->flags |= BNXT_VNIC_INFO_ALLMULTI;
1437                 goto allmulti;
1438         }
1439
1440         /* TODO Check for Duplicate mcast addresses */
1441         vnic->flags &= ~BNXT_VNIC_INFO_ALLMULTI;
1442         for (i = 0; i < nb_mc_addr; i++) {
1443                 memcpy(vnic->mc_list + off, &mc_addr_list[i], ETHER_ADDR_LEN);
1444                 off += ETHER_ADDR_LEN;
1445         }
1446
1447         vnic->mc_addr_cnt = i;
1448
1449 allmulti:
1450         return bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic, 0, NULL);
1451 }
1452
1453 static int
1454 bnxt_fw_version_get(struct rte_eth_dev *dev, char *fw_version, size_t fw_size)
1455 {
1456         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1457         uint8_t fw_major = (bp->fw_ver >> 24) & 0xff;
1458         uint8_t fw_minor = (bp->fw_ver >> 16) & 0xff;
1459         uint8_t fw_updt = (bp->fw_ver >> 8) & 0xff;
1460         int ret;
1461
1462         ret = snprintf(fw_version, fw_size, "%d.%d.%d",
1463                         fw_major, fw_minor, fw_updt);
1464
1465         ret += 1; /* add the size of '\0' */
1466         if (fw_size < (uint32_t)ret)
1467                 return ret;
1468         else
1469                 return 0;
1470 }
1471
1472 static void
1473 bnxt_rxq_info_get_op(struct rte_eth_dev *dev, uint16_t queue_id,
1474         struct rte_eth_rxq_info *qinfo)
1475 {
1476         struct bnxt_rx_queue *rxq;
1477
1478         rxq = dev->data->rx_queues[queue_id];
1479
1480         qinfo->mp = rxq->mb_pool;
1481         qinfo->scattered_rx = dev->data->scattered_rx;
1482         qinfo->nb_desc = rxq->nb_rx_desc;
1483
1484         qinfo->conf.rx_free_thresh = rxq->rx_free_thresh;
1485         qinfo->conf.rx_drop_en = 0;
1486         qinfo->conf.rx_deferred_start = 0;
1487 }
1488
1489 static void
1490 bnxt_txq_info_get_op(struct rte_eth_dev *dev, uint16_t queue_id,
1491         struct rte_eth_txq_info *qinfo)
1492 {
1493         struct bnxt_tx_queue *txq;
1494
1495         txq = dev->data->tx_queues[queue_id];
1496
1497         qinfo->nb_desc = txq->nb_tx_desc;
1498
1499         qinfo->conf.tx_thresh.pthresh = txq->pthresh;
1500         qinfo->conf.tx_thresh.hthresh = txq->hthresh;
1501         qinfo->conf.tx_thresh.wthresh = txq->wthresh;
1502
1503         qinfo->conf.tx_free_thresh = txq->tx_free_thresh;
1504         qinfo->conf.tx_rs_thresh = 0;
1505         qinfo->conf.txq_flags = txq->txq_flags;
1506         qinfo->conf.tx_deferred_start = txq->tx_deferred_start;
1507 }
1508
1509 static int bnxt_mtu_set_op(struct rte_eth_dev *eth_dev, uint16_t new_mtu)
1510 {
1511         struct bnxt *bp = eth_dev->data->dev_private;
1512         struct rte_eth_dev_info dev_info;
1513         uint32_t max_dev_mtu;
1514         uint32_t rc = 0;
1515         uint32_t i;
1516
1517         bnxt_dev_info_get_op(eth_dev, &dev_info);
1518         max_dev_mtu = dev_info.max_rx_pktlen -
1519                       ETHER_HDR_LEN - ETHER_CRC_LEN - VLAN_TAG_SIZE * 2;
1520
1521         if (new_mtu < ETHER_MIN_MTU || new_mtu > max_dev_mtu) {
1522                 RTE_LOG(ERR, PMD, "MTU requested must be within (%d, %d)\n",
1523                         ETHER_MIN_MTU, max_dev_mtu);
1524                 return -EINVAL;
1525         }
1526
1527
1528         if (new_mtu > ETHER_MTU) {
1529                 bp->flags |= BNXT_FLAG_JUMBO;
1530                 eth_dev->data->dev_conf.rxmode.jumbo_frame = 1;
1531         } else {
1532                 eth_dev->data->dev_conf.rxmode.jumbo_frame = 0;
1533                 bp->flags &= ~BNXT_FLAG_JUMBO;
1534         }
1535
1536         eth_dev->data->dev_conf.rxmode.max_rx_pkt_len =
1537                 new_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN + VLAN_TAG_SIZE * 2;
1538
1539         eth_dev->data->mtu = new_mtu;
1540         RTE_LOG(INFO, PMD, "New MTU is %d\n", eth_dev->data->mtu);
1541
1542         for (i = 0; i < bp->nr_vnics; i++) {
1543                 struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
1544
1545                 vnic->mru = bp->eth_dev->data->mtu + ETHER_HDR_LEN +
1546                                         ETHER_CRC_LEN + VLAN_TAG_SIZE * 2;
1547                 rc = bnxt_hwrm_vnic_cfg(bp, vnic);
1548                 if (rc)
1549                         break;
1550
1551                 rc = bnxt_hwrm_vnic_plcmode_cfg(bp, vnic);
1552                 if (rc)
1553                         return rc;
1554         }
1555
1556         return rc;
1557 }
1558
1559 static int
1560 bnxt_vlan_pvid_set_op(struct rte_eth_dev *dev, uint16_t pvid, int on)
1561 {
1562         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1563         uint16_t vlan = bp->vlan;
1564         int rc;
1565
1566         if (BNXT_NPAR_PF(bp) || BNXT_VF(bp)) {
1567                 RTE_LOG(ERR, PMD,
1568                         "PVID cannot be modified for this function\n");
1569                 return -ENOTSUP;
1570         }
1571         bp->vlan = on ? pvid : 0;
1572
1573         rc = bnxt_hwrm_set_default_vlan(bp, 0, 0);
1574         if (rc)
1575                 bp->vlan = vlan;
1576         return rc;
1577 }
1578
1579 static int
1580 bnxt_dev_led_on_op(struct rte_eth_dev *dev)
1581 {
1582         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1583
1584         return bnxt_hwrm_port_led_cfg(bp, true);
1585 }
1586
1587 static int
1588 bnxt_dev_led_off_op(struct rte_eth_dev *dev)
1589 {
1590         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1591
1592         return bnxt_hwrm_port_led_cfg(bp, false);
1593 }
1594
1595 static uint32_t
1596 bnxt_rx_queue_count_op(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1597 {
1598         uint32_t desc = 0, raw_cons = 0, cons;
1599         struct bnxt_cp_ring_info *cpr;
1600         struct bnxt_rx_queue *rxq;
1601         struct rx_pkt_cmpl *rxcmp;
1602         uint16_t cmp_type;
1603         uint8_t cmp = 1;
1604         bool valid;
1605
1606         rxq = dev->data->rx_queues[rx_queue_id];
1607         cpr = rxq->cp_ring;
1608         valid = cpr->valid;
1609
1610         while (raw_cons < rxq->nb_rx_desc) {
1611                 cons = RING_CMP(cpr->cp_ring_struct, raw_cons);
1612                 rxcmp = (struct rx_pkt_cmpl *)&cpr->cp_desc_ring[cons];
1613
1614                 if (!CMPL_VALID(rxcmp, valid))
1615                         goto nothing_to_do;
1616                 valid = FLIP_VALID(cons, cpr->cp_ring_struct->ring_mask, valid);
1617                 cmp_type = CMP_TYPE(rxcmp);
1618                 if (cmp_type == RX_TPA_END_CMPL_TYPE_RX_TPA_END) {
1619                         cmp = (rte_le_to_cpu_32(
1620                                         ((struct rx_tpa_end_cmpl *)
1621                                          (rxcmp))->agg_bufs_v1) &
1622                                RX_TPA_END_CMPL_AGG_BUFS_MASK) >>
1623                                 RX_TPA_END_CMPL_AGG_BUFS_SFT;
1624                         desc++;
1625                 } else if (cmp_type == 0x11) {
1626                         desc++;
1627                         cmp = (rxcmp->agg_bufs_v1 &
1628                                    RX_PKT_CMPL_AGG_BUFS_MASK) >>
1629                                 RX_PKT_CMPL_AGG_BUFS_SFT;
1630                 } else {
1631                         cmp = 1;
1632                 }
1633 nothing_to_do:
1634                 raw_cons += cmp ? cmp : 2;
1635         }
1636
1637         return desc;
1638 }
1639
1640 static int
1641 bnxt_rx_descriptor_status_op(void *rx_queue, uint16_t offset)
1642 {
1643         struct bnxt_rx_queue *rxq = (struct bnxt_rx_queue *)rx_queue;
1644         struct bnxt_rx_ring_info *rxr;
1645         struct bnxt_cp_ring_info *cpr;
1646         struct bnxt_sw_rx_bd *rx_buf;
1647         struct rx_pkt_cmpl *rxcmp;
1648         uint32_t cons, cp_cons;
1649
1650         if (!rxq)
1651                 return -EINVAL;
1652
1653         cpr = rxq->cp_ring;
1654         rxr = rxq->rx_ring;
1655
1656         if (offset >= rxq->nb_rx_desc)
1657                 return -EINVAL;
1658
1659         cons = RING_CMP(cpr->cp_ring_struct, offset);
1660         cp_cons = cpr->cp_raw_cons;
1661         rxcmp = (struct rx_pkt_cmpl *)&cpr->cp_desc_ring[cons];
1662
1663         if (cons > cp_cons) {
1664                 if (CMPL_VALID(rxcmp, cpr->valid))
1665                         return RTE_ETH_RX_DESC_DONE;
1666         } else {
1667                 if (CMPL_VALID(rxcmp, !cpr->valid))
1668                         return RTE_ETH_RX_DESC_DONE;
1669         }
1670         rx_buf = &rxr->rx_buf_ring[cons];
1671         if (rx_buf->mbuf == NULL)
1672                 return RTE_ETH_RX_DESC_UNAVAIL;
1673
1674
1675         return RTE_ETH_RX_DESC_AVAIL;
1676 }
1677
1678 static int
1679 bnxt_tx_descriptor_status_op(void *tx_queue, uint16_t offset)
1680 {
1681         struct bnxt_tx_queue *txq = (struct bnxt_tx_queue *)tx_queue;
1682         struct bnxt_tx_ring_info *txr;
1683         struct bnxt_cp_ring_info *cpr;
1684         struct bnxt_sw_tx_bd *tx_buf;
1685         struct tx_pkt_cmpl *txcmp;
1686         uint32_t cons, cp_cons;
1687
1688         if (!txq)
1689                 return -EINVAL;
1690
1691         cpr = txq->cp_ring;
1692         txr = txq->tx_ring;
1693
1694         if (offset >= txq->nb_tx_desc)
1695                 return -EINVAL;
1696
1697         cons = RING_CMP(cpr->cp_ring_struct, offset);
1698         txcmp = (struct tx_pkt_cmpl *)&cpr->cp_desc_ring[cons];
1699         cp_cons = cpr->cp_raw_cons;
1700
1701         if (cons > cp_cons) {
1702                 if (CMPL_VALID(txcmp, cpr->valid))
1703                         return RTE_ETH_TX_DESC_UNAVAIL;
1704         } else {
1705                 if (CMPL_VALID(txcmp, !cpr->valid))
1706                         return RTE_ETH_TX_DESC_UNAVAIL;
1707         }
1708         tx_buf = &txr->tx_buf_ring[cons];
1709         if (tx_buf->mbuf == NULL)
1710                 return RTE_ETH_TX_DESC_DONE;
1711
1712         return RTE_ETH_TX_DESC_FULL;
1713 }
1714
1715 static struct bnxt_filter_info *
1716 bnxt_match_and_validate_ether_filter(struct bnxt *bp,
1717                                 struct rte_eth_ethertype_filter *efilter,
1718                                 struct bnxt_vnic_info *vnic0,
1719                                 struct bnxt_vnic_info *vnic,
1720                                 int *ret)
1721 {
1722         struct bnxt_filter_info *mfilter = NULL;
1723         int match = 0;
1724         *ret = 0;
1725
1726         if (efilter->ether_type != ETHER_TYPE_IPv4 &&
1727                 efilter->ether_type != ETHER_TYPE_IPv6) {
1728                 RTE_LOG(ERR, PMD, "unsupported ether_type(0x%04x) in"
1729                         " ethertype filter.", efilter->ether_type);
1730                 *ret = -EINVAL;
1731                 goto exit;
1732         }
1733         if (efilter->queue >= bp->rx_nr_rings) {
1734                 RTE_LOG(ERR, PMD, "Invalid queue %d\n", efilter->queue);
1735                 *ret = -EINVAL;
1736                 goto exit;
1737         }
1738
1739         vnic0 = STAILQ_FIRST(&bp->ff_pool[0]);
1740         vnic = STAILQ_FIRST(&bp->ff_pool[efilter->queue]);
1741         if (vnic == NULL) {
1742                 RTE_LOG(ERR, PMD, "Invalid queue %d\n", efilter->queue);
1743                 *ret = -EINVAL;
1744                 goto exit;
1745         }
1746
1747         if (efilter->flags & RTE_ETHTYPE_FLAGS_DROP) {
1748                 STAILQ_FOREACH(mfilter, &vnic0->filter, next) {
1749                         if ((!memcmp(efilter->mac_addr.addr_bytes,
1750                                      mfilter->l2_addr, ETHER_ADDR_LEN) &&
1751                              mfilter->flags ==
1752                              HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_FLAGS_DROP &&
1753                              mfilter->ethertype == efilter->ether_type)) {
1754                                 match = 1;
1755                                 break;
1756                         }
1757                 }
1758         } else {
1759                 STAILQ_FOREACH(mfilter, &vnic->filter, next)
1760                         if ((!memcmp(efilter->mac_addr.addr_bytes,
1761                                      mfilter->l2_addr, ETHER_ADDR_LEN) &&
1762                              mfilter->ethertype == efilter->ether_type &&
1763                              mfilter->flags ==
1764                              HWRM_CFA_L2_FILTER_CFG_INPUT_FLAGS_PATH_RX)) {
1765                                 match = 1;
1766                                 break;
1767                         }
1768         }
1769
1770         if (match)
1771                 *ret = -EEXIST;
1772
1773 exit:
1774         return mfilter;
1775 }
1776
1777 static int
1778 bnxt_ethertype_filter(struct rte_eth_dev *dev,
1779                         enum rte_filter_op filter_op,
1780                         void *arg)
1781 {
1782         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1783         struct rte_eth_ethertype_filter *efilter =
1784                         (struct rte_eth_ethertype_filter *)arg;
1785         struct bnxt_filter_info *bfilter, *filter1;
1786         struct bnxt_vnic_info *vnic, *vnic0;
1787         int ret;
1788
1789         if (filter_op == RTE_ETH_FILTER_NOP)
1790                 return 0;
1791
1792         if (arg == NULL) {
1793                 RTE_LOG(ERR, PMD, "arg shouldn't be NULL for operation %u.",
1794                             filter_op);
1795                 return -EINVAL;
1796         }
1797
1798         vnic0 = STAILQ_FIRST(&bp->ff_pool[0]);
1799         vnic = STAILQ_FIRST(&bp->ff_pool[efilter->queue]);
1800
1801         switch (filter_op) {
1802         case RTE_ETH_FILTER_ADD:
1803                 bnxt_match_and_validate_ether_filter(bp, efilter,
1804                                                         vnic0, vnic, &ret);
1805                 if (ret < 0)
1806                         return ret;
1807
1808                 bfilter = bnxt_get_unused_filter(bp);
1809                 if (bfilter == NULL) {
1810                         RTE_LOG(ERR, PMD,
1811                                 "Not enough resources for a new filter.\n");
1812                         return -ENOMEM;
1813                 }
1814                 bfilter->filter_type = HWRM_CFA_NTUPLE_FILTER;
1815                 memcpy(bfilter->l2_addr, efilter->mac_addr.addr_bytes,
1816                        ETHER_ADDR_LEN);
1817                 memcpy(bfilter->dst_macaddr, efilter->mac_addr.addr_bytes,
1818                        ETHER_ADDR_LEN);
1819                 bfilter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_MACADDR;
1820                 bfilter->ethertype = efilter->ether_type;
1821                 bfilter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
1822
1823                 filter1 = bnxt_get_l2_filter(bp, bfilter, vnic0);
1824                 if (filter1 == NULL) {
1825                         ret = -1;
1826                         goto cleanup;
1827                 }
1828                 bfilter->enables |=
1829                         HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_L2_FILTER_ID;
1830                 bfilter->fw_l2_filter_id = filter1->fw_l2_filter_id;
1831
1832                 bfilter->dst_id = vnic->fw_vnic_id;
1833
1834                 if (efilter->flags & RTE_ETHTYPE_FLAGS_DROP) {
1835                         bfilter->flags =
1836                                 HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_FLAGS_DROP;
1837                 }
1838
1839                 ret = bnxt_hwrm_set_ntuple_filter(bp, bfilter->dst_id, bfilter);
1840                 if (ret)
1841                         goto cleanup;
1842                 STAILQ_INSERT_TAIL(&vnic->filter, bfilter, next);
1843                 break;
1844         case RTE_ETH_FILTER_DELETE:
1845                 filter1 = bnxt_match_and_validate_ether_filter(bp, efilter,
1846                                                         vnic0, vnic, &ret);
1847                 if (ret == -EEXIST) {
1848                         ret = bnxt_hwrm_clear_ntuple_filter(bp, filter1);
1849
1850                         STAILQ_REMOVE(&vnic->filter, filter1, bnxt_filter_info,
1851                                       next);
1852                         bnxt_free_filter(bp, filter1);
1853                 } else if (ret == 0) {
1854                         RTE_LOG(ERR, PMD, "No matching filter found\n");
1855                 }
1856                 break;
1857         default:
1858                 RTE_LOG(ERR, PMD, "unsupported operation %u.", filter_op);
1859                 ret = -EINVAL;
1860                 goto error;
1861         }
1862         return ret;
1863 cleanup:
1864         bnxt_free_filter(bp, bfilter);
1865 error:
1866         return ret;
1867 }
1868
1869 static inline int
1870 parse_ntuple_filter(struct bnxt *bp,
1871                     struct rte_eth_ntuple_filter *nfilter,
1872                     struct bnxt_filter_info *bfilter)
1873 {
1874         uint32_t en = 0;
1875
1876         if (nfilter->queue >= bp->rx_nr_rings) {
1877                 RTE_LOG(ERR, PMD, "Invalid queue %d\n", nfilter->queue);
1878                 return -EINVAL;
1879         }
1880
1881         switch (nfilter->dst_port_mask) {
1882         case UINT16_MAX:
1883                 bfilter->dst_port_mask = -1;
1884                 bfilter->dst_port = nfilter->dst_port;
1885                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT |
1886                         NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT_MASK;
1887                 break;
1888         default:
1889                 RTE_LOG(ERR, PMD, "invalid dst_port mask.");
1890                 return -EINVAL;
1891         }
1892
1893         bfilter->ip_addr_type = NTUPLE_FLTR_ALLOC_INPUT_IP_ADDR_TYPE_IPV4;
1894         en |= NTUPLE_FLTR_ALLOC_IN_EN_IP_PROTO;
1895
1896         switch (nfilter->proto_mask) {
1897         case UINT8_MAX:
1898                 if (nfilter->proto == 17) /* IPPROTO_UDP */
1899                         bfilter->ip_protocol = 17;
1900                 else if (nfilter->proto == 6) /* IPPROTO_TCP */
1901                         bfilter->ip_protocol = 6;
1902                 else
1903                         return -EINVAL;
1904                 en |= NTUPLE_FLTR_ALLOC_IN_EN_IP_PROTO;
1905                 break;
1906         default:
1907                 RTE_LOG(ERR, PMD, "invalid protocol mask.");
1908                 return -EINVAL;
1909         }
1910
1911         switch (nfilter->dst_ip_mask) {
1912         case UINT32_MAX:
1913                 bfilter->dst_ipaddr_mask[0] = -1;
1914                 bfilter->dst_ipaddr[0] = nfilter->dst_ip;
1915                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR |
1916                         NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR_MASK;
1917                 break;
1918         default:
1919                 RTE_LOG(ERR, PMD, "invalid dst_ip mask.");
1920                 return -EINVAL;
1921         }
1922
1923         switch (nfilter->src_ip_mask) {
1924         case UINT32_MAX:
1925                 bfilter->src_ipaddr_mask[0] = -1;
1926                 bfilter->src_ipaddr[0] = nfilter->src_ip;
1927                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR |
1928                         NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR_MASK;
1929                 break;
1930         default:
1931                 RTE_LOG(ERR, PMD, "invalid src_ip mask.");
1932                 return -EINVAL;
1933         }
1934
1935         switch (nfilter->src_port_mask) {
1936         case UINT16_MAX:
1937                 bfilter->src_port_mask = -1;
1938                 bfilter->src_port = nfilter->src_port;
1939                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT |
1940                         NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT_MASK;
1941                 break;
1942         default:
1943                 RTE_LOG(ERR, PMD, "invalid src_port mask.");
1944                 return -EINVAL;
1945         }
1946
1947         //TODO Priority
1948         //nfilter->priority = (uint8_t)filter->priority;
1949
1950         bfilter->enables = en;
1951         return 0;
1952 }
1953
1954 static struct bnxt_filter_info*
1955 bnxt_match_ntuple_filter(struct bnxt_vnic_info *vnic,
1956                          struct bnxt_filter_info *bfilter)
1957 {
1958         struct bnxt_filter_info *mfilter = NULL;
1959
1960         STAILQ_FOREACH(mfilter, &vnic->filter, next) {
1961                 if (bfilter->src_ipaddr[0] == mfilter->src_ipaddr[0] &&
1962                     bfilter->src_ipaddr_mask[0] ==
1963                     mfilter->src_ipaddr_mask[0] &&
1964                     bfilter->src_port == mfilter->src_port &&
1965                     bfilter->src_port_mask == mfilter->src_port_mask &&
1966                     bfilter->dst_ipaddr[0] == mfilter->dst_ipaddr[0] &&
1967                     bfilter->dst_ipaddr_mask[0] ==
1968                     mfilter->dst_ipaddr_mask[0] &&
1969                     bfilter->dst_port == mfilter->dst_port &&
1970                     bfilter->dst_port_mask == mfilter->dst_port_mask &&
1971                     bfilter->flags == mfilter->flags &&
1972                     bfilter->enables == mfilter->enables)
1973                         return mfilter;
1974         }
1975         return NULL;
1976 }
1977
1978 static int
1979 bnxt_cfg_ntuple_filter(struct bnxt *bp,
1980                        struct rte_eth_ntuple_filter *nfilter,
1981                        enum rte_filter_op filter_op)
1982 {
1983         struct bnxt_filter_info *bfilter, *mfilter, *filter1;
1984         struct bnxt_vnic_info *vnic, *vnic0;
1985         int ret;
1986
1987         if (nfilter->flags != RTE_5TUPLE_FLAGS) {
1988                 RTE_LOG(ERR, PMD, "only 5tuple is supported.");
1989                 return -EINVAL;
1990         }
1991
1992         if (nfilter->flags & RTE_NTUPLE_FLAGS_TCP_FLAG) {
1993                 RTE_LOG(ERR, PMD, "Ntuple filter: TCP flags not supported\n");
1994                 return -EINVAL;
1995         }
1996
1997         bfilter = bnxt_get_unused_filter(bp);
1998         if (bfilter == NULL) {
1999                 RTE_LOG(ERR, PMD,
2000                         "Not enough resources for a new filter.\n");
2001                 return -ENOMEM;
2002         }
2003         ret = parse_ntuple_filter(bp, nfilter, bfilter);
2004         if (ret < 0)
2005                 goto free_filter;
2006
2007         vnic = STAILQ_FIRST(&bp->ff_pool[nfilter->queue]);
2008         vnic0 = STAILQ_FIRST(&bp->ff_pool[0]);
2009         filter1 = STAILQ_FIRST(&vnic0->filter);
2010         if (filter1 == NULL) {
2011                 ret = -1;
2012                 goto free_filter;
2013         }
2014
2015         bfilter->dst_id = vnic->fw_vnic_id;
2016         bfilter->fw_l2_filter_id = filter1->fw_l2_filter_id;
2017         bfilter->enables |=
2018                 HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_L2_FILTER_ID;
2019         bfilter->ethertype = 0x800;
2020         bfilter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
2021
2022         mfilter = bnxt_match_ntuple_filter(vnic, bfilter);
2023
2024         if (mfilter != NULL && filter_op == RTE_ETH_FILTER_ADD) {
2025                 RTE_LOG(ERR, PMD, "filter exists.");
2026                 ret = -EEXIST;
2027                 goto free_filter;
2028         }
2029         if (mfilter == NULL && filter_op == RTE_ETH_FILTER_DELETE) {
2030                 RTE_LOG(ERR, PMD, "filter doesn't exist.");
2031                 ret = -ENOENT;
2032                 goto free_filter;
2033         }
2034
2035         if (filter_op == RTE_ETH_FILTER_ADD) {
2036                 bfilter->filter_type = HWRM_CFA_NTUPLE_FILTER;
2037                 ret = bnxt_hwrm_set_ntuple_filter(bp, bfilter->dst_id, bfilter);
2038                 if (ret)
2039                         goto free_filter;
2040                 STAILQ_INSERT_TAIL(&vnic->filter, bfilter, next);
2041         } else {
2042                 if (mfilter == NULL) {
2043                         /* This should not happen. But for Coverity! */
2044                         ret = -ENOENT;
2045                         goto free_filter;
2046                 }
2047                 ret = bnxt_hwrm_clear_ntuple_filter(bp, mfilter);
2048
2049                 STAILQ_REMOVE(&vnic->filter, mfilter, bnxt_filter_info,
2050                               next);
2051                 bnxt_free_filter(bp, mfilter);
2052                 bfilter->fw_l2_filter_id = -1;
2053                 bnxt_free_filter(bp, bfilter);
2054         }
2055
2056         return 0;
2057 free_filter:
2058         bfilter->fw_l2_filter_id = -1;
2059         bnxt_free_filter(bp, bfilter);
2060         return ret;
2061 }
2062
2063 static int
2064 bnxt_ntuple_filter(struct rte_eth_dev *dev,
2065                         enum rte_filter_op filter_op,
2066                         void *arg)
2067 {
2068         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2069         int ret;
2070
2071         if (filter_op == RTE_ETH_FILTER_NOP)
2072                 return 0;
2073
2074         if (arg == NULL) {
2075                 RTE_LOG(ERR, PMD, "arg shouldn't be NULL for operation %u.",
2076                             filter_op);
2077                 return -EINVAL;
2078         }
2079
2080         switch (filter_op) {
2081         case RTE_ETH_FILTER_ADD:
2082                 ret = bnxt_cfg_ntuple_filter(bp,
2083                         (struct rte_eth_ntuple_filter *)arg,
2084                         filter_op);
2085                 break;
2086         case RTE_ETH_FILTER_DELETE:
2087                 ret = bnxt_cfg_ntuple_filter(bp,
2088                         (struct rte_eth_ntuple_filter *)arg,
2089                         filter_op);
2090                 break;
2091         default:
2092                 RTE_LOG(ERR, PMD, "unsupported operation %u.", filter_op);
2093                 ret = -EINVAL;
2094                 break;
2095         }
2096         return ret;
2097 }
2098
2099 static int
2100 bnxt_parse_fdir_filter(struct bnxt *bp,
2101                        struct rte_eth_fdir_filter *fdir,
2102                        struct bnxt_filter_info *filter)
2103 {
2104         enum rte_fdir_mode fdir_mode =
2105                 bp->eth_dev->data->dev_conf.fdir_conf.mode;
2106         struct bnxt_vnic_info *vnic0, *vnic;
2107         struct bnxt_filter_info *filter1;
2108         uint32_t en = 0;
2109         int i;
2110
2111         if (fdir_mode == RTE_FDIR_MODE_PERFECT_TUNNEL)
2112                 return -EINVAL;
2113
2114         filter->l2_ovlan = fdir->input.flow_ext.vlan_tci;
2115         en |= EM_FLOW_ALLOC_INPUT_EN_OVLAN_VID;
2116
2117         switch (fdir->input.flow_type) {
2118         case RTE_ETH_FLOW_IPV4:
2119         case RTE_ETH_FLOW_NONFRAG_IPV4_OTHER:
2120                 /* FALLTHROUGH */
2121                 filter->src_ipaddr[0] = fdir->input.flow.ip4_flow.src_ip;
2122                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR;
2123                 filter->dst_ipaddr[0] = fdir->input.flow.ip4_flow.dst_ip;
2124                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR;
2125                 filter->ip_protocol = fdir->input.flow.ip4_flow.proto;
2126                 en |= NTUPLE_FLTR_ALLOC_IN_EN_IP_PROTO;
2127                 filter->ip_addr_type =
2128                         NTUPLE_FLTR_ALLOC_INPUT_IP_ADDR_TYPE_IPV4;
2129                 filter->src_ipaddr_mask[0] = 0xffffffff;
2130                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR_MASK;
2131                 filter->dst_ipaddr_mask[0] = 0xffffffff;
2132                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR_MASK;
2133                 filter->ethertype = 0x800;
2134                 filter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
2135                 break;
2136         case RTE_ETH_FLOW_NONFRAG_IPV4_TCP:
2137                 filter->src_port = fdir->input.flow.tcp4_flow.src_port;
2138                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT;
2139                 filter->dst_port = fdir->input.flow.tcp4_flow.dst_port;
2140                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT;
2141                 filter->dst_port_mask = 0xffff;
2142                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT_MASK;
2143                 filter->src_port_mask = 0xffff;
2144                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT_MASK;
2145                 filter->src_ipaddr[0] = fdir->input.flow.tcp4_flow.ip.src_ip;
2146                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR;
2147                 filter->dst_ipaddr[0] = fdir->input.flow.tcp4_flow.ip.dst_ip;
2148                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR;
2149                 filter->ip_protocol = 6;
2150                 en |= NTUPLE_FLTR_ALLOC_IN_EN_IP_PROTO;
2151                 filter->ip_addr_type =
2152                         NTUPLE_FLTR_ALLOC_INPUT_IP_ADDR_TYPE_IPV4;
2153                 filter->src_ipaddr_mask[0] = 0xffffffff;
2154                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR_MASK;
2155                 filter->dst_ipaddr_mask[0] = 0xffffffff;
2156                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR_MASK;
2157                 filter->ethertype = 0x800;
2158                 filter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
2159                 break;
2160         case RTE_ETH_FLOW_NONFRAG_IPV4_UDP:
2161                 filter->src_port = fdir->input.flow.udp4_flow.src_port;
2162                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT;
2163                 filter->dst_port = fdir->input.flow.udp4_flow.dst_port;
2164                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT;
2165                 filter->dst_port_mask = 0xffff;
2166                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT_MASK;
2167                 filter->src_port_mask = 0xffff;
2168                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT_MASK;
2169                 filter->src_ipaddr[0] = fdir->input.flow.udp4_flow.ip.src_ip;
2170                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR;
2171                 filter->dst_ipaddr[0] = fdir->input.flow.udp4_flow.ip.dst_ip;
2172                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR;
2173                 filter->ip_protocol = 17;
2174                 en |= NTUPLE_FLTR_ALLOC_IN_EN_IP_PROTO;
2175                 filter->ip_addr_type =
2176                         NTUPLE_FLTR_ALLOC_INPUT_IP_ADDR_TYPE_IPV4;
2177                 filter->src_ipaddr_mask[0] = 0xffffffff;
2178                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR_MASK;
2179                 filter->dst_ipaddr_mask[0] = 0xffffffff;
2180                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR_MASK;
2181                 filter->ethertype = 0x800;
2182                 filter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
2183                 break;
2184         case RTE_ETH_FLOW_IPV6:
2185         case RTE_ETH_FLOW_NONFRAG_IPV6_OTHER:
2186                 /* FALLTHROUGH */
2187                 filter->ip_addr_type =
2188                         NTUPLE_FLTR_ALLOC_INPUT_IP_ADDR_TYPE_IPV6;
2189                 filter->ip_protocol = fdir->input.flow.ipv6_flow.proto;
2190                 en |= NTUPLE_FLTR_ALLOC_IN_EN_IP_PROTO;
2191                 rte_memcpy(filter->src_ipaddr,
2192                            fdir->input.flow.ipv6_flow.src_ip, 16);
2193                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR;
2194                 rte_memcpy(filter->dst_ipaddr,
2195                            fdir->input.flow.ipv6_flow.dst_ip, 16);
2196                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR;
2197                 memset(filter->dst_ipaddr_mask, 0xff, 16);
2198                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR_MASK;
2199                 memset(filter->src_ipaddr_mask, 0xff, 16);
2200                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR_MASK;
2201                 filter->ethertype = 0x86dd;
2202                 filter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
2203                 break;
2204         case RTE_ETH_FLOW_NONFRAG_IPV6_TCP:
2205                 filter->src_port = fdir->input.flow.tcp6_flow.src_port;
2206                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT;
2207                 filter->dst_port = fdir->input.flow.tcp6_flow.dst_port;
2208                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT;
2209                 filter->dst_port_mask = 0xffff;
2210                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT_MASK;
2211                 filter->src_port_mask = 0xffff;
2212                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT_MASK;
2213                 filter->ip_addr_type =
2214                         NTUPLE_FLTR_ALLOC_INPUT_IP_ADDR_TYPE_IPV6;
2215                 filter->ip_protocol = fdir->input.flow.tcp6_flow.ip.proto;
2216                 en |= NTUPLE_FLTR_ALLOC_IN_EN_IP_PROTO;
2217                 rte_memcpy(filter->src_ipaddr,
2218                            fdir->input.flow.tcp6_flow.ip.src_ip, 16);
2219                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR;
2220                 rte_memcpy(filter->dst_ipaddr,
2221                            fdir->input.flow.tcp6_flow.ip.dst_ip, 16);
2222                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR;
2223                 memset(filter->dst_ipaddr_mask, 0xff, 16);
2224                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR_MASK;
2225                 memset(filter->src_ipaddr_mask, 0xff, 16);
2226                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR_MASK;
2227                 filter->ethertype = 0x86dd;
2228                 filter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
2229                 break;
2230         case RTE_ETH_FLOW_NONFRAG_IPV6_UDP:
2231                 filter->src_port = fdir->input.flow.udp6_flow.src_port;
2232                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT;
2233                 filter->dst_port = fdir->input.flow.udp6_flow.dst_port;
2234                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT;
2235                 filter->dst_port_mask = 0xffff;
2236                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT_MASK;
2237                 filter->src_port_mask = 0xffff;
2238                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT_MASK;
2239                 filter->ip_addr_type =
2240                         NTUPLE_FLTR_ALLOC_INPUT_IP_ADDR_TYPE_IPV6;
2241                 filter->ip_protocol = fdir->input.flow.udp6_flow.ip.proto;
2242                 en |= NTUPLE_FLTR_ALLOC_IN_EN_IP_PROTO;
2243                 rte_memcpy(filter->src_ipaddr,
2244                            fdir->input.flow.udp6_flow.ip.src_ip, 16);
2245                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR;
2246                 rte_memcpy(filter->dst_ipaddr,
2247                            fdir->input.flow.udp6_flow.ip.dst_ip, 16);
2248                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR;
2249                 memset(filter->dst_ipaddr_mask, 0xff, 16);
2250                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR_MASK;
2251                 memset(filter->src_ipaddr_mask, 0xff, 16);
2252                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR_MASK;
2253                 filter->ethertype = 0x86dd;
2254                 filter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
2255                 break;
2256         case RTE_ETH_FLOW_L2_PAYLOAD:
2257                 filter->ethertype = fdir->input.flow.l2_flow.ether_type;
2258                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
2259                 break;
2260         case RTE_ETH_FLOW_VXLAN:
2261                 if (fdir->action.behavior == RTE_ETH_FDIR_REJECT)
2262                         return -EINVAL;
2263                 filter->vni = fdir->input.flow.tunnel_flow.tunnel_id;
2264                 filter->tunnel_type =
2265                         CFA_NTUPLE_FILTER_ALLOC_REQ_TUNNEL_TYPE_VXLAN;
2266                 en |= HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_TUNNEL_TYPE;
2267                 break;
2268         case RTE_ETH_FLOW_NVGRE:
2269                 if (fdir->action.behavior == RTE_ETH_FDIR_REJECT)
2270                         return -EINVAL;
2271                 filter->vni = fdir->input.flow.tunnel_flow.tunnel_id;
2272                 filter->tunnel_type =
2273                         CFA_NTUPLE_FILTER_ALLOC_REQ_TUNNEL_TYPE_NVGRE;
2274                 en |= HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_TUNNEL_TYPE;
2275                 break;
2276         case RTE_ETH_FLOW_UNKNOWN:
2277         case RTE_ETH_FLOW_RAW:
2278         case RTE_ETH_FLOW_FRAG_IPV4:
2279         case RTE_ETH_FLOW_NONFRAG_IPV4_SCTP:
2280         case RTE_ETH_FLOW_FRAG_IPV6:
2281         case RTE_ETH_FLOW_NONFRAG_IPV6_SCTP:
2282         case RTE_ETH_FLOW_IPV6_EX:
2283         case RTE_ETH_FLOW_IPV6_TCP_EX:
2284         case RTE_ETH_FLOW_IPV6_UDP_EX:
2285         case RTE_ETH_FLOW_GENEVE:
2286                 /* FALLTHROUGH */
2287         default:
2288                 return -EINVAL;
2289         }
2290
2291         vnic0 = STAILQ_FIRST(&bp->ff_pool[0]);
2292         vnic = STAILQ_FIRST(&bp->ff_pool[fdir->action.rx_queue]);
2293         if (vnic == NULL) {
2294                 RTE_LOG(ERR, PMD, "Invalid queue %d\n", fdir->action.rx_queue);
2295                 return -EINVAL;
2296         }
2297
2298
2299         if (fdir_mode == RTE_FDIR_MODE_PERFECT_MAC_VLAN) {
2300                 rte_memcpy(filter->dst_macaddr,
2301                         fdir->input.flow.mac_vlan_flow.mac_addr.addr_bytes, 6);
2302                         en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_MACADDR;
2303         }
2304
2305         if (fdir->action.behavior == RTE_ETH_FDIR_REJECT) {
2306                 filter->flags = HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_FLAGS_DROP;
2307                 filter1 = STAILQ_FIRST(&vnic0->filter);
2308                 //filter1 = bnxt_get_l2_filter(bp, filter, vnic0);
2309         } else {
2310                 filter->dst_id = vnic->fw_vnic_id;
2311                 for (i = 0; i < ETHER_ADDR_LEN; i++)
2312                         if (filter->dst_macaddr[i] == 0x00)
2313                                 filter1 = STAILQ_FIRST(&vnic0->filter);
2314                         else
2315                                 filter1 = bnxt_get_l2_filter(bp, filter, vnic);
2316         }
2317
2318         if (filter1 == NULL)
2319                 return -EINVAL;
2320
2321         en |= HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_L2_FILTER_ID;
2322         filter->fw_l2_filter_id = filter1->fw_l2_filter_id;
2323
2324         filter->enables = en;
2325
2326         return 0;
2327 }
2328
2329 static struct bnxt_filter_info *
2330 bnxt_match_fdir(struct bnxt *bp, struct bnxt_filter_info *nf)
2331 {
2332         struct bnxt_filter_info *mf = NULL;
2333         int i;
2334
2335         for (i = bp->nr_vnics - 1; i >= 0; i--) {
2336                 struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
2337
2338                 STAILQ_FOREACH(mf, &vnic->filter, next) {
2339                         if (mf->filter_type == nf->filter_type &&
2340                             mf->flags == nf->flags &&
2341                             mf->src_port == nf->src_port &&
2342                             mf->src_port_mask == nf->src_port_mask &&
2343                             mf->dst_port == nf->dst_port &&
2344                             mf->dst_port_mask == nf->dst_port_mask &&
2345                             mf->ip_protocol == nf->ip_protocol &&
2346                             mf->ip_addr_type == nf->ip_addr_type &&
2347                             mf->ethertype == nf->ethertype &&
2348                             mf->vni == nf->vni &&
2349                             mf->tunnel_type == nf->tunnel_type &&
2350                             mf->l2_ovlan == nf->l2_ovlan &&
2351                             mf->l2_ovlan_mask == nf->l2_ovlan_mask &&
2352                             mf->l2_ivlan == nf->l2_ivlan &&
2353                             mf->l2_ivlan_mask == nf->l2_ivlan_mask &&
2354                             !memcmp(mf->l2_addr, nf->l2_addr, ETHER_ADDR_LEN) &&
2355                             !memcmp(mf->l2_addr_mask, nf->l2_addr_mask,
2356                                     ETHER_ADDR_LEN) &&
2357                             !memcmp(mf->src_macaddr, nf->src_macaddr,
2358                                     ETHER_ADDR_LEN) &&
2359                             !memcmp(mf->dst_macaddr, nf->dst_macaddr,
2360                                     ETHER_ADDR_LEN) &&
2361                             !memcmp(mf->src_ipaddr, nf->src_ipaddr,
2362                                     sizeof(nf->src_ipaddr)) &&
2363                             !memcmp(mf->src_ipaddr_mask, nf->src_ipaddr_mask,
2364                                     sizeof(nf->src_ipaddr_mask)) &&
2365                             !memcmp(mf->dst_ipaddr, nf->dst_ipaddr,
2366                                     sizeof(nf->dst_ipaddr)) &&
2367                             !memcmp(mf->dst_ipaddr_mask, nf->dst_ipaddr_mask,
2368                                     sizeof(nf->dst_ipaddr_mask)))
2369                                 return mf;
2370                 }
2371         }
2372         return NULL;
2373 }
2374
2375 static int
2376 bnxt_fdir_filter(struct rte_eth_dev *dev,
2377                  enum rte_filter_op filter_op,
2378                  void *arg)
2379 {
2380         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2381         struct rte_eth_fdir_filter *fdir  = (struct rte_eth_fdir_filter *)arg;
2382         struct bnxt_filter_info *filter, *match;
2383         struct bnxt_vnic_info *vnic;
2384         int ret = 0, i;
2385
2386         if (filter_op == RTE_ETH_FILTER_NOP)
2387                 return 0;
2388
2389         if (arg == NULL && filter_op != RTE_ETH_FILTER_FLUSH)
2390                 return -EINVAL;
2391
2392         switch (filter_op) {
2393         case RTE_ETH_FILTER_ADD:
2394         case RTE_ETH_FILTER_DELETE:
2395                 /* FALLTHROUGH */
2396                 filter = bnxt_get_unused_filter(bp);
2397                 if (filter == NULL) {
2398                         RTE_LOG(ERR, PMD,
2399                                 "Not enough resources for a new flow.\n");
2400                         return -ENOMEM;
2401                 }
2402
2403                 ret = bnxt_parse_fdir_filter(bp, fdir, filter);
2404                 if (ret != 0)
2405                         goto free_filter;
2406
2407                 match = bnxt_match_fdir(bp, filter);
2408                 if (match != NULL && filter_op == RTE_ETH_FILTER_ADD) {
2409                         RTE_LOG(ERR, PMD, "Flow already exists.\n");
2410                         ret = -EEXIST;
2411                         goto free_filter;
2412                 }
2413                 if (match == NULL && filter_op == RTE_ETH_FILTER_DELETE) {
2414                         RTE_LOG(ERR, PMD, "Flow does not exist.\n");
2415                         ret = -ENOENT;
2416                         goto free_filter;
2417                 }
2418
2419                 if (fdir->action.behavior == RTE_ETH_FDIR_REJECT)
2420                         vnic = STAILQ_FIRST(&bp->ff_pool[0]);
2421                 else
2422                         vnic =
2423                         STAILQ_FIRST(&bp->ff_pool[fdir->action.rx_queue]);
2424
2425                 if (filter_op == RTE_ETH_FILTER_ADD) {
2426                         filter->filter_type = HWRM_CFA_NTUPLE_FILTER;
2427                         ret = bnxt_hwrm_set_ntuple_filter(bp,
2428                                                           filter->dst_id,
2429                                                           filter);
2430                         if (ret)
2431                                 goto free_filter;
2432                         STAILQ_INSERT_TAIL(&vnic->filter, filter, next);
2433                 } else {
2434                         ret = bnxt_hwrm_clear_ntuple_filter(bp, match);
2435                         STAILQ_REMOVE(&vnic->filter, match,
2436                                       bnxt_filter_info, next);
2437                         bnxt_free_filter(bp, match);
2438                         filter->fw_l2_filter_id = -1;
2439                         bnxt_free_filter(bp, filter);
2440                 }
2441                 break;
2442         case RTE_ETH_FILTER_FLUSH:
2443                 for (i = bp->nr_vnics - 1; i >= 0; i--) {
2444                         struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
2445
2446                         STAILQ_FOREACH(filter, &vnic->filter, next) {
2447                                 if (filter->filter_type ==
2448                                     HWRM_CFA_NTUPLE_FILTER) {
2449                                         ret =
2450                                         bnxt_hwrm_clear_ntuple_filter(bp,
2451                                                                       filter);
2452                                         STAILQ_REMOVE(&vnic->filter, filter,
2453                                                       bnxt_filter_info, next);
2454                                 }
2455                         }
2456                 }
2457                 return ret;
2458         case RTE_ETH_FILTER_UPDATE:
2459         case RTE_ETH_FILTER_STATS:
2460         case RTE_ETH_FILTER_INFO:
2461                 /* FALLTHROUGH */
2462                 RTE_LOG(ERR, PMD, "operation %u not implemented", filter_op);
2463                 break;
2464         default:
2465                 RTE_LOG(ERR, PMD, "unknown operation %u", filter_op);
2466                 ret = -EINVAL;
2467                 break;
2468         }
2469         return ret;
2470
2471 free_filter:
2472         filter->fw_l2_filter_id = -1;
2473         bnxt_free_filter(bp, filter);
2474         return ret;
2475 }
2476
2477 static int
2478 bnxt_filter_ctrl_op(struct rte_eth_dev *dev __rte_unused,
2479                     enum rte_filter_type filter_type,
2480                     enum rte_filter_op filter_op, void *arg)
2481 {
2482         int ret = 0;
2483
2484         switch (filter_type) {
2485         case RTE_ETH_FILTER_TUNNEL:
2486                 RTE_LOG(ERR, PMD,
2487                         "filter type: %d: To be implemented\n", filter_type);
2488                 break;
2489         case RTE_ETH_FILTER_FDIR:
2490                 ret = bnxt_fdir_filter(dev, filter_op, arg);
2491                 break;
2492         case RTE_ETH_FILTER_NTUPLE:
2493                 ret = bnxt_ntuple_filter(dev, filter_op, arg);
2494                 break;
2495         case RTE_ETH_FILTER_ETHERTYPE:
2496                 ret = bnxt_ethertype_filter(dev, filter_op, arg);
2497                 break;
2498         case RTE_ETH_FILTER_GENERIC:
2499                 if (filter_op != RTE_ETH_FILTER_GET)
2500                         return -EINVAL;
2501                 *(const void **)arg = &bnxt_flow_ops;
2502                 break;
2503         default:
2504                 RTE_LOG(ERR, PMD,
2505                         "Filter type (%d) not supported", filter_type);
2506                 ret = -EINVAL;
2507                 break;
2508         }
2509         return ret;
2510 }
2511
2512 static const uint32_t *
2513 bnxt_dev_supported_ptypes_get_op(struct rte_eth_dev *dev)
2514 {
2515         static const uint32_t ptypes[] = {
2516                 RTE_PTYPE_L2_ETHER_VLAN,
2517                 RTE_PTYPE_L3_IPV4_EXT_UNKNOWN,
2518                 RTE_PTYPE_L3_IPV6_EXT_UNKNOWN,
2519                 RTE_PTYPE_L4_ICMP,
2520                 RTE_PTYPE_L4_TCP,
2521                 RTE_PTYPE_L4_UDP,
2522                 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN,
2523                 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN,
2524                 RTE_PTYPE_INNER_L4_ICMP,
2525                 RTE_PTYPE_INNER_L4_TCP,
2526                 RTE_PTYPE_INNER_L4_UDP,
2527                 RTE_PTYPE_UNKNOWN
2528         };
2529
2530         if (dev->rx_pkt_burst == bnxt_recv_pkts)
2531                 return ptypes;
2532         return NULL;
2533 }
2534
2535
2536
2537 static int
2538 bnxt_get_eeprom_length_op(struct rte_eth_dev *dev)
2539 {
2540         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2541         int rc;
2542         uint32_t dir_entries;
2543         uint32_t entry_length;
2544
2545         RTE_LOG(INFO, PMD, "%s(): %04x:%02x:%02x:%02x\n",
2546                 __func__, bp->pdev->addr.domain, bp->pdev->addr.bus,
2547                 bp->pdev->addr.devid, bp->pdev->addr.function);
2548
2549         rc = bnxt_hwrm_nvm_get_dir_info(bp, &dir_entries, &entry_length);
2550         if (rc != 0)
2551                 return rc;
2552
2553         return dir_entries * entry_length;
2554 }
2555
2556 static int
2557 bnxt_get_eeprom_op(struct rte_eth_dev *dev,
2558                 struct rte_dev_eeprom_info *in_eeprom)
2559 {
2560         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2561         uint32_t index;
2562         uint32_t offset;
2563
2564         RTE_LOG(INFO, PMD, "%s(): %04x:%02x:%02x:%02x in_eeprom->offset = %d "
2565                 "len = %d\n", __func__, bp->pdev->addr.domain,
2566                 bp->pdev->addr.bus, bp->pdev->addr.devid,
2567                 bp->pdev->addr.function, in_eeprom->offset, in_eeprom->length);
2568
2569         if (in_eeprom->offset == 0) /* special offset value to get directory */
2570                 return bnxt_get_nvram_directory(bp, in_eeprom->length,
2571                                                 in_eeprom->data);
2572
2573         index = in_eeprom->offset >> 24;
2574         offset = in_eeprom->offset & 0xffffff;
2575
2576         if (index != 0)
2577                 return bnxt_hwrm_get_nvram_item(bp, index - 1, offset,
2578                                            in_eeprom->length, in_eeprom->data);
2579
2580         return 0;
2581 }
2582
2583 static bool bnxt_dir_type_is_ape_bin_format(uint16_t dir_type)
2584 {
2585         switch (dir_type) {
2586         case BNX_DIR_TYPE_CHIMP_PATCH:
2587         case BNX_DIR_TYPE_BOOTCODE:
2588         case BNX_DIR_TYPE_BOOTCODE_2:
2589         case BNX_DIR_TYPE_APE_FW:
2590         case BNX_DIR_TYPE_APE_PATCH:
2591         case BNX_DIR_TYPE_KONG_FW:
2592         case BNX_DIR_TYPE_KONG_PATCH:
2593         case BNX_DIR_TYPE_BONO_FW:
2594         case BNX_DIR_TYPE_BONO_PATCH:
2595                 return true;
2596         }
2597
2598         return false;
2599 }
2600
2601 static bool bnxt_dir_type_is_other_exec_format(uint16_t dir_type)
2602 {
2603         switch (dir_type) {
2604         case BNX_DIR_TYPE_AVS:
2605         case BNX_DIR_TYPE_EXP_ROM_MBA:
2606         case BNX_DIR_TYPE_PCIE:
2607         case BNX_DIR_TYPE_TSCF_UCODE:
2608         case BNX_DIR_TYPE_EXT_PHY:
2609         case BNX_DIR_TYPE_CCM:
2610         case BNX_DIR_TYPE_ISCSI_BOOT:
2611         case BNX_DIR_TYPE_ISCSI_BOOT_IPV6:
2612         case BNX_DIR_TYPE_ISCSI_BOOT_IPV4N6:
2613                 return true;
2614         }
2615
2616         return false;
2617 }
2618
2619 static bool bnxt_dir_type_is_executable(uint16_t dir_type)
2620 {
2621         return bnxt_dir_type_is_ape_bin_format(dir_type) ||
2622                 bnxt_dir_type_is_other_exec_format(dir_type);
2623 }
2624
2625 static int
2626 bnxt_set_eeprom_op(struct rte_eth_dev *dev,
2627                 struct rte_dev_eeprom_info *in_eeprom)
2628 {
2629         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2630         uint8_t index, dir_op;
2631         uint16_t type, ext, ordinal, attr;
2632
2633         RTE_LOG(INFO, PMD, "%s(): %04x:%02x:%02x:%02x in_eeprom->offset = %d "
2634                 "len = %d\n", __func__, bp->pdev->addr.domain,
2635                 bp->pdev->addr.bus, bp->pdev->addr.devid,
2636                 bp->pdev->addr.function, in_eeprom->offset, in_eeprom->length);
2637
2638         if (!BNXT_PF(bp)) {
2639                 RTE_LOG(ERR, PMD, "NVM write not supported from a VF\n");
2640                 return -EINVAL;
2641         }
2642
2643         type = in_eeprom->magic >> 16;
2644
2645         if (type == 0xffff) { /* special value for directory operations */
2646                 index = in_eeprom->magic & 0xff;
2647                 dir_op = in_eeprom->magic >> 8;
2648                 if (index == 0)
2649                         return -EINVAL;
2650                 switch (dir_op) {
2651                 case 0x0e: /* erase */
2652                         if (in_eeprom->offset != ~in_eeprom->magic)
2653                                 return -EINVAL;
2654                         return bnxt_hwrm_erase_nvram_directory(bp, index - 1);
2655                 default:
2656                         return -EINVAL;
2657                 }
2658         }
2659
2660         /* Create or re-write an NVM item: */
2661         if (bnxt_dir_type_is_executable(type) == true)
2662                 return -EOPNOTSUPP;
2663         ext = in_eeprom->magic & 0xffff;
2664         ordinal = in_eeprom->offset >> 16;
2665         attr = in_eeprom->offset & 0xffff;
2666
2667         return bnxt_hwrm_flash_nvram(bp, type, ordinal, ext, attr,
2668                                      in_eeprom->data, in_eeprom->length);
2669         return 0;
2670 }
2671
2672 /*
2673  * Initialization
2674  */
2675
2676 static const struct eth_dev_ops bnxt_dev_ops = {
2677         .dev_infos_get = bnxt_dev_info_get_op,
2678         .dev_close = bnxt_dev_close_op,
2679         .dev_configure = bnxt_dev_configure_op,
2680         .dev_start = bnxt_dev_start_op,
2681         .dev_stop = bnxt_dev_stop_op,
2682         .dev_set_link_up = bnxt_dev_set_link_up_op,
2683         .dev_set_link_down = bnxt_dev_set_link_down_op,
2684         .stats_get = bnxt_stats_get_op,
2685         .stats_reset = bnxt_stats_reset_op,
2686         .rx_queue_setup = bnxt_rx_queue_setup_op,
2687         .rx_queue_release = bnxt_rx_queue_release_op,
2688         .tx_queue_setup = bnxt_tx_queue_setup_op,
2689         .tx_queue_release = bnxt_tx_queue_release_op,
2690         .rx_queue_intr_enable = bnxt_rx_queue_intr_enable_op,
2691         .rx_queue_intr_disable = bnxt_rx_queue_intr_disable_op,
2692         .reta_update = bnxt_reta_update_op,
2693         .reta_query = bnxt_reta_query_op,
2694         .rss_hash_update = bnxt_rss_hash_update_op,
2695         .rss_hash_conf_get = bnxt_rss_hash_conf_get_op,
2696         .link_update = bnxt_link_update_op,
2697         .promiscuous_enable = bnxt_promiscuous_enable_op,
2698         .promiscuous_disable = bnxt_promiscuous_disable_op,
2699         .allmulticast_enable = bnxt_allmulticast_enable_op,
2700         .allmulticast_disable = bnxt_allmulticast_disable_op,
2701         .mac_addr_add = bnxt_mac_addr_add_op,
2702         .mac_addr_remove = bnxt_mac_addr_remove_op,
2703         .flow_ctrl_get = bnxt_flow_ctrl_get_op,
2704         .flow_ctrl_set = bnxt_flow_ctrl_set_op,
2705         .udp_tunnel_port_add  = bnxt_udp_tunnel_port_add_op,
2706         .udp_tunnel_port_del  = bnxt_udp_tunnel_port_del_op,
2707         .vlan_filter_set = bnxt_vlan_filter_set_op,
2708         .vlan_offload_set = bnxt_vlan_offload_set_op,
2709         .vlan_pvid_set = bnxt_vlan_pvid_set_op,
2710         .mtu_set = bnxt_mtu_set_op,
2711         .mac_addr_set = bnxt_set_default_mac_addr_op,
2712         .xstats_get = bnxt_dev_xstats_get_op,
2713         .xstats_get_names = bnxt_dev_xstats_get_names_op,
2714         .xstats_reset = bnxt_dev_xstats_reset_op,
2715         .fw_version_get = bnxt_fw_version_get,
2716         .set_mc_addr_list = bnxt_dev_set_mc_addr_list_op,
2717         .rxq_info_get = bnxt_rxq_info_get_op,
2718         .txq_info_get = bnxt_txq_info_get_op,
2719         .dev_led_on = bnxt_dev_led_on_op,
2720         .dev_led_off = bnxt_dev_led_off_op,
2721         .xstats_get_by_id = bnxt_dev_xstats_get_by_id_op,
2722         .xstats_get_names_by_id = bnxt_dev_xstats_get_names_by_id_op,
2723         .rx_queue_count = bnxt_rx_queue_count_op,
2724         .rx_descriptor_status = bnxt_rx_descriptor_status_op,
2725         .tx_descriptor_status = bnxt_tx_descriptor_status_op,
2726         .filter_ctrl = bnxt_filter_ctrl_op,
2727         .dev_supported_ptypes_get = bnxt_dev_supported_ptypes_get_op,
2728         .get_eeprom_length    = bnxt_get_eeprom_length_op,
2729         .get_eeprom           = bnxt_get_eeprom_op,
2730         .set_eeprom           = bnxt_set_eeprom_op,
2731 };
2732
2733 static bool bnxt_vf_pciid(uint16_t id)
2734 {
2735         if (id == BROADCOM_DEV_ID_57304_VF ||
2736             id == BROADCOM_DEV_ID_57406_VF ||
2737             id == BROADCOM_DEV_ID_5731X_VF ||
2738             id == BROADCOM_DEV_ID_5741X_VF ||
2739             id == BROADCOM_DEV_ID_57414_VF ||
2740             id == BROADCOM_DEV_ID_STRATUS_NIC_VF)
2741                 return true;
2742         return false;
2743 }
2744
2745 static int bnxt_init_board(struct rte_eth_dev *eth_dev)
2746 {
2747         struct bnxt *bp = eth_dev->data->dev_private;
2748         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
2749         int rc;
2750
2751         /* enable device (incl. PCI PM wakeup), and bus-mastering */
2752         if (!pci_dev->mem_resource[0].addr) {
2753                 RTE_LOG(ERR, PMD,
2754                         "Cannot find PCI device base address, aborting\n");
2755                 rc = -ENODEV;
2756                 goto init_err_disable;
2757         }
2758
2759         bp->eth_dev = eth_dev;
2760         bp->pdev = pci_dev;
2761
2762         bp->bar0 = (void *)pci_dev->mem_resource[0].addr;
2763         if (!bp->bar0) {
2764                 RTE_LOG(ERR, PMD, "Cannot map device registers, aborting\n");
2765                 rc = -ENOMEM;
2766                 goto init_err_release;
2767         }
2768         return 0;
2769
2770 init_err_release:
2771         if (bp->bar0)
2772                 bp->bar0 = NULL;
2773
2774 init_err_disable:
2775
2776         return rc;
2777 }
2778
2779 static int bnxt_dev_uninit(struct rte_eth_dev *eth_dev);
2780
2781 #define ALLOW_FUNC(x)   \
2782         { \
2783                 typeof(x) arg = (x); \
2784                 bp->pf.vf_req_fwd[((arg) >> 5)] &= \
2785                 ~rte_cpu_to_le_32(1 << ((arg) & 0x1f)); \
2786         }
2787 static int
2788 bnxt_dev_init(struct rte_eth_dev *eth_dev)
2789 {
2790         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
2791         char mz_name[RTE_MEMZONE_NAMESIZE];
2792         const struct rte_memzone *mz = NULL;
2793         static int version_printed;
2794         uint32_t total_alloc_len;
2795         phys_addr_t mz_phys_addr;
2796         struct bnxt *bp;
2797         int rc;
2798
2799         if (version_printed++ == 0)
2800                 RTE_LOG(INFO, PMD, "%s\n", bnxt_version);
2801
2802         rte_eth_copy_pci_info(eth_dev, pci_dev);
2803
2804         bp = eth_dev->data->dev_private;
2805
2806         rte_atomic64_init(&bp->rx_mbuf_alloc_fail);
2807         bp->dev_stopped = 1;
2808
2809         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
2810                 goto skip_init;
2811
2812         if (bnxt_vf_pciid(pci_dev->id.device_id))
2813                 bp->flags |= BNXT_FLAG_VF;
2814
2815         rc = bnxt_init_board(eth_dev);
2816         if (rc) {
2817                 RTE_LOG(ERR, PMD,
2818                         "Board initialization failed rc: %x\n", rc);
2819                 goto error;
2820         }
2821 skip_init:
2822         eth_dev->dev_ops = &bnxt_dev_ops;
2823         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
2824                 return 0;
2825         eth_dev->rx_pkt_burst = &bnxt_recv_pkts;
2826         eth_dev->tx_pkt_burst = &bnxt_xmit_pkts;
2827
2828         if (BNXT_PF(bp) && pci_dev->id.device_id != BROADCOM_DEV_ID_NS2) {
2829                 snprintf(mz_name, RTE_MEMZONE_NAMESIZE,
2830                          "bnxt_%04x:%02x:%02x:%02x-%s", pci_dev->addr.domain,
2831                          pci_dev->addr.bus, pci_dev->addr.devid,
2832                          pci_dev->addr.function, "rx_port_stats");
2833                 mz_name[RTE_MEMZONE_NAMESIZE - 1] = 0;
2834                 mz = rte_memzone_lookup(mz_name);
2835                 total_alloc_len = RTE_CACHE_LINE_ROUNDUP(
2836                                 sizeof(struct rx_port_stats) + 512);
2837                 if (!mz) {
2838                         mz = rte_memzone_reserve(mz_name, total_alloc_len,
2839                                                  SOCKET_ID_ANY,
2840                                                  RTE_MEMZONE_2MB |
2841                                                  RTE_MEMZONE_SIZE_HINT_ONLY);
2842                         if (mz == NULL)
2843                                 return -ENOMEM;
2844                 }
2845                 memset(mz->addr, 0, mz->len);
2846                 mz_phys_addr = mz->phys_addr;
2847                 if ((unsigned long)mz->addr == mz_phys_addr) {
2848                         RTE_LOG(WARNING, PMD,
2849                                 "Memzone physical address same as virtual.\n");
2850                         RTE_LOG(WARNING, PMD,
2851                                 "Using rte_mem_virt2phy()\n");
2852                         mz_phys_addr = rte_mem_virt2phy(mz->addr);
2853                         if (mz_phys_addr == 0) {
2854                                 RTE_LOG(ERR, PMD,
2855                                 "unable to map address to physical memory\n");
2856                                 return -ENOMEM;
2857                         }
2858                 }
2859
2860                 bp->rx_mem_zone = (const void *)mz;
2861                 bp->hw_rx_port_stats = mz->addr;
2862                 bp->hw_rx_port_stats_map = mz_phys_addr;
2863
2864                 snprintf(mz_name, RTE_MEMZONE_NAMESIZE,
2865                          "bnxt_%04x:%02x:%02x:%02x-%s", pci_dev->addr.domain,
2866                          pci_dev->addr.bus, pci_dev->addr.devid,
2867                          pci_dev->addr.function, "tx_port_stats");
2868                 mz_name[RTE_MEMZONE_NAMESIZE - 1] = 0;
2869                 mz = rte_memzone_lookup(mz_name);
2870                 total_alloc_len = RTE_CACHE_LINE_ROUNDUP(
2871                                 sizeof(struct tx_port_stats) + 512);
2872                 if (!mz) {
2873                         mz = rte_memzone_reserve(mz_name, total_alloc_len,
2874                                                  SOCKET_ID_ANY,
2875                                                  RTE_MEMZONE_2MB |
2876                                                  RTE_MEMZONE_SIZE_HINT_ONLY);
2877                         if (mz == NULL)
2878                                 return -ENOMEM;
2879                 }
2880                 memset(mz->addr, 0, mz->len);
2881                 mz_phys_addr = mz->phys_addr;
2882                 if ((unsigned long)mz->addr == mz_phys_addr) {
2883                         RTE_LOG(WARNING, PMD,
2884                                 "Memzone physical address same as virtual.\n");
2885                         RTE_LOG(WARNING, PMD,
2886                                 "Using rte_mem_virt2phy()\n");
2887                         mz_phys_addr = rte_mem_virt2phy(mz->addr);
2888                         if (mz_phys_addr == 0) {
2889                                 RTE_LOG(ERR, PMD,
2890                                 "unable to map address to physical memory\n");
2891                                 return -ENOMEM;
2892                         }
2893                 }
2894
2895                 bp->tx_mem_zone = (const void *)mz;
2896                 bp->hw_tx_port_stats = mz->addr;
2897                 bp->hw_tx_port_stats_map = mz_phys_addr;
2898
2899                 bp->flags |= BNXT_FLAG_PORT_STATS;
2900         }
2901
2902         rc = bnxt_alloc_hwrm_resources(bp);
2903         if (rc) {
2904                 RTE_LOG(ERR, PMD,
2905                         "hwrm resource allocation failure rc: %x\n", rc);
2906                 goto error_free;
2907         }
2908         rc = bnxt_hwrm_ver_get(bp);
2909         if (rc)
2910                 goto error_free;
2911         bnxt_hwrm_queue_qportcfg(bp);
2912
2913         bnxt_hwrm_func_qcfg(bp);
2914
2915         /* Get the MAX capabilities for this function */
2916         rc = bnxt_hwrm_func_qcaps(bp);
2917         if (rc) {
2918                 RTE_LOG(ERR, PMD, "hwrm query capability failure rc: %x\n", rc);
2919                 goto error_free;
2920         }
2921         if (bp->max_tx_rings == 0) {
2922                 RTE_LOG(ERR, PMD, "No TX rings available!\n");
2923                 rc = -EBUSY;
2924                 goto error_free;
2925         }
2926         eth_dev->data->mac_addrs = rte_zmalloc("bnxt_mac_addr_tbl",
2927                                         ETHER_ADDR_LEN * bp->max_l2_ctx, 0);
2928         if (eth_dev->data->mac_addrs == NULL) {
2929                 RTE_LOG(ERR, PMD,
2930                         "Failed to alloc %u bytes needed to store MAC addr tbl",
2931                         ETHER_ADDR_LEN * bp->max_l2_ctx);
2932                 rc = -ENOMEM;
2933                 goto error_free;
2934         }
2935         /* Copy the permanent MAC from the qcap response address now. */
2936         memcpy(bp->mac_addr, bp->dflt_mac_addr, sizeof(bp->mac_addr));
2937         memcpy(&eth_dev->data->mac_addrs[0], bp->mac_addr, ETHER_ADDR_LEN);
2938         bp->grp_info = rte_zmalloc("bnxt_grp_info",
2939                                 sizeof(*bp->grp_info) * bp->max_ring_grps, 0);
2940         if (!bp->grp_info) {
2941                 RTE_LOG(ERR, PMD,
2942                         "Failed to alloc %zu bytes needed to store group info table\n",
2943                         sizeof(*bp->grp_info) * bp->max_ring_grps);
2944                 rc = -ENOMEM;
2945                 goto error_free;
2946         }
2947
2948         /* Forward all requests if firmware is new enough */
2949         if (((bp->fw_ver >= ((20 << 24) | (6 << 16) | (100 << 8))) &&
2950             (bp->fw_ver < ((20 << 24) | (7 << 16)))) ||
2951             ((bp->fw_ver >= ((20 << 24) | (8 << 16))))) {
2952                 memset(bp->pf.vf_req_fwd, 0xff, sizeof(bp->pf.vf_req_fwd));
2953         } else {
2954                 RTE_LOG(WARNING, PMD,
2955                         "Firmware too old for VF mailbox functionality\n");
2956                 memset(bp->pf.vf_req_fwd, 0, sizeof(bp->pf.vf_req_fwd));
2957         }
2958
2959         /*
2960          * The following are used for driver cleanup.  If we disallow these,
2961          * VF drivers can't clean up cleanly.
2962          */
2963         ALLOW_FUNC(HWRM_FUNC_DRV_UNRGTR);
2964         ALLOW_FUNC(HWRM_VNIC_FREE);
2965         ALLOW_FUNC(HWRM_RING_FREE);
2966         ALLOW_FUNC(HWRM_RING_GRP_FREE);
2967         ALLOW_FUNC(HWRM_VNIC_RSS_COS_LB_CTX_FREE);
2968         ALLOW_FUNC(HWRM_CFA_L2_FILTER_FREE);
2969         ALLOW_FUNC(HWRM_STAT_CTX_FREE);
2970         rc = bnxt_hwrm_func_driver_register(bp);
2971         if (rc) {
2972                 RTE_LOG(ERR, PMD,
2973                         "Failed to register driver");
2974                 rc = -EBUSY;
2975                 goto error_free;
2976         }
2977
2978         RTE_LOG(INFO, PMD,
2979                 DRV_MODULE_NAME " found at mem %" PRIx64 ", node addr %pM\n",
2980                 pci_dev->mem_resource[0].phys_addr,
2981                 pci_dev->mem_resource[0].addr);
2982
2983         rc = bnxt_hwrm_func_reset(bp);
2984         if (rc) {
2985                 RTE_LOG(ERR, PMD, "hwrm chip reset failure rc: %x\n", rc);
2986                 rc = -1;
2987                 goto error_free;
2988         }
2989
2990         if (BNXT_PF(bp)) {
2991                 //if (bp->pf.active_vfs) {
2992                         // TODO: Deallocate VF resources?
2993                 //}
2994                 if (bp->pdev->max_vfs) {
2995                         rc = bnxt_hwrm_allocate_vfs(bp, bp->pdev->max_vfs);
2996                         if (rc) {
2997                                 RTE_LOG(ERR, PMD, "Failed to allocate VFs\n");
2998                                 goto error_free;
2999                         }
3000                 } else {
3001                         rc = bnxt_hwrm_allocate_pf_only(bp);
3002                         if (rc) {
3003                                 RTE_LOG(ERR, PMD,
3004                                         "Failed to allocate PF resources\n");
3005                                 goto error_free;
3006                         }
3007                 }
3008         }
3009
3010         bnxt_hwrm_port_led_qcaps(bp);
3011
3012         rc = bnxt_setup_int(bp);
3013         if (rc)
3014                 goto error_free;
3015
3016         rc = bnxt_alloc_mem(bp);
3017         if (rc)
3018                 goto error_free_int;
3019
3020         rc = bnxt_request_int(bp);
3021         if (rc)
3022                 goto error_free_int;
3023
3024         rc = bnxt_alloc_def_cp_ring(bp);
3025         if (rc)
3026                 goto error_free_int;
3027
3028         bnxt_enable_int(bp);
3029
3030         return 0;
3031
3032 error_free_int:
3033         bnxt_disable_int(bp);
3034         bnxt_free_def_cp_ring(bp);
3035         bnxt_hwrm_func_buf_unrgtr(bp);
3036         bnxt_free_int(bp);
3037         bnxt_free_mem(bp);
3038 error_free:
3039         bnxt_dev_uninit(eth_dev);
3040 error:
3041         return rc;
3042 }
3043
3044 static int
3045 bnxt_dev_uninit(struct rte_eth_dev *eth_dev) {
3046         struct bnxt *bp = eth_dev->data->dev_private;
3047         int rc;
3048
3049         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
3050                 return -EPERM;
3051
3052         bnxt_disable_int(bp);
3053         bnxt_free_int(bp);
3054         bnxt_free_mem(bp);
3055         if (eth_dev->data->mac_addrs != NULL) {
3056                 rte_free(eth_dev->data->mac_addrs);
3057                 eth_dev->data->mac_addrs = NULL;
3058         }
3059         if (bp->grp_info != NULL) {
3060                 rte_free(bp->grp_info);
3061                 bp->grp_info = NULL;
3062         }
3063         rc = bnxt_hwrm_func_driver_unregister(bp, 0);
3064         bnxt_free_hwrm_resources(bp);
3065         rte_memzone_free((const struct rte_memzone *)bp->tx_mem_zone);
3066         rte_memzone_free((const struct rte_memzone *)bp->rx_mem_zone);
3067         if (bp->dev_stopped == 0)
3068                 bnxt_dev_close_op(eth_dev);
3069         if (bp->pf.vf_info)
3070                 rte_free(bp->pf.vf_info);
3071         eth_dev->dev_ops = NULL;
3072         eth_dev->rx_pkt_burst = NULL;
3073         eth_dev->tx_pkt_burst = NULL;
3074
3075         return rc;
3076 }
3077
3078 static int bnxt_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
3079         struct rte_pci_device *pci_dev)
3080 {
3081         return rte_eth_dev_pci_generic_probe(pci_dev, sizeof(struct bnxt),
3082                 bnxt_dev_init);
3083 }
3084
3085 static int bnxt_pci_remove(struct rte_pci_device *pci_dev)
3086 {
3087         return rte_eth_dev_pci_generic_remove(pci_dev, bnxt_dev_uninit);
3088 }
3089
3090 static struct rte_pci_driver bnxt_rte_pmd = {
3091         .id_table = bnxt_pci_id_map,
3092         .drv_flags = RTE_PCI_DRV_NEED_MAPPING |
3093                 RTE_PCI_DRV_INTR_LSC,
3094         .probe = bnxt_pci_probe,
3095         .remove = bnxt_pci_remove,
3096 };
3097
3098 static bool
3099 is_device_supported(struct rte_eth_dev *dev, struct rte_pci_driver *drv)
3100 {
3101         if (strcmp(dev->device->driver->name, drv->driver.name))
3102                 return false;
3103
3104         return true;
3105 }
3106
3107 bool is_bnxt_supported(struct rte_eth_dev *dev)
3108 {
3109         return is_device_supported(dev, &bnxt_rte_pmd);
3110 }
3111
3112 RTE_PMD_REGISTER_PCI(net_bnxt, bnxt_rte_pmd);
3113 RTE_PMD_REGISTER_PCI_TABLE(net_bnxt, bnxt_pci_id_map);
3114 RTE_PMD_REGISTER_KMOD_DEP(net_bnxt, "* igb_uio | uio_pci_generic | vfio-pci");