drivers/net/bnxt/bnxt_ethdev.c

   1 /*-
   2  *   BSD LICENSE
   3  *
   4  *   Copyright(c) Broadcom Limited.
   5  *   All rights reserved.
   6  *
   7  *   Redistribution and use in source and binary forms, with or without
   8  *   modification, are permitted provided that the following conditions
   9  *   are met:
  10  *
  11  *     * Redistributions of source code must retain the above copyright
  12  *       notice, this list of conditions and the following disclaimer.
  13  *     * Redistributions in binary form must reproduce the above copyright
  14  *       notice, this list of conditions and the following disclaimer in
  15  *       the documentation and/or other materials provided with the
  16  *       distribution.
  17  *     * Neither the name of Broadcom Corporation nor the names of its
  18  *       contributors may be used to endorse or promote products derived
  19  *       from this software without specific prior written permission.
  20  *
  21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32  */
  33
  34 #include <inttypes.h>
  35 #include <stdbool.h>
  36
  37 #include <rte_dev.h>
  38 #include <rte_ethdev.h>
  39 #include <rte_ethdev_pci.h>
  40 #include <rte_malloc.h>
  41 #include <rte_cycles.h>
  42
  43 #include "bnxt.h"
  44 #include "bnxt_cpr.h"
  45 #include "bnxt_filter.h"
  46 #include "bnxt_hwrm.h"
  47 #include "bnxt_irq.h"
  48 #include "bnxt_ring.h"
  49 #include "bnxt_rxq.h"
  50 #include "bnxt_rxr.h"
  51 #include "bnxt_stats.h"
  52 #include "bnxt_txq.h"
  53 #include "bnxt_txr.h"
  54 #include "bnxt_vnic.h"
  55 #include "hsi_struct_def_dpdk.h"
  56
  57 #define DRV_MODULE_NAME         "bnxt"
  58 static const char bnxt_version[] =
  59         "Broadcom Cumulus driver " DRV_MODULE_NAME "\n";
  60
  61 #define PCI_VENDOR_ID_BROADCOM 0x14E4
  62
  63 #define BROADCOM_DEV_ID_STRATUS_NIC_VF 0x1609
  64 #define BROADCOM_DEV_ID_STRATUS_NIC 0x1614
  65 #define BROADCOM_DEV_ID_57414_VF 0x16c1
  66 #define BROADCOM_DEV_ID_57301 0x16c8
  67 #define BROADCOM_DEV_ID_57302 0x16c9
  68 #define BROADCOM_DEV_ID_57304_PF 0x16ca
  69 #define BROADCOM_DEV_ID_57304_VF 0x16cb
  70 #define BROADCOM_DEV_ID_57417_MF 0x16cc
  71 #define BROADCOM_DEV_ID_NS2 0x16cd
  72 #define BROADCOM_DEV_ID_57311 0x16ce
  73 #define BROADCOM_DEV_ID_57312 0x16cf
  74 #define BROADCOM_DEV_ID_57402 0x16d0
  75 #define BROADCOM_DEV_ID_57404 0x16d1
  76 #define BROADCOM_DEV_ID_57406_PF 0x16d2
  77 #define BROADCOM_DEV_ID_57406_VF 0x16d3
  78 #define BROADCOM_DEV_ID_57402_MF 0x16d4
  79 #define BROADCOM_DEV_ID_57407_RJ45 0x16d5
  80 #define BROADCOM_DEV_ID_57412 0x16d6
  81 #define BROADCOM_DEV_ID_57414 0x16d7
  82 #define BROADCOM_DEV_ID_57416_RJ45 0x16d8
  83 #define BROADCOM_DEV_ID_57417_RJ45 0x16d9
  84 #define BROADCOM_DEV_ID_5741X_VF 0x16dc
  85 #define BROADCOM_DEV_ID_57412_MF 0x16de
  86 #define BROADCOM_DEV_ID_57314 0x16df
  87 #define BROADCOM_DEV_ID_57317_RJ45 0x16e0
  88 #define BROADCOM_DEV_ID_5731X_VF 0x16e1
  89 #define BROADCOM_DEV_ID_57417_SFP 0x16e2
  90 #define BROADCOM_DEV_ID_57416_SFP 0x16e3
  91 #define BROADCOM_DEV_ID_57317_SFP 0x16e4
  92 #define BROADCOM_DEV_ID_57404_MF 0x16e7
  93 #define BROADCOM_DEV_ID_57406_MF 0x16e8
  94 #define BROADCOM_DEV_ID_57407_SFP 0x16e9
  95 #define BROADCOM_DEV_ID_57407_MF 0x16ea
  96 #define BROADCOM_DEV_ID_57414_MF 0x16ec
  97 #define BROADCOM_DEV_ID_57416_MF 0x16ee
  98
  99 static const struct rte_pci_id bnxt_pci_id_map[] = {
 100         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM,
 101                          BROADCOM_DEV_ID_STRATUS_NIC_VF) },
 102         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_STRATUS_NIC) },
 103         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57414_VF) },
 104         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57301) },
 105         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57302) },
 106         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57304_PF) },
 107         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57304_VF) },
 108         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_NS2) },
 109         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57402) },
 110         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57404) },
 111         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57406_PF) },
 112         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57406_VF) },
 113         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57402_MF) },
 114         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57407_RJ45) },
 115         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57404_MF) },
 116         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57406_MF) },
 117         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57407_SFP) },
 118         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57407_MF) },
 119         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_5741X_VF) },
 120         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_5731X_VF) },
 121         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57314) },
 122         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57417_MF) },
 123         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57311) },
 124         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57312) },
 125         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57412) },
 126         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57414) },
 127         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57416_RJ45) },
 128         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57417_RJ45) },
 129         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57412_MF) },
 130         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57317_RJ45) },
 131         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57417_SFP) },
 132         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57416_SFP) },
 133         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57317_SFP) },
 134         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57414_MF) },
 135         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57416_MF) },
 136         { .vendor_id = 0, /* sentinel */ },
 137 };
 138
 139 #define BNXT_ETH_RSS_SUPPORT (  \
 140         ETH_RSS_IPV4 |          \
 141         ETH_RSS_NONFRAG_IPV4_TCP |      \
 142         ETH_RSS_NONFRAG_IPV4_UDP |      \
 143         ETH_RSS_IPV6 |          \
 144         ETH_RSS_NONFRAG_IPV6_TCP |      \
 145         ETH_RSS_NONFRAG_IPV6_UDP)
 146
 147 static void bnxt_vlan_offload_set_op(struct rte_eth_dev *dev, int mask);
 148
 149 /***********************/
 150
 151 /*
 152  * High level utility functions
 153  */
 154
 155 static void bnxt_free_mem(struct bnxt *bp)
 156 {
 157         bnxt_free_filter_mem(bp);
 158         bnxt_free_vnic_attributes(bp);
 159         bnxt_free_vnic_mem(bp);
 160
 161         bnxt_free_stats(bp);
 162         bnxt_free_tx_rings(bp);
 163         bnxt_free_rx_rings(bp);
 164         bnxt_free_def_cp_ring(bp);
 165 }
 166
 167 static int bnxt_alloc_mem(struct bnxt *bp)
 168 {
 169         int rc;
 170
 171         /* Default completion ring */
 172         rc = bnxt_init_def_ring_struct(bp, SOCKET_ID_ANY);
 173         if (rc)
 174                 goto alloc_mem_err;
 175
 176         rc = bnxt_alloc_rings(bp, 0, NULL, NULL,
 177                               bp->def_cp_ring, "def_cp");
 178         if (rc)
 179                 goto alloc_mem_err;
 180
 181         rc = bnxt_alloc_vnic_mem(bp);
 182         if (rc)
 183                 goto alloc_mem_err;
 184
 185         rc = bnxt_alloc_vnic_attributes(bp);
 186         if (rc)
 187                 goto alloc_mem_err;
 188
 189         rc = bnxt_alloc_filter_mem(bp);
 190         if (rc)
 191                 goto alloc_mem_err;
 192
 193         return 0;
 194
 195 alloc_mem_err:
 196         bnxt_free_mem(bp);
 197         return rc;
 198 }
 199
 200 static int bnxt_init_chip(struct bnxt *bp)
 201 {
 202         unsigned int i, rss_idx, fw_idx;
 203         struct rte_eth_link new;
 204         int rc;
 205
 206         if (bp->eth_dev->data->mtu > ETHER_MTU) {
 207                 bp->eth_dev->data->dev_conf.rxmode.jumbo_frame = 1;
 208                 bp->flags |= BNXT_FLAG_JUMBO;
 209         } else {
 210                 bp->eth_dev->data->dev_conf.rxmode.jumbo_frame = 0;
 211                 bp->flags &= ~BNXT_FLAG_JUMBO;
 212         }
 213
 214         rc = bnxt_alloc_all_hwrm_stat_ctxs(bp);
 215         if (rc) {
 216                 RTE_LOG(ERR, PMD, "HWRM stat ctx alloc failure rc: %x\n", rc);
 217                 goto err_out;
 218         }
 219
 220         rc = bnxt_alloc_hwrm_rings(bp);
 221         if (rc) {
 222                 RTE_LOG(ERR, PMD, "HWRM ring alloc failure rc: %x\n", rc);
 223                 goto err_out;
 224         }
 225
 226         rc = bnxt_alloc_all_hwrm_ring_grps(bp);
 227         if (rc) {
 228                 RTE_LOG(ERR, PMD, "HWRM ring grp alloc failure: %x\n", rc);
 229                 goto err_out;
 230         }
 231
 232         rc = bnxt_mq_rx_configure(bp);
 233         if (rc) {
 234                 RTE_LOG(ERR, PMD, "MQ mode configure failure rc: %x\n", rc);
 235                 goto err_out;
 236         }
 237
 238         /* VNIC configuration */
 239         for (i = 0; i < bp->nr_vnics; i++) {
 240                 struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
 241
 242                 rc = bnxt_hwrm_vnic_alloc(bp, vnic);
 243                 if (rc) {
 244                         RTE_LOG(ERR, PMD, "HWRM vnic %d alloc failure rc: %x\n",
 245                                 i, rc);
 246                         goto err_out;
 247                 }
 248
 249                 rc = bnxt_hwrm_vnic_ctx_alloc(bp, vnic);
 250                 if (rc) {
 251                         RTE_LOG(ERR, PMD,
 252                                 "HWRM vnic %d ctx alloc failure rc: %x\n",
 253                                 i, rc);
 254                         goto err_out;
 255                 }
 256
 257                 rc = bnxt_hwrm_vnic_cfg(bp, vnic);
 258                 if (rc) {
 259                         RTE_LOG(ERR, PMD, "HWRM vnic %d cfg failure rc: %x\n",
 260                                 i, rc);
 261                         goto err_out;
 262                 }
 263
 264                 rc = bnxt_set_hwrm_vnic_filters(bp, vnic);
 265                 if (rc) {
 266                         RTE_LOG(ERR, PMD,
 267                                 "HWRM vnic %d filter failure rc: %x\n",
 268                                 i, rc);
 269                         goto err_out;
 270                 }
 271                 if (vnic->rss_table && vnic->hash_type) {
 272                         /*
 273                          * Fill the RSS hash & redirection table with
 274                          * ring group ids for all VNICs
 275                          */
 276                         for (rss_idx = 0, fw_idx = 0;
 277                              rss_idx < HW_HASH_INDEX_SIZE;
 278                              rss_idx++, fw_idx++) {
 279                                 if (vnic->fw_grp_ids[fw_idx] ==
 280                                     INVALID_HW_RING_ID)
 281                                         fw_idx = 0;
 282                                 vnic->rss_table[rss_idx] =
 283                                                 vnic->fw_grp_ids[fw_idx];
 284                         }
 285                         rc = bnxt_hwrm_vnic_rss_cfg(bp, vnic);
 286                         if (rc) {
 287                                 RTE_LOG(ERR, PMD,
 288                                         "HWRM vnic %d set RSS failure rc: %x\n",
 289                                         i, rc);
 290                                 goto err_out;
 291                         }
 292                 }
 293
 294                 bnxt_hwrm_vnic_plcmode_cfg(bp, vnic);
 295
 296                 if (bp->eth_dev->data->dev_conf.rxmode.enable_lro)
 297                         bnxt_hwrm_vnic_tpa_cfg(bp, vnic, 1);
 298                 else
 299                         bnxt_hwrm_vnic_tpa_cfg(bp, vnic, 0);
 300         }
 301         rc = bnxt_hwrm_cfa_l2_set_rx_mask(bp, &bp->vnic_info[0], 0, NULL);
 302         if (rc) {
 303                 RTE_LOG(ERR, PMD,
 304                         "HWRM cfa l2 rx mask failure rc: %x\n", rc);
 305                 goto err_out;
 306         }
 307
 308         rc = bnxt_get_hwrm_link_config(bp, &new);
 309         if (rc) {
 310                 RTE_LOG(ERR, PMD, "HWRM Get link config failure rc: %x\n", rc);
 311                 goto err_out;
 312         }
 313
 314         if (!bp->link_info.link_up) {
 315                 rc = bnxt_set_hwrm_link_config(bp, true);
 316                 if (rc) {
 317                         RTE_LOG(ERR, PMD,
 318                                 "HWRM link config failure rc: %x\n", rc);
 319                         goto err_out;
 320                 }
 321         }
 322
 323         return 0;
 324
 325 err_out:
 326         bnxt_free_all_hwrm_resources(bp);
 327
 328         return rc;
 329 }
 330
 331 static int bnxt_shutdown_nic(struct bnxt *bp)
 332 {
 333         bnxt_free_all_hwrm_resources(bp);
 334         bnxt_free_all_filters(bp);
 335         bnxt_free_all_vnics(bp);
 336         return 0;
 337 }
 338
 339 static int bnxt_init_nic(struct bnxt *bp)
 340 {
 341         int rc;
 342
 343         bnxt_init_ring_grps(bp);
 344         bnxt_init_vnics(bp);
 345         bnxt_init_filters(bp);
 346
 347         rc = bnxt_init_chip(bp);
 348         if (rc)
 349                 return rc;
 350
 351         return 0;
 352 }
 353
 354 /*
 355  * Device configuration and status function
 356  */
 357
 358 static void bnxt_dev_info_get_op(struct rte_eth_dev *eth_dev,
 359                                   struct rte_eth_dev_info *dev_info)
 360 {
 361         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 362         uint16_t max_vnics, i, j, vpool, vrxq;
 363         unsigned int max_rx_rings;
 364
 365         dev_info->pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
 366
 367         /* MAC Specifics */
 368         dev_info->max_mac_addrs = MAX_NUM_MAC_ADDR;
 369         dev_info->max_hash_mac_addrs = 0;
 370
 371         /* PF/VF specifics */
 372         if (BNXT_PF(bp))
 373                 dev_info->max_vfs = bp->pdev->max_vfs;
 374         max_rx_rings = RTE_MIN(bp->max_vnics, RTE_MIN(bp->max_l2_ctx,
 375                                                 RTE_MIN(bp->max_rsscos_ctx,
 376                                                 bp->max_stat_ctx)));
 377         /* For the sake of symmetry, max_rx_queues = max_tx_queues */
 378         dev_info->max_rx_queues = max_rx_rings;
 379         dev_info->max_tx_queues = max_rx_rings;
 380         dev_info->reta_size = bp->max_rsscos_ctx;
 381         dev_info->hash_key_size = 40;
 382         max_vnics = bp->max_vnics;
 383
 384         /* Fast path specifics */
 385         dev_info->min_rx_bufsize = 1;
 386         dev_info->max_rx_pktlen = BNXT_MAX_MTU + ETHER_HDR_LEN + ETHER_CRC_LEN
 387                                   + VLAN_TAG_SIZE;
 388         dev_info->rx_offload_capa = 0;
 389         dev_info->tx_offload_capa = DEV_TX_OFFLOAD_IPV4_CKSUM |
 390                                         DEV_TX_OFFLOAD_TCP_CKSUM |
 391                                         DEV_TX_OFFLOAD_UDP_CKSUM |
 392                                         DEV_TX_OFFLOAD_TCP_TSO |
 393                                         DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM |
 394                                         DEV_TX_OFFLOAD_VXLAN_TNL_TSO |
 395                                         DEV_TX_OFFLOAD_GRE_TNL_TSO |
 396                                         DEV_TX_OFFLOAD_IPIP_TNL_TSO |
 397                                         DEV_TX_OFFLOAD_GENEVE_TNL_TSO;
 398
 399         /* *INDENT-OFF* */
 400         dev_info->default_rxconf = (struct rte_eth_rxconf) {
 401                 .rx_thresh = {
 402                         .pthresh = 8,
 403                         .hthresh = 8,
 404                         .wthresh = 0,
 405                 },
 406                 .rx_free_thresh = 32,
 407                 .rx_drop_en = 0,
 408         };
 409
 410         dev_info->default_txconf = (struct rte_eth_txconf) {
 411                 .tx_thresh = {
 412                         .pthresh = 32,
 413                         .hthresh = 0,
 414                         .wthresh = 0,
 415                 },
 416                 .tx_free_thresh = 32,
 417                 .tx_rs_thresh = 32,
 418                 .txq_flags = ETH_TXQ_FLAGS_NOMULTSEGS |
 419                              ETH_TXQ_FLAGS_NOOFFLOADS,
 420         };
 421         eth_dev->data->dev_conf.intr_conf.lsc = 1;
 422
 423         /* *INDENT-ON* */
 424
 425         /*
 426          * TODO: default_rxconf, default_txconf, rx_desc_lim, and tx_desc_lim
 427          *       need further investigation.
 428          */
 429
 430         /* VMDq resources */
 431         vpool = 64; /* ETH_64_POOLS */
 432         vrxq = 128; /* ETH_VMDQ_DCB_NUM_QUEUES */
 433         for (i = 0; i < 4; vpool >>= 1, i++) {
 434                 if (max_vnics > vpool) {
 435                         for (j = 0; j < 5; vrxq >>= 1, j++) {
 436                                 if (dev_info->max_rx_queues > vrxq) {
 437                                         if (vpool > vrxq)
 438                                                 vpool = vrxq;
 439                                         goto found;
 440                                 }
 441                         }
 442                         /* Not enough resources to support VMDq */
 443                         break;
 444                 }
 445         }
 446         /* Not enough resources to support VMDq */
 447         vpool = 0;
 448         vrxq = 0;
 449 found:
 450         dev_info->max_vmdq_pools = vpool;
 451         dev_info->vmdq_queue_num = vrxq;
 452
 453         dev_info->vmdq_pool_base = 0;
 454         dev_info->vmdq_queue_base = 0;
 455 }
 456
 457 /* Configure the device based on the configuration provided */
 458 static int bnxt_dev_configure_op(struct rte_eth_dev *eth_dev)
 459 {
 460         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 461
 462         bp->rx_queues = (void *)eth_dev->data->rx_queues;
 463         bp->tx_queues = (void *)eth_dev->data->tx_queues;
 464
 465         /* Inherit new configurations */
 466         bp->rx_nr_rings = eth_dev->data->nb_rx_queues;
 467         bp->tx_nr_rings = eth_dev->data->nb_tx_queues;
 468         bp->rx_cp_nr_rings = bp->rx_nr_rings;
 469         bp->tx_cp_nr_rings = bp->tx_nr_rings;
 470
 471         if (eth_dev->data->dev_conf.rxmode.jumbo_frame)
 472                 eth_dev->data->mtu =
 473                                 eth_dev->data->dev_conf.rxmode.max_rx_pkt_len -
 474                                 ETHER_HDR_LEN - ETHER_CRC_LEN - VLAN_TAG_SIZE;
 475         return 0;
 476 }
 477
 478 static inline int
 479 rte_bnxt_atomic_write_link_status(struct rte_eth_dev *eth_dev,
 480                                 struct rte_eth_link *link)
 481 {
 482         struct rte_eth_link *dst = &eth_dev->data->dev_link;
 483         struct rte_eth_link *src = link;
 484
 485         if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
 486                                         *(uint64_t *)src) == 0)
 487                 return 1;
 488
 489         return 0;
 490 }
 491
 492 static void bnxt_print_link_info(struct rte_eth_dev *eth_dev)
 493 {
 494         struct rte_eth_link *link = &eth_dev->data->dev_link;
 495
 496         if (link->link_status)
 497                 RTE_LOG(INFO, PMD, "Port %d Link Up - speed %u Mbps - %s\n",
 498                         (uint8_t)(eth_dev->data->port_id),
 499                         (uint32_t)link->link_speed,
 500                         (link->link_duplex == ETH_LINK_FULL_DUPLEX) ?
 501                         ("full-duplex") : ("half-duplex\n"));
 502         else
 503                 RTE_LOG(INFO, PMD, "Port %d Link Down\n",
 504                         (uint8_t)(eth_dev->data->port_id));
 505 }
 506
 507 static int bnxt_dev_lsc_intr_setup(struct rte_eth_dev *eth_dev)
 508 {
 509         bnxt_print_link_info(eth_dev);
 510         return 0;
 511 }
 512
 513 static int bnxt_dev_start_op(struct rte_eth_dev *eth_dev)
 514 {
 515         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 516         int vlan_mask = 0;
 517         int rc;
 518
 519         bp->dev_stopped = 0;
 520
 521         rc = bnxt_init_nic(bp);
 522         if (rc)
 523                 goto error;
 524
 525         bnxt_link_update_op(eth_dev, 0);
 526
 527         if (eth_dev->data->dev_conf.rxmode.hw_vlan_filter)
 528                 vlan_mask |= ETH_VLAN_FILTER_MASK;
 529         if (eth_dev->data->dev_conf.rxmode.hw_vlan_strip)
 530                 vlan_mask |= ETH_VLAN_STRIP_MASK;
 531         bnxt_vlan_offload_set_op(eth_dev, vlan_mask);
 532
 533         return 0;
 534
 535 error:
 536         bnxt_shutdown_nic(bp);
 537         bnxt_free_tx_mbufs(bp);
 538         bnxt_free_rx_mbufs(bp);
 539         return rc;
 540 }
 541
 542 static int bnxt_dev_set_link_up_op(struct rte_eth_dev *eth_dev)
 543 {
 544         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 545
 546         eth_dev->data->dev_link.link_status = 1;
 547         bnxt_set_hwrm_link_config(bp, true);
 548         return 0;
 549 }
 550
 551 static int bnxt_dev_set_link_down_op(struct rte_eth_dev *eth_dev)
 552 {
 553         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 554
 555         eth_dev->data->dev_link.link_status = 0;
 556         bnxt_set_hwrm_link_config(bp, false);
 557         return 0;
 558 }
 559
 560 /* Unload the driver, release resources */
 561 static void bnxt_dev_stop_op(struct rte_eth_dev *eth_dev)
 562 {
 563         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 564
 565         if (bp->eth_dev->data->dev_started) {
 566                 /* TBD: STOP HW queues DMA */
 567                 eth_dev->data->dev_link.link_status = 0;
 568         }
 569         bnxt_set_hwrm_link_config(bp, false);
 570         bnxt_hwrm_port_clr_stats(bp);
 571         bnxt_shutdown_nic(bp);
 572         bp->dev_stopped = 1;
 573 }
 574
 575 static void bnxt_dev_close_op(struct rte_eth_dev *eth_dev)
 576 {
 577         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 578
 579         if (bp->dev_stopped == 0)
 580                 bnxt_dev_stop_op(eth_dev);
 581
 582         bnxt_free_tx_mbufs(bp);
 583         bnxt_free_rx_mbufs(bp);
 584         bnxt_free_mem(bp);
 585         if (eth_dev->data->mac_addrs != NULL) {
 586                 rte_free(eth_dev->data->mac_addrs);
 587                 eth_dev->data->mac_addrs = NULL;
 588         }
 589         if (bp->grp_info != NULL) {
 590                 rte_free(bp->grp_info);
 591                 bp->grp_info = NULL;
 592         }
 593 }
 594
 595 static void bnxt_mac_addr_remove_op(struct rte_eth_dev *eth_dev,
 596                                     uint32_t index)
 597 {
 598         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 599         uint64_t pool_mask = eth_dev->data->mac_pool_sel[index];
 600         struct bnxt_vnic_info *vnic;
 601         struct bnxt_filter_info *filter, *temp_filter;
 602         int i;
 603
 604         /*
 605          * Loop through all VNICs from the specified filter flow pools to
 606          * remove the corresponding MAC addr filter
 607          */
 608         for (i = 0; i < MAX_FF_POOLS; i++) {
 609                 if (!(pool_mask & (1ULL << i)))
 610                         continue;
 611
 612                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
 613                         filter = STAILQ_FIRST(&vnic->filter);
 614                         while (filter) {
 615                                 temp_filter = STAILQ_NEXT(filter, next);
 616                                 if (filter->mac_index == index) {
 617                                         STAILQ_REMOVE(&vnic->filter, filter,
 618                                                       bnxt_filter_info, next);
 619                                         bnxt_hwrm_clear_filter(bp, filter);
 620                                         filter->mac_index = INVALID_MAC_INDEX;
 621                                         memset(&filter->l2_addr, 0,
 622                                                ETHER_ADDR_LEN);
 623                                         STAILQ_INSERT_TAIL(
 624                                                         &bp->free_filter_list,
 625                                                         filter, next);
 626                                 }
 627                                 filter = temp_filter;
 628                         }
 629                 }
 630         }
 631 }
 632
 633 static int bnxt_mac_addr_add_op(struct rte_eth_dev *eth_dev,
 634                                 struct ether_addr *mac_addr,
 635                                 uint32_t index, uint32_t pool)
 636 {
 637         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 638         struct bnxt_vnic_info *vnic = STAILQ_FIRST(&bp->ff_pool[pool]);
 639         struct bnxt_filter_info *filter;
 640
 641         if (BNXT_VF(bp)) {
 642                 RTE_LOG(ERR, PMD, "Cannot add MAC address to a VF interface\n");
 643                 return -ENOTSUP;
 644         }
 645
 646         if (!vnic) {
 647                 RTE_LOG(ERR, PMD, "VNIC not found for pool %d!\n", pool);
 648                 return -EINVAL;
 649         }
 650         /* Attach requested MAC address to the new l2_filter */
 651         STAILQ_FOREACH(filter, &vnic->filter, next) {
 652                 if (filter->mac_index == index) {
 653                         RTE_LOG(ERR, PMD,
 654                                 "MAC addr already existed for pool %d\n", pool);
 655                         return -EINVAL;
 656                 }
 657         }
 658         filter = bnxt_alloc_filter(bp);
 659         if (!filter) {
 660                 RTE_LOG(ERR, PMD, "L2 filter alloc failed\n");
 661                 return -ENODEV;
 662         }
 663         STAILQ_INSERT_TAIL(&vnic->filter, filter, next);
 664         filter->mac_index = index;
 665         memcpy(filter->l2_addr, mac_addr, ETHER_ADDR_LEN);
 666         return bnxt_hwrm_set_filter(bp, vnic->fw_vnic_id, filter);
 667 }
 668
 669 int bnxt_link_update_op(struct rte_eth_dev *eth_dev, int wait_to_complete)
 670 {
 671         int rc = 0;
 672         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 673         struct rte_eth_link new;
 674         unsigned int cnt = BNXT_LINK_WAIT_CNT;
 675
 676         memset(&new, 0, sizeof(new));
 677         do {
 678                 /* Retrieve link info from hardware */
 679                 rc = bnxt_get_hwrm_link_config(bp, &new);
 680                 if (rc) {
 681                         new.link_speed = ETH_LINK_SPEED_100M;
 682                         new.link_duplex = ETH_LINK_FULL_DUPLEX;
 683                         RTE_LOG(ERR, PMD,
 684                                 "Failed to retrieve link rc = 0x%x!\n", rc);
 685                         goto out;
 686                 }
 687                 rte_delay_ms(BNXT_LINK_WAIT_INTERVAL);
 688
 689                 if (!wait_to_complete)
 690                         break;
 691         } while (!new.link_status && cnt--);
 692
 693 out:
 694         /* Timed out or success */
 695         if (new.link_status != eth_dev->data->dev_link.link_status ||
 696         new.link_speed != eth_dev->data->dev_link.link_speed) {
 697                 rte_bnxt_atomic_write_link_status(eth_dev, &new);
 698                 bnxt_print_link_info(eth_dev);
 699         }
 700
 701         return rc;
 702 }
 703
 704 static void bnxt_promiscuous_enable_op(struct rte_eth_dev *eth_dev)
 705 {
 706         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 707         struct bnxt_vnic_info *vnic;
 708
 709         if (bp->vnic_info == NULL)
 710                 return;
 711
 712         vnic = &bp->vnic_info[0];
 713
 714         vnic->flags |= BNXT_VNIC_INFO_PROMISC;
 715         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic, 0, NULL);
 716 }
 717
 718 static void bnxt_promiscuous_disable_op(struct rte_eth_dev *eth_dev)
 719 {
 720         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 721         struct bnxt_vnic_info *vnic;
 722
 723         if (bp->vnic_info == NULL)
 724                 return;
 725
 726         vnic = &bp->vnic_info[0];
 727
 728         vnic->flags &= ~BNXT_VNIC_INFO_PROMISC;
 729         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic, 0, NULL);
 730 }
 731
 732 static void bnxt_allmulticast_enable_op(struct rte_eth_dev *eth_dev)
 733 {
 734         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 735         struct bnxt_vnic_info *vnic;
 736
 737         if (bp->vnic_info == NULL)
 738                 return;
 739
 740         vnic = &bp->vnic_info[0];
 741
 742         vnic->flags |= BNXT_VNIC_INFO_ALLMULTI;
 743         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic, 0, NULL);
 744 }
 745
 746 static void bnxt_allmulticast_disable_op(struct rte_eth_dev *eth_dev)
 747 {
 748         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 749         struct bnxt_vnic_info *vnic;
 750
 751         if (bp->vnic_info == NULL)
 752                 return;
 753
 754         vnic = &bp->vnic_info[0];
 755
 756         vnic->flags &= ~BNXT_VNIC_INFO_ALLMULTI;
 757         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic, 0, NULL);
 758 }
 759
 760 static int bnxt_reta_update_op(struct rte_eth_dev *eth_dev,
 761                             struct rte_eth_rss_reta_entry64 *reta_conf,
 762                             uint16_t reta_size)
 763 {
 764         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 765         struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
 766         struct bnxt_vnic_info *vnic;
 767         int i;
 768
 769         if (!(dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG))
 770                 return -EINVAL;
 771
 772         if (reta_size != HW_HASH_INDEX_SIZE) {
 773                 RTE_LOG(ERR, PMD, "The configured hash table lookup size "
 774                         "(%d) must equal the size supported by the hardware "
 775                         "(%d)\n", reta_size, HW_HASH_INDEX_SIZE);
 776                 return -EINVAL;
 777         }
 778         /* Update the RSS VNIC(s) */
 779         for (i = 0; i < MAX_FF_POOLS; i++) {
 780                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
 781                         memcpy(vnic->rss_table, reta_conf, reta_size);
 782
 783                         bnxt_hwrm_vnic_rss_cfg(bp, vnic);
 784                 }
 785         }
 786         return 0;
 787 }
 788
 789 static int bnxt_reta_query_op(struct rte_eth_dev *eth_dev,
 790                               struct rte_eth_rss_reta_entry64 *reta_conf,
 791                               uint16_t reta_size)
 792 {
 793         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 794         struct bnxt_vnic_info *vnic = &bp->vnic_info[0];
 795         struct rte_intr_handle *intr_handle
 796                 = &bp->pdev->intr_handle;
 797
 798         /* Retrieve from the default VNIC */
 799         if (!vnic)
 800                 return -EINVAL;
 801         if (!vnic->rss_table)
 802                 return -EINVAL;
 803
 804         if (reta_size != HW_HASH_INDEX_SIZE) {
 805                 RTE_LOG(ERR, PMD, "The configured hash table lookup size "
 806                         "(%d) must equal the size supported by the hardware "
 807                         "(%d)\n", reta_size, HW_HASH_INDEX_SIZE);
 808                 return -EINVAL;
 809         }
 810         /* EW - need to revisit here copying from u64 to u16 */
 811         memcpy(reta_conf, vnic->rss_table, reta_size);
 812
 813         if (rte_intr_allow_others(intr_handle)) {
 814                 if (eth_dev->data->dev_conf.intr_conf.lsc != 0)
 815                         bnxt_dev_lsc_intr_setup(eth_dev);
 816         }
 817
 818         return 0;
 819 }
 820
 821 static int bnxt_rss_hash_update_op(struct rte_eth_dev *eth_dev,
 822                                    struct rte_eth_rss_conf *rss_conf)
 823 {
 824         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 825         struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
 826         struct bnxt_vnic_info *vnic;
 827         uint16_t hash_type = 0;
 828         int i;
 829
 830         /*
 831          * If RSS enablement were different than dev_configure,
 832          * then return -EINVAL
 833          */
 834         if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) {
 835                 if (!rss_conf->rss_hf)
 836                         RTE_LOG(ERR, PMD, "Hash type NONE\n");
 837         } else {
 838                 if (rss_conf->rss_hf & BNXT_ETH_RSS_SUPPORT)
 839                         return -EINVAL;
 840         }
 841
 842         bp->flags |= BNXT_FLAG_UPDATE_HASH;
 843         memcpy(&bp->rss_conf, rss_conf, sizeof(*rss_conf));
 844
 845         if (rss_conf->rss_hf & ETH_RSS_IPV4)
 846                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4;
 847         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV4_TCP)
 848                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4;
 849         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV4_UDP)
 850                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4;
 851         if (rss_conf->rss_hf & ETH_RSS_IPV6)
 852                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6;
 853         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV6_TCP)
 854                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6;
 855         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV6_UDP)
 856                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6;
 857
 858         /* Update the RSS VNIC(s) */
 859         for (i = 0; i < MAX_FF_POOLS; i++) {
 860                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
 861                         vnic->hash_type = hash_type;
 862
 863                         /*
 864                          * Use the supplied key if the key length is
 865                          * acceptable and the rss_key is not NULL
 866                          */
 867                         if (rss_conf->rss_key &&
 868                             rss_conf->rss_key_len <= HW_HASH_KEY_SIZE)
 869                                 memcpy(vnic->rss_hash_key, rss_conf->rss_key,
 870                                        rss_conf->rss_key_len);
 871
 872                         bnxt_hwrm_vnic_rss_cfg(bp, vnic);
 873                 }
 874         }
 875         return 0;
 876 }
 877
 878 static int bnxt_rss_hash_conf_get_op(struct rte_eth_dev *eth_dev,
 879                                      struct rte_eth_rss_conf *rss_conf)
 880 {
 881         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 882         struct bnxt_vnic_info *vnic = &bp->vnic_info[0];
 883         int len;
 884         uint32_t hash_types;
 885
 886         /* RSS configuration is the same for all VNICs */
 887         if (vnic && vnic->rss_hash_key) {
 888                 if (rss_conf->rss_key) {
 889                         len = rss_conf->rss_key_len <= HW_HASH_KEY_SIZE ?
 890                               rss_conf->rss_key_len : HW_HASH_KEY_SIZE;
 891                         memcpy(rss_conf->rss_key, vnic->rss_hash_key, len);
 892                 }
 893
 894                 hash_types = vnic->hash_type;
 895                 rss_conf->rss_hf = 0;
 896                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4) {
 897                         rss_conf->rss_hf |= ETH_RSS_IPV4;
 898                         hash_types &= ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4;
 899                 }
 900                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4) {
 901                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV4_TCP;
 902                         hash_types &=
 903                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4;
 904                 }
 905                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4) {
 906                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV4_UDP;
 907                         hash_types &=
 908                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4;
 909                 }
 910                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6) {
 911                         rss_conf->rss_hf |= ETH_RSS_IPV6;
 912                         hash_types &= ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6;
 913                 }
 914                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6) {
 915                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV6_TCP;
 916                         hash_types &=
 917                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6;
 918                 }
 919                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6) {
 920                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV6_UDP;
 921                         hash_types &=
 922                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6;
 923                 }
 924                 if (hash_types) {
 925                         RTE_LOG(ERR, PMD,
 926                                 "Unknwon RSS config from firmware (%08x), RSS disabled",
 927                                 vnic->hash_type);
 928                         return -ENOTSUP;
 929                 }
 930         } else {
 931                 rss_conf->rss_hf = 0;
 932         }
 933         return 0;
 934 }
 935
 936 static int bnxt_flow_ctrl_get_op(struct rte_eth_dev *dev,
 937                                struct rte_eth_fc_conf *fc_conf)
 938 {
 939         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
 940         struct rte_eth_link link_info;
 941         int rc;
 942
 943         rc = bnxt_get_hwrm_link_config(bp, &link_info);
 944         if (rc)
 945                 return rc;
 946
 947         memset(fc_conf, 0, sizeof(*fc_conf));
 948         if (bp->link_info.auto_pause)
 949                 fc_conf->autoneg = 1;
 950         switch (bp->link_info.pause) {
 951         case 0:
 952                 fc_conf->mode = RTE_FC_NONE;
 953                 break;
 954         case HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_TX:
 955                 fc_conf->mode = RTE_FC_TX_PAUSE;
 956                 break;
 957         case HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_RX:
 958                 fc_conf->mode = RTE_FC_RX_PAUSE;
 959                 break;
 960         case (HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_TX |
 961                         HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_RX):
 962                 fc_conf->mode = RTE_FC_FULL;
 963                 break;
 964         }
 965         return 0;
 966 }
 967
 968 static int bnxt_flow_ctrl_set_op(struct rte_eth_dev *dev,
 969                                struct rte_eth_fc_conf *fc_conf)
 970 {
 971         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
 972
 973         if (BNXT_NPAR_PF(bp) || BNXT_VF(bp)) {
 974                 RTE_LOG(ERR, PMD, "Flow Control Settings cannot be modified\n");
 975                 return -ENOTSUP;
 976         }
 977
 978         switch (fc_conf->mode) {
 979         case RTE_FC_NONE:
 980                 bp->link_info.auto_pause = 0;
 981                 bp->link_info.force_pause = 0;
 982                 break;
 983         case RTE_FC_RX_PAUSE:
 984                 if (fc_conf->autoneg) {
 985                         bp->link_info.auto_pause =
 986                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_RX;
 987                         bp->link_info.force_pause = 0;
 988                 } else {
 989                         bp->link_info.auto_pause = 0;
 990                         bp->link_info.force_pause =
 991                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_RX;
 992                 }
 993                 break;
 994         case RTE_FC_TX_PAUSE:
 995                 if (fc_conf->autoneg) {
 996                         bp->link_info.auto_pause =
 997                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_TX;
 998                         bp->link_info.force_pause = 0;
 999                 } else {
1000                         bp->link_info.auto_pause = 0;
1001                         bp->link_info.force_pause =
1002                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_TX;
1003                 }
1004                 break;
1005         case RTE_FC_FULL:
1006                 if (fc_conf->autoneg) {
1007                         bp->link_info.auto_pause =
1008                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_TX |
1009                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_RX;
1010                         bp->link_info.force_pause = 0;
1011                 } else {
1012                         bp->link_info.auto_pause = 0;
1013                         bp->link_info.force_pause =
1014                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_TX |
1015                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_RX;
1016                 }
1017                 break;
1018         }
1019         return bnxt_set_hwrm_link_config(bp, true);
1020 }
1021
1022 /* Add UDP tunneling port */
1023 static int
1024 bnxt_udp_tunnel_port_add_op(struct rte_eth_dev *eth_dev,
1025                          struct rte_eth_udp_tunnel *udp_tunnel)
1026 {
1027         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
1028         uint16_t tunnel_type = 0;
1029         int rc = 0;
1030
1031         switch (udp_tunnel->prot_type) {
1032         case RTE_TUNNEL_TYPE_VXLAN:
1033                 if (bp->vxlan_port_cnt) {
1034                         RTE_LOG(ERR, PMD, "Tunnel Port %d already programmed\n",
1035                                 udp_tunnel->udp_port);
1036                         if (bp->vxlan_port != udp_tunnel->udp_port) {
1037                                 RTE_LOG(ERR, PMD, "Only one port allowed\n");
1038                                 return -ENOSPC;
1039                         }
1040                         bp->vxlan_port_cnt++;
1041                         return 0;
1042                 }
1043                 tunnel_type =
1044                         HWRM_TUNNEL_DST_PORT_ALLOC_INPUT_TUNNEL_TYPE_VXLAN;
1045                 bp->vxlan_port_cnt++;
1046                 break;
1047         case RTE_TUNNEL_TYPE_GENEVE:
1048                 if (bp->geneve_port_cnt) {
1049                         RTE_LOG(ERR, PMD, "Tunnel Port %d already programmed\n",
1050                                 udp_tunnel->udp_port);
1051                         if (bp->geneve_port != udp_tunnel->udp_port) {
1052                                 RTE_LOG(ERR, PMD, "Only one port allowed\n");
1053                                 return -ENOSPC;
1054                         }
1055                         bp->geneve_port_cnt++;
1056                         return 0;
1057                 }
1058                 tunnel_type =
1059                         HWRM_TUNNEL_DST_PORT_ALLOC_INPUT_TUNNEL_TYPE_GENEVE;
1060                 bp->geneve_port_cnt++;
1061                 break;
1062         default:
1063                 RTE_LOG(ERR, PMD, "Tunnel type is not supported\n");
1064                 return -ENOTSUP;
1065         }
1066         rc = bnxt_hwrm_tunnel_dst_port_alloc(bp, udp_tunnel->udp_port,
1067                                              tunnel_type);
1068         return rc;
1069 }
1070
1071 static int
1072 bnxt_udp_tunnel_port_del_op(struct rte_eth_dev *eth_dev,
1073                          struct rte_eth_udp_tunnel *udp_tunnel)
1074 {
1075         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
1076         uint16_t tunnel_type = 0;
1077         uint16_t port = 0;
1078         int rc = 0;
1079
1080         switch (udp_tunnel->prot_type) {
1081         case RTE_TUNNEL_TYPE_VXLAN:
1082                 if (!bp->vxlan_port_cnt) {
1083                         RTE_LOG(ERR, PMD, "No Tunnel port configured yet\n");
1084                         return -EINVAL;
1085                 }
1086                 if (bp->vxlan_port != udp_tunnel->udp_port) {
1087                         RTE_LOG(ERR, PMD, "Req Port: %d. Configured port: %d\n",
1088                                 udp_tunnel->udp_port, bp->vxlan_port);
1089                         return -EINVAL;
1090                 }
1091                 if (--bp->vxlan_port_cnt)
1092                         return 0;
1093
1094                 tunnel_type =
1095                         HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_VXLAN;
1096                 port = bp->vxlan_fw_dst_port_id;
1097                 break;
1098         case RTE_TUNNEL_TYPE_GENEVE:
1099                 if (!bp->geneve_port_cnt) {
1100                         RTE_LOG(ERR, PMD, "No Tunnel port configured yet\n");
1101                         return -EINVAL;
1102                 }
1103                 if (bp->geneve_port != udp_tunnel->udp_port) {
1104                         RTE_LOG(ERR, PMD, "Req Port: %d. Configured port: %d\n",
1105                                 udp_tunnel->udp_port, bp->geneve_port);
1106                         return -EINVAL;
1107                 }
1108                 if (--bp->geneve_port_cnt)
1109                         return 0;
1110
1111                 tunnel_type =
1112                         HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_GENEVE;
1113                 port = bp->geneve_fw_dst_port_id;
1114                 break;
1115         default:
1116                 RTE_LOG(ERR, PMD, "Tunnel type is not supported\n");
1117                 return -ENOTSUP;
1118         }
1119
1120         rc = bnxt_hwrm_tunnel_dst_port_free(bp, port, tunnel_type);
1121         if (!rc) {
1122                 if (tunnel_type ==
1123                     HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_VXLAN)
1124                         bp->vxlan_port = 0;
1125                 if (tunnel_type ==
1126                     HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_GENEVE)
1127                         bp->geneve_port = 0;
1128         }
1129         return rc;
1130 }
1131
1132 static int bnxt_del_vlan_filter(struct bnxt *bp, uint16_t vlan_id)
1133 {
1134         struct bnxt_filter_info *filter, *temp_filter, *new_filter;
1135         struct bnxt_vnic_info *vnic;
1136         unsigned int i;
1137         int rc = 0;
1138         uint32_t chk = HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN;
1139
1140         /* Cycle through all VNICs */
1141         for (i = 0; i < bp->nr_vnics; i++) {
1142                 /*
1143                  * For each VNIC and each associated filter(s)
1144                  * if VLAN exists && VLAN matches vlan_id
1145                  *      remove the MAC+VLAN filter
1146                  *      add a new MAC only filter
1147                  * else
1148                  *      VLAN filter doesn't exist, just skip and continue
1149                  */
1150                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
1151                         filter = STAILQ_FIRST(&vnic->filter);
1152                         while (filter) {
1153                                 temp_filter = STAILQ_NEXT(filter, next);
1154
1155                                 if (filter->enables & chk &&
1156                                     filter->l2_ovlan == vlan_id) {
1157                                         /* Must delete the filter */
1158                                         STAILQ_REMOVE(&vnic->filter, filter,
1159                                                       bnxt_filter_info, next);
1160                                         bnxt_hwrm_clear_filter(bp, filter);
1161                                         STAILQ_INSERT_TAIL(
1162                                                         &bp->free_filter_list,
1163                                                         filter, next);
1164
1165                                         /*
1166                                          * Need to examine to see if the MAC
1167                                          * filter already existed or not before
1168                                          * allocating a new one
1169                                          */
1170
1171                                         new_filter = bnxt_alloc_filter(bp);
1172                                         if (!new_filter) {
1173                                                 RTE_LOG(ERR, PMD,
1174                                                         "MAC/VLAN filter alloc failed\n");
1175                                                 rc = -ENOMEM;
1176                                                 goto exit;
1177                                         }
1178                                         STAILQ_INSERT_TAIL(&vnic->filter,
1179                                                            new_filter, next);
1180                                         /* Inherit MAC from previous filter */
1181                                         new_filter->mac_index =
1182                                                         filter->mac_index;
1183                                         memcpy(new_filter->l2_addr,
1184                                                filter->l2_addr, ETHER_ADDR_LEN);
1185                                         /* MAC only filter */
1186                                         rc = bnxt_hwrm_set_filter(bp,
1187                                                         vnic->fw_vnic_id,
1188                                                         new_filter);
1189                                         if (rc)
1190                                                 goto exit;
1191                                         RTE_LOG(INFO, PMD,
1192                                                 "Del Vlan filter for %d\n",
1193                                                 vlan_id);
1194                                 }
1195                                 filter = temp_filter;
1196                         }
1197                 }
1198         }
1199 exit:
1200         return rc;
1201 }
1202
1203 static int bnxt_add_vlan_filter(struct bnxt *bp, uint16_t vlan_id)
1204 {
1205         struct bnxt_filter_info *filter, *temp_filter, *new_filter;
1206         struct bnxt_vnic_info *vnic;
1207         unsigned int i;
1208         int rc = 0;
1209         uint32_t en = HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN |
1210                 HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN_MASK;
1211         uint32_t chk = HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN;
1212
1213         /* Cycle through all VNICs */
1214         for (i = 0; i < bp->nr_vnics; i++) {
1215                 /*
1216                  * For each VNIC and each associated filter(s)
1217                  * if VLAN exists:
1218                  *   if VLAN matches vlan_id
1219                  *      VLAN filter already exists, just skip and continue
1220                  *   else
1221                  *      add a new MAC+VLAN filter
1222                  * else
1223                  *   Remove the old MAC only filter
1224                  *    Add a new MAC+VLAN filter
1225                  */
1226                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
1227                         filter = STAILQ_FIRST(&vnic->filter);
1228                         while (filter) {
1229                                 temp_filter = STAILQ_NEXT(filter, next);
1230
1231                                 if (filter->enables & chk) {
1232                                         if (filter->l2_ovlan == vlan_id)
1233                                                 goto cont;
1234                                 } else {
1235                                         /* Must delete the MAC filter */
1236                                         STAILQ_REMOVE(&vnic->filter, filter,
1237                                                       bnxt_filter_info, next);
1238                                         bnxt_hwrm_clear_filter(bp, filter);
1239                                         filter->l2_ovlan = 0;
1240                                         STAILQ_INSERT_TAIL(
1241                                                         &bp->free_filter_list,
1242                                                         filter, next);
1243                                 }
1244                                 new_filter = bnxt_alloc_filter(bp);
1245                                 if (!new_filter) {
1246                                         RTE_LOG(ERR, PMD,
1247                                                 "MAC/VLAN filter alloc failed\n");
1248                                         rc = -ENOMEM;
1249                                         goto exit;
1250                                 }
1251                                 STAILQ_INSERT_TAIL(&vnic->filter, new_filter,
1252                                                    next);
1253                                 /* Inherit MAC from the previous filter */
1254                                 new_filter->mac_index = filter->mac_index;
1255                                 memcpy(new_filter->l2_addr, filter->l2_addr,
1256                                        ETHER_ADDR_LEN);
1257                                 /* MAC + VLAN ID filter */
1258                                 new_filter->l2_ovlan = vlan_id;
1259                                 new_filter->l2_ovlan_mask = 0xF000;
1260                                 new_filter->enables |= en;
1261                                 rc = bnxt_hwrm_set_filter(bp, vnic->fw_vnic_id,
1262                                                           new_filter);
1263                                 if (rc)
1264                                         goto exit;
1265                                 RTE_LOG(INFO, PMD,
1266                                         "Added Vlan filter for %d\n", vlan_id);
1267 cont:
1268                                 filter = temp_filter;
1269                         }
1270                 }
1271         }
1272 exit:
1273         return rc;
1274 }
1275
1276 static int bnxt_vlan_filter_set_op(struct rte_eth_dev *eth_dev,
1277                                    uint16_t vlan_id, int on)
1278 {
1279         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
1280
1281         /* These operations apply to ALL existing MAC/VLAN filters */
1282         if (on)
1283                 return bnxt_add_vlan_filter(bp, vlan_id);
1284         else
1285                 return bnxt_del_vlan_filter(bp, vlan_id);
1286 }
1287
1288 static void
1289 bnxt_vlan_offload_set_op(struct rte_eth_dev *dev, int mask)
1290 {
1291         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1292         unsigned int i;
1293
1294         if (mask & ETH_VLAN_FILTER_MASK) {
1295                 if (!dev->data->dev_conf.rxmode.hw_vlan_filter) {
1296                         /* Remove any VLAN filters programmed */
1297                         for (i = 0; i < 4095; i++)
1298                                 bnxt_del_vlan_filter(bp, i);
1299                 }
1300                 RTE_LOG(INFO, PMD, "VLAN Filtering: %d\n",
1301                         dev->data->dev_conf.rxmode.hw_vlan_filter);
1302         }
1303
1304         if (mask & ETH_VLAN_STRIP_MASK) {
1305                 /* Enable or disable VLAN stripping */
1306                 for (i = 0; i < bp->nr_vnics; i++) {
1307                         struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
1308                         if (dev->data->dev_conf.rxmode.hw_vlan_strip)
1309                                 vnic->vlan_strip = true;
1310                         else
1311                                 vnic->vlan_strip = false;
1312                         bnxt_hwrm_vnic_cfg(bp, vnic);
1313                 }
1314                 RTE_LOG(INFO, PMD, "VLAN Strip Offload: %d\n",
1315                         dev->data->dev_conf.rxmode.hw_vlan_strip);
1316         }
1317
1318         if (mask & ETH_VLAN_EXTEND_MASK)
1319                 RTE_LOG(ERR, PMD, "Extend VLAN Not supported\n");
1320 }
1321
1322 static void
1323 bnxt_set_default_mac_addr_op(struct rte_eth_dev *dev, struct ether_addr *addr)
1324 {
1325         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1326         /* Default Filter is tied to VNIC 0 */
1327         struct bnxt_vnic_info *vnic = &bp->vnic_info[0];
1328         struct bnxt_filter_info *filter;
1329         int rc;
1330
1331         if (BNXT_VF(bp))
1332                 return;
1333
1334         memcpy(bp->mac_addr, addr, sizeof(bp->mac_addr));
1335         memcpy(&dev->data->mac_addrs[0], bp->mac_addr, ETHER_ADDR_LEN);
1336
1337         STAILQ_FOREACH(filter, &vnic->filter, next) {
1338                 /* Default Filter is at Index 0 */
1339                 if (filter->mac_index != 0)
1340                         continue;
1341                 rc = bnxt_hwrm_clear_filter(bp, filter);
1342                 if (rc)
1343                         break;
1344                 memcpy(filter->l2_addr, bp->mac_addr, ETHER_ADDR_LEN);
1345                 memset(filter->l2_addr_mask, 0xff, ETHER_ADDR_LEN);
1346                 filter->flags |= HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_RX;
1347                 filter->enables |=
1348                         HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR |
1349                         HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR_MASK;
1350                 rc = bnxt_hwrm_set_filter(bp, vnic->fw_vnic_id, filter);
1351                 if (rc)
1352                         break;
1353                 filter->mac_index = 0;
1354                 RTE_LOG(DEBUG, PMD, "Set MAC addr\n");
1355         }
1356 }
1357
1358 static int
1359 bnxt_dev_set_mc_addr_list_op(struct rte_eth_dev *eth_dev,
1360                           struct ether_addr *mc_addr_set,
1361                           uint32_t nb_mc_addr)
1362 {
1363         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
1364         char *mc_addr_list = (char *)mc_addr_set;
1365         struct bnxt_vnic_info *vnic;
1366         uint32_t off = 0, i = 0;
1367
1368         vnic = &bp->vnic_info[0];
1369
1370         if (nb_mc_addr > BNXT_MAX_MC_ADDRS) {
1371                 vnic->flags |= BNXT_VNIC_INFO_ALLMULTI;
1372                 goto allmulti;
1373         }
1374
1375         /* TODO Check for Duplicate mcast addresses */
1376         vnic->flags &= ~BNXT_VNIC_INFO_ALLMULTI;
1377         for (i = 0; i < nb_mc_addr; i++) {
1378                 memcpy(vnic->mc_list + off, &mc_addr_list[i], ETHER_ADDR_LEN);
1379                 off += ETHER_ADDR_LEN;
1380         }
1381
1382         vnic->mc_addr_cnt = i;
1383
1384 allmulti:
1385         return bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic, 0, NULL);
1386 }
1387
1388 static int
1389 bnxt_fw_version_get(struct rte_eth_dev *dev, char *fw_version, size_t fw_size)
1390 {
1391         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1392         uint8_t fw_major = (bp->fw_ver >> 24) & 0xff;
1393         uint8_t fw_minor = (bp->fw_ver >> 16) & 0xff;
1394         uint8_t fw_updt = (bp->fw_ver >> 8) & 0xff;
1395         int ret;
1396
1397         ret = snprintf(fw_version, fw_size, "%d.%d.%d",
1398                         fw_major, fw_minor, fw_updt);
1399
1400         ret += 1; /* add the size of '\0' */
1401         if (fw_size < (uint32_t)ret)
1402                 return ret;
1403         else
1404                 return 0;
1405 }
1406
1407 static void
1408 bnxt_rxq_info_get_op(struct rte_eth_dev *dev, uint16_t queue_id,
1409         struct rte_eth_rxq_info *qinfo)
1410 {
1411         struct bnxt_rx_queue *rxq;
1412
1413         rxq = dev->data->rx_queues[queue_id];
1414
1415         qinfo->mp = rxq->mb_pool;
1416         qinfo->scattered_rx = dev->data->scattered_rx;
1417         qinfo->nb_desc = rxq->nb_rx_desc;
1418
1419         qinfo->conf.rx_free_thresh = rxq->rx_free_thresh;
1420         qinfo->conf.rx_drop_en = 0;
1421         qinfo->conf.rx_deferred_start = 0;
1422 }
1423
1424 static void
1425 bnxt_txq_info_get_op(struct rte_eth_dev *dev, uint16_t queue_id,
1426         struct rte_eth_txq_info *qinfo)
1427 {
1428         struct bnxt_tx_queue *txq;
1429
1430         txq = dev->data->tx_queues[queue_id];
1431
1432         qinfo->nb_desc = txq->nb_tx_desc;
1433
1434         qinfo->conf.tx_thresh.pthresh = txq->pthresh;
1435         qinfo->conf.tx_thresh.hthresh = txq->hthresh;
1436         qinfo->conf.tx_thresh.wthresh = txq->wthresh;
1437
1438         qinfo->conf.tx_free_thresh = txq->tx_free_thresh;
1439         qinfo->conf.tx_rs_thresh = 0;
1440         qinfo->conf.txq_flags = txq->txq_flags;
1441         qinfo->conf.tx_deferred_start = txq->tx_deferred_start;
1442 }
1443
1444 static int bnxt_mtu_set_op(struct rte_eth_dev *eth_dev, uint16_t new_mtu)
1445 {
1446         struct bnxt *bp = eth_dev->data->dev_private;
1447         struct rte_eth_dev_info dev_info;
1448         uint32_t max_dev_mtu;
1449         uint32_t rc = 0;
1450         uint32_t i;
1451
1452         bnxt_dev_info_get_op(eth_dev, &dev_info);
1453         max_dev_mtu = dev_info.max_rx_pktlen -
1454                       ETHER_HDR_LEN - ETHER_CRC_LEN - VLAN_TAG_SIZE * 2;
1455
1456         if (new_mtu < ETHER_MIN_MTU || new_mtu > max_dev_mtu) {
1457                 RTE_LOG(ERR, PMD, "MTU requested must be within (%d, %d)\n",
1458                         ETHER_MIN_MTU, max_dev_mtu);
1459                 return -EINVAL;
1460         }
1461
1462
1463         if (new_mtu > ETHER_MTU) {
1464                 bp->flags |= BNXT_FLAG_JUMBO;
1465                 eth_dev->data->dev_conf.rxmode.jumbo_frame = 1;
1466         } else {
1467                 eth_dev->data->dev_conf.rxmode.jumbo_frame = 0;
1468                 bp->flags &= ~BNXT_FLAG_JUMBO;
1469         }
1470
1471         eth_dev->data->dev_conf.rxmode.max_rx_pkt_len =
1472                 new_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN + VLAN_TAG_SIZE * 2;
1473
1474         eth_dev->data->mtu = new_mtu;
1475         RTE_LOG(INFO, PMD, "New MTU is %d\n", eth_dev->data->mtu);
1476
1477         for (i = 0; i < bp->nr_vnics; i++) {
1478                 struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
1479
1480                 vnic->mru = bp->eth_dev->data->mtu + ETHER_HDR_LEN +
1481                                         ETHER_CRC_LEN + VLAN_TAG_SIZE * 2;
1482                 rc = bnxt_hwrm_vnic_cfg(bp, vnic);
1483                 if (rc)
1484                         break;
1485
1486                 rc = bnxt_hwrm_vnic_plcmode_cfg(bp, vnic);
1487                 if (rc)
1488                         return rc;
1489         }
1490
1491         return rc;
1492 }
1493
1494 static int
1495 bnxt_vlan_pvid_set_op(struct rte_eth_dev *dev, uint16_t pvid, int on)
1496 {
1497         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1498         uint16_t vlan = bp->vlan;
1499         int rc;
1500
1501         if (BNXT_NPAR_PF(bp) || BNXT_VF(bp)) {
1502                 RTE_LOG(ERR, PMD,
1503                         "PVID cannot be modified for this function\n");
1504                 return -ENOTSUP;
1505         }
1506         bp->vlan = on ? pvid : 0;
1507
1508         rc = bnxt_hwrm_set_default_vlan(bp, 0, 0);
1509         if (rc)
1510                 bp->vlan = vlan;
1511         return rc;
1512 }
1513
1514 static int
1515 bnxt_dev_led_on_op(struct rte_eth_dev *dev)
1516 {
1517         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1518
1519         return bnxt_hwrm_port_led_cfg(bp, true);
1520 }
1521
1522 static int
1523 bnxt_dev_led_off_op(struct rte_eth_dev *dev)
1524 {
1525         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1526
1527         return bnxt_hwrm_port_led_cfg(bp, false);
1528 }
1529
1530 static uint32_t
1531 bnxt_rx_queue_count_op(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1532 {
1533         uint32_t desc = 0, raw_cons = 0, cons;
1534         struct bnxt_cp_ring_info *cpr;
1535         struct bnxt_rx_queue *rxq;
1536         struct rx_pkt_cmpl *rxcmp;
1537         uint16_t cmp_type;
1538         uint8_t cmp = 1;
1539         bool valid;
1540
1541         rxq = dev->data->rx_queues[rx_queue_id];
1542         cpr = rxq->cp_ring;
1543         valid = cpr->valid;
1544
1545         while (raw_cons < rxq->nb_rx_desc) {
1546                 cons = RING_CMP(cpr->cp_ring_struct, raw_cons);
1547                 rxcmp = (struct rx_pkt_cmpl *)&cpr->cp_desc_ring[cons];
1548
1549                 if (!CMPL_VALID(rxcmp, valid))
1550                         goto nothing_to_do;
1551                 valid = FLIP_VALID(cons, cpr->cp_ring_struct->ring_mask, valid);
1552                 cmp_type = CMP_TYPE(rxcmp);
1553                 if (cmp_type == RX_PKT_CMPL_TYPE_RX_L2_TPA_END) {
1554                         cmp = (rte_le_to_cpu_32(
1555                                         ((struct rx_tpa_end_cmpl *)
1556                                          (rxcmp))->agg_bufs_v1) &
1557                                RX_TPA_END_CMPL_AGG_BUFS_MASK) >>
1558                                 RX_TPA_END_CMPL_AGG_BUFS_SFT;
1559                         desc++;
1560                 } else if (cmp_type == 0x11) {
1561                         desc++;
1562                         cmp = (rxcmp->agg_bufs_v1 &
1563                                    RX_PKT_CMPL_AGG_BUFS_MASK) >>
1564                                 RX_PKT_CMPL_AGG_BUFS_SFT;
1565                 } else {
1566                         cmp = 1;
1567                 }
1568 nothing_to_do:
1569                 raw_cons += cmp ? cmp : 2;
1570         }
1571
1572         return desc;
1573 }
1574
1575 static int
1576 bnxt_rx_descriptor_status_op(void *rx_queue, uint16_t offset)
1577 {
1578         struct bnxt_rx_queue *rxq = (struct bnxt_rx_queue *)rx_queue;
1579         struct bnxt_rx_ring_info *rxr;
1580         struct bnxt_cp_ring_info *cpr;
1581         struct bnxt_sw_rx_bd *rx_buf;
1582         struct rx_pkt_cmpl *rxcmp;
1583         uint32_t cons, cp_cons;
1584
1585         if (!rxq)
1586                 return -EINVAL;
1587
1588         cpr = rxq->cp_ring;
1589         rxr = rxq->rx_ring;
1590
1591         if (offset >= rxq->nb_rx_desc)
1592                 return -EINVAL;
1593
1594         cons = RING_CMP(cpr->cp_ring_struct, offset);
1595         cp_cons = cpr->cp_raw_cons;
1596         rxcmp = (struct rx_pkt_cmpl *)&cpr->cp_desc_ring[cons];
1597
1598         if (cons > cp_cons) {
1599                 if (CMPL_VALID(rxcmp, cpr->valid))
1600                         return RTE_ETH_RX_DESC_DONE;
1601         } else {
1602                 if (CMPL_VALID(rxcmp, !cpr->valid))
1603                         return RTE_ETH_RX_DESC_DONE;
1604         }
1605         rx_buf = &rxr->rx_buf_ring[cons];
1606         if (rx_buf->mbuf == NULL)
1607                 return RTE_ETH_RX_DESC_UNAVAIL;
1608
1609
1610         return RTE_ETH_RX_DESC_AVAIL;
1611 }
1612
1613 static int
1614 bnxt_tx_descriptor_status_op(void *tx_queue, uint16_t offset)
1615 {
1616         struct bnxt_tx_queue *txq = (struct bnxt_tx_queue *)tx_queue;
1617         struct bnxt_tx_ring_info *txr;
1618         struct bnxt_cp_ring_info *cpr;
1619         struct bnxt_sw_tx_bd *tx_buf;
1620         struct tx_pkt_cmpl *txcmp;
1621         uint32_t cons, cp_cons;
1622
1623         if (!txq)
1624                 return -EINVAL;
1625
1626         cpr = txq->cp_ring;
1627         txr = txq->tx_ring;
1628
1629         if (offset >= txq->nb_tx_desc)
1630                 return -EINVAL;
1631
1632         cons = RING_CMP(cpr->cp_ring_struct, offset);
1633         txcmp = (struct tx_pkt_cmpl *)&cpr->cp_desc_ring[cons];
1634         cp_cons = cpr->cp_raw_cons;
1635
1636         if (cons > cp_cons) {
1637                 if (CMPL_VALID(txcmp, cpr->valid))
1638                         return RTE_ETH_TX_DESC_UNAVAIL;
1639         } else {
1640                 if (CMPL_VALID(txcmp, !cpr->valid))
1641                         return RTE_ETH_TX_DESC_UNAVAIL;
1642         }
1643         tx_buf = &txr->tx_buf_ring[cons];
1644         if (tx_buf->mbuf == NULL)
1645                 return RTE_ETH_TX_DESC_DONE;
1646
1647         return RTE_ETH_TX_DESC_FULL;
1648 }
1649
1650 /*
1651  * Initialization
1652  */
1653
1654 static const struct eth_dev_ops bnxt_dev_ops = {
1655         .dev_infos_get = bnxt_dev_info_get_op,
1656         .dev_close = bnxt_dev_close_op,
1657         .dev_configure = bnxt_dev_configure_op,
1658         .dev_start = bnxt_dev_start_op,
1659         .dev_stop = bnxt_dev_stop_op,
1660         .dev_set_link_up = bnxt_dev_set_link_up_op,
1661         .dev_set_link_down = bnxt_dev_set_link_down_op,
1662         .stats_get = bnxt_stats_get_op,
1663         .stats_reset = bnxt_stats_reset_op,
1664         .rx_queue_setup = bnxt_rx_queue_setup_op,
1665         .rx_queue_release = bnxt_rx_queue_release_op,
1666         .tx_queue_setup = bnxt_tx_queue_setup_op,
1667         .tx_queue_release = bnxt_tx_queue_release_op,
1668         .reta_update = bnxt_reta_update_op,
1669         .reta_query = bnxt_reta_query_op,
1670         .rss_hash_update = bnxt_rss_hash_update_op,
1671         .rss_hash_conf_get = bnxt_rss_hash_conf_get_op,
1672         .link_update = bnxt_link_update_op,
1673         .promiscuous_enable = bnxt_promiscuous_enable_op,
1674         .promiscuous_disable = bnxt_promiscuous_disable_op,
1675         .allmulticast_enable = bnxt_allmulticast_enable_op,
1676         .allmulticast_disable = bnxt_allmulticast_disable_op,
1677         .mac_addr_add = bnxt_mac_addr_add_op,
1678         .mac_addr_remove = bnxt_mac_addr_remove_op,
1679         .flow_ctrl_get = bnxt_flow_ctrl_get_op,
1680         .flow_ctrl_set = bnxt_flow_ctrl_set_op,
1681         .udp_tunnel_port_add  = bnxt_udp_tunnel_port_add_op,
1682         .udp_tunnel_port_del  = bnxt_udp_tunnel_port_del_op,
1683         .vlan_filter_set = bnxt_vlan_filter_set_op,
1684         .vlan_offload_set = bnxt_vlan_offload_set_op,
1685         .vlan_pvid_set = bnxt_vlan_pvid_set_op,
1686         .mtu_set = bnxt_mtu_set_op,
1687         .mac_addr_set = bnxt_set_default_mac_addr_op,
1688         .xstats_get = bnxt_dev_xstats_get_op,
1689         .xstats_get_names = bnxt_dev_xstats_get_names_op,
1690         .xstats_reset = bnxt_dev_xstats_reset_op,
1691         .fw_version_get = bnxt_fw_version_get,
1692         .set_mc_addr_list = bnxt_dev_set_mc_addr_list_op,
1693         .rxq_info_get = bnxt_rxq_info_get_op,
1694         .txq_info_get = bnxt_txq_info_get_op,
1695         .dev_led_on = bnxt_dev_led_on_op,
1696         .dev_led_off = bnxt_dev_led_off_op,
1697         .xstats_get_by_id = bnxt_dev_xstats_get_by_id_op,
1698         .xstats_get_names_by_id = bnxt_dev_xstats_get_names_by_id_op,
1699         .rx_queue_count = bnxt_rx_queue_count_op,
1700         .rx_descriptor_status = bnxt_rx_descriptor_status_op,
1701         .tx_descriptor_status = bnxt_tx_descriptor_status_op,
1702 };
1703
1704 static bool bnxt_vf_pciid(uint16_t id)
1705 {
1706         if (id == BROADCOM_DEV_ID_57304_VF ||
1707             id == BROADCOM_DEV_ID_57406_VF ||
1708             id == BROADCOM_DEV_ID_5731X_VF ||
1709             id == BROADCOM_DEV_ID_5741X_VF ||
1710             id == BROADCOM_DEV_ID_57414_VF ||
1711             id == BROADCOM_DEV_ID_STRATUS_NIC_VF)
1712                 return true;
1713         return false;
1714 }
1715
1716 static int bnxt_init_board(struct rte_eth_dev *eth_dev)
1717 {
1718         struct bnxt *bp = eth_dev->data->dev_private;
1719         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
1720         int rc;
1721
1722         /* enable device (incl. PCI PM wakeup), and bus-mastering */
1723         if (!pci_dev->mem_resource[0].addr) {
1724                 RTE_LOG(ERR, PMD,
1725                         "Cannot find PCI device base address, aborting\n");
1726                 rc = -ENODEV;
1727                 goto init_err_disable;
1728         }
1729
1730         bp->eth_dev = eth_dev;
1731         bp->pdev = pci_dev;
1732
1733         bp->bar0 = (void *)pci_dev->mem_resource[0].addr;
1734         if (!bp->bar0) {
1735                 RTE_LOG(ERR, PMD, "Cannot map device registers, aborting\n");
1736                 rc = -ENOMEM;
1737                 goto init_err_release;
1738         }
1739         return 0;
1740
1741 init_err_release:
1742         if (bp->bar0)
1743                 bp->bar0 = NULL;
1744
1745 init_err_disable:
1746
1747         return rc;
1748 }
1749
1750 static int bnxt_dev_uninit(struct rte_eth_dev *eth_dev);
1751
1752 #define ALLOW_FUNC(x)   \
1753         { \
1754                 typeof(x) arg = (x); \
1755                 bp->pf.vf_req_fwd[((arg) >> 5)] &= \
1756                 ~rte_cpu_to_le_32(1 << ((arg) & 0x1f)); \
1757         }
1758 static int
1759 bnxt_dev_init(struct rte_eth_dev *eth_dev)
1760 {
1761         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
1762         char mz_name[RTE_MEMZONE_NAMESIZE];
1763         const struct rte_memzone *mz = NULL;
1764         static int version_printed;
1765         uint32_t total_alloc_len;
1766         phys_addr_t mz_phys_addr;
1767         struct bnxt *bp;
1768         int rc;
1769
1770         if (version_printed++ == 0)
1771                 RTE_LOG(INFO, PMD, "%s\n", bnxt_version);
1772
1773         rte_eth_copy_pci_info(eth_dev, pci_dev);
1774         eth_dev->data->dev_flags |= RTE_ETH_DEV_DETACHABLE;
1775
1776         bp = eth_dev->data->dev_private;
1777
1778         rte_atomic64_init(&bp->rx_mbuf_alloc_fail);
1779         bp->dev_stopped = 1;
1780
1781         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
1782                 goto skip_init;
1783
1784         if (bnxt_vf_pciid(pci_dev->id.device_id))
1785                 bp->flags |= BNXT_FLAG_VF;
1786
1787         rc = bnxt_init_board(eth_dev);
1788         if (rc) {
1789                 RTE_LOG(ERR, PMD,
1790                         "Board initialization failed rc: %x\n", rc);
1791                 goto error;
1792         }
1793 skip_init:
1794         eth_dev->dev_ops = &bnxt_dev_ops;
1795         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
1796                 return 0;
1797         eth_dev->rx_pkt_burst = &bnxt_recv_pkts;
1798         eth_dev->tx_pkt_burst = &bnxt_xmit_pkts;
1799
1800         if (BNXT_PF(bp) && pci_dev->id.device_id != BROADCOM_DEV_ID_NS2) {
1801                 snprintf(mz_name, RTE_MEMZONE_NAMESIZE,
1802                          "bnxt_%04x:%02x:%02x:%02x-%s", pci_dev->addr.domain,
1803                          pci_dev->addr.bus, pci_dev->addr.devid,
1804                          pci_dev->addr.function, "rx_port_stats");
1805                 mz_name[RTE_MEMZONE_NAMESIZE - 1] = 0;
1806                 mz = rte_memzone_lookup(mz_name);
1807                 total_alloc_len = RTE_CACHE_LINE_ROUNDUP(
1808                                 sizeof(struct rx_port_stats) + 512);
1809                 if (!mz) {
1810                         mz = rte_memzone_reserve(mz_name, total_alloc_len,
1811                                                  SOCKET_ID_ANY,
1812                                                  RTE_MEMZONE_2MB |
1813                                                  RTE_MEMZONE_SIZE_HINT_ONLY);
1814                         if (mz == NULL)
1815                                 return -ENOMEM;
1816                 }
1817                 memset(mz->addr, 0, mz->len);
1818                 mz_phys_addr = mz->phys_addr;
1819                 if ((unsigned long)mz->addr == mz_phys_addr) {
1820                         RTE_LOG(WARNING, PMD,
1821                                 "Memzone physical address same as virtual.\n");
1822                         RTE_LOG(WARNING, PMD,
1823                                 "Using rte_mem_virt2phy()\n");
1824                         mz_phys_addr = rte_mem_virt2phy(mz->addr);
1825                         if (mz_phys_addr == 0) {
1826                                 RTE_LOG(ERR, PMD,
1827                                 "unable to map address to physical memory\n");
1828                                 return -ENOMEM;
1829                         }
1830                 }
1831
1832                 bp->rx_mem_zone = (const void *)mz;
1833                 bp->hw_rx_port_stats = mz->addr;
1834                 bp->hw_rx_port_stats_map = mz_phys_addr;
1835
1836                 snprintf(mz_name, RTE_MEMZONE_NAMESIZE,
1837                          "bnxt_%04x:%02x:%02x:%02x-%s", pci_dev->addr.domain,
1838                          pci_dev->addr.bus, pci_dev->addr.devid,
1839                          pci_dev->addr.function, "tx_port_stats");
1840                 mz_name[RTE_MEMZONE_NAMESIZE - 1] = 0;
1841                 mz = rte_memzone_lookup(mz_name);
1842                 total_alloc_len = RTE_CACHE_LINE_ROUNDUP(
1843                                 sizeof(struct tx_port_stats) + 512);
1844                 if (!mz) {
1845                         mz = rte_memzone_reserve(mz_name, total_alloc_len,
1846                                                  SOCKET_ID_ANY,
1847                                                  RTE_MEMZONE_2MB |
1848                                                  RTE_MEMZONE_SIZE_HINT_ONLY);
1849                         if (mz == NULL)
1850                                 return -ENOMEM;
1851                 }
1852                 memset(mz->addr, 0, mz->len);
1853                 mz_phys_addr = mz->phys_addr;
1854                 if ((unsigned long)mz->addr == mz_phys_addr) {
1855                         RTE_LOG(WARNING, PMD,
1856                                 "Memzone physical address same as virtual.\n");
1857                         RTE_LOG(WARNING, PMD,
1858                                 "Using rte_mem_virt2phy()\n");
1859                         mz_phys_addr = rte_mem_virt2phy(mz->addr);
1860                         if (mz_phys_addr == 0) {
1861                                 RTE_LOG(ERR, PMD,
1862                                 "unable to map address to physical memory\n");
1863                                 return -ENOMEM;
1864                         }
1865                 }
1866
1867                 bp->tx_mem_zone = (const void *)mz;
1868                 bp->hw_tx_port_stats = mz->addr;
1869                 bp->hw_tx_port_stats_map = mz_phys_addr;
1870
1871                 bp->flags |= BNXT_FLAG_PORT_STATS;
1872         }
1873
1874         rc = bnxt_alloc_hwrm_resources(bp);
1875         if (rc) {
1876                 RTE_LOG(ERR, PMD,
1877                         "hwrm resource allocation failure rc: %x\n", rc);
1878                 goto error_free;
1879         }
1880         rc = bnxt_hwrm_ver_get(bp);
1881         if (rc)
1882                 goto error_free;
1883         bnxt_hwrm_queue_qportcfg(bp);
1884
1885         bnxt_hwrm_func_qcfg(bp);
1886
1887         /* Get the MAX capabilities for this function */
1888         rc = bnxt_hwrm_func_qcaps(bp);
1889         if (rc) {
1890                 RTE_LOG(ERR, PMD, "hwrm query capability failure rc: %x\n", rc);
1891                 goto error_free;
1892         }
1893         if (bp->max_tx_rings == 0) {
1894                 RTE_LOG(ERR, PMD, "No TX rings available!\n");
1895                 rc = -EBUSY;
1896                 goto error_free;
1897         }
1898         eth_dev->data->mac_addrs = rte_zmalloc("bnxt_mac_addr_tbl",
1899                                         ETHER_ADDR_LEN * MAX_NUM_MAC_ADDR, 0);
1900         if (eth_dev->data->mac_addrs == NULL) {
1901                 RTE_LOG(ERR, PMD,
1902                         "Failed to alloc %u bytes needed to store MAC addr tbl",
1903                         ETHER_ADDR_LEN * MAX_NUM_MAC_ADDR);
1904                 rc = -ENOMEM;
1905                 goto error_free;
1906         }
1907         /* Copy the permanent MAC from the qcap response address now. */
1908         memcpy(bp->mac_addr, bp->dflt_mac_addr, sizeof(bp->mac_addr));
1909         memcpy(&eth_dev->data->mac_addrs[0], bp->mac_addr, ETHER_ADDR_LEN);
1910         bp->grp_info = rte_zmalloc("bnxt_grp_info",
1911                                 sizeof(*bp->grp_info) * bp->max_ring_grps, 0);
1912         if (!bp->grp_info) {
1913                 RTE_LOG(ERR, PMD,
1914                         "Failed to alloc %zu bytes needed to store group info table\n",
1915                         sizeof(*bp->grp_info) * bp->max_ring_grps);
1916                 rc = -ENOMEM;
1917                 goto error_free;
1918         }
1919
1920         /* Forward all requests if firmware is new enough */
1921         if (((bp->fw_ver >= ((20 << 24) | (6 << 16) | (100 << 8))) &&
1922             (bp->fw_ver < ((20 << 24) | (7 << 16)))) ||
1923             ((bp->fw_ver >= ((20 << 24) | (8 << 16))))) {
1924                 memset(bp->pf.vf_req_fwd, 0xff, sizeof(bp->pf.vf_req_fwd));
1925         } else {
1926                 RTE_LOG(WARNING, PMD,
1927                         "Firmware too old for VF mailbox functionality\n");
1928                 memset(bp->pf.vf_req_fwd, 0, sizeof(bp->pf.vf_req_fwd));
1929         }
1930
1931         /*
1932          * The following are used for driver cleanup.  If we disallow these,
1933          * VF drivers can't clean up cleanly.
1934          */
1935         ALLOW_FUNC(HWRM_FUNC_DRV_UNRGTR);
1936         ALLOW_FUNC(HWRM_VNIC_FREE);
1937         ALLOW_FUNC(HWRM_RING_FREE);
1938         ALLOW_FUNC(HWRM_RING_GRP_FREE);
1939         ALLOW_FUNC(HWRM_VNIC_RSS_COS_LB_CTX_FREE);
1940         ALLOW_FUNC(HWRM_CFA_L2_FILTER_FREE);
1941         ALLOW_FUNC(HWRM_STAT_CTX_FREE);
1942         rc = bnxt_hwrm_func_driver_register(bp);
1943         if (rc) {
1944                 RTE_LOG(ERR, PMD,
1945                         "Failed to register driver");
1946                 rc = -EBUSY;
1947                 goto error_free;
1948         }
1949
1950         RTE_LOG(INFO, PMD,
1951                 DRV_MODULE_NAME " found at mem %" PRIx64 ", node addr %pM\n",
1952                 pci_dev->mem_resource[0].phys_addr,
1953                 pci_dev->mem_resource[0].addr);
1954
1955         rc = bnxt_hwrm_func_reset(bp);
1956         if (rc) {
1957                 RTE_LOG(ERR, PMD, "hwrm chip reset failure rc: %x\n", rc);
1958                 rc = -1;
1959                 goto error_free;
1960         }
1961
1962         if (BNXT_PF(bp)) {
1963                 //if (bp->pf.active_vfs) {
1964                         // TODO: Deallocate VF resources?
1965                 //}
1966                 if (bp->pdev->max_vfs) {
1967                         rc = bnxt_hwrm_allocate_vfs(bp, bp->pdev->max_vfs);
1968                         if (rc) {
1969                                 RTE_LOG(ERR, PMD, "Failed to allocate VFs\n");
1970                                 goto error_free;
1971                         }
1972                 } else {
1973                         rc = bnxt_hwrm_allocate_pf_only(bp);
1974                         if (rc) {
1975                                 RTE_LOG(ERR, PMD,
1976                                         "Failed to allocate PF resources\n");
1977                                 goto error_free;
1978                         }
1979                 }
1980         }
1981
1982         bnxt_hwrm_port_led_qcaps(bp);
1983
1984         rc = bnxt_setup_int(bp);
1985         if (rc)
1986                 goto error_free;
1987
1988         rc = bnxt_alloc_mem(bp);
1989         if (rc)
1990                 goto error_free_int;
1991
1992         rc = bnxt_request_int(bp);
1993         if (rc)
1994                 goto error_free_int;
1995
1996         rc = bnxt_alloc_def_cp_ring(bp);
1997         if (rc)
1998                 goto error_free_int;
1999
2000         bnxt_enable_int(bp);
2001
2002         return 0;
2003
2004 error_free_int:
2005         bnxt_disable_int(bp);
2006         bnxt_free_def_cp_ring(bp);
2007         bnxt_hwrm_func_buf_unrgtr(bp);
2008         bnxt_free_int(bp);
2009         bnxt_free_mem(bp);
2010 error_free:
2011         bnxt_dev_uninit(eth_dev);
2012 error:
2013         return rc;
2014 }
2015
2016 static int
2017 bnxt_dev_uninit(struct rte_eth_dev *eth_dev) {
2018         struct bnxt *bp = eth_dev->data->dev_private;
2019         int rc;
2020
2021         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
2022                 return -EPERM;
2023
2024         bnxt_disable_int(bp);
2025         bnxt_free_int(bp);
2026         bnxt_free_mem(bp);
2027         if (eth_dev->data->mac_addrs != NULL) {
2028                 rte_free(eth_dev->data->mac_addrs);
2029                 eth_dev->data->mac_addrs = NULL;
2030         }
2031         if (bp->grp_info != NULL) {
2032                 rte_free(bp->grp_info);
2033                 bp->grp_info = NULL;
2034         }
2035         rc = bnxt_hwrm_func_driver_unregister(bp, 0);
2036         bnxt_free_hwrm_resources(bp);
2037         rte_memzone_free((const struct rte_memzone *)bp->tx_mem_zone);
2038         rte_memzone_free((const struct rte_memzone *)bp->rx_mem_zone);
2039         if (bp->dev_stopped == 0)
2040                 bnxt_dev_close_op(eth_dev);
2041         if (bp->pf.vf_info)
2042                 rte_free(bp->pf.vf_info);
2043         eth_dev->dev_ops = NULL;
2044         eth_dev->rx_pkt_burst = NULL;
2045         eth_dev->tx_pkt_burst = NULL;
2046
2047         return rc;
2048 }
2049
2050 static int bnxt_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
2051         struct rte_pci_device *pci_dev)
2052 {
2053         return rte_eth_dev_pci_generic_probe(pci_dev, sizeof(struct bnxt),
2054                 bnxt_dev_init);
2055 }
2056
2057 static int bnxt_pci_remove(struct rte_pci_device *pci_dev)
2058 {
2059         return rte_eth_dev_pci_generic_remove(pci_dev, bnxt_dev_uninit);
2060 }
2061
2062 static struct rte_pci_driver bnxt_rte_pmd = {
2063         .id_table = bnxt_pci_id_map,
2064         .drv_flags = RTE_PCI_DRV_NEED_MAPPING |
2065                 RTE_PCI_DRV_INTR_LSC,
2066         .probe = bnxt_pci_probe,
2067         .remove = bnxt_pci_remove,
2068 };
2069
2070 static bool
2071 is_device_supported(struct rte_eth_dev *dev, struct rte_pci_driver *drv)
2072 {
2073         if (strcmp(dev->device->driver->name, drv->driver.name))
2074                 return false;
2075
2076         return true;
2077 }
2078
2079 bool is_bnxt_supported(struct rte_eth_dev *dev)
2080 {
2081         return is_device_supported(dev, &bnxt_rte_pmd);
2082 }
2083
2084 RTE_PMD_REGISTER_PCI(net_bnxt, bnxt_rte_pmd);
2085 RTE_PMD_REGISTER_PCI_TABLE(net_bnxt, bnxt_pci_id_map);
2086 RTE_PMD_REGISTER_KMOD_DEP(net_bnxt, "* igb_uio | uio_pci_generic | vfio-pci");