drivers/net/bnxt/bnxt_ethdev.c

   1 /*-
   2  *   BSD LICENSE
   3  *
   4  *   Copyright(c) Broadcom Limited.
   5  *   All rights reserved.
   6  *
   7  *   Redistribution and use in source and binary forms, with or without
   8  *   modification, are permitted provided that the following conditions
   9  *   are met:
  10  *
  11  *     * Redistributions of source code must retain the above copyright
  12  *       notice, this list of conditions and the following disclaimer.
  13  *     * Redistributions in binary form must reproduce the above copyright
  14  *       notice, this list of conditions and the following disclaimer in
  15  *       the documentation and/or other materials provided with the
  16  *       distribution.
  17  *     * Neither the name of Broadcom Corporation nor the names of its
  18  *       contributors may be used to endorse or promote products derived
  19  *       from this software without specific prior written permission.
  20  *
  21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32  */
  33
  34 #include <inttypes.h>
  35 #include <stdbool.h>
  36
  37 #include <rte_dev.h>
  38 #include <rte_ethdev.h>
  39 #include <rte_ethdev_pci.h>
  40 #include <rte_malloc.h>
  41 #include <rte_cycles.h>
  42
  43 #include "bnxt.h"
  44 #include "bnxt_cpr.h"
  45 #include "bnxt_filter.h"
  46 #include "bnxt_hwrm.h"
  47 #include "bnxt_irq.h"
  48 #include "bnxt_ring.h"
  49 #include "bnxt_rxq.h"
  50 #include "bnxt_rxr.h"
  51 #include "bnxt_stats.h"
  52 #include "bnxt_txq.h"
  53 #include "bnxt_txr.h"
  54 #include "bnxt_vnic.h"
  55 #include "hsi_struct_def_dpdk.h"
  56
  57 #define DRV_MODULE_NAME         "bnxt"
  58 static const char bnxt_version[] =
  59         "Broadcom Cumulus driver " DRV_MODULE_NAME "\n";
  60
  61 #define PCI_VENDOR_ID_BROADCOM 0x14E4
  62
  63 #define BROADCOM_DEV_ID_STRATUS_NIC 0x1614
  64 #define BROADCOM_DEV_ID_57414_VF 0x16c1
  65 #define BROADCOM_DEV_ID_57301 0x16c8
  66 #define BROADCOM_DEV_ID_57302 0x16c9
  67 #define BROADCOM_DEV_ID_57304_PF 0x16ca
  68 #define BROADCOM_DEV_ID_57304_VF 0x16cb
  69 #define BROADCOM_DEV_ID_57417_MF 0x16cc
  70 #define BROADCOM_DEV_ID_NS2 0x16cd
  71 #define BROADCOM_DEV_ID_57311 0x16ce
  72 #define BROADCOM_DEV_ID_57312 0x16cf
  73 #define BROADCOM_DEV_ID_57402 0x16d0
  74 #define BROADCOM_DEV_ID_57404 0x16d1
  75 #define BROADCOM_DEV_ID_57406_PF 0x16d2
  76 #define BROADCOM_DEV_ID_57406_VF 0x16d3
  77 #define BROADCOM_DEV_ID_57402_MF 0x16d4
  78 #define BROADCOM_DEV_ID_57407_RJ45 0x16d5
  79 #define BROADCOM_DEV_ID_57412 0x16d6
  80 #define BROADCOM_DEV_ID_57414 0x16d7
  81 #define BROADCOM_DEV_ID_57416_RJ45 0x16d8
  82 #define BROADCOM_DEV_ID_57417_RJ45 0x16d9
  83 #define BROADCOM_DEV_ID_5741X_VF 0x16dc
  84 #define BROADCOM_DEV_ID_57412_MF 0x16de
  85 #define BROADCOM_DEV_ID_57314 0x16df
  86 #define BROADCOM_DEV_ID_57317_RJ45 0x16e0
  87 #define BROADCOM_DEV_ID_5731X_VF 0x16e1
  88 #define BROADCOM_DEV_ID_57417_SFP 0x16e2
  89 #define BROADCOM_DEV_ID_57416_SFP 0x16e3
  90 #define BROADCOM_DEV_ID_57317_SFP 0x16e4
  91 #define BROADCOM_DEV_ID_57404_MF 0x16e7
  92 #define BROADCOM_DEV_ID_57406_MF 0x16e8
  93 #define BROADCOM_DEV_ID_57407_SFP 0x16e9
  94 #define BROADCOM_DEV_ID_57407_MF 0x16ea
  95 #define BROADCOM_DEV_ID_57414_MF 0x16ec
  96 #define BROADCOM_DEV_ID_57416_MF 0x16ee
  97
  98 static const struct rte_pci_id bnxt_pci_id_map[] = {
  99         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_STRATUS_NIC) },
 100         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57414_VF) },
 101         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57301) },
 102         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57302) },
 103         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57304_PF) },
 104         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57304_VF) },
 105         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_NS2) },
 106         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57402) },
 107         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57404) },
 108         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57406_PF) },
 109         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57406_VF) },
 110         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57402_MF) },
 111         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57407_RJ45) },
 112         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57404_MF) },
 113         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57406_MF) },
 114         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57407_SFP) },
 115         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57407_MF) },
 116         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_5741X_VF) },
 117         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_5731X_VF) },
 118         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57314) },
 119         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57417_MF) },
 120         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57311) },
 121         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57312) },
 122         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57412) },
 123         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57414) },
 124         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57416_RJ45) },
 125         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57417_RJ45) },
 126         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57412_MF) },
 127         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57317_RJ45) },
 128         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57417_SFP) },
 129         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57416_SFP) },
 130         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57317_SFP) },
 131         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57414_MF) },
 132         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57416_MF) },
 133         { .vendor_id = 0, /* sentinel */ },
 134 };
 135
 136 #define BNXT_ETH_RSS_SUPPORT (  \
 137         ETH_RSS_IPV4 |          \
 138         ETH_RSS_NONFRAG_IPV4_TCP |      \
 139         ETH_RSS_NONFRAG_IPV4_UDP |      \
 140         ETH_RSS_IPV6 |          \
 141         ETH_RSS_NONFRAG_IPV6_TCP |      \
 142         ETH_RSS_NONFRAG_IPV6_UDP)
 143
 144 static void bnxt_vlan_offload_set_op(struct rte_eth_dev *dev, int mask);
 145 /***********************/
 146
 147 /*
 148  * High level utility functions
 149  */
 150
 151 static void bnxt_free_mem(struct bnxt *bp)
 152 {
 153         bnxt_free_filter_mem(bp);
 154         bnxt_free_vnic_attributes(bp);
 155         bnxt_free_vnic_mem(bp);
 156
 157         bnxt_free_stats(bp);
 158         bnxt_free_tx_rings(bp);
 159         bnxt_free_rx_rings(bp);
 160         bnxt_free_def_cp_ring(bp);
 161 }
 162
 163 static int bnxt_alloc_mem(struct bnxt *bp)
 164 {
 165         int rc;
 166
 167         /* Default completion ring */
 168         rc = bnxt_init_def_ring_struct(bp, SOCKET_ID_ANY);
 169         if (rc)
 170                 goto alloc_mem_err;
 171
 172         rc = bnxt_alloc_rings(bp, 0, NULL, NULL,
 173                               bp->def_cp_ring, "def_cp");
 174         if (rc)
 175                 goto alloc_mem_err;
 176
 177         rc = bnxt_alloc_vnic_mem(bp);
 178         if (rc)
 179                 goto alloc_mem_err;
 180
 181         rc = bnxt_alloc_vnic_attributes(bp);
 182         if (rc)
 183                 goto alloc_mem_err;
 184
 185         rc = bnxt_alloc_filter_mem(bp);
 186         if (rc)
 187                 goto alloc_mem_err;
 188
 189         return 0;
 190
 191 alloc_mem_err:
 192         bnxt_free_mem(bp);
 193         return rc;
 194 }
 195
 196 static int bnxt_init_chip(struct bnxt *bp)
 197 {
 198         unsigned int i, rss_idx, fw_idx;
 199         struct rte_eth_link new;
 200         int rc;
 201
 202         if (bp->eth_dev->data->mtu > ETHER_MTU) {
 203                 bp->eth_dev->data->dev_conf.rxmode.jumbo_frame = 1;
 204                 bp->flags |= BNXT_FLAG_JUMBO;
 205         } else {
 206                 bp->eth_dev->data->dev_conf.rxmode.jumbo_frame = 0;
 207                 bp->flags &= ~BNXT_FLAG_JUMBO;
 208         }
 209
 210         rc = bnxt_alloc_all_hwrm_stat_ctxs(bp);
 211         if (rc) {
 212                 RTE_LOG(ERR, PMD, "HWRM stat ctx alloc failure rc: %x\n", rc);
 213                 goto err_out;
 214         }
 215
 216         rc = bnxt_alloc_hwrm_rings(bp);
 217         if (rc) {
 218                 RTE_LOG(ERR, PMD, "HWRM ring alloc failure rc: %x\n", rc);
 219                 goto err_out;
 220         }
 221
 222         rc = bnxt_alloc_all_hwrm_ring_grps(bp);
 223         if (rc) {
 224                 RTE_LOG(ERR, PMD, "HWRM ring grp alloc failure: %x\n", rc);
 225                 goto err_out;
 226         }
 227
 228         rc = bnxt_mq_rx_configure(bp);
 229         if (rc) {
 230                 RTE_LOG(ERR, PMD, "MQ mode configure failure rc: %x\n", rc);
 231                 goto err_out;
 232         }
 233
 234         /* VNIC configuration */
 235         for (i = 0; i < bp->nr_vnics; i++) {
 236                 struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
 237
 238                 rc = bnxt_hwrm_vnic_alloc(bp, vnic);
 239                 if (rc) {
 240                         RTE_LOG(ERR, PMD, "HWRM vnic %d alloc failure rc: %x\n",
 241                                 i, rc);
 242                         goto err_out;
 243                 }
 244
 245                 rc = bnxt_hwrm_vnic_ctx_alloc(bp, vnic);
 246                 if (rc) {
 247                         RTE_LOG(ERR, PMD,
 248                                 "HWRM vnic %d ctx alloc failure rc: %x\n",
 249                                 i, rc);
 250                         goto err_out;
 251                 }
 252
 253                 rc = bnxt_hwrm_vnic_cfg(bp, vnic);
 254                 if (rc) {
 255                         RTE_LOG(ERR, PMD, "HWRM vnic %d cfg failure rc: %x\n",
 256                                 i, rc);
 257                         goto err_out;
 258                 }
 259
 260                 rc = bnxt_set_hwrm_vnic_filters(bp, vnic);
 261                 if (rc) {
 262                         RTE_LOG(ERR, PMD,
 263                                 "HWRM vnic %d filter failure rc: %x\n",
 264                                 i, rc);
 265                         goto err_out;
 266                 }
 267                 if (vnic->rss_table && vnic->hash_type) {
 268                         /*
 269                          * Fill the RSS hash & redirection table with
 270                          * ring group ids for all VNICs
 271                          */
 272                         for (rss_idx = 0, fw_idx = 0;
 273                              rss_idx < HW_HASH_INDEX_SIZE;
 274                              rss_idx++, fw_idx++) {
 275                                 if (vnic->fw_grp_ids[fw_idx] ==
 276                                     INVALID_HW_RING_ID)
 277                                         fw_idx = 0;
 278                                 vnic->rss_table[rss_idx] =
 279                                                 vnic->fw_grp_ids[fw_idx];
 280                         }
 281                         rc = bnxt_hwrm_vnic_rss_cfg(bp, vnic);
 282                         if (rc) {
 283                                 RTE_LOG(ERR, PMD,
 284                                         "HWRM vnic %d set RSS failure rc: %x\n",
 285                                         i, rc);
 286                                 goto err_out;
 287                         }
 288                 }
 289
 290                 bnxt_hwrm_vnic_plcmode_cfg(bp, vnic);
 291
 292                 if (bp->eth_dev->data->dev_conf.rxmode.enable_lro)
 293                         bnxt_hwrm_vnic_tpa_cfg(bp, vnic, 1);
 294                 else
 295                         bnxt_hwrm_vnic_tpa_cfg(bp, vnic, 0);
 296         }
 297         rc = bnxt_hwrm_cfa_l2_set_rx_mask(bp, &bp->vnic_info[0]);
 298         if (rc) {
 299                 RTE_LOG(ERR, PMD,
 300                         "HWRM cfa l2 rx mask failure rc: %x\n", rc);
 301                 goto err_out;
 302         }
 303
 304         rc = bnxt_get_hwrm_link_config(bp, &new);
 305         if (rc) {
 306                 RTE_LOG(ERR, PMD, "HWRM Get link config failure rc: %x\n", rc);
 307                 goto err_out;
 308         }
 309
 310         if (!bp->link_info.link_up) {
 311                 rc = bnxt_set_hwrm_link_config(bp, true);
 312                 if (rc) {
 313                         RTE_LOG(ERR, PMD,
 314                                 "HWRM link config failure rc: %x\n", rc);
 315                         goto err_out;
 316                 }
 317         }
 318
 319         return 0;
 320
 321 err_out:
 322         bnxt_free_all_hwrm_resources(bp);
 323
 324         return rc;
 325 }
 326
 327 static int bnxt_shutdown_nic(struct bnxt *bp)
 328 {
 329         bnxt_free_all_hwrm_resources(bp);
 330         bnxt_free_all_filters(bp);
 331         bnxt_free_all_vnics(bp);
 332         return 0;
 333 }
 334
 335 static int bnxt_init_nic(struct bnxt *bp)
 336 {
 337         int rc;
 338
 339         bnxt_init_ring_grps(bp);
 340         bnxt_init_vnics(bp);
 341         bnxt_init_filters(bp);
 342
 343         rc = bnxt_init_chip(bp);
 344         if (rc)
 345                 return rc;
 346
 347         return 0;
 348 }
 349
 350 /*
 351  * Device configuration and status function
 352  */
 353
 354 static void bnxt_dev_info_get_op(struct rte_eth_dev *eth_dev,
 355                                   struct rte_eth_dev_info *dev_info)
 356 {
 357         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 358         uint16_t max_vnics, i, j, vpool, vrxq;
 359
 360         dev_info->pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
 361
 362         /* MAC Specifics */
 363         dev_info->max_mac_addrs = MAX_NUM_MAC_ADDR;
 364         dev_info->max_hash_mac_addrs = 0;
 365
 366         /* PF/VF specifics */
 367         if (BNXT_PF(bp))
 368                 dev_info->max_vfs = bp->pdev->max_vfs;
 369         dev_info->max_rx_queues = bp->max_rx_rings;
 370         dev_info->max_tx_queues = bp->max_tx_rings;
 371         dev_info->reta_size = bp->max_rsscos_ctx;
 372         max_vnics = bp->max_vnics;
 373
 374         /* Fast path specifics */
 375         dev_info->min_rx_bufsize = 1;
 376         dev_info->max_rx_pktlen = BNXT_MAX_MTU + ETHER_HDR_LEN + ETHER_CRC_LEN
 377                                   + VLAN_TAG_SIZE;
 378         dev_info->rx_offload_capa = 0;
 379         dev_info->tx_offload_capa = DEV_TX_OFFLOAD_IPV4_CKSUM |
 380                                         DEV_TX_OFFLOAD_TCP_CKSUM |
 381                                         DEV_TX_OFFLOAD_UDP_CKSUM |
 382                                         DEV_TX_OFFLOAD_TCP_TSO |
 383                                         DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM |
 384                                         DEV_TX_OFFLOAD_VXLAN_TNL_TSO |
 385                                         DEV_TX_OFFLOAD_GRE_TNL_TSO |
 386                                         DEV_TX_OFFLOAD_IPIP_TNL_TSO |
 387                                         DEV_TX_OFFLOAD_GENEVE_TNL_TSO;
 388
 389         /* *INDENT-OFF* */
 390         dev_info->default_rxconf = (struct rte_eth_rxconf) {
 391                 .rx_thresh = {
 392                         .pthresh = 8,
 393                         .hthresh = 8,
 394                         .wthresh = 0,
 395                 },
 396                 .rx_free_thresh = 32,
 397                 .rx_drop_en = 0,
 398         };
 399
 400         dev_info->default_txconf = (struct rte_eth_txconf) {
 401                 .tx_thresh = {
 402                         .pthresh = 32,
 403                         .hthresh = 0,
 404                         .wthresh = 0,
 405                 },
 406                 .tx_free_thresh = 32,
 407                 .tx_rs_thresh = 32,
 408                 .txq_flags = ETH_TXQ_FLAGS_NOMULTSEGS |
 409                              ETH_TXQ_FLAGS_NOOFFLOADS,
 410         };
 411         eth_dev->data->dev_conf.intr_conf.lsc = 1;
 412
 413         /* *INDENT-ON* */
 414
 415         /*
 416          * TODO: default_rxconf, default_txconf, rx_desc_lim, and tx_desc_lim
 417          *       need further investigation.
 418          */
 419
 420         /* VMDq resources */
 421         vpool = 64; /* ETH_64_POOLS */
 422         vrxq = 128; /* ETH_VMDQ_DCB_NUM_QUEUES */
 423         for (i = 0; i < 4; vpool >>= 1, i++) {
 424                 if (max_vnics > vpool) {
 425                         for (j = 0; j < 5; vrxq >>= 1, j++) {
 426                                 if (dev_info->max_rx_queues > vrxq) {
 427                                         if (vpool > vrxq)
 428                                                 vpool = vrxq;
 429                                         goto found;
 430                                 }
 431                         }
 432                         /* Not enough resources to support VMDq */
 433                         break;
 434                 }
 435         }
 436         /* Not enough resources to support VMDq */
 437         vpool = 0;
 438         vrxq = 0;
 439 found:
 440         dev_info->max_vmdq_pools = vpool;
 441         dev_info->vmdq_queue_num = vrxq;
 442
 443         dev_info->vmdq_pool_base = 0;
 444         dev_info->vmdq_queue_base = 0;
 445 }
 446
 447 /* Configure the device based on the configuration provided */
 448 static int bnxt_dev_configure_op(struct rte_eth_dev *eth_dev)
 449 {
 450         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 451
 452         bp->rx_queues = (void *)eth_dev->data->rx_queues;
 453         bp->tx_queues = (void *)eth_dev->data->tx_queues;
 454
 455         /* Inherit new configurations */
 456         bp->rx_nr_rings = eth_dev->data->nb_rx_queues;
 457         bp->tx_nr_rings = eth_dev->data->nb_tx_queues;
 458         bp->rx_cp_nr_rings = bp->rx_nr_rings;
 459         bp->tx_cp_nr_rings = bp->tx_nr_rings;
 460
 461         if (eth_dev->data->dev_conf.rxmode.jumbo_frame)
 462                 eth_dev->data->mtu =
 463                                 eth_dev->data->dev_conf.rxmode.max_rx_pkt_len -
 464                                 ETHER_HDR_LEN - ETHER_CRC_LEN - VLAN_TAG_SIZE;
 465         return 0;
 466 }
 467
 468 static inline int
 469 rte_bnxt_atomic_write_link_status(struct rte_eth_dev *eth_dev,
 470                                 struct rte_eth_link *link)
 471 {
 472         struct rte_eth_link *dst = &eth_dev->data->dev_link;
 473         struct rte_eth_link *src = link;
 474
 475         if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
 476                                         *(uint64_t *)src) == 0)
 477                 return 1;
 478
 479         return 0;
 480 }
 481
 482 static void bnxt_print_link_info(struct rte_eth_dev *eth_dev)
 483 {
 484         struct rte_eth_link *link = &eth_dev->data->dev_link;
 485
 486         if (link->link_status)
 487                 RTE_LOG(INFO, PMD, "Port %d Link Up - speed %u Mbps - %s\n",
 488                         (uint8_t)(eth_dev->data->port_id),
 489                         (uint32_t)link->link_speed,
 490                         (link->link_duplex == ETH_LINK_FULL_DUPLEX) ?
 491                         ("full-duplex") : ("half-duplex\n"));
 492         else
 493                 RTE_LOG(INFO, PMD, "Port %d Link Down\n",
 494                         (uint8_t)(eth_dev->data->port_id));
 495 }
 496
 497 static int bnxt_dev_lsc_intr_setup(struct rte_eth_dev *eth_dev)
 498 {
 499         bnxt_print_link_info(eth_dev);
 500         return 0;
 501 }
 502
 503 static int bnxt_dev_start_op(struct rte_eth_dev *eth_dev)
 504 {
 505         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 506         int vlan_mask = 0;
 507         int rc;
 508
 509         bp->dev_stopped = 0;
 510
 511         rc = bnxt_init_nic(bp);
 512         if (rc)
 513                 goto error;
 514
 515         bnxt_link_update_op(eth_dev, 0);
 516
 517         if (eth_dev->data->dev_conf.rxmode.hw_vlan_filter)
 518                 vlan_mask |= ETH_VLAN_FILTER_MASK;
 519         if (eth_dev->data->dev_conf.rxmode.hw_vlan_strip)
 520                 vlan_mask |= ETH_VLAN_STRIP_MASK;
 521         bnxt_vlan_offload_set_op(eth_dev, vlan_mask);
 522
 523         return 0;
 524
 525 error:
 526         bnxt_shutdown_nic(bp);
 527         bnxt_free_tx_mbufs(bp);
 528         bnxt_free_rx_mbufs(bp);
 529         return rc;
 530 }
 531
 532 static int bnxt_dev_set_link_up_op(struct rte_eth_dev *eth_dev)
 533 {
 534         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 535
 536         eth_dev->data->dev_link.link_status = 1;
 537         bnxt_set_hwrm_link_config(bp, true);
 538         return 0;
 539 }
 540
 541 static int bnxt_dev_set_link_down_op(struct rte_eth_dev *eth_dev)
 542 {
 543         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 544
 545         eth_dev->data->dev_link.link_status = 0;
 546         bnxt_set_hwrm_link_config(bp, false);
 547         return 0;
 548 }
 549
 550 /* Unload the driver, release resources */
 551 static void bnxt_dev_stop_op(struct rte_eth_dev *eth_dev)
 552 {
 553         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 554
 555         if (bp->eth_dev->data->dev_started) {
 556                 /* TBD: STOP HW queues DMA */
 557                 eth_dev->data->dev_link.link_status = 0;
 558         }
 559         bnxt_set_hwrm_link_config(bp, false);
 560         bnxt_hwrm_port_clr_stats(bp);
 561         bnxt_shutdown_nic(bp);
 562         bp->dev_stopped = 1;
 563 }
 564
 565 static void bnxt_dev_close_op(struct rte_eth_dev *eth_dev)
 566 {
 567         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 568
 569         if (bp->dev_stopped == 0)
 570                 bnxt_dev_stop_op(eth_dev);
 571
 572         bnxt_free_tx_mbufs(bp);
 573         bnxt_free_rx_mbufs(bp);
 574         bnxt_free_mem(bp);
 575         if (eth_dev->data->mac_addrs != NULL) {
 576                 rte_free(eth_dev->data->mac_addrs);
 577                 eth_dev->data->mac_addrs = NULL;
 578         }
 579         if (bp->grp_info != NULL) {
 580                 rte_free(bp->grp_info);
 581                 bp->grp_info = NULL;
 582         }
 583 }
 584
 585 static void bnxt_mac_addr_remove_op(struct rte_eth_dev *eth_dev,
 586                                     uint32_t index)
 587 {
 588         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 589         uint64_t pool_mask = eth_dev->data->mac_pool_sel[index];
 590         struct bnxt_vnic_info *vnic;
 591         struct bnxt_filter_info *filter, *temp_filter;
 592         int i;
 593
 594         /*
 595          * Loop through all VNICs from the specified filter flow pools to
 596          * remove the corresponding MAC addr filter
 597          */
 598         for (i = 0; i < MAX_FF_POOLS; i++) {
 599                 if (!(pool_mask & (1ULL << i)))
 600                         continue;
 601
 602                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
 603                         filter = STAILQ_FIRST(&vnic->filter);
 604                         while (filter) {
 605                                 temp_filter = STAILQ_NEXT(filter, next);
 606                                 if (filter->mac_index == index) {
 607                                         STAILQ_REMOVE(&vnic->filter, filter,
 608                                                       bnxt_filter_info, next);
 609                                         bnxt_hwrm_clear_filter(bp, filter);
 610                                         filter->mac_index = INVALID_MAC_INDEX;
 611                                         memset(&filter->l2_addr, 0,
 612                                                ETHER_ADDR_LEN);
 613                                         STAILQ_INSERT_TAIL(
 614                                                         &bp->free_filter_list,
 615                                                         filter, next);
 616                                 }
 617                                 filter = temp_filter;
 618                         }
 619                 }
 620         }
 621 }
 622
 623 static int bnxt_mac_addr_add_op(struct rte_eth_dev *eth_dev,
 624                                 struct ether_addr *mac_addr,
 625                                 uint32_t index, uint32_t pool)
 626 {
 627         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 628         struct bnxt_vnic_info *vnic = STAILQ_FIRST(&bp->ff_pool[pool]);
 629         struct bnxt_filter_info *filter;
 630
 631         if (BNXT_VF(bp)) {
 632                 RTE_LOG(ERR, PMD, "Cannot add MAC address to a VF interface\n");
 633                 return -ENOTSUP;
 634         }
 635
 636         if (!vnic) {
 637                 RTE_LOG(ERR, PMD, "VNIC not found for pool %d!\n", pool);
 638                 return -EINVAL;
 639         }
 640         /* Attach requested MAC address to the new l2_filter */
 641         STAILQ_FOREACH(filter, &vnic->filter, next) {
 642                 if (filter->mac_index == index) {
 643                         RTE_LOG(ERR, PMD,
 644                                 "MAC addr already existed for pool %d\n", pool);
 645                         return -EINVAL;
 646                 }
 647         }
 648         filter = bnxt_alloc_filter(bp);
 649         if (!filter) {
 650                 RTE_LOG(ERR, PMD, "L2 filter alloc failed\n");
 651                 return -ENODEV;
 652         }
 653         STAILQ_INSERT_TAIL(&vnic->filter, filter, next);
 654         filter->mac_index = index;
 655         memcpy(filter->l2_addr, mac_addr, ETHER_ADDR_LEN);
 656         return bnxt_hwrm_set_filter(bp, vnic->fw_vnic_id, filter);
 657 }
 658
 659 int bnxt_link_update_op(struct rte_eth_dev *eth_dev, int wait_to_complete)
 660 {
 661         int rc = 0;
 662         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 663         struct rte_eth_link new;
 664         unsigned int cnt = BNXT_LINK_WAIT_CNT;
 665
 666         memset(&new, 0, sizeof(new));
 667         do {
 668                 /* Retrieve link info from hardware */
 669                 rc = bnxt_get_hwrm_link_config(bp, &new);
 670                 if (rc) {
 671                         new.link_speed = ETH_LINK_SPEED_100M;
 672                         new.link_duplex = ETH_LINK_FULL_DUPLEX;
 673                         RTE_LOG(ERR, PMD,
 674                                 "Failed to retrieve link rc = 0x%x!\n", rc);
 675                         goto out;
 676                 }
 677                 rte_delay_ms(BNXT_LINK_WAIT_INTERVAL);
 678
 679                 if (!wait_to_complete)
 680                         break;
 681         } while (!new.link_status && cnt--);
 682
 683 out:
 684         /* Timed out or success */
 685         if (new.link_status != eth_dev->data->dev_link.link_status ||
 686         new.link_speed != eth_dev->data->dev_link.link_speed) {
 687                 rte_bnxt_atomic_write_link_status(eth_dev, &new);
 688                 bnxt_print_link_info(eth_dev);
 689         }
 690
 691         return rc;
 692 }
 693
 694 static void bnxt_promiscuous_enable_op(struct rte_eth_dev *eth_dev)
 695 {
 696         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 697         struct bnxt_vnic_info *vnic;
 698
 699         if (bp->vnic_info == NULL)
 700                 return;
 701
 702         vnic = &bp->vnic_info[0];
 703
 704         vnic->flags |= BNXT_VNIC_INFO_PROMISC;
 705         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic);
 706 }
 707
 708 static void bnxt_promiscuous_disable_op(struct rte_eth_dev *eth_dev)
 709 {
 710         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 711         struct bnxt_vnic_info *vnic;
 712
 713         if (bp->vnic_info == NULL)
 714                 return;
 715
 716         vnic = &bp->vnic_info[0];
 717
 718         vnic->flags &= ~BNXT_VNIC_INFO_PROMISC;
 719         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic);
 720 }
 721
 722 static void bnxt_allmulticast_enable_op(struct rte_eth_dev *eth_dev)
 723 {
 724         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 725         struct bnxt_vnic_info *vnic;
 726
 727         if (bp->vnic_info == NULL)
 728                 return;
 729
 730         vnic = &bp->vnic_info[0];
 731
 732         vnic->flags |= BNXT_VNIC_INFO_ALLMULTI;
 733         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic);
 734 }
 735
 736 static void bnxt_allmulticast_disable_op(struct rte_eth_dev *eth_dev)
 737 {
 738         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 739         struct bnxt_vnic_info *vnic;
 740
 741         if (bp->vnic_info == NULL)
 742                 return;
 743
 744         vnic = &bp->vnic_info[0];
 745
 746         vnic->flags &= ~BNXT_VNIC_INFO_ALLMULTI;
 747         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic);
 748 }
 749
 750 static int bnxt_reta_update_op(struct rte_eth_dev *eth_dev,
 751                             struct rte_eth_rss_reta_entry64 *reta_conf,
 752                             uint16_t reta_size)
 753 {
 754         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 755         struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
 756         struct bnxt_vnic_info *vnic;
 757         int i;
 758
 759         if (!(dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG))
 760                 return -EINVAL;
 761
 762         if (reta_size != HW_HASH_INDEX_SIZE) {
 763                 RTE_LOG(ERR, PMD, "The configured hash table lookup size "
 764                         "(%d) must equal the size supported by the hardware "
 765                         "(%d)\n", reta_size, HW_HASH_INDEX_SIZE);
 766                 return -EINVAL;
 767         }
 768         /* Update the RSS VNIC(s) */
 769         for (i = 0; i < MAX_FF_POOLS; i++) {
 770                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
 771                         memcpy(vnic->rss_table, reta_conf, reta_size);
 772
 773                         bnxt_hwrm_vnic_rss_cfg(bp, vnic);
 774                 }
 775         }
 776         return 0;
 777 }
 778
 779 static int bnxt_reta_query_op(struct rte_eth_dev *eth_dev,
 780                               struct rte_eth_rss_reta_entry64 *reta_conf,
 781                               uint16_t reta_size)
 782 {
 783         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 784         struct bnxt_vnic_info *vnic = &bp->vnic_info[0];
 785         struct rte_intr_handle *intr_handle
 786                 = &bp->pdev->intr_handle;
 787
 788         /* Retrieve from the default VNIC */
 789         if (!vnic)
 790                 return -EINVAL;
 791         if (!vnic->rss_table)
 792                 return -EINVAL;
 793
 794         if (reta_size != HW_HASH_INDEX_SIZE) {
 795                 RTE_LOG(ERR, PMD, "The configured hash table lookup size "
 796                         "(%d) must equal the size supported by the hardware "
 797                         "(%d)\n", reta_size, HW_HASH_INDEX_SIZE);
 798                 return -EINVAL;
 799         }
 800         /* EW - need to revisit here copying from u64 to u16 */
 801         memcpy(reta_conf, vnic->rss_table, reta_size);
 802
 803         if (rte_intr_allow_others(intr_handle)) {
 804                 if (eth_dev->data->dev_conf.intr_conf.lsc != 0)
 805                         bnxt_dev_lsc_intr_setup(eth_dev);
 806         }
 807
 808         return 0;
 809 }
 810
 811 static int bnxt_rss_hash_update_op(struct rte_eth_dev *eth_dev,
 812                                    struct rte_eth_rss_conf *rss_conf)
 813 {
 814         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 815         struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
 816         struct bnxt_vnic_info *vnic;
 817         uint16_t hash_type = 0;
 818         int i;
 819
 820         /*
 821          * If RSS enablement were different than dev_configure,
 822          * then return -EINVAL
 823          */
 824         if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) {
 825                 if (!rss_conf->rss_hf)
 826                         return -EINVAL;
 827         } else {
 828                 if (rss_conf->rss_hf & BNXT_ETH_RSS_SUPPORT)
 829                         return -EINVAL;
 830         }
 831         if (rss_conf->rss_hf & ETH_RSS_IPV4)
 832                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4;
 833         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV4_TCP)
 834                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4;
 835         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV4_UDP)
 836                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4;
 837         if (rss_conf->rss_hf & ETH_RSS_IPV6)
 838                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6;
 839         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV6_TCP)
 840                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6;
 841         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV6_UDP)
 842                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6;
 843
 844         /* Update the RSS VNIC(s) */
 845         for (i = 0; i < MAX_FF_POOLS; i++) {
 846                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
 847                         vnic->hash_type = hash_type;
 848
 849                         /*
 850                          * Use the supplied key if the key length is
 851                          * acceptable and the rss_key is not NULL
 852                          */
 853                         if (rss_conf->rss_key &&
 854                             rss_conf->rss_key_len <= HW_HASH_KEY_SIZE)
 855                                 memcpy(vnic->rss_hash_key, rss_conf->rss_key,
 856                                        rss_conf->rss_key_len);
 857
 858                         bnxt_hwrm_vnic_rss_cfg(bp, vnic);
 859                 }
 860         }
 861         return 0;
 862 }
 863
 864 static int bnxt_rss_hash_conf_get_op(struct rte_eth_dev *eth_dev,
 865                                      struct rte_eth_rss_conf *rss_conf)
 866 {
 867         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 868         struct bnxt_vnic_info *vnic = &bp->vnic_info[0];
 869         int len;
 870         uint32_t hash_types;
 871
 872         /* RSS configuration is the same for all VNICs */
 873         if (vnic && vnic->rss_hash_key) {
 874                 if (rss_conf->rss_key) {
 875                         len = rss_conf->rss_key_len <= HW_HASH_KEY_SIZE ?
 876                               rss_conf->rss_key_len : HW_HASH_KEY_SIZE;
 877                         memcpy(rss_conf->rss_key, vnic->rss_hash_key, len);
 878                 }
 879
 880                 hash_types = vnic->hash_type;
 881                 rss_conf->rss_hf = 0;
 882                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4) {
 883                         rss_conf->rss_hf |= ETH_RSS_IPV4;
 884                         hash_types &= ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4;
 885                 }
 886                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4) {
 887                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV4_TCP;
 888                         hash_types &=
 889                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4;
 890                 }
 891                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4) {
 892                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV4_UDP;
 893                         hash_types &=
 894                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4;
 895                 }
 896                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6) {
 897                         rss_conf->rss_hf |= ETH_RSS_IPV6;
 898                         hash_types &= ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6;
 899                 }
 900                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6) {
 901                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV6_TCP;
 902                         hash_types &=
 903                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6;
 904                 }
 905                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6) {
 906                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV6_UDP;
 907                         hash_types &=
 908                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6;
 909                 }
 910                 if (hash_types) {
 911                         RTE_LOG(ERR, PMD,
 912                                 "Unknwon RSS config from firmware (%08x), RSS disabled",
 913                                 vnic->hash_type);
 914                         return -ENOTSUP;
 915                 }
 916         } else {
 917                 rss_conf->rss_hf = 0;
 918         }
 919         return 0;
 920 }
 921
 922 static int bnxt_flow_ctrl_get_op(struct rte_eth_dev *dev,
 923                                struct rte_eth_fc_conf *fc_conf)
 924 {
 925         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
 926         struct rte_eth_link link_info;
 927         int rc;
 928
 929         rc = bnxt_get_hwrm_link_config(bp, &link_info);
 930         if (rc)
 931                 return rc;
 932
 933         memset(fc_conf, 0, sizeof(*fc_conf));
 934         if (bp->link_info.auto_pause)
 935                 fc_conf->autoneg = 1;
 936         switch (bp->link_info.pause) {
 937         case 0:
 938                 fc_conf->mode = RTE_FC_NONE;
 939                 break;
 940         case HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_TX:
 941                 fc_conf->mode = RTE_FC_TX_PAUSE;
 942                 break;
 943         case HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_RX:
 944                 fc_conf->mode = RTE_FC_RX_PAUSE;
 945                 break;
 946         case (HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_TX |
 947                         HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_RX):
 948                 fc_conf->mode = RTE_FC_FULL;
 949                 break;
 950         }
 951         return 0;
 952 }
 953
 954 static int bnxt_flow_ctrl_set_op(struct rte_eth_dev *dev,
 955                                struct rte_eth_fc_conf *fc_conf)
 956 {
 957         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
 958
 959         if (BNXT_NPAR_PF(bp) || BNXT_VF(bp)) {
 960                 RTE_LOG(ERR, PMD, "Flow Control Settings cannot be modified\n");
 961                 return -ENOTSUP;
 962         }
 963
 964         switch (fc_conf->mode) {
 965         case RTE_FC_NONE:
 966                 bp->link_info.auto_pause = 0;
 967                 bp->link_info.force_pause = 0;
 968                 break;
 969         case RTE_FC_RX_PAUSE:
 970                 if (fc_conf->autoneg) {
 971                         bp->link_info.auto_pause =
 972                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_RX;
 973                         bp->link_info.force_pause = 0;
 974                 } else {
 975                         bp->link_info.auto_pause = 0;
 976                         bp->link_info.force_pause =
 977                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_RX;
 978                 }
 979                 break;
 980         case RTE_FC_TX_PAUSE:
 981                 if (fc_conf->autoneg) {
 982                         bp->link_info.auto_pause =
 983                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_TX;
 984                         bp->link_info.force_pause = 0;
 985                 } else {
 986                         bp->link_info.auto_pause = 0;
 987                         bp->link_info.force_pause =
 988                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_TX;
 989                 }
 990                 break;
 991         case RTE_FC_FULL:
 992                 if (fc_conf->autoneg) {
 993                         bp->link_info.auto_pause =
 994                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_TX |
 995                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_RX;
 996                         bp->link_info.force_pause = 0;
 997                 } else {
 998                         bp->link_info.auto_pause = 0;
 999                         bp->link_info.force_pause =
1000                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_TX |
1001                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_RX;
1002                 }
1003                 break;
1004         }
1005         return bnxt_set_hwrm_link_config(bp, true);
1006 }
1007
1008 /* Add UDP tunneling port */
1009 static int
1010 bnxt_udp_tunnel_port_add_op(struct rte_eth_dev *eth_dev,
1011                          struct rte_eth_udp_tunnel *udp_tunnel)
1012 {
1013         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
1014         uint16_t tunnel_type = 0;
1015         int rc = 0;
1016
1017         switch (udp_tunnel->prot_type) {
1018         case RTE_TUNNEL_TYPE_VXLAN:
1019                 if (bp->vxlan_port_cnt) {
1020                         RTE_LOG(ERR, PMD, "Tunnel Port %d already programmed\n",
1021                                 udp_tunnel->udp_port);
1022                         if (bp->vxlan_port != udp_tunnel->udp_port) {
1023                                 RTE_LOG(ERR, PMD, "Only one port allowed\n");
1024                                 return -ENOSPC;
1025                         }
1026                         bp->vxlan_port_cnt++;
1027                         return 0;
1028                 }
1029                 tunnel_type =
1030                         HWRM_TUNNEL_DST_PORT_ALLOC_INPUT_TUNNEL_TYPE_VXLAN;
1031                 bp->vxlan_port_cnt++;
1032                 break;
1033         case RTE_TUNNEL_TYPE_GENEVE:
1034                 if (bp->geneve_port_cnt) {
1035                         RTE_LOG(ERR, PMD, "Tunnel Port %d already programmed\n",
1036                                 udp_tunnel->udp_port);
1037                         if (bp->geneve_port != udp_tunnel->udp_port) {
1038                                 RTE_LOG(ERR, PMD, "Only one port allowed\n");
1039                                 return -ENOSPC;
1040                         }
1041                         bp->geneve_port_cnt++;
1042                         return 0;
1043                 }
1044                 tunnel_type =
1045                         HWRM_TUNNEL_DST_PORT_ALLOC_INPUT_TUNNEL_TYPE_GENEVE;
1046                 bp->geneve_port_cnt++;
1047                 break;
1048         default:
1049                 RTE_LOG(ERR, PMD, "Tunnel type is not supported\n");
1050                 return -ENOTSUP;
1051         }
1052         rc = bnxt_hwrm_tunnel_dst_port_alloc(bp, udp_tunnel->udp_port,
1053                                              tunnel_type);
1054         return rc;
1055 }
1056
1057 static int
1058 bnxt_udp_tunnel_port_del_op(struct rte_eth_dev *eth_dev,
1059                          struct rte_eth_udp_tunnel *udp_tunnel)
1060 {
1061         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
1062         uint16_t tunnel_type = 0;
1063         uint16_t port = 0;
1064         int rc = 0;
1065
1066         switch (udp_tunnel->prot_type) {
1067         case RTE_TUNNEL_TYPE_VXLAN:
1068                 if (!bp->vxlan_port_cnt) {
1069                         RTE_LOG(ERR, PMD, "No Tunnel port configured yet\n");
1070                         return -EINVAL;
1071                 }
1072                 if (bp->vxlan_port != udp_tunnel->udp_port) {
1073                         RTE_LOG(ERR, PMD, "Req Port: %d. Configured port: %d\n",
1074                                 udp_tunnel->udp_port, bp->vxlan_port);
1075                         return -EINVAL;
1076                 }
1077                 if (--bp->vxlan_port_cnt)
1078                         return 0;
1079
1080                 tunnel_type =
1081                         HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_VXLAN;
1082                 port = bp->vxlan_fw_dst_port_id;
1083                 break;
1084         case RTE_TUNNEL_TYPE_GENEVE:
1085                 if (!bp->geneve_port_cnt) {
1086                         RTE_LOG(ERR, PMD, "No Tunnel port configured yet\n");
1087                         return -EINVAL;
1088                 }
1089                 if (bp->geneve_port != udp_tunnel->udp_port) {
1090                         RTE_LOG(ERR, PMD, "Req Port: %d. Configured port: %d\n",
1091                                 udp_tunnel->udp_port, bp->geneve_port);
1092                         return -EINVAL;
1093                 }
1094                 if (--bp->geneve_port_cnt)
1095                         return 0;
1096
1097                 tunnel_type =
1098                         HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_GENEVE;
1099                 port = bp->geneve_fw_dst_port_id;
1100                 break;
1101         default:
1102                 RTE_LOG(ERR, PMD, "Tunnel type is not supported\n");
1103                 return -ENOTSUP;
1104         }
1105
1106         rc = bnxt_hwrm_tunnel_dst_port_free(bp, port, tunnel_type);
1107         if (!rc) {
1108                 if (tunnel_type ==
1109                     HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_VXLAN)
1110                         bp->vxlan_port = 0;
1111                 if (tunnel_type ==
1112                     HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_GENEVE)
1113                         bp->geneve_port = 0;
1114         }
1115         return rc;
1116 }
1117
1118 static int bnxt_del_vlan_filter(struct bnxt *bp, uint16_t vlan_id)
1119 {
1120         struct bnxt_filter_info *filter, *temp_filter, *new_filter;
1121         struct bnxt_vnic_info *vnic;
1122         unsigned int i;
1123         int rc = 0;
1124         uint32_t chk = HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN;
1125
1126         /* Cycle through all VNICs */
1127         for (i = 0; i < bp->nr_vnics; i++) {
1128                 /*
1129                  * For each VNIC and each associated filter(s)
1130                  * if VLAN exists && VLAN matches vlan_id
1131                  *      remove the MAC+VLAN filter
1132                  *      add a new MAC only filter
1133                  * else
1134                  *      VLAN filter doesn't exist, just skip and continue
1135                  */
1136                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
1137                         filter = STAILQ_FIRST(&vnic->filter);
1138                         while (filter) {
1139                                 temp_filter = STAILQ_NEXT(filter, next);
1140
1141                                 if (filter->enables & chk &&
1142                                     filter->l2_ovlan == vlan_id) {
1143                                         /* Must delete the filter */
1144                                         STAILQ_REMOVE(&vnic->filter, filter,
1145                                                       bnxt_filter_info, next);
1146                                         bnxt_hwrm_clear_filter(bp, filter);
1147                                         STAILQ_INSERT_TAIL(
1148                                                         &bp->free_filter_list,
1149                                                         filter, next);
1150
1151                                         /*
1152                                          * Need to examine to see if the MAC
1153                                          * filter already existed or not before
1154                                          * allocating a new one
1155                                          */
1156
1157                                         new_filter = bnxt_alloc_filter(bp);
1158                                         if (!new_filter) {
1159                                                 RTE_LOG(ERR, PMD,
1160                                                         "MAC/VLAN filter alloc failed\n");
1161                                                 rc = -ENOMEM;
1162                                                 goto exit;
1163                                         }
1164                                         STAILQ_INSERT_TAIL(&vnic->filter,
1165                                                            new_filter, next);
1166                                         /* Inherit MAC from previous filter */
1167                                         new_filter->mac_index =
1168                                                         filter->mac_index;
1169                                         memcpy(new_filter->l2_addr,
1170                                                filter->l2_addr, ETHER_ADDR_LEN);
1171                                         /* MAC only filter */
1172                                         rc = bnxt_hwrm_set_filter(bp,
1173                                                         vnic->fw_vnic_id,
1174                                                         new_filter);
1175                                         if (rc)
1176                                                 goto exit;
1177                                         RTE_LOG(INFO, PMD,
1178                                                 "Del Vlan filter for %d\n",
1179                                                 vlan_id);
1180                                 }
1181                                 filter = temp_filter;
1182                         }
1183                 }
1184         }
1185 exit:
1186         return rc;
1187 }
1188
1189 static int bnxt_add_vlan_filter(struct bnxt *bp, uint16_t vlan_id)
1190 {
1191         struct bnxt_filter_info *filter, *temp_filter, *new_filter;
1192         struct bnxt_vnic_info *vnic;
1193         unsigned int i;
1194         int rc = 0;
1195         uint32_t en = HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN |
1196                 HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN_MASK;
1197         uint32_t chk = HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN;
1198
1199         /* Cycle through all VNICs */
1200         for (i = 0; i < bp->nr_vnics; i++) {
1201                 /*
1202                  * For each VNIC and each associated filter(s)
1203                  * if VLAN exists:
1204                  *   if VLAN matches vlan_id
1205                  *      VLAN filter already exists, just skip and continue
1206                  *   else
1207                  *      add a new MAC+VLAN filter
1208                  * else
1209                  *   Remove the old MAC only filter
1210                  *    Add a new MAC+VLAN filter
1211                  */
1212                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
1213                         filter = STAILQ_FIRST(&vnic->filter);
1214                         while (filter) {
1215                                 temp_filter = STAILQ_NEXT(filter, next);
1216
1217                                 if (filter->enables & chk) {
1218                                         if (filter->l2_ovlan == vlan_id)
1219                                                 goto cont;
1220                                 } else {
1221                                         /* Must delete the MAC filter */
1222                                         STAILQ_REMOVE(&vnic->filter, filter,
1223                                                       bnxt_filter_info, next);
1224                                         bnxt_hwrm_clear_filter(bp, filter);
1225                                         filter->l2_ovlan = 0;
1226                                         STAILQ_INSERT_TAIL(
1227                                                         &bp->free_filter_list,
1228                                                         filter, next);
1229                                 }
1230                                 new_filter = bnxt_alloc_filter(bp);
1231                                 if (!new_filter) {
1232                                         RTE_LOG(ERR, PMD,
1233                                                 "MAC/VLAN filter alloc failed\n");
1234                                         rc = -ENOMEM;
1235                                         goto exit;
1236                                 }
1237                                 STAILQ_INSERT_TAIL(&vnic->filter, new_filter,
1238                                                    next);
1239                                 /* Inherit MAC from the previous filter */
1240                                 new_filter->mac_index = filter->mac_index;
1241                                 memcpy(new_filter->l2_addr, filter->l2_addr,
1242                                        ETHER_ADDR_LEN);
1243                                 /* MAC + VLAN ID filter */
1244                                 new_filter->l2_ovlan = vlan_id;
1245                                 new_filter->l2_ovlan_mask = 0xF000;
1246                                 new_filter->enables |= en;
1247                                 rc = bnxt_hwrm_set_filter(bp, vnic->fw_vnic_id,
1248                                                           new_filter);
1249                                 if (rc)
1250                                         goto exit;
1251                                 RTE_LOG(INFO, PMD,
1252                                         "Added Vlan filter for %d\n", vlan_id);
1253 cont:
1254                                 filter = temp_filter;
1255                         }
1256                 }
1257         }
1258 exit:
1259         return rc;
1260 }
1261
1262 static int bnxt_vlan_filter_set_op(struct rte_eth_dev *eth_dev,
1263                                    uint16_t vlan_id, int on)
1264 {
1265         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
1266
1267         /* These operations apply to ALL existing MAC/VLAN filters */
1268         if (on)
1269                 return bnxt_add_vlan_filter(bp, vlan_id);
1270         else
1271                 return bnxt_del_vlan_filter(bp, vlan_id);
1272 }
1273
1274 static void
1275 bnxt_vlan_offload_set_op(struct rte_eth_dev *dev, int mask)
1276 {
1277         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1278         unsigned int i;
1279
1280         if (mask & ETH_VLAN_FILTER_MASK) {
1281                 if (!dev->data->dev_conf.rxmode.hw_vlan_filter) {
1282                         /* Remove any VLAN filters programmed */
1283                         for (i = 0; i < 4095; i++)
1284                                 bnxt_del_vlan_filter(bp, i);
1285                 }
1286                 RTE_LOG(INFO, PMD, "VLAN Filtering: %d\n",
1287                         dev->data->dev_conf.rxmode.hw_vlan_filter);
1288         }
1289
1290         if (mask & ETH_VLAN_STRIP_MASK) {
1291                 /* Enable or disable VLAN stripping */
1292                 for (i = 0; i < bp->nr_vnics; i++) {
1293                         struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
1294                         if (dev->data->dev_conf.rxmode.hw_vlan_strip)
1295                                 vnic->vlan_strip = true;
1296                         else
1297                                 vnic->vlan_strip = false;
1298                         bnxt_hwrm_vnic_cfg(bp, vnic);
1299                 }
1300                 RTE_LOG(INFO, PMD, "VLAN Strip Offload: %d\n",
1301                         dev->data->dev_conf.rxmode.hw_vlan_strip);
1302         }
1303
1304         if (mask & ETH_VLAN_EXTEND_MASK)
1305                 RTE_LOG(ERR, PMD, "Extend VLAN Not supported\n");
1306 }
1307
1308 static void
1309 bnxt_set_default_mac_addr_op(struct rte_eth_dev *dev, struct ether_addr *addr)
1310 {
1311         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1312         /* Default Filter is tied to VNIC 0 */
1313         struct bnxt_vnic_info *vnic = &bp->vnic_info[0];
1314         struct bnxt_filter_info *filter;
1315         int rc;
1316
1317         if (BNXT_VF(bp))
1318                 return;
1319
1320         memcpy(bp->mac_addr, addr, sizeof(bp->mac_addr));
1321         memcpy(&dev->data->mac_addrs[0], bp->mac_addr, ETHER_ADDR_LEN);
1322
1323         STAILQ_FOREACH(filter, &vnic->filter, next) {
1324                 /* Default Filter is at Index 0 */
1325                 if (filter->mac_index != 0)
1326                         continue;
1327                 rc = bnxt_hwrm_clear_filter(bp, filter);
1328                 if (rc)
1329                         break;
1330                 memcpy(filter->l2_addr, bp->mac_addr, ETHER_ADDR_LEN);
1331                 memset(filter->l2_addr_mask, 0xff, ETHER_ADDR_LEN);
1332                 filter->flags |= HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_RX;
1333                 filter->enables |=
1334                         HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR |
1335                         HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR_MASK;
1336                 rc = bnxt_hwrm_set_filter(bp, vnic->fw_vnic_id, filter);
1337                 if (rc)
1338                         break;
1339                 filter->mac_index = 0;
1340                 RTE_LOG(DEBUG, PMD, "Set MAC addr\n");
1341         }
1342 }
1343
1344 static int
1345 bnxt_dev_set_mc_addr_list_op(struct rte_eth_dev *eth_dev,
1346                           struct ether_addr *mc_addr_set,
1347                           uint32_t nb_mc_addr)
1348 {
1349         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
1350         char *mc_addr_list = (char *)mc_addr_set;
1351         struct bnxt_vnic_info *vnic;
1352         uint32_t off = 0, i = 0;
1353
1354         vnic = &bp->vnic_info[0];
1355
1356         if (nb_mc_addr > BNXT_MAX_MC_ADDRS) {
1357                 vnic->flags |= BNXT_VNIC_INFO_ALLMULTI;
1358                 goto allmulti;
1359         }
1360
1361         /* TODO Check for Duplicate mcast addresses */
1362         vnic->flags &= ~BNXT_VNIC_INFO_ALLMULTI;
1363         for (i = 0; i < nb_mc_addr; i++) {
1364                 memcpy(vnic->mc_list + off, &mc_addr_list[i], ETHER_ADDR_LEN);
1365                 off += ETHER_ADDR_LEN;
1366         }
1367
1368         vnic->mc_addr_cnt = i;
1369
1370 allmulti:
1371         return bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic);
1372 }
1373
1374 static int
1375 bnxt_fw_version_get(struct rte_eth_dev *dev, char *fw_version, size_t fw_size)
1376 {
1377         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1378         uint8_t fw_major = (bp->fw_ver >> 24) & 0xff;
1379         uint8_t fw_minor = (bp->fw_ver >> 16) & 0xff;
1380         uint8_t fw_updt = (bp->fw_ver >> 8) & 0xff;
1381         int ret;
1382
1383         ret = snprintf(fw_version, fw_size, "%d.%d.%d",
1384                         fw_major, fw_minor, fw_updt);
1385
1386         ret += 1; /* add the size of '\0' */
1387         if (fw_size < (uint32_t)ret)
1388                 return ret;
1389         else
1390                 return 0;
1391 }
1392
1393 static int bnxt_mtu_set_op(struct rte_eth_dev *eth_dev, uint16_t new_mtu)
1394 {
1395         struct bnxt *bp = eth_dev->data->dev_private;
1396         struct rte_eth_dev_info dev_info;
1397         uint32_t max_dev_mtu;
1398         uint32_t rc = 0;
1399         uint32_t i;
1400
1401         bnxt_dev_info_get_op(eth_dev, &dev_info);
1402         max_dev_mtu = dev_info.max_rx_pktlen -
1403                       ETHER_HDR_LEN - ETHER_CRC_LEN - VLAN_TAG_SIZE * 2;
1404
1405         if (new_mtu < ETHER_MIN_MTU || new_mtu > max_dev_mtu) {
1406                 RTE_LOG(ERR, PMD, "MTU requested must be within (%d, %d)\n",
1407                         ETHER_MIN_MTU, max_dev_mtu);
1408                 return -EINVAL;
1409         }
1410
1411
1412         if (new_mtu > ETHER_MTU) {
1413                 bp->flags |= BNXT_FLAG_JUMBO;
1414                 eth_dev->data->dev_conf.rxmode.jumbo_frame = 1;
1415         } else {
1416                 eth_dev->data->dev_conf.rxmode.jumbo_frame = 0;
1417                 bp->flags &= ~BNXT_FLAG_JUMBO;
1418         }
1419
1420         eth_dev->data->dev_conf.rxmode.max_rx_pkt_len =
1421                 new_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN + VLAN_TAG_SIZE * 2;
1422
1423         eth_dev->data->mtu = new_mtu;
1424         RTE_LOG(INFO, PMD, "New MTU is %d\n", eth_dev->data->mtu);
1425
1426         for (i = 0; i < bp->nr_vnics; i++) {
1427                 struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
1428
1429                 vnic->mru = bp->eth_dev->data->mtu + ETHER_HDR_LEN +
1430                                         ETHER_CRC_LEN + VLAN_TAG_SIZE * 2;
1431                 rc = bnxt_hwrm_vnic_cfg(bp, vnic);
1432                 if (rc)
1433                         break;
1434
1435                 rc = bnxt_hwrm_vnic_plcmode_cfg(bp, vnic);
1436                 if (rc)
1437                         return rc;
1438         }
1439
1440         return rc;
1441 }
1442
1443 /*
1444  * Initialization
1445  */
1446
1447 static const struct eth_dev_ops bnxt_dev_ops = {
1448         .dev_infos_get = bnxt_dev_info_get_op,
1449         .dev_close = bnxt_dev_close_op,
1450         .dev_configure = bnxt_dev_configure_op,
1451         .dev_start = bnxt_dev_start_op,
1452         .dev_stop = bnxt_dev_stop_op,
1453         .dev_set_link_up = bnxt_dev_set_link_up_op,
1454         .dev_set_link_down = bnxt_dev_set_link_down_op,
1455         .stats_get = bnxt_stats_get_op,
1456         .stats_reset = bnxt_stats_reset_op,
1457         .rx_queue_setup = bnxt_rx_queue_setup_op,
1458         .rx_queue_release = bnxt_rx_queue_release_op,
1459         .tx_queue_setup = bnxt_tx_queue_setup_op,
1460         .tx_queue_release = bnxt_tx_queue_release_op,
1461         .reta_update = bnxt_reta_update_op,
1462         .reta_query = bnxt_reta_query_op,
1463         .rss_hash_update = bnxt_rss_hash_update_op,
1464         .rss_hash_conf_get = bnxt_rss_hash_conf_get_op,
1465         .link_update = bnxt_link_update_op,
1466         .promiscuous_enable = bnxt_promiscuous_enable_op,
1467         .promiscuous_disable = bnxt_promiscuous_disable_op,
1468         .allmulticast_enable = bnxt_allmulticast_enable_op,
1469         .allmulticast_disable = bnxt_allmulticast_disable_op,
1470         .mac_addr_add = bnxt_mac_addr_add_op,
1471         .mac_addr_remove = bnxt_mac_addr_remove_op,
1472         .flow_ctrl_get = bnxt_flow_ctrl_get_op,
1473         .flow_ctrl_set = bnxt_flow_ctrl_set_op,
1474         .udp_tunnel_port_add  = bnxt_udp_tunnel_port_add_op,
1475         .udp_tunnel_port_del  = bnxt_udp_tunnel_port_del_op,
1476         .vlan_filter_set = bnxt_vlan_filter_set_op,
1477         .vlan_offload_set = bnxt_vlan_offload_set_op,
1478         .mtu_set = bnxt_mtu_set_op,
1479         .mac_addr_set = bnxt_set_default_mac_addr_op,
1480         .xstats_get = bnxt_dev_xstats_get_op,
1481         .xstats_get_names = bnxt_dev_xstats_get_names_op,
1482         .xstats_reset = bnxt_dev_xstats_reset_op,
1483         .fw_version_get = bnxt_fw_version_get,
1484         .set_mc_addr_list = bnxt_dev_set_mc_addr_list_op,
1485 };
1486
1487 static bool bnxt_vf_pciid(uint16_t id)
1488 {
1489         if (id == BROADCOM_DEV_ID_57304_VF ||
1490             id == BROADCOM_DEV_ID_57406_VF ||
1491             id == BROADCOM_DEV_ID_5731X_VF ||
1492             id == BROADCOM_DEV_ID_5741X_VF ||
1493             id == BROADCOM_DEV_ID_57414_VF)
1494                 return true;
1495         return false;
1496 }
1497
1498 static int bnxt_init_board(struct rte_eth_dev *eth_dev)
1499 {
1500         struct bnxt *bp = eth_dev->data->dev_private;
1501         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
1502         int rc;
1503
1504         /* enable device (incl. PCI PM wakeup), and bus-mastering */
1505         if (!pci_dev->mem_resource[0].addr) {
1506                 RTE_LOG(ERR, PMD,
1507                         "Cannot find PCI device base address, aborting\n");
1508                 rc = -ENODEV;
1509                 goto init_err_disable;
1510         }
1511
1512         bp->eth_dev = eth_dev;
1513         bp->pdev = pci_dev;
1514
1515         bp->bar0 = (void *)pci_dev->mem_resource[0].addr;
1516         if (!bp->bar0) {
1517                 RTE_LOG(ERR, PMD, "Cannot map device registers, aborting\n");
1518                 rc = -ENOMEM;
1519                 goto init_err_release;
1520         }
1521         return 0;
1522
1523 init_err_release:
1524         if (bp->bar0)
1525                 bp->bar0 = NULL;
1526
1527 init_err_disable:
1528
1529         return rc;
1530 }
1531
1532 static int bnxt_dev_uninit(struct rte_eth_dev *eth_dev);
1533
1534 #define ALLOW_FUNC(x)   \
1535         { \
1536                 typeof(x) arg = (x); \
1537                 bp->pf.vf_req_fwd[((arg) >> 5)] &= \
1538                 ~rte_cpu_to_le_32(1 << ((arg) & 0x1f)); \
1539         }
1540 static int
1541 bnxt_dev_init(struct rte_eth_dev *eth_dev)
1542 {
1543         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
1544         char mz_name[RTE_MEMZONE_NAMESIZE];
1545         const struct rte_memzone *mz = NULL;
1546         static int version_printed;
1547         uint32_t total_alloc_len;
1548         phys_addr_t mz_phys_addr;
1549         struct bnxt *bp;
1550         int rc;
1551
1552         if (version_printed++ == 0)
1553                 RTE_LOG(INFO, PMD, "%s\n", bnxt_version);
1554
1555         rte_eth_copy_pci_info(eth_dev, pci_dev);
1556         eth_dev->data->dev_flags |= RTE_ETH_DEV_DETACHABLE;
1557
1558         bp = eth_dev->data->dev_private;
1559         bp->dev_stopped = 1;
1560
1561         if (bnxt_vf_pciid(pci_dev->id.device_id))
1562                 bp->flags |= BNXT_FLAG_VF;
1563
1564         rc = bnxt_init_board(eth_dev);
1565         if (rc) {
1566                 RTE_LOG(ERR, PMD,
1567                         "Board initialization failed rc: %x\n", rc);
1568                 goto error;
1569         }
1570         eth_dev->dev_ops = &bnxt_dev_ops;
1571         eth_dev->rx_pkt_burst = &bnxt_recv_pkts;
1572         eth_dev->tx_pkt_burst = &bnxt_xmit_pkts;
1573
1574         if (BNXT_PF(bp) && pci_dev->id.device_id != BROADCOM_DEV_ID_NS2) {
1575                 snprintf(mz_name, RTE_MEMZONE_NAMESIZE,
1576                          "bnxt_%04x:%02x:%02x:%02x-%s", pci_dev->addr.domain,
1577                          pci_dev->addr.bus, pci_dev->addr.devid,
1578                          pci_dev->addr.function, "rx_port_stats");
1579                 mz_name[RTE_MEMZONE_NAMESIZE - 1] = 0;
1580                 mz = rte_memzone_lookup(mz_name);
1581                 total_alloc_len = RTE_CACHE_LINE_ROUNDUP(
1582                                 sizeof(struct rx_port_stats) + 512);
1583                 if (!mz) {
1584                         mz = rte_memzone_reserve(mz_name, total_alloc_len,
1585                                                  SOCKET_ID_ANY,
1586                                                  RTE_MEMZONE_2MB |
1587                                                  RTE_MEMZONE_SIZE_HINT_ONLY);
1588                         if (mz == NULL)
1589                                 return -ENOMEM;
1590                 }
1591                 memset(mz->addr, 0, mz->len);
1592                 mz_phys_addr = mz->phys_addr;
1593                 if ((unsigned long)mz->addr == mz_phys_addr) {
1594                         RTE_LOG(WARNING, PMD,
1595                                 "Memzone physical address same as virtual.\n");
1596                         RTE_LOG(WARNING, PMD,
1597                                 "Using rte_mem_virt2phy()\n");
1598                         mz_phys_addr = rte_mem_virt2phy(mz->addr);
1599                         if (mz_phys_addr == 0) {
1600                                 RTE_LOG(ERR, PMD,
1601                                 "unable to map address to physical memory\n");
1602                                 return -ENOMEM;
1603                         }
1604                 }
1605
1606                 bp->rx_mem_zone = (const void *)mz;
1607                 bp->hw_rx_port_stats = mz->addr;
1608                 bp->hw_rx_port_stats_map = mz_phys_addr;
1609
1610                 snprintf(mz_name, RTE_MEMZONE_NAMESIZE,
1611                          "bnxt_%04x:%02x:%02x:%02x-%s", pci_dev->addr.domain,
1612                          pci_dev->addr.bus, pci_dev->addr.devid,
1613                          pci_dev->addr.function, "tx_port_stats");
1614                 mz_name[RTE_MEMZONE_NAMESIZE - 1] = 0;
1615                 mz = rte_memzone_lookup(mz_name);
1616                 total_alloc_len = RTE_CACHE_LINE_ROUNDUP(
1617                                 sizeof(struct tx_port_stats) + 512);
1618                 if (!mz) {
1619                         mz = rte_memzone_reserve(mz_name, total_alloc_len,
1620                                                  SOCKET_ID_ANY,
1621                                                  RTE_MEMZONE_2MB |
1622                                                  RTE_MEMZONE_SIZE_HINT_ONLY);
1623                         if (mz == NULL)
1624                                 return -ENOMEM;
1625                 }
1626                 memset(mz->addr, 0, mz->len);
1627                 mz_phys_addr = mz->phys_addr;
1628                 if ((unsigned long)mz->addr == mz_phys_addr) {
1629                         RTE_LOG(WARNING, PMD,
1630                                 "Memzone physical address same as virtual.\n");
1631                         RTE_LOG(WARNING, PMD,
1632                                 "Using rte_mem_virt2phy()\n");
1633                         mz_phys_addr = rte_mem_virt2phy(mz->addr);
1634                         if (mz_phys_addr == 0) {
1635                                 RTE_LOG(ERR, PMD,
1636                                 "unable to map address to physical memory\n");
1637                                 return -ENOMEM;
1638                         }
1639                 }
1640
1641                 bp->tx_mem_zone = (const void *)mz;
1642                 bp->hw_tx_port_stats = mz->addr;
1643                 bp->hw_tx_port_stats_map = mz_phys_addr;
1644
1645                 bp->flags |= BNXT_FLAG_PORT_STATS;
1646         }
1647
1648         rc = bnxt_alloc_hwrm_resources(bp);
1649         if (rc) {
1650                 RTE_LOG(ERR, PMD,
1651                         "hwrm resource allocation failure rc: %x\n", rc);
1652                 goto error_free;
1653         }
1654         rc = bnxt_hwrm_ver_get(bp);
1655         if (rc)
1656                 goto error_free;
1657         bnxt_hwrm_queue_qportcfg(bp);
1658
1659         bnxt_hwrm_func_qcfg(bp);
1660
1661         /* Get the MAX capabilities for this function */
1662         rc = bnxt_hwrm_func_qcaps(bp);
1663         if (rc) {
1664                 RTE_LOG(ERR, PMD, "hwrm query capability failure rc: %x\n", rc);
1665                 goto error_free;
1666         }
1667         if (bp->max_tx_rings == 0) {
1668                 RTE_LOG(ERR, PMD, "No TX rings available!\n");
1669                 rc = -EBUSY;
1670                 goto error_free;
1671         }
1672         eth_dev->data->mac_addrs = rte_zmalloc("bnxt_mac_addr_tbl",
1673                                         ETHER_ADDR_LEN * MAX_NUM_MAC_ADDR, 0);
1674         if (eth_dev->data->mac_addrs == NULL) {
1675                 RTE_LOG(ERR, PMD,
1676                         "Failed to alloc %u bytes needed to store MAC addr tbl",
1677                         ETHER_ADDR_LEN * MAX_NUM_MAC_ADDR);
1678                 rc = -ENOMEM;
1679                 goto error_free;
1680         }
1681         /* Copy the permanent MAC from the qcap response address now. */
1682         memcpy(bp->mac_addr, bp->dflt_mac_addr, sizeof(bp->mac_addr));
1683         memcpy(&eth_dev->data->mac_addrs[0], bp->mac_addr, ETHER_ADDR_LEN);
1684         bp->grp_info = rte_zmalloc("bnxt_grp_info",
1685                                 sizeof(*bp->grp_info) * bp->max_ring_grps, 0);
1686         if (!bp->grp_info) {
1687                 RTE_LOG(ERR, PMD,
1688                         "Failed to alloc %zu bytes needed to store group info table\n",
1689                         sizeof(*bp->grp_info) * bp->max_ring_grps);
1690                 rc = -ENOMEM;
1691                 goto error_free;
1692         }
1693
1694         /* Forward all requests if firmware is new enough */
1695         if (((bp->fw_ver >= ((20 << 24) | (6 << 16) | (100 << 8))) &&
1696             (bp->fw_ver < ((20 << 24) | (7 << 16)))) ||
1697             ((bp->fw_ver >= ((20 << 24) | (8 << 16))))) {
1698                 memset(bp->pf.vf_req_fwd, 0xff, sizeof(bp->pf.vf_req_fwd));
1699         } else {
1700                 RTE_LOG(WARNING, PMD,
1701                         "Firmware too old for VF mailbox functionality\n");
1702                 memset(bp->pf.vf_req_fwd, 0, sizeof(bp->pf.vf_req_fwd));
1703         }
1704
1705         /*
1706          * The following are used for driver cleanup.  If we disallow these,
1707          * VF drivers can't clean up cleanly.
1708          */
1709         ALLOW_FUNC(HWRM_FUNC_DRV_UNRGTR);
1710         ALLOW_FUNC(HWRM_VNIC_FREE);
1711         ALLOW_FUNC(HWRM_RING_FREE);
1712         ALLOW_FUNC(HWRM_RING_GRP_FREE);
1713         ALLOW_FUNC(HWRM_VNIC_RSS_COS_LB_CTX_FREE);
1714         ALLOW_FUNC(HWRM_CFA_L2_FILTER_FREE);
1715         ALLOW_FUNC(HWRM_STAT_CTX_FREE);
1716         rc = bnxt_hwrm_func_driver_register(bp);
1717         if (rc) {
1718                 RTE_LOG(ERR, PMD,
1719                         "Failed to register driver");
1720                 rc = -EBUSY;
1721                 goto error_free;
1722         }
1723
1724         RTE_LOG(INFO, PMD,
1725                 DRV_MODULE_NAME " found at mem %" PRIx64 ", node addr %pM\n",
1726                 pci_dev->mem_resource[0].phys_addr,
1727                 pci_dev->mem_resource[0].addr);
1728
1729         rc = bnxt_hwrm_func_reset(bp);
1730         if (rc) {
1731                 RTE_LOG(ERR, PMD, "hwrm chip reset failure rc: %x\n", rc);
1732                 rc = -1;
1733                 goto error_free;
1734         }
1735
1736         if (BNXT_PF(bp)) {
1737                 //if (bp->pf.active_vfs) {
1738                         // TODO: Deallocate VF resources?
1739                 //}
1740                 if (bp->pdev->max_vfs) {
1741                         rc = bnxt_hwrm_allocate_vfs(bp, bp->pdev->max_vfs);
1742                         if (rc) {
1743                                 RTE_LOG(ERR, PMD, "Failed to allocate VFs\n");
1744                                 goto error_free;
1745                         }
1746                 } else {
1747                         rc = bnxt_hwrm_allocate_pf_only(bp);
1748                         if (rc) {
1749                                 RTE_LOG(ERR, PMD,
1750                                         "Failed to allocate PF resources\n");
1751                                 goto error_free;
1752                         }
1753                 }
1754         }
1755
1756         rc = bnxt_setup_int(bp);
1757         if (rc)
1758                 goto error_free;
1759
1760         rc = bnxt_alloc_mem(bp);
1761         if (rc)
1762                 goto error_free_int;
1763
1764         rc = bnxt_request_int(bp);
1765         if (rc)
1766                 goto error_free_int;
1767
1768         rc = bnxt_alloc_def_cp_ring(bp);
1769         if (rc)
1770                 goto error_free_int;
1771
1772         bnxt_enable_int(bp);
1773
1774         return 0;
1775
1776 error_free_int:
1777         bnxt_disable_int(bp);
1778         bnxt_free_def_cp_ring(bp);
1779         bnxt_hwrm_func_buf_unrgtr(bp);
1780         bnxt_free_int(bp);
1781         bnxt_free_mem(bp);
1782 error_free:
1783         bnxt_dev_uninit(eth_dev);
1784 error:
1785         return rc;
1786 }
1787
1788 static int
1789 bnxt_dev_uninit(struct rte_eth_dev *eth_dev) {
1790         struct bnxt *bp = eth_dev->data->dev_private;
1791         int rc;
1792
1793         bnxt_disable_int(bp);
1794         bnxt_free_int(bp);
1795         bnxt_free_mem(bp);
1796         if (eth_dev->data->mac_addrs != NULL) {
1797                 rte_free(eth_dev->data->mac_addrs);
1798                 eth_dev->data->mac_addrs = NULL;
1799         }
1800         if (bp->grp_info != NULL) {
1801                 rte_free(bp->grp_info);
1802                 bp->grp_info = NULL;
1803         }
1804         rc = bnxt_hwrm_func_driver_unregister(bp, 0);
1805         bnxt_free_hwrm_resources(bp);
1806         rte_memzone_free((const struct rte_memzone *)bp->tx_mem_zone);
1807         rte_memzone_free((const struct rte_memzone *)bp->rx_mem_zone);
1808         if (bp->dev_stopped == 0)
1809                 bnxt_dev_close_op(eth_dev);
1810         if (bp->pf.vf_info)
1811                 rte_free(bp->pf.vf_info);
1812         eth_dev->dev_ops = NULL;
1813         eth_dev->rx_pkt_burst = NULL;
1814         eth_dev->tx_pkt_burst = NULL;
1815
1816         return rc;
1817 }
1818
1819 int bnxt_rcv_msg_from_vf(struct bnxt *bp, uint16_t vf_id, void *msg)
1820 {
1821         struct rte_pmd_bnxt_mb_event_param cb_param;
1822
1823         cb_param.retval = RTE_PMD_BNXT_MB_EVENT_PROCEED;
1824         cb_param.vf_id = vf_id;
1825         cb_param.msg = msg;
1826
1827         _rte_eth_dev_callback_process(bp->eth_dev, RTE_ETH_EVENT_VF_MBOX,
1828                         &cb_param);
1829
1830         /* Default to approve */
1831         if (cb_param.retval == RTE_PMD_BNXT_MB_EVENT_PROCEED)
1832                 cb_param.retval = RTE_PMD_BNXT_MB_EVENT_NOOP_ACK;
1833
1834         return cb_param.retval == RTE_PMD_BNXT_MB_EVENT_NOOP_ACK ? true : false;
1835 }
1836
1837 static int bnxt_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
1838         struct rte_pci_device *pci_dev)
1839 {
1840         return rte_eth_dev_pci_generic_probe(pci_dev, sizeof(struct bnxt),
1841                 bnxt_dev_init);
1842 }
1843
1844 static int bnxt_pci_remove(struct rte_pci_device *pci_dev)
1845 {
1846         return rte_eth_dev_pci_generic_remove(pci_dev, bnxt_dev_uninit);
1847 }
1848
1849 static struct rte_pci_driver bnxt_rte_pmd = {
1850         .id_table = bnxt_pci_id_map,
1851         .drv_flags = RTE_PCI_DRV_NEED_MAPPING |
1852                 RTE_PCI_DRV_INTR_LSC,
1853         .probe = bnxt_pci_probe,
1854         .remove = bnxt_pci_remove,
1855 };
1856
1857 RTE_PMD_REGISTER_PCI(net_bnxt, bnxt_rte_pmd);
1858 RTE_PMD_REGISTER_PCI_TABLE(net_bnxt, bnxt_pci_id_map);
1859 RTE_PMD_REGISTER_KMOD_DEP(net_bnxt, "* igb_uio | uio_pci_generic | vfio-pci");