drivers/net/bnxt/bnxt_ethdev.c

   1 /*-
   2  *   BSD LICENSE
   3  *
   4  *   Copyright(c) Broadcom Limited.
   5  *   All rights reserved.
   6  *
   7  *   Redistribution and use in source and binary forms, with or without
   8  *   modification, are permitted provided that the following conditions
   9  *   are met:
  10  *
  11  *     * Redistributions of source code must retain the above copyright
  12  *       notice, this list of conditions and the following disclaimer.
  13  *     * Redistributions in binary form must reproduce the above copyright
  14  *       notice, this list of conditions and the following disclaimer in
  15  *       the documentation and/or other materials provided with the
  16  *       distribution.
  17  *     * Neither the name of Broadcom Corporation nor the names of its
  18  *       contributors may be used to endorse or promote products derived
  19  *       from this software without specific prior written permission.
  20  *
  21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32  */
  33
  34 #include <inttypes.h>
  35 #include <stdbool.h>
  36
  37 #include <rte_dev.h>
  38 #include <rte_ethdev.h>
  39 #include <rte_ethdev_pci.h>
  40 #include <rte_malloc.h>
  41 #include <rte_cycles.h>
  42
  43 #include "bnxt.h"
  44 #include "bnxt_cpr.h"
  45 #include "bnxt_filter.h"
  46 #include "bnxt_hwrm.h"
  47 #include "bnxt_irq.h"
  48 #include "bnxt_ring.h"
  49 #include "bnxt_rxq.h"
  50 #include "bnxt_rxr.h"
  51 #include "bnxt_stats.h"
  52 #include "bnxt_txq.h"
  53 #include "bnxt_txr.h"
  54 #include "bnxt_vnic.h"
  55 #include "hsi_struct_def_dpdk.h"
  56
  57 #define DRV_MODULE_NAME         "bnxt"
  58 static const char bnxt_version[] =
  59         "Broadcom Cumulus driver " DRV_MODULE_NAME "\n";
  60
  61 #define PCI_VENDOR_ID_BROADCOM 0x14E4
  62
  63 #define BROADCOM_DEV_ID_STRATUS_NIC 0x1614
  64 #define BROADCOM_DEV_ID_57414_VF 0x16c1
  65 #define BROADCOM_DEV_ID_57301 0x16c8
  66 #define BROADCOM_DEV_ID_57302 0x16c9
  67 #define BROADCOM_DEV_ID_57304_PF 0x16ca
  68 #define BROADCOM_DEV_ID_57304_VF 0x16cb
  69 #define BROADCOM_DEV_ID_57417_MF 0x16cc
  70 #define BROADCOM_DEV_ID_NS2 0x16cd
  71 #define BROADCOM_DEV_ID_57311 0x16ce
  72 #define BROADCOM_DEV_ID_57312 0x16cf
  73 #define BROADCOM_DEV_ID_57402 0x16d0
  74 #define BROADCOM_DEV_ID_57404 0x16d1
  75 #define BROADCOM_DEV_ID_57406_PF 0x16d2
  76 #define BROADCOM_DEV_ID_57406_VF 0x16d3
  77 #define BROADCOM_DEV_ID_57402_MF 0x16d4
  78 #define BROADCOM_DEV_ID_57407_RJ45 0x16d5
  79 #define BROADCOM_DEV_ID_57412 0x16d6
  80 #define BROADCOM_DEV_ID_57414 0x16d7
  81 #define BROADCOM_DEV_ID_57416_RJ45 0x16d8
  82 #define BROADCOM_DEV_ID_57417_RJ45 0x16d9
  83 #define BROADCOM_DEV_ID_5741X_VF 0x16dc
  84 #define BROADCOM_DEV_ID_57412_MF 0x16de
  85 #define BROADCOM_DEV_ID_57314 0x16df
  86 #define BROADCOM_DEV_ID_57317_RJ45 0x16e0
  87 #define BROADCOM_DEV_ID_5731X_VF 0x16e1
  88 #define BROADCOM_DEV_ID_57417_SFP 0x16e2
  89 #define BROADCOM_DEV_ID_57416_SFP 0x16e3
  90 #define BROADCOM_DEV_ID_57317_SFP 0x16e4
  91 #define BROADCOM_DEV_ID_57404_MF 0x16e7
  92 #define BROADCOM_DEV_ID_57406_MF 0x16e8
  93 #define BROADCOM_DEV_ID_57407_SFP 0x16e9
  94 #define BROADCOM_DEV_ID_57407_MF 0x16ea
  95 #define BROADCOM_DEV_ID_57414_MF 0x16ec
  96 #define BROADCOM_DEV_ID_57416_MF 0x16ee
  97
  98 static const struct rte_pci_id bnxt_pci_id_map[] = {
  99         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_STRATUS_NIC) },
 100         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57414_VF) },
 101         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57301) },
 102         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57302) },
 103         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57304_PF) },
 104         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57304_VF) },
 105         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_NS2) },
 106         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57402) },
 107         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57404) },
 108         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57406_PF) },
 109         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57406_VF) },
 110         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57402_MF) },
 111         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57407_RJ45) },
 112         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57404_MF) },
 113         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57406_MF) },
 114         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57407_SFP) },
 115         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57407_MF) },
 116         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_5741X_VF) },
 117         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_5731X_VF) },
 118         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57314) },
 119         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57417_MF) },
 120         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57311) },
 121         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57312) },
 122         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57412) },
 123         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57414) },
 124         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57416_RJ45) },
 125         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57417_RJ45) },
 126         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57412_MF) },
 127         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57317_RJ45) },
 128         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57417_SFP) },
 129         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57416_SFP) },
 130         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57317_SFP) },
 131         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57414_MF) },
 132         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57416_MF) },
 133         { .vendor_id = 0, /* sentinel */ },
 134 };
 135
 136 #define BNXT_ETH_RSS_SUPPORT (  \
 137         ETH_RSS_IPV4 |          \
 138         ETH_RSS_NONFRAG_IPV4_TCP |      \
 139         ETH_RSS_NONFRAG_IPV4_UDP |      \
 140         ETH_RSS_IPV6 |          \
 141         ETH_RSS_NONFRAG_IPV6_TCP |      \
 142         ETH_RSS_NONFRAG_IPV6_UDP)
 143
 144 static void bnxt_vlan_offload_set_op(struct rte_eth_dev *dev, int mask);
 145 /***********************/
 146
 147 /*
 148  * High level utility functions
 149  */
 150
 151 static void bnxt_free_mem(struct bnxt *bp)
 152 {
 153         bnxt_free_filter_mem(bp);
 154         bnxt_free_vnic_attributes(bp);
 155         bnxt_free_vnic_mem(bp);
 156
 157         bnxt_free_stats(bp);
 158         bnxt_free_tx_rings(bp);
 159         bnxt_free_rx_rings(bp);
 160         bnxt_free_def_cp_ring(bp);
 161 }
 162
 163 static int bnxt_alloc_mem(struct bnxt *bp)
 164 {
 165         int rc;
 166
 167         /* Default completion ring */
 168         rc = bnxt_init_def_ring_struct(bp, SOCKET_ID_ANY);
 169         if (rc)
 170                 goto alloc_mem_err;
 171
 172         rc = bnxt_alloc_rings(bp, 0, NULL, NULL,
 173                               bp->def_cp_ring, "def_cp");
 174         if (rc)
 175                 goto alloc_mem_err;
 176
 177         rc = bnxt_alloc_vnic_mem(bp);
 178         if (rc)
 179                 goto alloc_mem_err;
 180
 181         rc = bnxt_alloc_vnic_attributes(bp);
 182         if (rc)
 183                 goto alloc_mem_err;
 184
 185         rc = bnxt_alloc_filter_mem(bp);
 186         if (rc)
 187                 goto alloc_mem_err;
 188
 189         return 0;
 190
 191 alloc_mem_err:
 192         bnxt_free_mem(bp);
 193         return rc;
 194 }
 195
 196 static int bnxt_init_chip(struct bnxt *bp)
 197 {
 198         unsigned int i, rss_idx, fw_idx;
 199         struct rte_eth_link new;
 200         int rc;
 201
 202         if (bp->eth_dev->data->mtu > ETHER_MTU) {
 203                 bp->eth_dev->data->dev_conf.rxmode.jumbo_frame = 1;
 204                 bp->flags |= BNXT_FLAG_JUMBO;
 205         } else {
 206                 bp->eth_dev->data->dev_conf.rxmode.jumbo_frame = 0;
 207                 bp->flags &= ~BNXT_FLAG_JUMBO;
 208         }
 209
 210         rc = bnxt_alloc_all_hwrm_stat_ctxs(bp);
 211         if (rc) {
 212                 RTE_LOG(ERR, PMD, "HWRM stat ctx alloc failure rc: %x\n", rc);
 213                 goto err_out;
 214         }
 215
 216         rc = bnxt_alloc_hwrm_rings(bp);
 217         if (rc) {
 218                 RTE_LOG(ERR, PMD, "HWRM ring alloc failure rc: %x\n", rc);
 219                 goto err_out;
 220         }
 221
 222         rc = bnxt_alloc_all_hwrm_ring_grps(bp);
 223         if (rc) {
 224                 RTE_LOG(ERR, PMD, "HWRM ring grp alloc failure: %x\n", rc);
 225                 goto err_out;
 226         }
 227
 228         rc = bnxt_mq_rx_configure(bp);
 229         if (rc) {
 230                 RTE_LOG(ERR, PMD, "MQ mode configure failure rc: %x\n", rc);
 231                 goto err_out;
 232         }
 233
 234         /* VNIC configuration */
 235         for (i = 0; i < bp->nr_vnics; i++) {
 236                 struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
 237
 238                 rc = bnxt_hwrm_vnic_alloc(bp, vnic);
 239                 if (rc) {
 240                         RTE_LOG(ERR, PMD, "HWRM vnic %d alloc failure rc: %x\n",
 241                                 i, rc);
 242                         goto err_out;
 243                 }
 244
 245                 rc = bnxt_hwrm_vnic_ctx_alloc(bp, vnic);
 246                 if (rc) {
 247                         RTE_LOG(ERR, PMD,
 248                                 "HWRM vnic %d ctx alloc failure rc: %x\n",
 249                                 i, rc);
 250                         goto err_out;
 251                 }
 252
 253                 rc = bnxt_hwrm_vnic_cfg(bp, vnic);
 254                 if (rc) {
 255                         RTE_LOG(ERR, PMD, "HWRM vnic %d cfg failure rc: %x\n",
 256                                 i, rc);
 257                         goto err_out;
 258                 }
 259
 260                 rc = bnxt_set_hwrm_vnic_filters(bp, vnic);
 261                 if (rc) {
 262                         RTE_LOG(ERR, PMD,
 263                                 "HWRM vnic %d filter failure rc: %x\n",
 264                                 i, rc);
 265                         goto err_out;
 266                 }
 267                 if (vnic->rss_table && vnic->hash_type) {
 268                         /*
 269                          * Fill the RSS hash & redirection table with
 270                          * ring group ids for all VNICs
 271                          */
 272                         for (rss_idx = 0, fw_idx = 0;
 273                              rss_idx < HW_HASH_INDEX_SIZE;
 274                              rss_idx++, fw_idx++) {
 275                                 if (vnic->fw_grp_ids[fw_idx] ==
 276                                     INVALID_HW_RING_ID)
 277                                         fw_idx = 0;
 278                                 vnic->rss_table[rss_idx] =
 279                                                 vnic->fw_grp_ids[fw_idx];
 280                         }
 281                         rc = bnxt_hwrm_vnic_rss_cfg(bp, vnic);
 282                         if (rc) {
 283                                 RTE_LOG(ERR, PMD,
 284                                         "HWRM vnic %d set RSS failure rc: %x\n",
 285                                         i, rc);
 286                                 goto err_out;
 287                         }
 288                 }
 289         }
 290         rc = bnxt_hwrm_cfa_l2_set_rx_mask(bp, &bp->vnic_info[0]);
 291         if (rc) {
 292                 RTE_LOG(ERR, PMD,
 293                         "HWRM cfa l2 rx mask failure rc: %x\n", rc);
 294                 goto err_out;
 295         }
 296
 297         rc = bnxt_get_hwrm_link_config(bp, &new);
 298         if (rc) {
 299                 RTE_LOG(ERR, PMD, "HWRM Get link config failure rc: %x\n", rc);
 300                 goto err_out;
 301         }
 302
 303         if (!bp->link_info.link_up) {
 304                 rc = bnxt_set_hwrm_link_config(bp, true);
 305                 if (rc) {
 306                         RTE_LOG(ERR, PMD,
 307                                 "HWRM link config failure rc: %x\n", rc);
 308                         goto err_out;
 309                 }
 310         }
 311
 312         return 0;
 313
 314 err_out:
 315         bnxt_free_all_hwrm_resources(bp);
 316
 317         return rc;
 318 }
 319
 320 static int bnxt_shutdown_nic(struct bnxt *bp)
 321 {
 322         bnxt_free_all_hwrm_resources(bp);
 323         bnxt_free_all_filters(bp);
 324         bnxt_free_all_vnics(bp);
 325         return 0;
 326 }
 327
 328 static int bnxt_init_nic(struct bnxt *bp)
 329 {
 330         int rc;
 331
 332         bnxt_init_ring_grps(bp);
 333         bnxt_init_vnics(bp);
 334         bnxt_init_filters(bp);
 335
 336         rc = bnxt_init_chip(bp);
 337         if (rc)
 338                 return rc;
 339
 340         return 0;
 341 }
 342
 343 /*
 344  * Device configuration and status function
 345  */
 346
 347 static void bnxt_dev_info_get_op(struct rte_eth_dev *eth_dev,
 348                                   struct rte_eth_dev_info *dev_info)
 349 {
 350         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 351         uint16_t max_vnics, i, j, vpool, vrxq;
 352
 353         dev_info->pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
 354
 355         /* MAC Specifics */
 356         dev_info->max_mac_addrs = MAX_NUM_MAC_ADDR;
 357         dev_info->max_hash_mac_addrs = 0;
 358
 359         /* PF/VF specifics */
 360         if (BNXT_PF(bp))
 361                 dev_info->max_vfs = bp->pdev->max_vfs;
 362         dev_info->max_rx_queues = bp->max_rx_rings;
 363         dev_info->max_tx_queues = bp->max_tx_rings;
 364         dev_info->reta_size = bp->max_rsscos_ctx;
 365         max_vnics = bp->max_vnics;
 366
 367         /* Fast path specifics */
 368         dev_info->min_rx_bufsize = 1;
 369         dev_info->max_rx_pktlen = BNXT_MAX_MTU + ETHER_HDR_LEN + ETHER_CRC_LEN
 370                                   + VLAN_TAG_SIZE;
 371         dev_info->rx_offload_capa = 0;
 372         dev_info->tx_offload_capa = DEV_TX_OFFLOAD_IPV4_CKSUM |
 373                                         DEV_TX_OFFLOAD_TCP_CKSUM |
 374                                         DEV_TX_OFFLOAD_UDP_CKSUM |
 375                                         DEV_TX_OFFLOAD_TCP_TSO |
 376                                         DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM |
 377                                         DEV_TX_OFFLOAD_VXLAN_TNL_TSO |
 378                                         DEV_TX_OFFLOAD_GRE_TNL_TSO |
 379                                         DEV_TX_OFFLOAD_IPIP_TNL_TSO |
 380                                         DEV_TX_OFFLOAD_GENEVE_TNL_TSO;
 381
 382         /* *INDENT-OFF* */
 383         dev_info->default_rxconf = (struct rte_eth_rxconf) {
 384                 .rx_thresh = {
 385                         .pthresh = 8,
 386                         .hthresh = 8,
 387                         .wthresh = 0,
 388                 },
 389                 .rx_free_thresh = 32,
 390                 .rx_drop_en = 0,
 391         };
 392
 393         dev_info->default_txconf = (struct rte_eth_txconf) {
 394                 .tx_thresh = {
 395                         .pthresh = 32,
 396                         .hthresh = 0,
 397                         .wthresh = 0,
 398                 },
 399                 .tx_free_thresh = 32,
 400                 .tx_rs_thresh = 32,
 401                 .txq_flags = ETH_TXQ_FLAGS_NOMULTSEGS |
 402                              ETH_TXQ_FLAGS_NOOFFLOADS,
 403         };
 404         eth_dev->data->dev_conf.intr_conf.lsc = 1;
 405
 406         /* *INDENT-ON* */
 407
 408         /*
 409          * TODO: default_rxconf, default_txconf, rx_desc_lim, and tx_desc_lim
 410          *       need further investigation.
 411          */
 412
 413         /* VMDq resources */
 414         vpool = 64; /* ETH_64_POOLS */
 415         vrxq = 128; /* ETH_VMDQ_DCB_NUM_QUEUES */
 416         for (i = 0; i < 4; vpool >>= 1, i++) {
 417                 if (max_vnics > vpool) {
 418                         for (j = 0; j < 5; vrxq >>= 1, j++) {
 419                                 if (dev_info->max_rx_queues > vrxq) {
 420                                         if (vpool > vrxq)
 421                                                 vpool = vrxq;
 422                                         goto found;
 423                                 }
 424                         }
 425                         /* Not enough resources to support VMDq */
 426                         break;
 427                 }
 428         }
 429         /* Not enough resources to support VMDq */
 430         vpool = 0;
 431         vrxq = 0;
 432 found:
 433         dev_info->max_vmdq_pools = vpool;
 434         dev_info->vmdq_queue_num = vrxq;
 435
 436         dev_info->vmdq_pool_base = 0;
 437         dev_info->vmdq_queue_base = 0;
 438 }
 439
 440 /* Configure the device based on the configuration provided */
 441 static int bnxt_dev_configure_op(struct rte_eth_dev *eth_dev)
 442 {
 443         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 444
 445         bp->rx_queues = (void *)eth_dev->data->rx_queues;
 446         bp->tx_queues = (void *)eth_dev->data->tx_queues;
 447
 448         /* Inherit new configurations */
 449         bp->rx_nr_rings = eth_dev->data->nb_rx_queues;
 450         bp->tx_nr_rings = eth_dev->data->nb_tx_queues;
 451         bp->rx_cp_nr_rings = bp->rx_nr_rings;
 452         bp->tx_cp_nr_rings = bp->tx_nr_rings;
 453
 454         if (eth_dev->data->dev_conf.rxmode.jumbo_frame)
 455                 eth_dev->data->mtu =
 456                                 eth_dev->data->dev_conf.rxmode.max_rx_pkt_len -
 457                                 ETHER_HDR_LEN - ETHER_CRC_LEN - VLAN_TAG_SIZE;
 458         return 0;
 459 }
 460
 461 static inline int
 462 rte_bnxt_atomic_write_link_status(struct rte_eth_dev *eth_dev,
 463                                 struct rte_eth_link *link)
 464 {
 465         struct rte_eth_link *dst = &eth_dev->data->dev_link;
 466         struct rte_eth_link *src = link;
 467
 468         if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
 469                                         *(uint64_t *)src) == 0)
 470                 return 1;
 471
 472         return 0;
 473 }
 474
 475 static void bnxt_print_link_info(struct rte_eth_dev *eth_dev)
 476 {
 477         struct rte_eth_link *link = &eth_dev->data->dev_link;
 478
 479         if (link->link_status)
 480                 RTE_LOG(INFO, PMD, "Port %d Link Up - speed %u Mbps - %s\n",
 481                         (uint8_t)(eth_dev->data->port_id),
 482                         (uint32_t)link->link_speed,
 483                         (link->link_duplex == ETH_LINK_FULL_DUPLEX) ?
 484                         ("full-duplex") : ("half-duplex\n"));
 485         else
 486                 RTE_LOG(INFO, PMD, "Port %d Link Down\n",
 487                         (uint8_t)(eth_dev->data->port_id));
 488 }
 489
 490 static int bnxt_dev_lsc_intr_setup(struct rte_eth_dev *eth_dev)
 491 {
 492         bnxt_print_link_info(eth_dev);
 493         return 0;
 494 }
 495
 496 static int bnxt_dev_start_op(struct rte_eth_dev *eth_dev)
 497 {
 498         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 499         int vlan_mask = 0;
 500         int rc;
 501
 502         bp->dev_stopped = 0;
 503
 504         rc = bnxt_init_nic(bp);
 505         if (rc)
 506                 goto error;
 507
 508         bnxt_link_update_op(eth_dev, 0);
 509
 510         if (eth_dev->data->dev_conf.rxmode.hw_vlan_filter)
 511                 vlan_mask |= ETH_VLAN_FILTER_MASK;
 512         if (eth_dev->data->dev_conf.rxmode.hw_vlan_strip)
 513                 vlan_mask |= ETH_VLAN_STRIP_MASK;
 514         bnxt_vlan_offload_set_op(eth_dev, vlan_mask);
 515
 516         return 0;
 517
 518 error:
 519         bnxt_shutdown_nic(bp);
 520         bnxt_free_tx_mbufs(bp);
 521         bnxt_free_rx_mbufs(bp);
 522         return rc;
 523 }
 524
 525 static int bnxt_dev_set_link_up_op(struct rte_eth_dev *eth_dev)
 526 {
 527         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 528
 529         eth_dev->data->dev_link.link_status = 1;
 530         bnxt_set_hwrm_link_config(bp, true);
 531         return 0;
 532 }
 533
 534 static int bnxt_dev_set_link_down_op(struct rte_eth_dev *eth_dev)
 535 {
 536         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 537
 538         eth_dev->data->dev_link.link_status = 0;
 539         bnxt_set_hwrm_link_config(bp, false);
 540         return 0;
 541 }
 542
 543 /* Unload the driver, release resources */
 544 static void bnxt_dev_stop_op(struct rte_eth_dev *eth_dev)
 545 {
 546         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 547
 548         if (bp->eth_dev->data->dev_started) {
 549                 /* TBD: STOP HW queues DMA */
 550                 eth_dev->data->dev_link.link_status = 0;
 551         }
 552         bnxt_set_hwrm_link_config(bp, false);
 553         bnxt_hwrm_port_clr_stats(bp);
 554         bnxt_shutdown_nic(bp);
 555         bp->dev_stopped = 1;
 556 }
 557
 558 static void bnxt_dev_close_op(struct rte_eth_dev *eth_dev)
 559 {
 560         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 561
 562         if (bp->dev_stopped == 0)
 563                 bnxt_dev_stop_op(eth_dev);
 564
 565         bnxt_free_tx_mbufs(bp);
 566         bnxt_free_rx_mbufs(bp);
 567         bnxt_free_mem(bp);
 568         if (eth_dev->data->mac_addrs != NULL) {
 569                 rte_free(eth_dev->data->mac_addrs);
 570                 eth_dev->data->mac_addrs = NULL;
 571         }
 572         if (bp->grp_info != NULL) {
 573                 rte_free(bp->grp_info);
 574                 bp->grp_info = NULL;
 575         }
 576 }
 577
 578 static void bnxt_mac_addr_remove_op(struct rte_eth_dev *eth_dev,
 579                                     uint32_t index)
 580 {
 581         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 582         uint64_t pool_mask = eth_dev->data->mac_pool_sel[index];
 583         struct bnxt_vnic_info *vnic;
 584         struct bnxt_filter_info *filter, *temp_filter;
 585         int i;
 586
 587         /*
 588          * Loop through all VNICs from the specified filter flow pools to
 589          * remove the corresponding MAC addr filter
 590          */
 591         for (i = 0; i < MAX_FF_POOLS; i++) {
 592                 if (!(pool_mask & (1ULL << i)))
 593                         continue;
 594
 595                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
 596                         filter = STAILQ_FIRST(&vnic->filter);
 597                         while (filter) {
 598                                 temp_filter = STAILQ_NEXT(filter, next);
 599                                 if (filter->mac_index == index) {
 600                                         STAILQ_REMOVE(&vnic->filter, filter,
 601                                                       bnxt_filter_info, next);
 602                                         bnxt_hwrm_clear_filter(bp, filter);
 603                                         filter->mac_index = INVALID_MAC_INDEX;
 604                                         memset(&filter->l2_addr, 0,
 605                                                ETHER_ADDR_LEN);
 606                                         STAILQ_INSERT_TAIL(
 607                                                         &bp->free_filter_list,
 608                                                         filter, next);
 609                                 }
 610                                 filter = temp_filter;
 611                         }
 612                 }
 613         }
 614 }
 615
 616 static int bnxt_mac_addr_add_op(struct rte_eth_dev *eth_dev,
 617                                 struct ether_addr *mac_addr,
 618                                 uint32_t index, uint32_t pool)
 619 {
 620         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 621         struct bnxt_vnic_info *vnic = STAILQ_FIRST(&bp->ff_pool[pool]);
 622         struct bnxt_filter_info *filter;
 623
 624         if (BNXT_VF(bp)) {
 625                 RTE_LOG(ERR, PMD, "Cannot add MAC address to a VF interface\n");
 626                 return -ENOTSUP;
 627         }
 628
 629         if (!vnic) {
 630                 RTE_LOG(ERR, PMD, "VNIC not found for pool %d!\n", pool);
 631                 return -EINVAL;
 632         }
 633         /* Attach requested MAC address to the new l2_filter */
 634         STAILQ_FOREACH(filter, &vnic->filter, next) {
 635                 if (filter->mac_index == index) {
 636                         RTE_LOG(ERR, PMD,
 637                                 "MAC addr already existed for pool %d\n", pool);
 638                         return -EINVAL;
 639                 }
 640         }
 641         filter = bnxt_alloc_filter(bp);
 642         if (!filter) {
 643                 RTE_LOG(ERR, PMD, "L2 filter alloc failed\n");
 644                 return -ENODEV;
 645         }
 646         STAILQ_INSERT_TAIL(&vnic->filter, filter, next);
 647         filter->mac_index = index;
 648         memcpy(filter->l2_addr, mac_addr, ETHER_ADDR_LEN);
 649         return bnxt_hwrm_set_filter(bp, vnic->fw_vnic_id, filter);
 650 }
 651
 652 int bnxt_link_update_op(struct rte_eth_dev *eth_dev, int wait_to_complete)
 653 {
 654         int rc = 0;
 655         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 656         struct rte_eth_link new;
 657         unsigned int cnt = BNXT_LINK_WAIT_CNT;
 658
 659         memset(&new, 0, sizeof(new));
 660         do {
 661                 /* Retrieve link info from hardware */
 662                 rc = bnxt_get_hwrm_link_config(bp, &new);
 663                 if (rc) {
 664                         new.link_speed = ETH_LINK_SPEED_100M;
 665                         new.link_duplex = ETH_LINK_FULL_DUPLEX;
 666                         RTE_LOG(ERR, PMD,
 667                                 "Failed to retrieve link rc = 0x%x!\n", rc);
 668                         goto out;
 669                 }
 670                 rte_delay_ms(BNXT_LINK_WAIT_INTERVAL);
 671
 672                 if (!wait_to_complete)
 673                         break;
 674         } while (!new.link_status && cnt--);
 675
 676 out:
 677         /* Timed out or success */
 678         if (new.link_status != eth_dev->data->dev_link.link_status ||
 679         new.link_speed != eth_dev->data->dev_link.link_speed) {
 680                 rte_bnxt_atomic_write_link_status(eth_dev, &new);
 681                 bnxt_print_link_info(eth_dev);
 682         }
 683
 684         return rc;
 685 }
 686
 687 static void bnxt_promiscuous_enable_op(struct rte_eth_dev *eth_dev)
 688 {
 689         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 690         struct bnxt_vnic_info *vnic;
 691
 692         if (bp->vnic_info == NULL)
 693                 return;
 694
 695         vnic = &bp->vnic_info[0];
 696
 697         vnic->flags |= BNXT_VNIC_INFO_PROMISC;
 698         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic);
 699 }
 700
 701 static void bnxt_promiscuous_disable_op(struct rte_eth_dev *eth_dev)
 702 {
 703         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 704         struct bnxt_vnic_info *vnic;
 705
 706         if (bp->vnic_info == NULL)
 707                 return;
 708
 709         vnic = &bp->vnic_info[0];
 710
 711         vnic->flags &= ~BNXT_VNIC_INFO_PROMISC;
 712         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic);
 713 }
 714
 715 static void bnxt_allmulticast_enable_op(struct rte_eth_dev *eth_dev)
 716 {
 717         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 718         struct bnxt_vnic_info *vnic;
 719
 720         if (bp->vnic_info == NULL)
 721                 return;
 722
 723         vnic = &bp->vnic_info[0];
 724
 725         vnic->flags |= BNXT_VNIC_INFO_ALLMULTI;
 726         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic);
 727 }
 728
 729 static void bnxt_allmulticast_disable_op(struct rte_eth_dev *eth_dev)
 730 {
 731         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 732         struct bnxt_vnic_info *vnic;
 733
 734         if (bp->vnic_info == NULL)
 735                 return;
 736
 737         vnic = &bp->vnic_info[0];
 738
 739         vnic->flags &= ~BNXT_VNIC_INFO_ALLMULTI;
 740         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic);
 741 }
 742
 743 static int bnxt_reta_update_op(struct rte_eth_dev *eth_dev,
 744                             struct rte_eth_rss_reta_entry64 *reta_conf,
 745                             uint16_t reta_size)
 746 {
 747         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 748         struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
 749         struct bnxt_vnic_info *vnic;
 750         int i;
 751
 752         if (!(dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG))
 753                 return -EINVAL;
 754
 755         if (reta_size != HW_HASH_INDEX_SIZE) {
 756                 RTE_LOG(ERR, PMD, "The configured hash table lookup size "
 757                         "(%d) must equal the size supported by the hardware "
 758                         "(%d)\n", reta_size, HW_HASH_INDEX_SIZE);
 759                 return -EINVAL;
 760         }
 761         /* Update the RSS VNIC(s) */
 762         for (i = 0; i < MAX_FF_POOLS; i++) {
 763                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
 764                         memcpy(vnic->rss_table, reta_conf, reta_size);
 765
 766                         bnxt_hwrm_vnic_rss_cfg(bp, vnic);
 767                 }
 768         }
 769         return 0;
 770 }
 771
 772 static int bnxt_reta_query_op(struct rte_eth_dev *eth_dev,
 773                               struct rte_eth_rss_reta_entry64 *reta_conf,
 774                               uint16_t reta_size)
 775 {
 776         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 777         struct bnxt_vnic_info *vnic = &bp->vnic_info[0];
 778         struct rte_intr_handle *intr_handle
 779                 = &bp->pdev->intr_handle;
 780
 781         /* Retrieve from the default VNIC */
 782         if (!vnic)
 783                 return -EINVAL;
 784         if (!vnic->rss_table)
 785                 return -EINVAL;
 786
 787         if (reta_size != HW_HASH_INDEX_SIZE) {
 788                 RTE_LOG(ERR, PMD, "The configured hash table lookup size "
 789                         "(%d) must equal the size supported by the hardware "
 790                         "(%d)\n", reta_size, HW_HASH_INDEX_SIZE);
 791                 return -EINVAL;
 792         }
 793         /* EW - need to revisit here copying from u64 to u16 */
 794         memcpy(reta_conf, vnic->rss_table, reta_size);
 795
 796         if (rte_intr_allow_others(intr_handle)) {
 797                 if (eth_dev->data->dev_conf.intr_conf.lsc != 0)
 798                         bnxt_dev_lsc_intr_setup(eth_dev);
 799         }
 800
 801         return 0;
 802 }
 803
 804 static int bnxt_rss_hash_update_op(struct rte_eth_dev *eth_dev,
 805                                    struct rte_eth_rss_conf *rss_conf)
 806 {
 807         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 808         struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
 809         struct bnxt_vnic_info *vnic;
 810         uint16_t hash_type = 0;
 811         int i;
 812
 813         /*
 814          * If RSS enablement were different than dev_configure,
 815          * then return -EINVAL
 816          */
 817         if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) {
 818                 if (!rss_conf->rss_hf)
 819                         return -EINVAL;
 820         } else {
 821                 if (rss_conf->rss_hf & BNXT_ETH_RSS_SUPPORT)
 822                         return -EINVAL;
 823         }
 824         if (rss_conf->rss_hf & ETH_RSS_IPV4)
 825                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4;
 826         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV4_TCP)
 827                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4;
 828         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV4_UDP)
 829                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4;
 830         if (rss_conf->rss_hf & ETH_RSS_IPV6)
 831                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6;
 832         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV6_TCP)
 833                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6;
 834         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV6_UDP)
 835                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6;
 836
 837         /* Update the RSS VNIC(s) */
 838         for (i = 0; i < MAX_FF_POOLS; i++) {
 839                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
 840                         vnic->hash_type = hash_type;
 841
 842                         /*
 843                          * Use the supplied key if the key length is
 844                          * acceptable and the rss_key is not NULL
 845                          */
 846                         if (rss_conf->rss_key &&
 847                             rss_conf->rss_key_len <= HW_HASH_KEY_SIZE)
 848                                 memcpy(vnic->rss_hash_key, rss_conf->rss_key,
 849                                        rss_conf->rss_key_len);
 850
 851                         bnxt_hwrm_vnic_rss_cfg(bp, vnic);
 852                 }
 853         }
 854         return 0;
 855 }
 856
 857 static int bnxt_rss_hash_conf_get_op(struct rte_eth_dev *eth_dev,
 858                                      struct rte_eth_rss_conf *rss_conf)
 859 {
 860         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 861         struct bnxt_vnic_info *vnic = &bp->vnic_info[0];
 862         int len;
 863         uint32_t hash_types;
 864
 865         /* RSS configuration is the same for all VNICs */
 866         if (vnic && vnic->rss_hash_key) {
 867                 if (rss_conf->rss_key) {
 868                         len = rss_conf->rss_key_len <= HW_HASH_KEY_SIZE ?
 869                               rss_conf->rss_key_len : HW_HASH_KEY_SIZE;
 870                         memcpy(rss_conf->rss_key, vnic->rss_hash_key, len);
 871                 }
 872
 873                 hash_types = vnic->hash_type;
 874                 rss_conf->rss_hf = 0;
 875                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4) {
 876                         rss_conf->rss_hf |= ETH_RSS_IPV4;
 877                         hash_types &= ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4;
 878                 }
 879                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4) {
 880                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV4_TCP;
 881                         hash_types &=
 882                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4;
 883                 }
 884                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4) {
 885                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV4_UDP;
 886                         hash_types &=
 887                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4;
 888                 }
 889                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6) {
 890                         rss_conf->rss_hf |= ETH_RSS_IPV6;
 891                         hash_types &= ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6;
 892                 }
 893                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6) {
 894                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV6_TCP;
 895                         hash_types &=
 896                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6;
 897                 }
 898                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6) {
 899                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV6_UDP;
 900                         hash_types &=
 901                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6;
 902                 }
 903                 if (hash_types) {
 904                         RTE_LOG(ERR, PMD,
 905                                 "Unknwon RSS config from firmware (%08x), RSS disabled",
 906                                 vnic->hash_type);
 907                         return -ENOTSUP;
 908                 }
 909         } else {
 910                 rss_conf->rss_hf = 0;
 911         }
 912         return 0;
 913 }
 914
 915 static int bnxt_flow_ctrl_get_op(struct rte_eth_dev *dev,
 916                                struct rte_eth_fc_conf *fc_conf)
 917 {
 918         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
 919         struct rte_eth_link link_info;
 920         int rc;
 921
 922         rc = bnxt_get_hwrm_link_config(bp, &link_info);
 923         if (rc)
 924                 return rc;
 925
 926         memset(fc_conf, 0, sizeof(*fc_conf));
 927         if (bp->link_info.auto_pause)
 928                 fc_conf->autoneg = 1;
 929         switch (bp->link_info.pause) {
 930         case 0:
 931                 fc_conf->mode = RTE_FC_NONE;
 932                 break;
 933         case HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_TX:
 934                 fc_conf->mode = RTE_FC_TX_PAUSE;
 935                 break;
 936         case HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_RX:
 937                 fc_conf->mode = RTE_FC_RX_PAUSE;
 938                 break;
 939         case (HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_TX |
 940                         HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_RX):
 941                 fc_conf->mode = RTE_FC_FULL;
 942                 break;
 943         }
 944         return 0;
 945 }
 946
 947 static int bnxt_flow_ctrl_set_op(struct rte_eth_dev *dev,
 948                                struct rte_eth_fc_conf *fc_conf)
 949 {
 950         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
 951
 952         if (BNXT_NPAR_PF(bp) || BNXT_VF(bp)) {
 953                 RTE_LOG(ERR, PMD, "Flow Control Settings cannot be modified\n");
 954                 return -ENOTSUP;
 955         }
 956
 957         switch (fc_conf->mode) {
 958         case RTE_FC_NONE:
 959                 bp->link_info.auto_pause = 0;
 960                 bp->link_info.force_pause = 0;
 961                 break;
 962         case RTE_FC_RX_PAUSE:
 963                 if (fc_conf->autoneg) {
 964                         bp->link_info.auto_pause =
 965                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_RX;
 966                         bp->link_info.force_pause = 0;
 967                 } else {
 968                         bp->link_info.auto_pause = 0;
 969                         bp->link_info.force_pause =
 970                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_RX;
 971                 }
 972                 break;
 973         case RTE_FC_TX_PAUSE:
 974                 if (fc_conf->autoneg) {
 975                         bp->link_info.auto_pause =
 976                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_TX;
 977                         bp->link_info.force_pause = 0;
 978                 } else {
 979                         bp->link_info.auto_pause = 0;
 980                         bp->link_info.force_pause =
 981                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_TX;
 982                 }
 983                 break;
 984         case RTE_FC_FULL:
 985                 if (fc_conf->autoneg) {
 986                         bp->link_info.auto_pause =
 987                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_TX |
 988                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_RX;
 989                         bp->link_info.force_pause = 0;
 990                 } else {
 991                         bp->link_info.auto_pause = 0;
 992                         bp->link_info.force_pause =
 993                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_TX |
 994                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_RX;
 995                 }
 996                 break;
 997         }
 998         return bnxt_set_hwrm_link_config(bp, true);
 999 }
1000
1001 /* Add UDP tunneling port */
1002 static int
1003 bnxt_udp_tunnel_port_add_op(struct rte_eth_dev *eth_dev,
1004                          struct rte_eth_udp_tunnel *udp_tunnel)
1005 {
1006         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
1007         uint16_t tunnel_type = 0;
1008         int rc = 0;
1009
1010         switch (udp_tunnel->prot_type) {
1011         case RTE_TUNNEL_TYPE_VXLAN:
1012                 if (bp->vxlan_port_cnt) {
1013                         RTE_LOG(ERR, PMD, "Tunnel Port %d already programmed\n",
1014                                 udp_tunnel->udp_port);
1015                         if (bp->vxlan_port != udp_tunnel->udp_port) {
1016                                 RTE_LOG(ERR, PMD, "Only one port allowed\n");
1017                                 return -ENOSPC;
1018                         }
1019                         bp->vxlan_port_cnt++;
1020                         return 0;
1021                 }
1022                 tunnel_type =
1023                         HWRM_TUNNEL_DST_PORT_ALLOC_INPUT_TUNNEL_TYPE_VXLAN;
1024                 bp->vxlan_port_cnt++;
1025                 break;
1026         case RTE_TUNNEL_TYPE_GENEVE:
1027                 if (bp->geneve_port_cnt) {
1028                         RTE_LOG(ERR, PMD, "Tunnel Port %d already programmed\n",
1029                                 udp_tunnel->udp_port);
1030                         if (bp->geneve_port != udp_tunnel->udp_port) {
1031                                 RTE_LOG(ERR, PMD, "Only one port allowed\n");
1032                                 return -ENOSPC;
1033                         }
1034                         bp->geneve_port_cnt++;
1035                         return 0;
1036                 }
1037                 tunnel_type =
1038                         HWRM_TUNNEL_DST_PORT_ALLOC_INPUT_TUNNEL_TYPE_GENEVE;
1039                 bp->geneve_port_cnt++;
1040                 break;
1041         default:
1042                 RTE_LOG(ERR, PMD, "Tunnel type is not supported\n");
1043                 return -ENOTSUP;
1044         }
1045         rc = bnxt_hwrm_tunnel_dst_port_alloc(bp, udp_tunnel->udp_port,
1046                                              tunnel_type);
1047         return rc;
1048 }
1049
1050 static int
1051 bnxt_udp_tunnel_port_del_op(struct rte_eth_dev *eth_dev,
1052                          struct rte_eth_udp_tunnel *udp_tunnel)
1053 {
1054         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
1055         uint16_t tunnel_type = 0;
1056         uint16_t port = 0;
1057         int rc = 0;
1058
1059         switch (udp_tunnel->prot_type) {
1060         case RTE_TUNNEL_TYPE_VXLAN:
1061                 if (!bp->vxlan_port_cnt) {
1062                         RTE_LOG(ERR, PMD, "No Tunnel port configured yet\n");
1063                         return -EINVAL;
1064                 }
1065                 if (bp->vxlan_port != udp_tunnel->udp_port) {
1066                         RTE_LOG(ERR, PMD, "Req Port: %d. Configured port: %d\n",
1067                                 udp_tunnel->udp_port, bp->vxlan_port);
1068                         return -EINVAL;
1069                 }
1070                 if (--bp->vxlan_port_cnt)
1071                         return 0;
1072
1073                 tunnel_type =
1074                         HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_VXLAN;
1075                 port = bp->vxlan_fw_dst_port_id;
1076                 break;
1077         case RTE_TUNNEL_TYPE_GENEVE:
1078                 if (!bp->geneve_port_cnt) {
1079                         RTE_LOG(ERR, PMD, "No Tunnel port configured yet\n");
1080                         return -EINVAL;
1081                 }
1082                 if (bp->geneve_port != udp_tunnel->udp_port) {
1083                         RTE_LOG(ERR, PMD, "Req Port: %d. Configured port: %d\n",
1084                                 udp_tunnel->udp_port, bp->geneve_port);
1085                         return -EINVAL;
1086                 }
1087                 if (--bp->geneve_port_cnt)
1088                         return 0;
1089
1090                 tunnel_type =
1091                         HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_GENEVE;
1092                 port = bp->geneve_fw_dst_port_id;
1093                 break;
1094         default:
1095                 RTE_LOG(ERR, PMD, "Tunnel type is not supported\n");
1096                 return -ENOTSUP;
1097         }
1098
1099         rc = bnxt_hwrm_tunnel_dst_port_free(bp, port, tunnel_type);
1100         if (!rc) {
1101                 if (tunnel_type ==
1102                     HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_VXLAN)
1103                         bp->vxlan_port = 0;
1104                 if (tunnel_type ==
1105                     HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_GENEVE)
1106                         bp->geneve_port = 0;
1107         }
1108         return rc;
1109 }
1110
1111 static int bnxt_del_vlan_filter(struct bnxt *bp, uint16_t vlan_id)
1112 {
1113         struct bnxt_filter_info *filter, *temp_filter, *new_filter;
1114         struct bnxt_vnic_info *vnic;
1115         unsigned int i;
1116         int rc = 0;
1117         uint32_t chk = HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN;
1118
1119         /* Cycle through all VNICs */
1120         for (i = 0; i < bp->nr_vnics; i++) {
1121                 /*
1122                  * For each VNIC and each associated filter(s)
1123                  * if VLAN exists && VLAN matches vlan_id
1124                  *      remove the MAC+VLAN filter
1125                  *      add a new MAC only filter
1126                  * else
1127                  *      VLAN filter doesn't exist, just skip and continue
1128                  */
1129                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
1130                         filter = STAILQ_FIRST(&vnic->filter);
1131                         while (filter) {
1132                                 temp_filter = STAILQ_NEXT(filter, next);
1133
1134                                 if (filter->enables & chk &&
1135                                     filter->l2_ovlan == vlan_id) {
1136                                         /* Must delete the filter */
1137                                         STAILQ_REMOVE(&vnic->filter, filter,
1138                                                       bnxt_filter_info, next);
1139                                         bnxt_hwrm_clear_filter(bp, filter);
1140                                         STAILQ_INSERT_TAIL(
1141                                                         &bp->free_filter_list,
1142                                                         filter, next);
1143
1144                                         /*
1145                                          * Need to examine to see if the MAC
1146                                          * filter already existed or not before
1147                                          * allocating a new one
1148                                          */
1149
1150                                         new_filter = bnxt_alloc_filter(bp);
1151                                         if (!new_filter) {
1152                                                 RTE_LOG(ERR, PMD,
1153                                                         "MAC/VLAN filter alloc failed\n");
1154                                                 rc = -ENOMEM;
1155                                                 goto exit;
1156                                         }
1157                                         STAILQ_INSERT_TAIL(&vnic->filter,
1158                                                            new_filter, next);
1159                                         /* Inherit MAC from previous filter */
1160                                         new_filter->mac_index =
1161                                                         filter->mac_index;
1162                                         memcpy(new_filter->l2_addr,
1163                                                filter->l2_addr, ETHER_ADDR_LEN);
1164                                         /* MAC only filter */
1165                                         rc = bnxt_hwrm_set_filter(bp,
1166                                                         vnic->fw_vnic_id,
1167                                                         new_filter);
1168                                         if (rc)
1169                                                 goto exit;
1170                                         RTE_LOG(INFO, PMD,
1171                                                 "Del Vlan filter for %d\n",
1172                                                 vlan_id);
1173                                 }
1174                                 filter = temp_filter;
1175                         }
1176                 }
1177         }
1178 exit:
1179         return rc;
1180 }
1181
1182 static int bnxt_add_vlan_filter(struct bnxt *bp, uint16_t vlan_id)
1183 {
1184         struct bnxt_filter_info *filter, *temp_filter, *new_filter;
1185         struct bnxt_vnic_info *vnic;
1186         unsigned int i;
1187         int rc = 0;
1188         uint32_t en = HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN |
1189                 HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN_MASK;
1190         uint32_t chk = HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN;
1191
1192         /* Cycle through all VNICs */
1193         for (i = 0; i < bp->nr_vnics; i++) {
1194                 /*
1195                  * For each VNIC and each associated filter(s)
1196                  * if VLAN exists:
1197                  *   if VLAN matches vlan_id
1198                  *      VLAN filter already exists, just skip and continue
1199                  *   else
1200                  *      add a new MAC+VLAN filter
1201                  * else
1202                  *   Remove the old MAC only filter
1203                  *    Add a new MAC+VLAN filter
1204                  */
1205                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
1206                         filter = STAILQ_FIRST(&vnic->filter);
1207                         while (filter) {
1208                                 temp_filter = STAILQ_NEXT(filter, next);
1209
1210                                 if (filter->enables & chk) {
1211                                         if (filter->l2_ovlan == vlan_id)
1212                                                 goto cont;
1213                                 } else {
1214                                         /* Must delete the MAC filter */
1215                                         STAILQ_REMOVE(&vnic->filter, filter,
1216                                                       bnxt_filter_info, next);
1217                                         bnxt_hwrm_clear_filter(bp, filter);
1218                                         filter->l2_ovlan = 0;
1219                                         STAILQ_INSERT_TAIL(
1220                                                         &bp->free_filter_list,
1221                                                         filter, next);
1222                                 }
1223                                 new_filter = bnxt_alloc_filter(bp);
1224                                 if (!new_filter) {
1225                                         RTE_LOG(ERR, PMD,
1226                                                 "MAC/VLAN filter alloc failed\n");
1227                                         rc = -ENOMEM;
1228                                         goto exit;
1229                                 }
1230                                 STAILQ_INSERT_TAIL(&vnic->filter, new_filter,
1231                                                    next);
1232                                 /* Inherit MAC from the previous filter */
1233                                 new_filter->mac_index = filter->mac_index;
1234                                 memcpy(new_filter->l2_addr, filter->l2_addr,
1235                                        ETHER_ADDR_LEN);
1236                                 /* MAC + VLAN ID filter */
1237                                 new_filter->l2_ovlan = vlan_id;
1238                                 new_filter->l2_ovlan_mask = 0xF000;
1239                                 new_filter->enables |= en;
1240                                 rc = bnxt_hwrm_set_filter(bp, vnic->fw_vnic_id,
1241                                                           new_filter);
1242                                 if (rc)
1243                                         goto exit;
1244                                 RTE_LOG(INFO, PMD,
1245                                         "Added Vlan filter for %d\n", vlan_id);
1246 cont:
1247                                 filter = temp_filter;
1248                         }
1249                 }
1250         }
1251 exit:
1252         return rc;
1253 }
1254
1255 static int bnxt_vlan_filter_set_op(struct rte_eth_dev *eth_dev,
1256                                    uint16_t vlan_id, int on)
1257 {
1258         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
1259
1260         /* These operations apply to ALL existing MAC/VLAN filters */
1261         if (on)
1262                 return bnxt_add_vlan_filter(bp, vlan_id);
1263         else
1264                 return bnxt_del_vlan_filter(bp, vlan_id);
1265 }
1266
1267 static void
1268 bnxt_vlan_offload_set_op(struct rte_eth_dev *dev, int mask)
1269 {
1270         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1271         unsigned int i;
1272
1273         if (mask & ETH_VLAN_FILTER_MASK) {
1274                 if (!dev->data->dev_conf.rxmode.hw_vlan_filter) {
1275                         /* Remove any VLAN filters programmed */
1276                         for (i = 0; i < 4095; i++)
1277                                 bnxt_del_vlan_filter(bp, i);
1278                 }
1279                 RTE_LOG(INFO, PMD, "VLAN Filtering: %d\n",
1280                         dev->data->dev_conf.rxmode.hw_vlan_filter);
1281         }
1282
1283         if (mask & ETH_VLAN_STRIP_MASK) {
1284                 /* Enable or disable VLAN stripping */
1285                 for (i = 0; i < bp->nr_vnics; i++) {
1286                         struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
1287                         if (dev->data->dev_conf.rxmode.hw_vlan_strip)
1288                                 vnic->vlan_strip = true;
1289                         else
1290                                 vnic->vlan_strip = false;
1291                         bnxt_hwrm_vnic_cfg(bp, vnic);
1292                 }
1293                 RTE_LOG(INFO, PMD, "VLAN Strip Offload: %d\n",
1294                         dev->data->dev_conf.rxmode.hw_vlan_strip);
1295         }
1296
1297         if (mask & ETH_VLAN_EXTEND_MASK)
1298                 RTE_LOG(ERR, PMD, "Extend VLAN Not supported\n");
1299 }
1300
1301 static void
1302 bnxt_set_default_mac_addr_op(struct rte_eth_dev *dev, struct ether_addr *addr)
1303 {
1304         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1305         /* Default Filter is tied to VNIC 0 */
1306         struct bnxt_vnic_info *vnic = &bp->vnic_info[0];
1307         struct bnxt_filter_info *filter;
1308         int rc;
1309
1310         if (BNXT_VF(bp))
1311                 return;
1312
1313         memcpy(bp->mac_addr, addr, sizeof(bp->mac_addr));
1314         memcpy(&dev->data->mac_addrs[0], bp->mac_addr, ETHER_ADDR_LEN);
1315
1316         STAILQ_FOREACH(filter, &vnic->filter, next) {
1317                 /* Default Filter is at Index 0 */
1318                 if (filter->mac_index != 0)
1319                         continue;
1320                 rc = bnxt_hwrm_clear_filter(bp, filter);
1321                 if (rc)
1322                         break;
1323                 memcpy(filter->l2_addr, bp->mac_addr, ETHER_ADDR_LEN);
1324                 memset(filter->l2_addr_mask, 0xff, ETHER_ADDR_LEN);
1325                 filter->flags |= HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_RX;
1326                 filter->enables |=
1327                         HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR |
1328                         HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR_MASK;
1329                 rc = bnxt_hwrm_set_filter(bp, vnic->fw_vnic_id, filter);
1330                 if (rc)
1331                         break;
1332                 filter->mac_index = 0;
1333                 RTE_LOG(DEBUG, PMD, "Set MAC addr\n");
1334         }
1335 }
1336
1337 static int
1338 bnxt_dev_set_mc_addr_list_op(struct rte_eth_dev *eth_dev,
1339                           struct ether_addr *mc_addr_set,
1340                           uint32_t nb_mc_addr)
1341 {
1342         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
1343         char *mc_addr_list = (char *)mc_addr_set;
1344         struct bnxt_vnic_info *vnic;
1345         uint32_t off = 0, i = 0;
1346
1347         vnic = &bp->vnic_info[0];
1348
1349         if (nb_mc_addr > BNXT_MAX_MC_ADDRS) {
1350                 vnic->flags |= BNXT_VNIC_INFO_ALLMULTI;
1351                 goto allmulti;
1352         }
1353
1354         /* TODO Check for Duplicate mcast addresses */
1355         vnic->flags &= ~BNXT_VNIC_INFO_ALLMULTI;
1356         for (i = 0; i < nb_mc_addr; i++) {
1357                 memcpy(vnic->mc_list + off, &mc_addr_list[i], ETHER_ADDR_LEN);
1358                 off += ETHER_ADDR_LEN;
1359         }
1360
1361         vnic->mc_addr_cnt = i;
1362
1363 allmulti:
1364         return bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic);
1365 }
1366
1367 static int
1368 bnxt_fw_version_get(struct rte_eth_dev *dev, char *fw_version, size_t fw_size)
1369 {
1370         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1371         uint8_t fw_major = (bp->fw_ver >> 24) & 0xff;
1372         uint8_t fw_minor = (bp->fw_ver >> 16) & 0xff;
1373         uint8_t fw_updt = (bp->fw_ver >> 8) & 0xff;
1374         int ret;
1375
1376         ret = snprintf(fw_version, fw_size, "%d.%d.%d",
1377                         fw_major, fw_minor, fw_updt);
1378
1379         ret += 1; /* add the size of '\0' */
1380         if (fw_size < (uint32_t)ret)
1381                 return ret;
1382         else
1383                 return 0;
1384 }
1385
1386 static int bnxt_mtu_set_op(struct rte_eth_dev *eth_dev, uint16_t new_mtu)
1387 {
1388         struct bnxt *bp = eth_dev->data->dev_private;
1389         struct rte_eth_dev_info dev_info;
1390         uint32_t max_dev_mtu;
1391         uint32_t rc = 0;
1392         uint32_t i;
1393
1394         bnxt_dev_info_get_op(eth_dev, &dev_info);
1395         max_dev_mtu = dev_info.max_rx_pktlen -
1396                       ETHER_HDR_LEN - ETHER_CRC_LEN - VLAN_TAG_SIZE * 2;
1397
1398         if (new_mtu < ETHER_MIN_MTU || new_mtu > max_dev_mtu) {
1399                 RTE_LOG(ERR, PMD, "MTU requested must be within (%d, %d)\n",
1400                         ETHER_MIN_MTU, max_dev_mtu);
1401                 return -EINVAL;
1402         }
1403
1404
1405         if (new_mtu > ETHER_MTU) {
1406                 bp->flags |= BNXT_FLAG_JUMBO;
1407                 eth_dev->data->dev_conf.rxmode.jumbo_frame = 1;
1408         } else {
1409                 eth_dev->data->dev_conf.rxmode.jumbo_frame = 0;
1410                 bp->flags &= ~BNXT_FLAG_JUMBO;
1411         }
1412
1413         eth_dev->data->dev_conf.rxmode.max_rx_pkt_len =
1414                 new_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN + VLAN_TAG_SIZE * 2;
1415
1416         eth_dev->data->mtu = new_mtu;
1417         RTE_LOG(INFO, PMD, "New MTU is %d\n", eth_dev->data->mtu);
1418
1419         for (i = 0; i < bp->nr_vnics; i++) {
1420                 struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
1421
1422                 vnic->mru = bp->eth_dev->data->mtu + ETHER_HDR_LEN +
1423                                         ETHER_CRC_LEN + VLAN_TAG_SIZE * 2;
1424                 rc = bnxt_hwrm_vnic_cfg(bp, vnic);
1425                 if (rc)
1426                         break;
1427
1428                 rc = bnxt_hwrm_vnic_plcmode_cfg(bp, vnic);
1429                 if (rc)
1430                         return rc;
1431         }
1432
1433         return rc;
1434 }
1435
1436 /*
1437  * Initialization
1438  */
1439
1440 static const struct eth_dev_ops bnxt_dev_ops = {
1441         .dev_infos_get = bnxt_dev_info_get_op,
1442         .dev_close = bnxt_dev_close_op,
1443         .dev_configure = bnxt_dev_configure_op,
1444         .dev_start = bnxt_dev_start_op,
1445         .dev_stop = bnxt_dev_stop_op,
1446         .dev_set_link_up = bnxt_dev_set_link_up_op,
1447         .dev_set_link_down = bnxt_dev_set_link_down_op,
1448         .stats_get = bnxt_stats_get_op,
1449         .stats_reset = bnxt_stats_reset_op,
1450         .rx_queue_setup = bnxt_rx_queue_setup_op,
1451         .rx_queue_release = bnxt_rx_queue_release_op,
1452         .tx_queue_setup = bnxt_tx_queue_setup_op,
1453         .tx_queue_release = bnxt_tx_queue_release_op,
1454         .reta_update = bnxt_reta_update_op,
1455         .reta_query = bnxt_reta_query_op,
1456         .rss_hash_update = bnxt_rss_hash_update_op,
1457         .rss_hash_conf_get = bnxt_rss_hash_conf_get_op,
1458         .link_update = bnxt_link_update_op,
1459         .promiscuous_enable = bnxt_promiscuous_enable_op,
1460         .promiscuous_disable = bnxt_promiscuous_disable_op,
1461         .allmulticast_enable = bnxt_allmulticast_enable_op,
1462         .allmulticast_disable = bnxt_allmulticast_disable_op,
1463         .mac_addr_add = bnxt_mac_addr_add_op,
1464         .mac_addr_remove = bnxt_mac_addr_remove_op,
1465         .flow_ctrl_get = bnxt_flow_ctrl_get_op,
1466         .flow_ctrl_set = bnxt_flow_ctrl_set_op,
1467         .udp_tunnel_port_add  = bnxt_udp_tunnel_port_add_op,
1468         .udp_tunnel_port_del  = bnxt_udp_tunnel_port_del_op,
1469         .vlan_filter_set = bnxt_vlan_filter_set_op,
1470         .vlan_offload_set = bnxt_vlan_offload_set_op,
1471         .mtu_set = bnxt_mtu_set_op,
1472         .mac_addr_set = bnxt_set_default_mac_addr_op,
1473         .xstats_get = bnxt_dev_xstats_get_op,
1474         .xstats_get_names = bnxt_dev_xstats_get_names_op,
1475         .xstats_reset = bnxt_dev_xstats_reset_op,
1476         .fw_version_get = bnxt_fw_version_get,
1477         .set_mc_addr_list = bnxt_dev_set_mc_addr_list_op,
1478 };
1479
1480 static bool bnxt_vf_pciid(uint16_t id)
1481 {
1482         if (id == BROADCOM_DEV_ID_57304_VF ||
1483             id == BROADCOM_DEV_ID_57406_VF ||
1484             id == BROADCOM_DEV_ID_5731X_VF ||
1485             id == BROADCOM_DEV_ID_5741X_VF ||
1486             id == BROADCOM_DEV_ID_57414_VF)
1487                 return true;
1488         return false;
1489 }
1490
1491 static int bnxt_init_board(struct rte_eth_dev *eth_dev)
1492 {
1493         struct bnxt *bp = eth_dev->data->dev_private;
1494         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
1495         int rc;
1496
1497         /* enable device (incl. PCI PM wakeup), and bus-mastering */
1498         if (!pci_dev->mem_resource[0].addr) {
1499                 RTE_LOG(ERR, PMD,
1500                         "Cannot find PCI device base address, aborting\n");
1501                 rc = -ENODEV;
1502                 goto init_err_disable;
1503         }
1504
1505         bp->eth_dev = eth_dev;
1506         bp->pdev = pci_dev;
1507
1508         bp->bar0 = (void *)pci_dev->mem_resource[0].addr;
1509         if (!bp->bar0) {
1510                 RTE_LOG(ERR, PMD, "Cannot map device registers, aborting\n");
1511                 rc = -ENOMEM;
1512                 goto init_err_release;
1513         }
1514         return 0;
1515
1516 init_err_release:
1517         if (bp->bar0)
1518                 bp->bar0 = NULL;
1519
1520 init_err_disable:
1521
1522         return rc;
1523 }
1524
1525 static int bnxt_dev_uninit(struct rte_eth_dev *eth_dev);
1526
1527 #define ALLOW_FUNC(x)   \
1528         { \
1529                 typeof(x) arg = (x); \
1530                 bp->pf.vf_req_fwd[((arg) >> 5)] &= \
1531                 ~rte_cpu_to_le_32(1 << ((arg) & 0x1f)); \
1532         }
1533 static int
1534 bnxt_dev_init(struct rte_eth_dev *eth_dev)
1535 {
1536         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
1537         char mz_name[RTE_MEMZONE_NAMESIZE];
1538         const struct rte_memzone *mz = NULL;
1539         static int version_printed;
1540         uint32_t total_alloc_len;
1541         phys_addr_t mz_phys_addr;
1542         struct bnxt *bp;
1543         int rc;
1544
1545         if (version_printed++ == 0)
1546                 RTE_LOG(INFO, PMD, "%s\n", bnxt_version);
1547
1548         rte_eth_copy_pci_info(eth_dev, pci_dev);
1549         eth_dev->data->dev_flags |= RTE_ETH_DEV_DETACHABLE;
1550
1551         bp = eth_dev->data->dev_private;
1552         bp->dev_stopped = 1;
1553
1554         if (bnxt_vf_pciid(pci_dev->id.device_id))
1555                 bp->flags |= BNXT_FLAG_VF;
1556
1557         rc = bnxt_init_board(eth_dev);
1558         if (rc) {
1559                 RTE_LOG(ERR, PMD,
1560                         "Board initialization failed rc: %x\n", rc);
1561                 goto error;
1562         }
1563         eth_dev->dev_ops = &bnxt_dev_ops;
1564         eth_dev->rx_pkt_burst = &bnxt_recv_pkts;
1565         eth_dev->tx_pkt_burst = &bnxt_xmit_pkts;
1566
1567         if (BNXT_PF(bp) && pci_dev->id.device_id != BROADCOM_DEV_ID_NS2) {
1568                 snprintf(mz_name, RTE_MEMZONE_NAMESIZE,
1569                          "bnxt_%04x:%02x:%02x:%02x-%s", pci_dev->addr.domain,
1570                          pci_dev->addr.bus, pci_dev->addr.devid,
1571                          pci_dev->addr.function, "rx_port_stats");
1572                 mz_name[RTE_MEMZONE_NAMESIZE - 1] = 0;
1573                 mz = rte_memzone_lookup(mz_name);
1574                 total_alloc_len = RTE_CACHE_LINE_ROUNDUP(
1575                                 sizeof(struct rx_port_stats) + 512);
1576                 if (!mz) {
1577                         mz = rte_memzone_reserve(mz_name, total_alloc_len,
1578                                                  SOCKET_ID_ANY,
1579                                                  RTE_MEMZONE_2MB |
1580                                                  RTE_MEMZONE_SIZE_HINT_ONLY);
1581                         if (mz == NULL)
1582                                 return -ENOMEM;
1583                 }
1584                 memset(mz->addr, 0, mz->len);
1585                 mz_phys_addr = mz->phys_addr;
1586                 if ((unsigned long)mz->addr == mz_phys_addr) {
1587                         RTE_LOG(WARNING, PMD,
1588                                 "Memzone physical address same as virtual.\n");
1589                         RTE_LOG(WARNING, PMD,
1590                                 "Using rte_mem_virt2phy()\n");
1591                         mz_phys_addr = rte_mem_virt2phy(mz->addr);
1592                         if (mz_phys_addr == 0) {
1593                                 RTE_LOG(ERR, PMD,
1594                                 "unable to map address to physical memory\n");
1595                                 return -ENOMEM;
1596                         }
1597                 }
1598
1599                 bp->rx_mem_zone = (const void *)mz;
1600                 bp->hw_rx_port_stats = mz->addr;
1601                 bp->hw_rx_port_stats_map = mz_phys_addr;
1602
1603                 snprintf(mz_name, RTE_MEMZONE_NAMESIZE,
1604                          "bnxt_%04x:%02x:%02x:%02x-%s", pci_dev->addr.domain,
1605                          pci_dev->addr.bus, pci_dev->addr.devid,
1606                          pci_dev->addr.function, "tx_port_stats");
1607                 mz_name[RTE_MEMZONE_NAMESIZE - 1] = 0;
1608                 mz = rte_memzone_lookup(mz_name);
1609                 total_alloc_len = RTE_CACHE_LINE_ROUNDUP(
1610                                 sizeof(struct tx_port_stats) + 512);
1611                 if (!mz) {
1612                         mz = rte_memzone_reserve(mz_name, total_alloc_len,
1613                                                  SOCKET_ID_ANY,
1614                                                  RTE_MEMZONE_2MB |
1615                                                  RTE_MEMZONE_SIZE_HINT_ONLY);
1616                         if (mz == NULL)
1617                                 return -ENOMEM;
1618                 }
1619                 memset(mz->addr, 0, mz->len);
1620                 mz_phys_addr = mz->phys_addr;
1621                 if ((unsigned long)mz->addr == mz_phys_addr) {
1622                         RTE_LOG(WARNING, PMD,
1623                                 "Memzone physical address same as virtual.\n");
1624                         RTE_LOG(WARNING, PMD,
1625                                 "Using rte_mem_virt2phy()\n");
1626                         mz_phys_addr = rte_mem_virt2phy(mz->addr);
1627                         if (mz_phys_addr == 0) {
1628                                 RTE_LOG(ERR, PMD,
1629                                 "unable to map address to physical memory\n");
1630                                 return -ENOMEM;
1631                         }
1632                 }
1633
1634                 bp->tx_mem_zone = (const void *)mz;
1635                 bp->hw_tx_port_stats = mz->addr;
1636                 bp->hw_tx_port_stats_map = mz_phys_addr;
1637
1638                 bp->flags |= BNXT_FLAG_PORT_STATS;
1639         }
1640
1641         rc = bnxt_alloc_hwrm_resources(bp);
1642         if (rc) {
1643                 RTE_LOG(ERR, PMD,
1644                         "hwrm resource allocation failure rc: %x\n", rc);
1645                 goto error_free;
1646         }
1647         rc = bnxt_hwrm_ver_get(bp);
1648         if (rc)
1649                 goto error_free;
1650         bnxt_hwrm_queue_qportcfg(bp);
1651
1652         bnxt_hwrm_func_qcfg(bp);
1653
1654         /* Get the MAX capabilities for this function */
1655         rc = bnxt_hwrm_func_qcaps(bp);
1656         if (rc) {
1657                 RTE_LOG(ERR, PMD, "hwrm query capability failure rc: %x\n", rc);
1658                 goto error_free;
1659         }
1660         if (bp->max_tx_rings == 0) {
1661                 RTE_LOG(ERR, PMD, "No TX rings available!\n");
1662                 rc = -EBUSY;
1663                 goto error_free;
1664         }
1665         eth_dev->data->mac_addrs = rte_zmalloc("bnxt_mac_addr_tbl",
1666                                         ETHER_ADDR_LEN * MAX_NUM_MAC_ADDR, 0);
1667         if (eth_dev->data->mac_addrs == NULL) {
1668                 RTE_LOG(ERR, PMD,
1669                         "Failed to alloc %u bytes needed to store MAC addr tbl",
1670                         ETHER_ADDR_LEN * MAX_NUM_MAC_ADDR);
1671                 rc = -ENOMEM;
1672                 goto error_free;
1673         }
1674         /* Copy the permanent MAC from the qcap response address now. */
1675         memcpy(bp->mac_addr, bp->dflt_mac_addr, sizeof(bp->mac_addr));
1676         memcpy(&eth_dev->data->mac_addrs[0], bp->mac_addr, ETHER_ADDR_LEN);
1677         bp->grp_info = rte_zmalloc("bnxt_grp_info",
1678                                 sizeof(*bp->grp_info) * bp->max_ring_grps, 0);
1679         if (!bp->grp_info) {
1680                 RTE_LOG(ERR, PMD,
1681                         "Failed to alloc %zu bytes needed to store group info table\n",
1682                         sizeof(*bp->grp_info) * bp->max_ring_grps);
1683                 rc = -ENOMEM;
1684                 goto error_free;
1685         }
1686
1687         /* Forward all requests if firmware is new enough */
1688         if (((bp->fw_ver >= ((20 << 24) | (6 << 16) | (100 << 8))) &&
1689             (bp->fw_ver < ((20 << 24) | (7 << 16)))) ||
1690             ((bp->fw_ver >= ((20 << 24) | (8 << 16))))) {
1691                 memset(bp->pf.vf_req_fwd, 0xff, sizeof(bp->pf.vf_req_fwd));
1692         } else {
1693                 RTE_LOG(WARNING, PMD,
1694                         "Firmware too old for VF mailbox functionality\n");
1695                 memset(bp->pf.vf_req_fwd, 0, sizeof(bp->pf.vf_req_fwd));
1696         }
1697
1698         /*
1699          * The following are used for driver cleanup.  If we disallow these,
1700          * VF drivers can't clean up cleanly.
1701          */
1702         ALLOW_FUNC(HWRM_FUNC_DRV_UNRGTR);
1703         ALLOW_FUNC(HWRM_VNIC_FREE);
1704         ALLOW_FUNC(HWRM_RING_FREE);
1705         ALLOW_FUNC(HWRM_RING_GRP_FREE);
1706         ALLOW_FUNC(HWRM_VNIC_RSS_COS_LB_CTX_FREE);
1707         ALLOW_FUNC(HWRM_CFA_L2_FILTER_FREE);
1708         ALLOW_FUNC(HWRM_STAT_CTX_FREE);
1709         rc = bnxt_hwrm_func_driver_register(bp);
1710         if (rc) {
1711                 RTE_LOG(ERR, PMD,
1712                         "Failed to register driver");
1713                 rc = -EBUSY;
1714                 goto error_free;
1715         }
1716
1717         RTE_LOG(INFO, PMD,
1718                 DRV_MODULE_NAME " found at mem %" PRIx64 ", node addr %pM\n",
1719                 pci_dev->mem_resource[0].phys_addr,
1720                 pci_dev->mem_resource[0].addr);
1721
1722         rc = bnxt_hwrm_func_reset(bp);
1723         if (rc) {
1724                 RTE_LOG(ERR, PMD, "hwrm chip reset failure rc: %x\n", rc);
1725                 rc = -1;
1726                 goto error_free;
1727         }
1728
1729         if (BNXT_PF(bp)) {
1730                 //if (bp->pf.active_vfs) {
1731                         // TODO: Deallocate VF resources?
1732                 //}
1733                 if (bp->pdev->max_vfs) {
1734                         rc = bnxt_hwrm_allocate_vfs(bp, bp->pdev->max_vfs);
1735                         if (rc) {
1736                                 RTE_LOG(ERR, PMD, "Failed to allocate VFs\n");
1737                                 goto error_free;
1738                         }
1739                 } else {
1740                         rc = bnxt_hwrm_allocate_pf_only(bp);
1741                         if (rc) {
1742                                 RTE_LOG(ERR, PMD,
1743                                         "Failed to allocate PF resources\n");
1744                                 goto error_free;
1745                         }
1746                 }
1747         }
1748
1749         rc = bnxt_setup_int(bp);
1750         if (rc)
1751                 goto error_free;
1752
1753         rc = bnxt_alloc_mem(bp);
1754         if (rc)
1755                 goto error_free_int;
1756
1757         rc = bnxt_request_int(bp);
1758         if (rc)
1759                 goto error_free_int;
1760
1761         rc = bnxt_alloc_def_cp_ring(bp);
1762         if (rc)
1763                 goto error_free_int;
1764
1765         bnxt_enable_int(bp);
1766
1767         return 0;
1768
1769 error_free_int:
1770         bnxt_disable_int(bp);
1771         bnxt_free_def_cp_ring(bp);
1772         bnxt_hwrm_func_buf_unrgtr(bp);
1773         bnxt_free_int(bp);
1774         bnxt_free_mem(bp);
1775 error_free:
1776         bnxt_dev_uninit(eth_dev);
1777 error:
1778         return rc;
1779 }
1780
1781 static int
1782 bnxt_dev_uninit(struct rte_eth_dev *eth_dev) {
1783         struct bnxt *bp = eth_dev->data->dev_private;
1784         int rc;
1785
1786         bnxt_disable_int(bp);
1787         bnxt_free_int(bp);
1788         bnxt_free_mem(bp);
1789         if (eth_dev->data->mac_addrs != NULL) {
1790                 rte_free(eth_dev->data->mac_addrs);
1791                 eth_dev->data->mac_addrs = NULL;
1792         }
1793         if (bp->grp_info != NULL) {
1794                 rte_free(bp->grp_info);
1795                 bp->grp_info = NULL;
1796         }
1797         rc = bnxt_hwrm_func_driver_unregister(bp, 0);
1798         bnxt_free_hwrm_resources(bp);
1799         rte_memzone_free((const struct rte_memzone *)bp->tx_mem_zone);
1800         rte_memzone_free((const struct rte_memzone *)bp->rx_mem_zone);
1801         if (bp->dev_stopped == 0)
1802                 bnxt_dev_close_op(eth_dev);
1803         if (bp->pf.vf_info)
1804                 rte_free(bp->pf.vf_info);
1805         eth_dev->dev_ops = NULL;
1806         eth_dev->rx_pkt_burst = NULL;
1807         eth_dev->tx_pkt_burst = NULL;
1808
1809         return rc;
1810 }
1811
1812 int bnxt_rcv_msg_from_vf(struct bnxt *bp, uint16_t vf_id, void *msg)
1813 {
1814         struct rte_pmd_bnxt_mb_event_param cb_param;
1815
1816         cb_param.retval = RTE_PMD_BNXT_MB_EVENT_PROCEED;
1817         cb_param.vf_id = vf_id;
1818         cb_param.msg = msg;
1819
1820         _rte_eth_dev_callback_process(bp->eth_dev, RTE_ETH_EVENT_VF_MBOX,
1821                         &cb_param);
1822
1823         /* Default to approve */
1824         if (cb_param.retval == RTE_PMD_BNXT_MB_EVENT_PROCEED)
1825                 cb_param.retval = RTE_PMD_BNXT_MB_EVENT_NOOP_ACK;
1826
1827         return cb_param.retval == RTE_PMD_BNXT_MB_EVENT_NOOP_ACK ? true : false;
1828 }
1829
1830 static int bnxt_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
1831         struct rte_pci_device *pci_dev)
1832 {
1833         return rte_eth_dev_pci_generic_probe(pci_dev, sizeof(struct bnxt),
1834                 bnxt_dev_init);
1835 }
1836
1837 static int bnxt_pci_remove(struct rte_pci_device *pci_dev)
1838 {
1839         return rte_eth_dev_pci_generic_remove(pci_dev, bnxt_dev_uninit);
1840 }
1841
1842 static struct rte_pci_driver bnxt_rte_pmd = {
1843         .id_table = bnxt_pci_id_map,
1844         .drv_flags = RTE_PCI_DRV_NEED_MAPPING |
1845                 RTE_PCI_DRV_INTR_LSC,
1846         .probe = bnxt_pci_probe,
1847         .remove = bnxt_pci_remove,
1848 };
1849
1850 RTE_PMD_REGISTER_PCI(net_bnxt, bnxt_rte_pmd);
1851 RTE_PMD_REGISTER_PCI_TABLE(net_bnxt, bnxt_pci_id_map);
1852 RTE_PMD_REGISTER_KMOD_DEP(net_bnxt, "* igb_uio | uio_pci_generic | vfio-pci");