drivers/net/bnxt/bnxt_ethdev.c

   1 /*-
   2  *   BSD LICENSE
   3  *
   4  *   Copyright(c) Broadcom Limited.
   5  *   All rights reserved.
   6  *
   7  *   Redistribution and use in source and binary forms, with or without
   8  *   modification, are permitted provided that the following conditions
   9  *   are met:
  10  *
  11  *     * Redistributions of source code must retain the above copyright
  12  *       notice, this list of conditions and the following disclaimer.
  13  *     * Redistributions in binary form must reproduce the above copyright
  14  *       notice, this list of conditions and the following disclaimer in
  15  *       the documentation and/or other materials provided with the
  16  *       distribution.
  17  *     * Neither the name of Broadcom Corporation nor the names of its
  18  *       contributors may be used to endorse or promote products derived
  19  *       from this software without specific prior written permission.
  20  *
  21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32  */
  33
  34 #include <inttypes.h>
  35 #include <stdbool.h>
  36
  37 #include <rte_dev.h>
  38 #include <rte_ethdev.h>
  39 #include <rte_ethdev_pci.h>
  40 #include <rte_malloc.h>
  41 #include <rte_cycles.h>
  42
  43 #include "bnxt.h"
  44 #include "bnxt_cpr.h"
  45 #include "bnxt_filter.h"
  46 #include "bnxt_hwrm.h"
  47 #include "bnxt_irq.h"
  48 #include "bnxt_ring.h"
  49 #include "bnxt_rxq.h"
  50 #include "bnxt_rxr.h"
  51 #include "bnxt_stats.h"
  52 #include "bnxt_txq.h"
  53 #include "bnxt_txr.h"
  54 #include "bnxt_vnic.h"
  55 #include "hsi_struct_def_dpdk.h"
  56
  57 #define DRV_MODULE_NAME         "bnxt"
  58 static const char bnxt_version[] =
  59         "Broadcom Cumulus driver " DRV_MODULE_NAME "\n";
  60
  61 #define PCI_VENDOR_ID_BROADCOM 0x14E4
  62
  63 #define BROADCOM_DEV_ID_STRATUS_NIC 0x1614
  64 #define BROADCOM_DEV_ID_57414_VF 0x16c1
  65 #define BROADCOM_DEV_ID_57301 0x16c8
  66 #define BROADCOM_DEV_ID_57302 0x16c9
  67 #define BROADCOM_DEV_ID_57304_PF 0x16ca
  68 #define BROADCOM_DEV_ID_57304_VF 0x16cb
  69 #define BROADCOM_DEV_ID_57417_MF 0x16cc
  70 #define BROADCOM_DEV_ID_NS2 0x16cd
  71 #define BROADCOM_DEV_ID_57311 0x16ce
  72 #define BROADCOM_DEV_ID_57312 0x16cf
  73 #define BROADCOM_DEV_ID_57402 0x16d0
  74 #define BROADCOM_DEV_ID_57404 0x16d1
  75 #define BROADCOM_DEV_ID_57406_PF 0x16d2
  76 #define BROADCOM_DEV_ID_57406_VF 0x16d3
  77 #define BROADCOM_DEV_ID_57402_MF 0x16d4
  78 #define BROADCOM_DEV_ID_57407_RJ45 0x16d5
  79 #define BROADCOM_DEV_ID_57412 0x16d6
  80 #define BROADCOM_DEV_ID_57414 0x16d7
  81 #define BROADCOM_DEV_ID_57416_RJ45 0x16d8
  82 #define BROADCOM_DEV_ID_57417_RJ45 0x16d9
  83 #define BROADCOM_DEV_ID_5741X_VF 0x16dc
  84 #define BROADCOM_DEV_ID_57412_MF 0x16de
  85 #define BROADCOM_DEV_ID_57314 0x16df
  86 #define BROADCOM_DEV_ID_57317_RJ45 0x16e0
  87 #define BROADCOM_DEV_ID_5731X_VF 0x16e1
  88 #define BROADCOM_DEV_ID_57417_SFP 0x16e2
  89 #define BROADCOM_DEV_ID_57416_SFP 0x16e3
  90 #define BROADCOM_DEV_ID_57317_SFP 0x16e4
  91 #define BROADCOM_DEV_ID_57404_MF 0x16e7
  92 #define BROADCOM_DEV_ID_57406_MF 0x16e8
  93 #define BROADCOM_DEV_ID_57407_SFP 0x16e9
  94 #define BROADCOM_DEV_ID_57407_MF 0x16ea
  95 #define BROADCOM_DEV_ID_57414_MF 0x16ec
  96 #define BROADCOM_DEV_ID_57416_MF 0x16ee
  97
  98 static const struct rte_pci_id bnxt_pci_id_map[] = {
  99         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_STRATUS_NIC) },
 100         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57414_VF) },
 101         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57301) },
 102         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57302) },
 103         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57304_PF) },
 104         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57304_VF) },
 105         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_NS2) },
 106         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57402) },
 107         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57404) },
 108         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57406_PF) },
 109         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57406_VF) },
 110         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57402_MF) },
 111         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57407_RJ45) },
 112         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57404_MF) },
 113         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57406_MF) },
 114         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57407_SFP) },
 115         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57407_MF) },
 116         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_5741X_VF) },
 117         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_5731X_VF) },
 118         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57314) },
 119         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57417_MF) },
 120         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57311) },
 121         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57312) },
 122         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57412) },
 123         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57414) },
 124         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57416_RJ45) },
 125         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57417_RJ45) },
 126         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57412_MF) },
 127         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57317_RJ45) },
 128         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57417_SFP) },
 129         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57416_SFP) },
 130         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57317_SFP) },
 131         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57414_MF) },
 132         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57416_MF) },
 133         { .vendor_id = 0, /* sentinel */ },
 134 };
 135
 136 #define BNXT_ETH_RSS_SUPPORT (  \
 137         ETH_RSS_IPV4 |          \
 138         ETH_RSS_NONFRAG_IPV4_TCP |      \
 139         ETH_RSS_NONFRAG_IPV4_UDP |      \
 140         ETH_RSS_IPV6 |          \
 141         ETH_RSS_NONFRAG_IPV6_TCP |      \
 142         ETH_RSS_NONFRAG_IPV6_UDP)
 143
 144 static void bnxt_vlan_offload_set_op(struct rte_eth_dev *dev, int mask);
 145 /***********************/
 146
 147 /*
 148  * High level utility functions
 149  */
 150
 151 static void bnxt_free_mem(struct bnxt *bp)
 152 {
 153         bnxt_free_filter_mem(bp);
 154         bnxt_free_vnic_attributes(bp);
 155         bnxt_free_vnic_mem(bp);
 156
 157         bnxt_free_stats(bp);
 158         bnxt_free_tx_rings(bp);
 159         bnxt_free_rx_rings(bp);
 160         bnxt_free_def_cp_ring(bp);
 161 }
 162
 163 static int bnxt_alloc_mem(struct bnxt *bp)
 164 {
 165         int rc;
 166
 167         /* Default completion ring */
 168         rc = bnxt_init_def_ring_struct(bp, SOCKET_ID_ANY);
 169         if (rc)
 170                 goto alloc_mem_err;
 171
 172         rc = bnxt_alloc_rings(bp, 0, NULL, NULL,
 173                               bp->def_cp_ring, "def_cp");
 174         if (rc)
 175                 goto alloc_mem_err;
 176
 177         rc = bnxt_alloc_vnic_mem(bp);
 178         if (rc)
 179                 goto alloc_mem_err;
 180
 181         rc = bnxt_alloc_vnic_attributes(bp);
 182         if (rc)
 183                 goto alloc_mem_err;
 184
 185         rc = bnxt_alloc_filter_mem(bp);
 186         if (rc)
 187                 goto alloc_mem_err;
 188
 189         return 0;
 190
 191 alloc_mem_err:
 192         bnxt_free_mem(bp);
 193         return rc;
 194 }
 195
 196 static int bnxt_init_chip(struct bnxt *bp)
 197 {
 198         unsigned int i, rss_idx, fw_idx;
 199         struct rte_eth_link new;
 200         int rc;
 201
 202         rc = bnxt_alloc_all_hwrm_stat_ctxs(bp);
 203         if (rc) {
 204                 RTE_LOG(ERR, PMD, "HWRM stat ctx alloc failure rc: %x\n", rc);
 205                 goto err_out;
 206         }
 207
 208         rc = bnxt_alloc_hwrm_rings(bp);
 209         if (rc) {
 210                 RTE_LOG(ERR, PMD, "HWRM ring alloc failure rc: %x\n", rc);
 211                 goto err_out;
 212         }
 213
 214         rc = bnxt_alloc_all_hwrm_ring_grps(bp);
 215         if (rc) {
 216                 RTE_LOG(ERR, PMD, "HWRM ring grp alloc failure: %x\n", rc);
 217                 goto err_out;
 218         }
 219
 220         rc = bnxt_mq_rx_configure(bp);
 221         if (rc) {
 222                 RTE_LOG(ERR, PMD, "MQ mode configure failure rc: %x\n", rc);
 223                 goto err_out;
 224         }
 225
 226         /* VNIC configuration */
 227         for (i = 0; i < bp->nr_vnics; i++) {
 228                 struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
 229
 230                 rc = bnxt_hwrm_vnic_alloc(bp, vnic);
 231                 if (rc) {
 232                         RTE_LOG(ERR, PMD, "HWRM vnic %d alloc failure rc: %x\n",
 233                                 i, rc);
 234                         goto err_out;
 235                 }
 236
 237                 rc = bnxt_hwrm_vnic_ctx_alloc(bp, vnic);
 238                 if (rc) {
 239                         RTE_LOG(ERR, PMD,
 240                                 "HWRM vnic %d ctx alloc failure rc: %x\n",
 241                                 i, rc);
 242                         goto err_out;
 243                 }
 244
 245                 rc = bnxt_hwrm_vnic_cfg(bp, vnic);
 246                 if (rc) {
 247                         RTE_LOG(ERR, PMD, "HWRM vnic %d cfg failure rc: %x\n",
 248                                 i, rc);
 249                         goto err_out;
 250                 }
 251
 252                 rc = bnxt_set_hwrm_vnic_filters(bp, vnic);
 253                 if (rc) {
 254                         RTE_LOG(ERR, PMD,
 255                                 "HWRM vnic %d filter failure rc: %x\n",
 256                                 i, rc);
 257                         goto err_out;
 258                 }
 259                 if (vnic->rss_table && vnic->hash_type) {
 260                         /*
 261                          * Fill the RSS hash & redirection table with
 262                          * ring group ids for all VNICs
 263                          */
 264                         for (rss_idx = 0, fw_idx = 0;
 265                              rss_idx < HW_HASH_INDEX_SIZE;
 266                              rss_idx++, fw_idx++) {
 267                                 if (vnic->fw_grp_ids[fw_idx] ==
 268                                     INVALID_HW_RING_ID)
 269                                         fw_idx = 0;
 270                                 vnic->rss_table[rss_idx] =
 271                                                 vnic->fw_grp_ids[fw_idx];
 272                         }
 273                         rc = bnxt_hwrm_vnic_rss_cfg(bp, vnic);
 274                         if (rc) {
 275                                 RTE_LOG(ERR, PMD,
 276                                         "HWRM vnic %d set RSS failure rc: %x\n",
 277                                         i, rc);
 278                                 goto err_out;
 279                         }
 280                 }
 281         }
 282         rc = bnxt_hwrm_cfa_l2_set_rx_mask(bp, &bp->vnic_info[0]);
 283         if (rc) {
 284                 RTE_LOG(ERR, PMD,
 285                         "HWRM cfa l2 rx mask failure rc: %x\n", rc);
 286                 goto err_out;
 287         }
 288
 289         rc = bnxt_get_hwrm_link_config(bp, &new);
 290         if (rc) {
 291                 RTE_LOG(ERR, PMD, "HWRM Get link config failure rc: %x\n", rc);
 292                 goto err_out;
 293         }
 294
 295         if (!bp->link_info.link_up) {
 296                 rc = bnxt_set_hwrm_link_config(bp, true);
 297                 if (rc) {
 298                         RTE_LOG(ERR, PMD,
 299                                 "HWRM link config failure rc: %x\n", rc);
 300                         goto err_out;
 301                 }
 302         }
 303
 304         return 0;
 305
 306 err_out:
 307         bnxt_free_all_hwrm_resources(bp);
 308
 309         return rc;
 310 }
 311
 312 static int bnxt_shutdown_nic(struct bnxt *bp)
 313 {
 314         bnxt_free_all_hwrm_resources(bp);
 315         bnxt_free_all_filters(bp);
 316         bnxt_free_all_vnics(bp);
 317         return 0;
 318 }
 319
 320 static int bnxt_init_nic(struct bnxt *bp)
 321 {
 322         int rc;
 323
 324         bnxt_init_ring_grps(bp);
 325         bnxt_init_vnics(bp);
 326         bnxt_init_filters(bp);
 327
 328         rc = bnxt_init_chip(bp);
 329         if (rc)
 330                 return rc;
 331
 332         return 0;
 333 }
 334
 335 /*
 336  * Device configuration and status function
 337  */
 338
 339 static void bnxt_dev_info_get_op(struct rte_eth_dev *eth_dev,
 340                                   struct rte_eth_dev_info *dev_info)
 341 {
 342         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 343         uint16_t max_vnics, i, j, vpool, vrxq;
 344
 345         dev_info->pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
 346
 347         /* MAC Specifics */
 348         dev_info->max_mac_addrs = MAX_NUM_MAC_ADDR;
 349         dev_info->max_hash_mac_addrs = 0;
 350
 351         /* PF/VF specifics */
 352         if (BNXT_PF(bp))
 353                 dev_info->max_vfs = bp->pdev->max_vfs;
 354         dev_info->max_rx_queues = bp->max_rx_rings;
 355         dev_info->max_tx_queues = bp->max_tx_rings;
 356         dev_info->reta_size = bp->max_rsscos_ctx;
 357         max_vnics = bp->max_vnics;
 358
 359         /* Fast path specifics */
 360         dev_info->min_rx_bufsize = 1;
 361         dev_info->max_rx_pktlen = BNXT_MAX_MTU + ETHER_HDR_LEN + ETHER_CRC_LEN
 362                                   + VLAN_TAG_SIZE;
 363         dev_info->rx_offload_capa = 0;
 364         dev_info->tx_offload_capa = DEV_TX_OFFLOAD_IPV4_CKSUM |
 365                                         DEV_TX_OFFLOAD_TCP_CKSUM |
 366                                         DEV_TX_OFFLOAD_UDP_CKSUM |
 367                                         DEV_TX_OFFLOAD_TCP_TSO |
 368                                         DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM |
 369                                         DEV_TX_OFFLOAD_VXLAN_TNL_TSO |
 370                                         DEV_TX_OFFLOAD_GRE_TNL_TSO |
 371                                         DEV_TX_OFFLOAD_IPIP_TNL_TSO |
 372                                         DEV_TX_OFFLOAD_GENEVE_TNL_TSO;
 373
 374         /* *INDENT-OFF* */
 375         dev_info->default_rxconf = (struct rte_eth_rxconf) {
 376                 .rx_thresh = {
 377                         .pthresh = 8,
 378                         .hthresh = 8,
 379                         .wthresh = 0,
 380                 },
 381                 .rx_free_thresh = 32,
 382                 .rx_drop_en = 0,
 383         };
 384
 385         dev_info->default_txconf = (struct rte_eth_txconf) {
 386                 .tx_thresh = {
 387                         .pthresh = 32,
 388                         .hthresh = 0,
 389                         .wthresh = 0,
 390                 },
 391                 .tx_free_thresh = 32,
 392                 .tx_rs_thresh = 32,
 393                 .txq_flags = ETH_TXQ_FLAGS_NOMULTSEGS |
 394                              ETH_TXQ_FLAGS_NOOFFLOADS,
 395         };
 396         eth_dev->data->dev_conf.intr_conf.lsc = 1;
 397
 398         /* *INDENT-ON* */
 399
 400         /*
 401          * TODO: default_rxconf, default_txconf, rx_desc_lim, and tx_desc_lim
 402          *       need further investigation.
 403          */
 404
 405         /* VMDq resources */
 406         vpool = 64; /* ETH_64_POOLS */
 407         vrxq = 128; /* ETH_VMDQ_DCB_NUM_QUEUES */
 408         for (i = 0; i < 4; vpool >>= 1, i++) {
 409                 if (max_vnics > vpool) {
 410                         for (j = 0; j < 5; vrxq >>= 1, j++) {
 411                                 if (dev_info->max_rx_queues > vrxq) {
 412                                         if (vpool > vrxq)
 413                                                 vpool = vrxq;
 414                                         goto found;
 415                                 }
 416                         }
 417                         /* Not enough resources to support VMDq */
 418                         break;
 419                 }
 420         }
 421         /* Not enough resources to support VMDq */
 422         vpool = 0;
 423         vrxq = 0;
 424 found:
 425         dev_info->max_vmdq_pools = vpool;
 426         dev_info->vmdq_queue_num = vrxq;
 427
 428         dev_info->vmdq_pool_base = 0;
 429         dev_info->vmdq_queue_base = 0;
 430 }
 431
 432 /* Configure the device based on the configuration provided */
 433 static int bnxt_dev_configure_op(struct rte_eth_dev *eth_dev)
 434 {
 435         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 436
 437         bp->rx_queues = (void *)eth_dev->data->rx_queues;
 438         bp->tx_queues = (void *)eth_dev->data->tx_queues;
 439
 440         /* Inherit new configurations */
 441         bp->rx_nr_rings = eth_dev->data->nb_rx_queues;
 442         bp->tx_nr_rings = eth_dev->data->nb_tx_queues;
 443         bp->rx_cp_nr_rings = bp->rx_nr_rings;
 444         bp->tx_cp_nr_rings = bp->tx_nr_rings;
 445
 446         if (eth_dev->data->dev_conf.rxmode.jumbo_frame)
 447                 eth_dev->data->mtu =
 448                                 eth_dev->data->dev_conf.rxmode.max_rx_pkt_len -
 449                                 ETHER_HDR_LEN - ETHER_CRC_LEN - VLAN_TAG_SIZE;
 450         return 0;
 451 }
 452
 453 static inline int
 454 rte_bnxt_atomic_write_link_status(struct rte_eth_dev *eth_dev,
 455                                 struct rte_eth_link *link)
 456 {
 457         struct rte_eth_link *dst = &eth_dev->data->dev_link;
 458         struct rte_eth_link *src = link;
 459
 460         if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
 461                                         *(uint64_t *)src) == 0)
 462                 return 1;
 463
 464         return 0;
 465 }
 466
 467 static void bnxt_print_link_info(struct rte_eth_dev *eth_dev)
 468 {
 469         struct rte_eth_link *link = &eth_dev->data->dev_link;
 470
 471         if (link->link_status)
 472                 RTE_LOG(INFO, PMD, "Port %d Link Up - speed %u Mbps - %s\n",
 473                         (uint8_t)(eth_dev->data->port_id),
 474                         (uint32_t)link->link_speed,
 475                         (link->link_duplex == ETH_LINK_FULL_DUPLEX) ?
 476                         ("full-duplex") : ("half-duplex\n"));
 477         else
 478                 RTE_LOG(INFO, PMD, "Port %d Link Down\n",
 479                         (uint8_t)(eth_dev->data->port_id));
 480 }
 481
 482 static int bnxt_dev_lsc_intr_setup(struct rte_eth_dev *eth_dev)
 483 {
 484         bnxt_print_link_info(eth_dev);
 485         return 0;
 486 }
 487
 488 static int bnxt_dev_start_op(struct rte_eth_dev *eth_dev)
 489 {
 490         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 491         int vlan_mask = 0;
 492         int rc;
 493
 494         bp->dev_stopped = 0;
 495
 496         rc = bnxt_init_nic(bp);
 497         if (rc)
 498                 goto error;
 499
 500         bnxt_link_update_op(eth_dev, 0);
 501
 502         if (eth_dev->data->dev_conf.rxmode.hw_vlan_filter)
 503                 vlan_mask |= ETH_VLAN_FILTER_MASK;
 504         if (eth_dev->data->dev_conf.rxmode.hw_vlan_strip)
 505                 vlan_mask |= ETH_VLAN_STRIP_MASK;
 506         bnxt_vlan_offload_set_op(eth_dev, vlan_mask);
 507
 508         return 0;
 509
 510 error:
 511         bnxt_shutdown_nic(bp);
 512         bnxt_free_tx_mbufs(bp);
 513         bnxt_free_rx_mbufs(bp);
 514         return rc;
 515 }
 516
 517 static int bnxt_dev_set_link_up_op(struct rte_eth_dev *eth_dev)
 518 {
 519         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 520
 521         eth_dev->data->dev_link.link_status = 1;
 522         bnxt_set_hwrm_link_config(bp, true);
 523         return 0;
 524 }
 525
 526 static int bnxt_dev_set_link_down_op(struct rte_eth_dev *eth_dev)
 527 {
 528         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 529
 530         eth_dev->data->dev_link.link_status = 0;
 531         bnxt_set_hwrm_link_config(bp, false);
 532         return 0;
 533 }
 534
 535 /* Unload the driver, release resources */
 536 static void bnxt_dev_stop_op(struct rte_eth_dev *eth_dev)
 537 {
 538         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 539
 540         if (bp->eth_dev->data->dev_started) {
 541                 /* TBD: STOP HW queues DMA */
 542                 eth_dev->data->dev_link.link_status = 0;
 543         }
 544         bnxt_set_hwrm_link_config(bp, false);
 545         bnxt_hwrm_port_clr_stats(bp);
 546         bnxt_shutdown_nic(bp);
 547         bp->dev_stopped = 1;
 548 }
 549
 550 static void bnxt_dev_close_op(struct rte_eth_dev *eth_dev)
 551 {
 552         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 553
 554         if (bp->dev_stopped == 0)
 555                 bnxt_dev_stop_op(eth_dev);
 556
 557         bnxt_free_tx_mbufs(bp);
 558         bnxt_free_rx_mbufs(bp);
 559         bnxt_free_mem(bp);
 560         if (eth_dev->data->mac_addrs != NULL) {
 561                 rte_free(eth_dev->data->mac_addrs);
 562                 eth_dev->data->mac_addrs = NULL;
 563         }
 564         if (bp->grp_info != NULL) {
 565                 rte_free(bp->grp_info);
 566                 bp->grp_info = NULL;
 567         }
 568 }
 569
 570 static void bnxt_mac_addr_remove_op(struct rte_eth_dev *eth_dev,
 571                                     uint32_t index)
 572 {
 573         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 574         uint64_t pool_mask = eth_dev->data->mac_pool_sel[index];
 575         struct bnxt_vnic_info *vnic;
 576         struct bnxt_filter_info *filter, *temp_filter;
 577         int i;
 578
 579         /*
 580          * Loop through all VNICs from the specified filter flow pools to
 581          * remove the corresponding MAC addr filter
 582          */
 583         for (i = 0; i < MAX_FF_POOLS; i++) {
 584                 if (!(pool_mask & (1ULL << i)))
 585                         continue;
 586
 587                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
 588                         filter = STAILQ_FIRST(&vnic->filter);
 589                         while (filter) {
 590                                 temp_filter = STAILQ_NEXT(filter, next);
 591                                 if (filter->mac_index == index) {
 592                                         STAILQ_REMOVE(&vnic->filter, filter,
 593                                                       bnxt_filter_info, next);
 594                                         bnxt_hwrm_clear_filter(bp, filter);
 595                                         filter->mac_index = INVALID_MAC_INDEX;
 596                                         memset(&filter->l2_addr, 0,
 597                                                ETHER_ADDR_LEN);
 598                                         STAILQ_INSERT_TAIL(
 599                                                         &bp->free_filter_list,
 600                                                         filter, next);
 601                                 }
 602                                 filter = temp_filter;
 603                         }
 604                 }
 605         }
 606 }
 607
 608 static int bnxt_mac_addr_add_op(struct rte_eth_dev *eth_dev,
 609                                 struct ether_addr *mac_addr,
 610                                 uint32_t index, uint32_t pool)
 611 {
 612         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 613         struct bnxt_vnic_info *vnic = STAILQ_FIRST(&bp->ff_pool[pool]);
 614         struct bnxt_filter_info *filter;
 615
 616         if (BNXT_VF(bp)) {
 617                 RTE_LOG(ERR, PMD, "Cannot add MAC address to a VF interface\n");
 618                 return -ENOTSUP;
 619         }
 620
 621         if (!vnic) {
 622                 RTE_LOG(ERR, PMD, "VNIC not found for pool %d!\n", pool);
 623                 return -EINVAL;
 624         }
 625         /* Attach requested MAC address to the new l2_filter */
 626         STAILQ_FOREACH(filter, &vnic->filter, next) {
 627                 if (filter->mac_index == index) {
 628                         RTE_LOG(ERR, PMD,
 629                                 "MAC addr already existed for pool %d\n", pool);
 630                         return -EINVAL;
 631                 }
 632         }
 633         filter = bnxt_alloc_filter(bp);
 634         if (!filter) {
 635                 RTE_LOG(ERR, PMD, "L2 filter alloc failed\n");
 636                 return -ENODEV;
 637         }
 638         STAILQ_INSERT_TAIL(&vnic->filter, filter, next);
 639         filter->mac_index = index;
 640         memcpy(filter->l2_addr, mac_addr, ETHER_ADDR_LEN);
 641         return bnxt_hwrm_set_filter(bp, vnic->fw_vnic_id, filter);
 642 }
 643
 644 int bnxt_link_update_op(struct rte_eth_dev *eth_dev, int wait_to_complete)
 645 {
 646         int rc = 0;
 647         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 648         struct rte_eth_link new;
 649         unsigned int cnt = BNXT_LINK_WAIT_CNT;
 650
 651         memset(&new, 0, sizeof(new));
 652         do {
 653                 /* Retrieve link info from hardware */
 654                 rc = bnxt_get_hwrm_link_config(bp, &new);
 655                 if (rc) {
 656                         new.link_speed = ETH_LINK_SPEED_100M;
 657                         new.link_duplex = ETH_LINK_FULL_DUPLEX;
 658                         RTE_LOG(ERR, PMD,
 659                                 "Failed to retrieve link rc = 0x%x!\n", rc);
 660                         goto out;
 661                 }
 662                 rte_delay_ms(BNXT_LINK_WAIT_INTERVAL);
 663
 664                 if (!wait_to_complete)
 665                         break;
 666         } while (!new.link_status && cnt--);
 667
 668 out:
 669         /* Timed out or success */
 670         if (new.link_status != eth_dev->data->dev_link.link_status ||
 671         new.link_speed != eth_dev->data->dev_link.link_speed) {
 672                 rte_bnxt_atomic_write_link_status(eth_dev, &new);
 673                 bnxt_print_link_info(eth_dev);
 674         }
 675
 676         return rc;
 677 }
 678
 679 static void bnxt_promiscuous_enable_op(struct rte_eth_dev *eth_dev)
 680 {
 681         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 682         struct bnxt_vnic_info *vnic;
 683
 684         if (bp->vnic_info == NULL)
 685                 return;
 686
 687         vnic = &bp->vnic_info[0];
 688
 689         vnic->flags |= BNXT_VNIC_INFO_PROMISC;
 690         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic);
 691 }
 692
 693 static void bnxt_promiscuous_disable_op(struct rte_eth_dev *eth_dev)
 694 {
 695         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 696         struct bnxt_vnic_info *vnic;
 697
 698         if (bp->vnic_info == NULL)
 699                 return;
 700
 701         vnic = &bp->vnic_info[0];
 702
 703         vnic->flags &= ~BNXT_VNIC_INFO_PROMISC;
 704         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic);
 705 }
 706
 707 static void bnxt_allmulticast_enable_op(struct rte_eth_dev *eth_dev)
 708 {
 709         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 710         struct bnxt_vnic_info *vnic;
 711
 712         if (bp->vnic_info == NULL)
 713                 return;
 714
 715         vnic = &bp->vnic_info[0];
 716
 717         vnic->flags |= BNXT_VNIC_INFO_ALLMULTI;
 718         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic);
 719 }
 720
 721 static void bnxt_allmulticast_disable_op(struct rte_eth_dev *eth_dev)
 722 {
 723         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 724         struct bnxt_vnic_info *vnic;
 725
 726         if (bp->vnic_info == NULL)
 727                 return;
 728
 729         vnic = &bp->vnic_info[0];
 730
 731         vnic->flags &= ~BNXT_VNIC_INFO_ALLMULTI;
 732         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic);
 733 }
 734
 735 static int bnxt_reta_update_op(struct rte_eth_dev *eth_dev,
 736                             struct rte_eth_rss_reta_entry64 *reta_conf,
 737                             uint16_t reta_size)
 738 {
 739         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 740         struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
 741         struct bnxt_vnic_info *vnic;
 742         int i;
 743
 744         if (!(dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG))
 745                 return -EINVAL;
 746
 747         if (reta_size != HW_HASH_INDEX_SIZE) {
 748                 RTE_LOG(ERR, PMD, "The configured hash table lookup size "
 749                         "(%d) must equal the size supported by the hardware "
 750                         "(%d)\n", reta_size, HW_HASH_INDEX_SIZE);
 751                 return -EINVAL;
 752         }
 753         /* Update the RSS VNIC(s) */
 754         for (i = 0; i < MAX_FF_POOLS; i++) {
 755                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
 756                         memcpy(vnic->rss_table, reta_conf, reta_size);
 757
 758                         bnxt_hwrm_vnic_rss_cfg(bp, vnic);
 759                 }
 760         }
 761         return 0;
 762 }
 763
 764 static int bnxt_reta_query_op(struct rte_eth_dev *eth_dev,
 765                               struct rte_eth_rss_reta_entry64 *reta_conf,
 766                               uint16_t reta_size)
 767 {
 768         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 769         struct bnxt_vnic_info *vnic = &bp->vnic_info[0];
 770         struct rte_intr_handle *intr_handle
 771                 = &bp->pdev->intr_handle;
 772
 773         /* Retrieve from the default VNIC */
 774         if (!vnic)
 775                 return -EINVAL;
 776         if (!vnic->rss_table)
 777                 return -EINVAL;
 778
 779         if (reta_size != HW_HASH_INDEX_SIZE) {
 780                 RTE_LOG(ERR, PMD, "The configured hash table lookup size "
 781                         "(%d) must equal the size supported by the hardware "
 782                         "(%d)\n", reta_size, HW_HASH_INDEX_SIZE);
 783                 return -EINVAL;
 784         }
 785         /* EW - need to revisit here copying from u64 to u16 */
 786         memcpy(reta_conf, vnic->rss_table, reta_size);
 787
 788         if (rte_intr_allow_others(intr_handle)) {
 789                 if (eth_dev->data->dev_conf.intr_conf.lsc != 0)
 790                         bnxt_dev_lsc_intr_setup(eth_dev);
 791         }
 792
 793         return 0;
 794 }
 795
 796 static int bnxt_rss_hash_update_op(struct rte_eth_dev *eth_dev,
 797                                    struct rte_eth_rss_conf *rss_conf)
 798 {
 799         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 800         struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
 801         struct bnxt_vnic_info *vnic;
 802         uint16_t hash_type = 0;
 803         int i;
 804
 805         /*
 806          * If RSS enablement were different than dev_configure,
 807          * then return -EINVAL
 808          */
 809         if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) {
 810                 if (!rss_conf->rss_hf)
 811                         return -EINVAL;
 812         } else {
 813                 if (rss_conf->rss_hf & BNXT_ETH_RSS_SUPPORT)
 814                         return -EINVAL;
 815         }
 816         if (rss_conf->rss_hf & ETH_RSS_IPV4)
 817                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4;
 818         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV4_TCP)
 819                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4;
 820         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV4_UDP)
 821                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4;
 822         if (rss_conf->rss_hf & ETH_RSS_IPV6)
 823                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6;
 824         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV6_TCP)
 825                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6;
 826         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV6_UDP)
 827                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6;
 828
 829         /* Update the RSS VNIC(s) */
 830         for (i = 0; i < MAX_FF_POOLS; i++) {
 831                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
 832                         vnic->hash_type = hash_type;
 833
 834                         /*
 835                          * Use the supplied key if the key length is
 836                          * acceptable and the rss_key is not NULL
 837                          */
 838                         if (rss_conf->rss_key &&
 839                             rss_conf->rss_key_len <= HW_HASH_KEY_SIZE)
 840                                 memcpy(vnic->rss_hash_key, rss_conf->rss_key,
 841                                        rss_conf->rss_key_len);
 842
 843                         bnxt_hwrm_vnic_rss_cfg(bp, vnic);
 844                 }
 845         }
 846         return 0;
 847 }
 848
 849 static int bnxt_rss_hash_conf_get_op(struct rte_eth_dev *eth_dev,
 850                                      struct rte_eth_rss_conf *rss_conf)
 851 {
 852         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 853         struct bnxt_vnic_info *vnic = &bp->vnic_info[0];
 854         int len;
 855         uint32_t hash_types;
 856
 857         /* RSS configuration is the same for all VNICs */
 858         if (vnic && vnic->rss_hash_key) {
 859                 if (rss_conf->rss_key) {
 860                         len = rss_conf->rss_key_len <= HW_HASH_KEY_SIZE ?
 861                               rss_conf->rss_key_len : HW_HASH_KEY_SIZE;
 862                         memcpy(rss_conf->rss_key, vnic->rss_hash_key, len);
 863                 }
 864
 865                 hash_types = vnic->hash_type;
 866                 rss_conf->rss_hf = 0;
 867                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4) {
 868                         rss_conf->rss_hf |= ETH_RSS_IPV4;
 869                         hash_types &= ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4;
 870                 }
 871                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4) {
 872                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV4_TCP;
 873                         hash_types &=
 874                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4;
 875                 }
 876                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4) {
 877                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV4_UDP;
 878                         hash_types &=
 879                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4;
 880                 }
 881                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6) {
 882                         rss_conf->rss_hf |= ETH_RSS_IPV6;
 883                         hash_types &= ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6;
 884                 }
 885                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6) {
 886                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV6_TCP;
 887                         hash_types &=
 888                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6;
 889                 }
 890                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6) {
 891                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV6_UDP;
 892                         hash_types &=
 893                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6;
 894                 }
 895                 if (hash_types) {
 896                         RTE_LOG(ERR, PMD,
 897                                 "Unknwon RSS config from firmware (%08x), RSS disabled",
 898                                 vnic->hash_type);
 899                         return -ENOTSUP;
 900                 }
 901         } else {
 902                 rss_conf->rss_hf = 0;
 903         }
 904         return 0;
 905 }
 906
 907 static int bnxt_flow_ctrl_get_op(struct rte_eth_dev *dev,
 908                                struct rte_eth_fc_conf *fc_conf)
 909 {
 910         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
 911         struct rte_eth_link link_info;
 912         int rc;
 913
 914         rc = bnxt_get_hwrm_link_config(bp, &link_info);
 915         if (rc)
 916                 return rc;
 917
 918         memset(fc_conf, 0, sizeof(*fc_conf));
 919         if (bp->link_info.auto_pause)
 920                 fc_conf->autoneg = 1;
 921         switch (bp->link_info.pause) {
 922         case 0:
 923                 fc_conf->mode = RTE_FC_NONE;
 924                 break;
 925         case HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_TX:
 926                 fc_conf->mode = RTE_FC_TX_PAUSE;
 927                 break;
 928         case HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_RX:
 929                 fc_conf->mode = RTE_FC_RX_PAUSE;
 930                 break;
 931         case (HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_TX |
 932                         HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_RX):
 933                 fc_conf->mode = RTE_FC_FULL;
 934                 break;
 935         }
 936         return 0;
 937 }
 938
 939 static int bnxt_flow_ctrl_set_op(struct rte_eth_dev *dev,
 940                                struct rte_eth_fc_conf *fc_conf)
 941 {
 942         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
 943
 944         if (BNXT_NPAR_PF(bp) || BNXT_VF(bp)) {
 945                 RTE_LOG(ERR, PMD, "Flow Control Settings cannot be modified\n");
 946                 return -ENOTSUP;
 947         }
 948
 949         switch (fc_conf->mode) {
 950         case RTE_FC_NONE:
 951                 bp->link_info.auto_pause = 0;
 952                 bp->link_info.force_pause = 0;
 953                 break;
 954         case RTE_FC_RX_PAUSE:
 955                 if (fc_conf->autoneg) {
 956                         bp->link_info.auto_pause =
 957                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_RX;
 958                         bp->link_info.force_pause = 0;
 959                 } else {
 960                         bp->link_info.auto_pause = 0;
 961                         bp->link_info.force_pause =
 962                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_RX;
 963                 }
 964                 break;
 965         case RTE_FC_TX_PAUSE:
 966                 if (fc_conf->autoneg) {
 967                         bp->link_info.auto_pause =
 968                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_TX;
 969                         bp->link_info.force_pause = 0;
 970                 } else {
 971                         bp->link_info.auto_pause = 0;
 972                         bp->link_info.force_pause =
 973                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_TX;
 974                 }
 975                 break;
 976         case RTE_FC_FULL:
 977                 if (fc_conf->autoneg) {
 978                         bp->link_info.auto_pause =
 979                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_TX |
 980                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_RX;
 981                         bp->link_info.force_pause = 0;
 982                 } else {
 983                         bp->link_info.auto_pause = 0;
 984                         bp->link_info.force_pause =
 985                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_TX |
 986                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_RX;
 987                 }
 988                 break;
 989         }
 990         return bnxt_set_hwrm_link_config(bp, true);
 991 }
 992
 993 /* Add UDP tunneling port */
 994 static int
 995 bnxt_udp_tunnel_port_add_op(struct rte_eth_dev *eth_dev,
 996                          struct rte_eth_udp_tunnel *udp_tunnel)
 997 {
 998         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 999         uint16_t tunnel_type = 0;
1000         int rc = 0;
1001
1002         switch (udp_tunnel->prot_type) {
1003         case RTE_TUNNEL_TYPE_VXLAN:
1004                 if (bp->vxlan_port_cnt) {
1005                         RTE_LOG(ERR, PMD, "Tunnel Port %d already programmed\n",
1006                                 udp_tunnel->udp_port);
1007                         if (bp->vxlan_port != udp_tunnel->udp_port) {
1008                                 RTE_LOG(ERR, PMD, "Only one port allowed\n");
1009                                 return -ENOSPC;
1010                         }
1011                         bp->vxlan_port_cnt++;
1012                         return 0;
1013                 }
1014                 tunnel_type =
1015                         HWRM_TUNNEL_DST_PORT_ALLOC_INPUT_TUNNEL_TYPE_VXLAN;
1016                 bp->vxlan_port_cnt++;
1017                 break;
1018         case RTE_TUNNEL_TYPE_GENEVE:
1019                 if (bp->geneve_port_cnt) {
1020                         RTE_LOG(ERR, PMD, "Tunnel Port %d already programmed\n",
1021                                 udp_tunnel->udp_port);
1022                         if (bp->geneve_port != udp_tunnel->udp_port) {
1023                                 RTE_LOG(ERR, PMD, "Only one port allowed\n");
1024                                 return -ENOSPC;
1025                         }
1026                         bp->geneve_port_cnt++;
1027                         return 0;
1028                 }
1029                 tunnel_type =
1030                         HWRM_TUNNEL_DST_PORT_ALLOC_INPUT_TUNNEL_TYPE_GENEVE;
1031                 bp->geneve_port_cnt++;
1032                 break;
1033         default:
1034                 RTE_LOG(ERR, PMD, "Tunnel type is not supported\n");
1035                 return -ENOTSUP;
1036         }
1037         rc = bnxt_hwrm_tunnel_dst_port_alloc(bp, udp_tunnel->udp_port,
1038                                              tunnel_type);
1039         return rc;
1040 }
1041
1042 static int
1043 bnxt_udp_tunnel_port_del_op(struct rte_eth_dev *eth_dev,
1044                          struct rte_eth_udp_tunnel *udp_tunnel)
1045 {
1046         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
1047         uint16_t tunnel_type = 0;
1048         uint16_t port = 0;
1049         int rc = 0;
1050
1051         switch (udp_tunnel->prot_type) {
1052         case RTE_TUNNEL_TYPE_VXLAN:
1053                 if (!bp->vxlan_port_cnt) {
1054                         RTE_LOG(ERR, PMD, "No Tunnel port configured yet\n");
1055                         return -EINVAL;
1056                 }
1057                 if (bp->vxlan_port != udp_tunnel->udp_port) {
1058                         RTE_LOG(ERR, PMD, "Req Port: %d. Configured port: %d\n",
1059                                 udp_tunnel->udp_port, bp->vxlan_port);
1060                         return -EINVAL;
1061                 }
1062                 if (--bp->vxlan_port_cnt)
1063                         return 0;
1064
1065                 tunnel_type =
1066                         HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_VXLAN;
1067                 port = bp->vxlan_fw_dst_port_id;
1068                 break;
1069         case RTE_TUNNEL_TYPE_GENEVE:
1070                 if (!bp->geneve_port_cnt) {
1071                         RTE_LOG(ERR, PMD, "No Tunnel port configured yet\n");
1072                         return -EINVAL;
1073                 }
1074                 if (bp->geneve_port != udp_tunnel->udp_port) {
1075                         RTE_LOG(ERR, PMD, "Req Port: %d. Configured port: %d\n",
1076                                 udp_tunnel->udp_port, bp->geneve_port);
1077                         return -EINVAL;
1078                 }
1079                 if (--bp->geneve_port_cnt)
1080                         return 0;
1081
1082                 tunnel_type =
1083                         HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_GENEVE;
1084                 port = bp->geneve_fw_dst_port_id;
1085                 break;
1086         default:
1087                 RTE_LOG(ERR, PMD, "Tunnel type is not supported\n");
1088                 return -ENOTSUP;
1089         }
1090
1091         rc = bnxt_hwrm_tunnel_dst_port_free(bp, port, tunnel_type);
1092         if (!rc) {
1093                 if (tunnel_type ==
1094                     HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_VXLAN)
1095                         bp->vxlan_port = 0;
1096                 if (tunnel_type ==
1097                     HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_GENEVE)
1098                         bp->geneve_port = 0;
1099         }
1100         return rc;
1101 }
1102
1103 static int bnxt_del_vlan_filter(struct bnxt *bp, uint16_t vlan_id)
1104 {
1105         struct bnxt_filter_info *filter, *temp_filter, *new_filter;
1106         struct bnxt_vnic_info *vnic;
1107         unsigned int i;
1108         int rc = 0;
1109         uint32_t chk = HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN;
1110
1111         /* Cycle through all VNICs */
1112         for (i = 0; i < bp->nr_vnics; i++) {
1113                 /*
1114                  * For each VNIC and each associated filter(s)
1115                  * if VLAN exists && VLAN matches vlan_id
1116                  *      remove the MAC+VLAN filter
1117                  *      add a new MAC only filter
1118                  * else
1119                  *      VLAN filter doesn't exist, just skip and continue
1120                  */
1121                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
1122                         filter = STAILQ_FIRST(&vnic->filter);
1123                         while (filter) {
1124                                 temp_filter = STAILQ_NEXT(filter, next);
1125
1126                                 if (filter->enables & chk &&
1127                                     filter->l2_ovlan == vlan_id) {
1128                                         /* Must delete the filter */
1129                                         STAILQ_REMOVE(&vnic->filter, filter,
1130                                                       bnxt_filter_info, next);
1131                                         bnxt_hwrm_clear_filter(bp, filter);
1132                                         STAILQ_INSERT_TAIL(
1133                                                         &bp->free_filter_list,
1134                                                         filter, next);
1135
1136                                         /*
1137                                          * Need to examine to see if the MAC
1138                                          * filter already existed or not before
1139                                          * allocating a new one
1140                                          */
1141
1142                                         new_filter = bnxt_alloc_filter(bp);
1143                                         if (!new_filter) {
1144                                                 RTE_LOG(ERR, PMD,
1145                                                         "MAC/VLAN filter alloc failed\n");
1146                                                 rc = -ENOMEM;
1147                                                 goto exit;
1148                                         }
1149                                         STAILQ_INSERT_TAIL(&vnic->filter,
1150                                                            new_filter, next);
1151                                         /* Inherit MAC from previous filter */
1152                                         new_filter->mac_index =
1153                                                         filter->mac_index;
1154                                         memcpy(new_filter->l2_addr,
1155                                                filter->l2_addr, ETHER_ADDR_LEN);
1156                                         /* MAC only filter */
1157                                         rc = bnxt_hwrm_set_filter(bp,
1158                                                         vnic->fw_vnic_id,
1159                                                         new_filter);
1160                                         if (rc)
1161                                                 goto exit;
1162                                         RTE_LOG(INFO, PMD,
1163                                                 "Del Vlan filter for %d\n",
1164                                                 vlan_id);
1165                                 }
1166                                 filter = temp_filter;
1167                         }
1168                 }
1169         }
1170 exit:
1171         return rc;
1172 }
1173
1174 static int bnxt_add_vlan_filter(struct bnxt *bp, uint16_t vlan_id)
1175 {
1176         struct bnxt_filter_info *filter, *temp_filter, *new_filter;
1177         struct bnxt_vnic_info *vnic;
1178         unsigned int i;
1179         int rc = 0;
1180         uint32_t en = HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN |
1181                 HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN_MASK;
1182         uint32_t chk = HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN;
1183
1184         /* Cycle through all VNICs */
1185         for (i = 0; i < bp->nr_vnics; i++) {
1186                 /*
1187                  * For each VNIC and each associated filter(s)
1188                  * if VLAN exists:
1189                  *   if VLAN matches vlan_id
1190                  *      VLAN filter already exists, just skip and continue
1191                  *   else
1192                  *      add a new MAC+VLAN filter
1193                  * else
1194                  *   Remove the old MAC only filter
1195                  *    Add a new MAC+VLAN filter
1196                  */
1197                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
1198                         filter = STAILQ_FIRST(&vnic->filter);
1199                         while (filter) {
1200                                 temp_filter = STAILQ_NEXT(filter, next);
1201
1202                                 if (filter->enables & chk) {
1203                                         if (filter->l2_ovlan == vlan_id)
1204                                                 goto cont;
1205                                 } else {
1206                                         /* Must delete the MAC filter */
1207                                         STAILQ_REMOVE(&vnic->filter, filter,
1208                                                       bnxt_filter_info, next);
1209                                         bnxt_hwrm_clear_filter(bp, filter);
1210                                         filter->l2_ovlan = 0;
1211                                         STAILQ_INSERT_TAIL(
1212                                                         &bp->free_filter_list,
1213                                                         filter, next);
1214                                 }
1215                                 new_filter = bnxt_alloc_filter(bp);
1216                                 if (!new_filter) {
1217                                         RTE_LOG(ERR, PMD,
1218                                                 "MAC/VLAN filter alloc failed\n");
1219                                         rc = -ENOMEM;
1220                                         goto exit;
1221                                 }
1222                                 STAILQ_INSERT_TAIL(&vnic->filter, new_filter,
1223                                                    next);
1224                                 /* Inherit MAC from the previous filter */
1225                                 new_filter->mac_index = filter->mac_index;
1226                                 memcpy(new_filter->l2_addr, filter->l2_addr,
1227                                        ETHER_ADDR_LEN);
1228                                 /* MAC + VLAN ID filter */
1229                                 new_filter->l2_ovlan = vlan_id;
1230                                 new_filter->l2_ovlan_mask = 0xF000;
1231                                 new_filter->enables |= en;
1232                                 rc = bnxt_hwrm_set_filter(bp, vnic->fw_vnic_id,
1233                                                           new_filter);
1234                                 if (rc)
1235                                         goto exit;
1236                                 RTE_LOG(INFO, PMD,
1237                                         "Added Vlan filter for %d\n", vlan_id);
1238 cont:
1239                                 filter = temp_filter;
1240                         }
1241                 }
1242         }
1243 exit:
1244         return rc;
1245 }
1246
1247 static int bnxt_vlan_filter_set_op(struct rte_eth_dev *eth_dev,
1248                                    uint16_t vlan_id, int on)
1249 {
1250         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
1251
1252         /* These operations apply to ALL existing MAC/VLAN filters */
1253         if (on)
1254                 return bnxt_add_vlan_filter(bp, vlan_id);
1255         else
1256                 return bnxt_del_vlan_filter(bp, vlan_id);
1257 }
1258
1259 static void
1260 bnxt_vlan_offload_set_op(struct rte_eth_dev *dev, int mask)
1261 {
1262         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1263         unsigned int i;
1264
1265         if (mask & ETH_VLAN_FILTER_MASK) {
1266                 if (!dev->data->dev_conf.rxmode.hw_vlan_filter) {
1267                         /* Remove any VLAN filters programmed */
1268                         for (i = 0; i < 4095; i++)
1269                                 bnxt_del_vlan_filter(bp, i);
1270                 }
1271                 RTE_LOG(INFO, PMD, "VLAN Filtering: %d\n",
1272                         dev->data->dev_conf.rxmode.hw_vlan_filter);
1273         }
1274
1275         if (mask & ETH_VLAN_STRIP_MASK) {
1276                 /* Enable or disable VLAN stripping */
1277                 for (i = 0; i < bp->nr_vnics; i++) {
1278                         struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
1279                         if (dev->data->dev_conf.rxmode.hw_vlan_strip)
1280                                 vnic->vlan_strip = true;
1281                         else
1282                                 vnic->vlan_strip = false;
1283                         bnxt_hwrm_vnic_cfg(bp, vnic);
1284                 }
1285                 RTE_LOG(INFO, PMD, "VLAN Strip Offload: %d\n",
1286                         dev->data->dev_conf.rxmode.hw_vlan_strip);
1287         }
1288
1289         if (mask & ETH_VLAN_EXTEND_MASK)
1290                 RTE_LOG(ERR, PMD, "Extend VLAN Not supported\n");
1291 }
1292
1293 static void
1294 bnxt_set_default_mac_addr_op(struct rte_eth_dev *dev, struct ether_addr *addr)
1295 {
1296         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1297         /* Default Filter is tied to VNIC 0 */
1298         struct bnxt_vnic_info *vnic = &bp->vnic_info[0];
1299         struct bnxt_filter_info *filter;
1300         int rc;
1301
1302         if (BNXT_VF(bp))
1303                 return;
1304
1305         memcpy(bp->mac_addr, addr, sizeof(bp->mac_addr));
1306         memcpy(&dev->data->mac_addrs[0], bp->mac_addr, ETHER_ADDR_LEN);
1307
1308         STAILQ_FOREACH(filter, &vnic->filter, next) {
1309                 /* Default Filter is at Index 0 */
1310                 if (filter->mac_index != 0)
1311                         continue;
1312                 rc = bnxt_hwrm_clear_filter(bp, filter);
1313                 if (rc)
1314                         break;
1315                 memcpy(filter->l2_addr, bp->mac_addr, ETHER_ADDR_LEN);
1316                 memset(filter->l2_addr_mask, 0xff, ETHER_ADDR_LEN);
1317                 filter->flags |= HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_RX;
1318                 filter->enables |=
1319                         HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR |
1320                         HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR_MASK;
1321                 rc = bnxt_hwrm_set_filter(bp, vnic->fw_vnic_id, filter);
1322                 if (rc)
1323                         break;
1324                 filter->mac_index = 0;
1325                 RTE_LOG(DEBUG, PMD, "Set MAC addr\n");
1326         }
1327 }
1328
1329 static int
1330 bnxt_dev_set_mc_addr_list_op(struct rte_eth_dev *eth_dev,
1331                           struct ether_addr *mc_addr_set,
1332                           uint32_t nb_mc_addr)
1333 {
1334         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
1335         char *mc_addr_list = (char *)mc_addr_set;
1336         struct bnxt_vnic_info *vnic;
1337         uint32_t off = 0, i = 0;
1338
1339         vnic = &bp->vnic_info[0];
1340
1341         if (nb_mc_addr > BNXT_MAX_MC_ADDRS) {
1342                 vnic->flags |= BNXT_VNIC_INFO_ALLMULTI;
1343                 goto allmulti;
1344         }
1345
1346         /* TODO Check for Duplicate mcast addresses */
1347         vnic->flags &= ~BNXT_VNIC_INFO_ALLMULTI;
1348         for (i = 0; i < nb_mc_addr; i++) {
1349                 memcpy(vnic->mc_list + off, &mc_addr_list[i], ETHER_ADDR_LEN);
1350                 off += ETHER_ADDR_LEN;
1351         }
1352
1353         vnic->mc_addr_cnt = i;
1354
1355 allmulti:
1356         return bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic);
1357 }
1358
1359 static int
1360 bnxt_fw_version_get(struct rte_eth_dev *dev, char *fw_version, size_t fw_size)
1361 {
1362         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1363         uint8_t fw_major = (bp->fw_ver >> 24) & 0xff;
1364         uint8_t fw_minor = (bp->fw_ver >> 16) & 0xff;
1365         uint8_t fw_updt = (bp->fw_ver >> 8) & 0xff;
1366         int ret;
1367
1368         ret = snprintf(fw_version, fw_size, "%d.%d.%d",
1369                         fw_major, fw_minor, fw_updt);
1370
1371         ret += 1; /* add the size of '\0' */
1372         if (fw_size < (uint32_t)ret)
1373                 return ret;
1374         else
1375                 return 0;
1376 }
1377
1378 /*
1379  * Initialization
1380  */
1381
1382 static const struct eth_dev_ops bnxt_dev_ops = {
1383         .dev_infos_get = bnxt_dev_info_get_op,
1384         .dev_close = bnxt_dev_close_op,
1385         .dev_configure = bnxt_dev_configure_op,
1386         .dev_start = bnxt_dev_start_op,
1387         .dev_stop = bnxt_dev_stop_op,
1388         .dev_set_link_up = bnxt_dev_set_link_up_op,
1389         .dev_set_link_down = bnxt_dev_set_link_down_op,
1390         .stats_get = bnxt_stats_get_op,
1391         .stats_reset = bnxt_stats_reset_op,
1392         .rx_queue_setup = bnxt_rx_queue_setup_op,
1393         .rx_queue_release = bnxt_rx_queue_release_op,
1394         .tx_queue_setup = bnxt_tx_queue_setup_op,
1395         .tx_queue_release = bnxt_tx_queue_release_op,
1396         .reta_update = bnxt_reta_update_op,
1397         .reta_query = bnxt_reta_query_op,
1398         .rss_hash_update = bnxt_rss_hash_update_op,
1399         .rss_hash_conf_get = bnxt_rss_hash_conf_get_op,
1400         .link_update = bnxt_link_update_op,
1401         .promiscuous_enable = bnxt_promiscuous_enable_op,
1402         .promiscuous_disable = bnxt_promiscuous_disable_op,
1403         .allmulticast_enable = bnxt_allmulticast_enable_op,
1404         .allmulticast_disable = bnxt_allmulticast_disable_op,
1405         .mac_addr_add = bnxt_mac_addr_add_op,
1406         .mac_addr_remove = bnxt_mac_addr_remove_op,
1407         .flow_ctrl_get = bnxt_flow_ctrl_get_op,
1408         .flow_ctrl_set = bnxt_flow_ctrl_set_op,
1409         .udp_tunnel_port_add  = bnxt_udp_tunnel_port_add_op,
1410         .udp_tunnel_port_del  = bnxt_udp_tunnel_port_del_op,
1411         .vlan_filter_set = bnxt_vlan_filter_set_op,
1412         .vlan_offload_set = bnxt_vlan_offload_set_op,
1413         .mac_addr_set = bnxt_set_default_mac_addr_op,
1414         .xstats_get = bnxt_dev_xstats_get_op,
1415         .xstats_get_names = bnxt_dev_xstats_get_names_op,
1416         .xstats_reset = bnxt_dev_xstats_reset_op,
1417         .fw_version_get = bnxt_fw_version_get,
1418         .set_mc_addr_list = bnxt_dev_set_mc_addr_list_op,
1419 };
1420
1421 static bool bnxt_vf_pciid(uint16_t id)
1422 {
1423         if (id == BROADCOM_DEV_ID_57304_VF ||
1424             id == BROADCOM_DEV_ID_57406_VF ||
1425             id == BROADCOM_DEV_ID_5731X_VF ||
1426             id == BROADCOM_DEV_ID_5741X_VF ||
1427             id == BROADCOM_DEV_ID_57414_VF)
1428                 return true;
1429         return false;
1430 }
1431
1432 static int bnxt_init_board(struct rte_eth_dev *eth_dev)
1433 {
1434         struct bnxt *bp = eth_dev->data->dev_private;
1435         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
1436         int rc;
1437
1438         /* enable device (incl. PCI PM wakeup), and bus-mastering */
1439         if (!pci_dev->mem_resource[0].addr) {
1440                 RTE_LOG(ERR, PMD,
1441                         "Cannot find PCI device base address, aborting\n");
1442                 rc = -ENODEV;
1443                 goto init_err_disable;
1444         }
1445
1446         bp->eth_dev = eth_dev;
1447         bp->pdev = pci_dev;
1448
1449         bp->bar0 = (void *)pci_dev->mem_resource[0].addr;
1450         if (!bp->bar0) {
1451                 RTE_LOG(ERR, PMD, "Cannot map device registers, aborting\n");
1452                 rc = -ENOMEM;
1453                 goto init_err_release;
1454         }
1455         return 0;
1456
1457 init_err_release:
1458         if (bp->bar0)
1459                 bp->bar0 = NULL;
1460
1461 init_err_disable:
1462
1463         return rc;
1464 }
1465
1466 static int bnxt_dev_uninit(struct rte_eth_dev *eth_dev);
1467
1468 #define ALLOW_FUNC(x)   \
1469         { \
1470                 typeof(x) arg = (x); \
1471                 bp->pf.vf_req_fwd[((arg) >> 5)] &= \
1472                 ~rte_cpu_to_le_32(1 << ((arg) & 0x1f)); \
1473         }
1474 static int
1475 bnxt_dev_init(struct rte_eth_dev *eth_dev)
1476 {
1477         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
1478         char mz_name[RTE_MEMZONE_NAMESIZE];
1479         const struct rte_memzone *mz = NULL;
1480         static int version_printed;
1481         uint32_t total_alloc_len;
1482         phys_addr_t mz_phys_addr;
1483         struct bnxt *bp;
1484         int rc;
1485
1486         if (version_printed++ == 0)
1487                 RTE_LOG(INFO, PMD, "%s\n", bnxt_version);
1488
1489         rte_eth_copy_pci_info(eth_dev, pci_dev);
1490         eth_dev->data->dev_flags |= RTE_ETH_DEV_DETACHABLE;
1491
1492         bp = eth_dev->data->dev_private;
1493         bp->dev_stopped = 1;
1494
1495         if (bnxt_vf_pciid(pci_dev->id.device_id))
1496                 bp->flags |= BNXT_FLAG_VF;
1497
1498         rc = bnxt_init_board(eth_dev);
1499         if (rc) {
1500                 RTE_LOG(ERR, PMD,
1501                         "Board initialization failed rc: %x\n", rc);
1502                 goto error;
1503         }
1504         eth_dev->dev_ops = &bnxt_dev_ops;
1505         eth_dev->rx_pkt_burst = &bnxt_recv_pkts;
1506         eth_dev->tx_pkt_burst = &bnxt_xmit_pkts;
1507
1508         if (BNXT_PF(bp) && pci_dev->id.device_id != BROADCOM_DEV_ID_NS2) {
1509                 snprintf(mz_name, RTE_MEMZONE_NAMESIZE,
1510                          "bnxt_%04x:%02x:%02x:%02x-%s", pci_dev->addr.domain,
1511                          pci_dev->addr.bus, pci_dev->addr.devid,
1512                          pci_dev->addr.function, "rx_port_stats");
1513                 mz_name[RTE_MEMZONE_NAMESIZE - 1] = 0;
1514                 mz = rte_memzone_lookup(mz_name);
1515                 total_alloc_len = RTE_CACHE_LINE_ROUNDUP(
1516                                 sizeof(struct rx_port_stats) + 512);
1517                 if (!mz) {
1518                         mz = rte_memzone_reserve(mz_name, total_alloc_len,
1519                                                  SOCKET_ID_ANY,
1520                                                  RTE_MEMZONE_2MB |
1521                                                  RTE_MEMZONE_SIZE_HINT_ONLY);
1522                         if (mz == NULL)
1523                                 return -ENOMEM;
1524                 }
1525                 memset(mz->addr, 0, mz->len);
1526                 mz_phys_addr = mz->phys_addr;
1527                 if ((unsigned long)mz->addr == mz_phys_addr) {
1528                         RTE_LOG(WARNING, PMD,
1529                                 "Memzone physical address same as virtual.\n");
1530                         RTE_LOG(WARNING, PMD,
1531                                 "Using rte_mem_virt2phy()\n");
1532                         mz_phys_addr = rte_mem_virt2phy(mz->addr);
1533                         if (mz_phys_addr == 0) {
1534                                 RTE_LOG(ERR, PMD,
1535                                 "unable to map address to physical memory\n");
1536                                 return -ENOMEM;
1537                         }
1538                 }
1539
1540                 bp->rx_mem_zone = (const void *)mz;
1541                 bp->hw_rx_port_stats = mz->addr;
1542                 bp->hw_rx_port_stats_map = mz_phys_addr;
1543
1544                 snprintf(mz_name, RTE_MEMZONE_NAMESIZE,
1545                          "bnxt_%04x:%02x:%02x:%02x-%s", pci_dev->addr.domain,
1546                          pci_dev->addr.bus, pci_dev->addr.devid,
1547                          pci_dev->addr.function, "tx_port_stats");
1548                 mz_name[RTE_MEMZONE_NAMESIZE - 1] = 0;
1549                 mz = rte_memzone_lookup(mz_name);
1550                 total_alloc_len = RTE_CACHE_LINE_ROUNDUP(
1551                                 sizeof(struct tx_port_stats) + 512);
1552                 if (!mz) {
1553                         mz = rte_memzone_reserve(mz_name, total_alloc_len,
1554                                                  SOCKET_ID_ANY,
1555                                                  RTE_MEMZONE_2MB |
1556                                                  RTE_MEMZONE_SIZE_HINT_ONLY);
1557                         if (mz == NULL)
1558                                 return -ENOMEM;
1559                 }
1560                 memset(mz->addr, 0, mz->len);
1561                 mz_phys_addr = mz->phys_addr;
1562                 if ((unsigned long)mz->addr == mz_phys_addr) {
1563                         RTE_LOG(WARNING, PMD,
1564                                 "Memzone physical address same as virtual.\n");
1565                         RTE_LOG(WARNING, PMD,
1566                                 "Using rte_mem_virt2phy()\n");
1567                         mz_phys_addr = rte_mem_virt2phy(mz->addr);
1568                         if (mz_phys_addr == 0) {
1569                                 RTE_LOG(ERR, PMD,
1570                                 "unable to map address to physical memory\n");
1571                                 return -ENOMEM;
1572                         }
1573                 }
1574
1575                 bp->tx_mem_zone = (const void *)mz;
1576                 bp->hw_tx_port_stats = mz->addr;
1577                 bp->hw_tx_port_stats_map = mz_phys_addr;
1578
1579                 bp->flags |= BNXT_FLAG_PORT_STATS;
1580         }
1581
1582         rc = bnxt_alloc_hwrm_resources(bp);
1583         if (rc) {
1584                 RTE_LOG(ERR, PMD,
1585                         "hwrm resource allocation failure rc: %x\n", rc);
1586                 goto error_free;
1587         }
1588         rc = bnxt_hwrm_ver_get(bp);
1589         if (rc)
1590                 goto error_free;
1591         bnxt_hwrm_queue_qportcfg(bp);
1592
1593         bnxt_hwrm_func_qcfg(bp);
1594
1595         /* Get the MAX capabilities for this function */
1596         rc = bnxt_hwrm_func_qcaps(bp);
1597         if (rc) {
1598                 RTE_LOG(ERR, PMD, "hwrm query capability failure rc: %x\n", rc);
1599                 goto error_free;
1600         }
1601         if (bp->max_tx_rings == 0) {
1602                 RTE_LOG(ERR, PMD, "No TX rings available!\n");
1603                 rc = -EBUSY;
1604                 goto error_free;
1605         }
1606         eth_dev->data->mac_addrs = rte_zmalloc("bnxt_mac_addr_tbl",
1607                                         ETHER_ADDR_LEN * MAX_NUM_MAC_ADDR, 0);
1608         if (eth_dev->data->mac_addrs == NULL) {
1609                 RTE_LOG(ERR, PMD,
1610                         "Failed to alloc %u bytes needed to store MAC addr tbl",
1611                         ETHER_ADDR_LEN * MAX_NUM_MAC_ADDR);
1612                 rc = -ENOMEM;
1613                 goto error_free;
1614         }
1615         /* Copy the permanent MAC from the qcap response address now. */
1616         memcpy(bp->mac_addr, bp->dflt_mac_addr, sizeof(bp->mac_addr));
1617         memcpy(&eth_dev->data->mac_addrs[0], bp->mac_addr, ETHER_ADDR_LEN);
1618         bp->grp_info = rte_zmalloc("bnxt_grp_info",
1619                                 sizeof(*bp->grp_info) * bp->max_ring_grps, 0);
1620         if (!bp->grp_info) {
1621                 RTE_LOG(ERR, PMD,
1622                         "Failed to alloc %zu bytes needed to store group info table\n",
1623                         sizeof(*bp->grp_info) * bp->max_ring_grps);
1624                 rc = -ENOMEM;
1625                 goto error_free;
1626         }
1627
1628         /* Forward all requests if firmware is new enough */
1629         if (((bp->fw_ver >= ((20 << 24) | (6 << 16) | (100 << 8))) &&
1630             (bp->fw_ver < ((20 << 24) | (7 << 16)))) ||
1631             ((bp->fw_ver >= ((20 << 24) | (8 << 16))))) {
1632                 memset(bp->pf.vf_req_fwd, 0xff, sizeof(bp->pf.vf_req_fwd));
1633         } else {
1634                 RTE_LOG(WARNING, PMD,
1635                         "Firmware too old for VF mailbox functionality\n");
1636                 memset(bp->pf.vf_req_fwd, 0, sizeof(bp->pf.vf_req_fwd));
1637         }
1638
1639         /*
1640          * The following are used for driver cleanup.  If we disallow these,
1641          * VF drivers can't clean up cleanly.
1642          */
1643         ALLOW_FUNC(HWRM_FUNC_DRV_UNRGTR);
1644         ALLOW_FUNC(HWRM_VNIC_FREE);
1645         ALLOW_FUNC(HWRM_RING_FREE);
1646         ALLOW_FUNC(HWRM_RING_GRP_FREE);
1647         ALLOW_FUNC(HWRM_VNIC_RSS_COS_LB_CTX_FREE);
1648         ALLOW_FUNC(HWRM_CFA_L2_FILTER_FREE);
1649         ALLOW_FUNC(HWRM_STAT_CTX_FREE);
1650         rc = bnxt_hwrm_func_driver_register(bp);
1651         if (rc) {
1652                 RTE_LOG(ERR, PMD,
1653                         "Failed to register driver");
1654                 rc = -EBUSY;
1655                 goto error_free;
1656         }
1657
1658         RTE_LOG(INFO, PMD,
1659                 DRV_MODULE_NAME " found at mem %" PRIx64 ", node addr %pM\n",
1660                 pci_dev->mem_resource[0].phys_addr,
1661                 pci_dev->mem_resource[0].addr);
1662
1663         rc = bnxt_hwrm_func_reset(bp);
1664         if (rc) {
1665                 RTE_LOG(ERR, PMD, "hwrm chip reset failure rc: %x\n", rc);
1666                 rc = -1;
1667                 goto error_free;
1668         }
1669
1670         if (BNXT_PF(bp)) {
1671                 //if (bp->pf.active_vfs) {
1672                         // TODO: Deallocate VF resources?
1673                 //}
1674                 if (bp->pdev->max_vfs) {
1675                         rc = bnxt_hwrm_allocate_vfs(bp, bp->pdev->max_vfs);
1676                         if (rc) {
1677                                 RTE_LOG(ERR, PMD, "Failed to allocate VFs\n");
1678                                 goto error_free;
1679                         }
1680                 } else {
1681                         rc = bnxt_hwrm_allocate_pf_only(bp);
1682                         if (rc) {
1683                                 RTE_LOG(ERR, PMD,
1684                                         "Failed to allocate PF resources\n");
1685                                 goto error_free;
1686                         }
1687                 }
1688         }
1689
1690         rc = bnxt_setup_int(bp);
1691         if (rc)
1692                 goto error_free;
1693
1694         rc = bnxt_alloc_mem(bp);
1695         if (rc)
1696                 goto error_free_int;
1697
1698         rc = bnxt_request_int(bp);
1699         if (rc)
1700                 goto error_free_int;
1701
1702         rc = bnxt_alloc_def_cp_ring(bp);
1703         if (rc)
1704                 goto error_free_int;
1705
1706         bnxt_enable_int(bp);
1707
1708         return 0;
1709
1710 error_free_int:
1711         bnxt_disable_int(bp);
1712         bnxt_free_def_cp_ring(bp);
1713         bnxt_hwrm_func_buf_unrgtr(bp);
1714         bnxt_free_int(bp);
1715         bnxt_free_mem(bp);
1716 error_free:
1717         bnxt_dev_uninit(eth_dev);
1718 error:
1719         return rc;
1720 }
1721
1722 static int
1723 bnxt_dev_uninit(struct rte_eth_dev *eth_dev) {
1724         struct bnxt *bp = eth_dev->data->dev_private;
1725         int rc;
1726
1727         bnxt_disable_int(bp);
1728         bnxt_free_int(bp);
1729         bnxt_free_mem(bp);
1730         if (eth_dev->data->mac_addrs != NULL) {
1731                 rte_free(eth_dev->data->mac_addrs);
1732                 eth_dev->data->mac_addrs = NULL;
1733         }
1734         if (bp->grp_info != NULL) {
1735                 rte_free(bp->grp_info);
1736                 bp->grp_info = NULL;
1737         }
1738         rc = bnxt_hwrm_func_driver_unregister(bp, 0);
1739         bnxt_free_hwrm_resources(bp);
1740         rte_memzone_free((const struct rte_memzone *)bp->tx_mem_zone);
1741         rte_memzone_free((const struct rte_memzone *)bp->rx_mem_zone);
1742         if (bp->dev_stopped == 0)
1743                 bnxt_dev_close_op(eth_dev);
1744         if (bp->pf.vf_info)
1745                 rte_free(bp->pf.vf_info);
1746         eth_dev->dev_ops = NULL;
1747         eth_dev->rx_pkt_burst = NULL;
1748         eth_dev->tx_pkt_burst = NULL;
1749
1750         return rc;
1751 }
1752
1753 int bnxt_rcv_msg_from_vf(struct bnxt *bp, uint16_t vf_id, void *msg)
1754 {
1755         struct rte_pmd_bnxt_mb_event_param cb_param;
1756
1757         cb_param.retval = RTE_PMD_BNXT_MB_EVENT_PROCEED;
1758         cb_param.vf_id = vf_id;
1759         cb_param.msg = msg;
1760
1761         _rte_eth_dev_callback_process(bp->eth_dev, RTE_ETH_EVENT_VF_MBOX,
1762                         &cb_param);
1763
1764         /* Default to approve */
1765         if (cb_param.retval == RTE_PMD_BNXT_MB_EVENT_PROCEED)
1766                 cb_param.retval = RTE_PMD_BNXT_MB_EVENT_NOOP_ACK;
1767
1768         return cb_param.retval == RTE_PMD_BNXT_MB_EVENT_NOOP_ACK ? true : false;
1769 }
1770
1771 static int bnxt_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
1772         struct rte_pci_device *pci_dev)
1773 {
1774         return rte_eth_dev_pci_generic_probe(pci_dev, sizeof(struct bnxt),
1775                 bnxt_dev_init);
1776 }
1777
1778 static int bnxt_pci_remove(struct rte_pci_device *pci_dev)
1779 {
1780         return rte_eth_dev_pci_generic_remove(pci_dev, bnxt_dev_uninit);
1781 }
1782
1783 static struct rte_pci_driver bnxt_rte_pmd = {
1784         .id_table = bnxt_pci_id_map,
1785         .drv_flags = RTE_PCI_DRV_NEED_MAPPING |
1786                 RTE_PCI_DRV_INTR_LSC,
1787         .probe = bnxt_pci_probe,
1788         .remove = bnxt_pci_remove,
1789 };
1790
1791 RTE_PMD_REGISTER_PCI(net_bnxt, bnxt_rte_pmd);
1792 RTE_PMD_REGISTER_PCI_TABLE(net_bnxt, bnxt_pci_id_map);
1793 RTE_PMD_REGISTER_KMOD_DEP(net_bnxt, "* igb_uio | uio_pci_generic | vfio-pci");