drivers/net/i40e/i40e_pf.c

   1 /*-
   2  *   BSD LICENSE
   3  *
   4  *   Copyright(c) 2010-2017 Intel Corporation. All rights reserved.
   5  *   All rights reserved.
   6  *
   7  *   Redistribution and use in source and binary forms, with or without
   8  *   modification, are permitted provided that the following conditions
   9  *   are met:
  10  *
  11  *     * Redistributions of source code must retain the above copyright
  12  *       notice, this list of conditions and the following disclaimer.
  13  *     * Redistributions in binary form must reproduce the above copyright
  14  *       notice, this list of conditions and the following disclaimer in
  15  *       the documentation and/or other materials provided with the
  16  *       distribution.
  17  *     * Neither the name of Intel Corporation nor the names of its
  18  *       contributors may be used to endorse or promote products derived
  19  *       from this software without specific prior written permission.
  20  *
  21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32  */
  33
  34 #include <sys/queue.h>
  35 #include <stdio.h>
  36 #include <errno.h>
  37 #include <stdint.h>
  38 #include <string.h>
  39 #include <unistd.h>
  40 #include <stdarg.h>
  41 #include <inttypes.h>
  42
  43 #include <rte_string_fns.h>
  44 #include <rte_pci.h>
  45 #include <rte_ether.h>
  46 #include <rte_ethdev.h>
  47 #include <rte_memzone.h>
  48 #include <rte_malloc.h>
  49 #include <rte_memcpy.h>
  50
  51 #include "i40e_logs.h"
  52 #include "base/i40e_prototype.h"
  53 #include "base/i40e_adminq_cmd.h"
  54 #include "base/i40e_type.h"
  55 #include "i40e_ethdev.h"
  56 #include "i40e_rxtx.h"
  57 #include "i40e_pf.h"
  58 #include "rte_pmd_i40e.h"
  59
  60 #define I40E_CFG_CRCSTRIP_DEFAULT 1
  61
  62 static int
  63 i40e_pf_host_switch_queues(struct i40e_pf_vf *vf,
  64                            struct i40e_virtchnl_queue_select *qsel,
  65                            bool on);
  66
  67 /**
  68  * Bind PF queues with VSI and VF.
  69  **/
  70 static int
  71 i40e_pf_vf_queues_mapping(struct i40e_pf_vf *vf)
  72 {
  73         int i;
  74         struct i40e_hw *hw = I40E_PF_TO_HW(vf->pf);
  75         uint16_t vsi_id = vf->vsi->vsi_id;
  76         uint16_t vf_id  = vf->vf_idx;
  77         uint16_t nb_qps = vf->vsi->nb_qps;
  78         uint16_t qbase  = vf->vsi->base_queue;
  79         uint16_t q1, q2;
  80         uint32_t val;
  81
  82         /*
  83          * VF should use scatter range queues. So, it needn't
  84          * to set QBASE in this register.
  85          */
  86         i40e_write_rx_ctl(hw, I40E_VSILAN_QBASE(vsi_id),
  87                           I40E_VSILAN_QBASE_VSIQTABLE_ENA_MASK);
  88
  89         /* Set to enable VFLAN_QTABLE[] registers valid */
  90         I40E_WRITE_REG(hw, I40E_VPLAN_MAPENA(vf_id),
  91                 I40E_VPLAN_MAPENA_TXRX_ENA_MASK);
  92
  93         /* map PF queues to VF */
  94         for (i = 0; i < nb_qps; i++) {
  95                 val = ((qbase + i) & I40E_VPLAN_QTABLE_QINDEX_MASK);
  96                 I40E_WRITE_REG(hw, I40E_VPLAN_QTABLE(i, vf_id), val);
  97         }
  98
  99         /* map PF queues to VSI */
 100         for (i = 0; i < I40E_MAX_QP_NUM_PER_VF / 2; i++) {
 101                 if (2 * i > nb_qps - 1)
 102                         q1 = I40E_VSILAN_QTABLE_QINDEX_0_MASK;
 103                 else
 104                         q1 = qbase + 2 * i;
 105
 106                 if (2 * i + 1 > nb_qps - 1)
 107                         q2 = I40E_VSILAN_QTABLE_QINDEX_0_MASK;
 108                 else
 109                         q2 = qbase + 2 * i + 1;
 110
 111                 val = (q2 << I40E_VSILAN_QTABLE_QINDEX_1_SHIFT) + q1;
 112                 i40e_write_rx_ctl(hw, I40E_VSILAN_QTABLE(i, vsi_id), val);
 113         }
 114         I40E_WRITE_FLUSH(hw);
 115
 116         return I40E_SUCCESS;
 117 }
 118
 119
 120 /**
 121  * Proceed VF reset operation.
 122  */
 123 int
 124 i40e_pf_host_vf_reset(struct i40e_pf_vf *vf, bool do_hw_reset)
 125 {
 126         uint32_t val, i;
 127         struct i40e_hw *hw;
 128         struct i40e_pf *pf;
 129         uint16_t vf_id, abs_vf_id, vf_msix_num;
 130         int ret;
 131         struct i40e_virtchnl_queue_select qsel;
 132
 133         if (vf == NULL)
 134                 return -EINVAL;
 135
 136         pf = vf->pf;
 137         hw = I40E_PF_TO_HW(vf->pf);
 138         vf_id = vf->vf_idx;
 139         abs_vf_id = vf_id + hw->func_caps.vf_base_id;
 140
 141         /* Notify VF that we are in VFR progress */
 142         I40E_WRITE_REG(hw, I40E_VFGEN_RSTAT1(vf_id), I40E_VFR_INPROGRESS);
 143
 144         /*
 145          * If require a SW VF reset, a VFLR interrupt will be generated,
 146          * this function will be called again. To avoid it,
 147          * disable interrupt first.
 148          */
 149         if (do_hw_reset) {
 150                 vf->state = I40E_VF_INRESET;
 151                 val = I40E_READ_REG(hw, I40E_VPGEN_VFRTRIG(vf_id));
 152                 val |= I40E_VPGEN_VFRTRIG_VFSWR_MASK;
 153                 I40E_WRITE_REG(hw, I40E_VPGEN_VFRTRIG(vf_id), val);
 154                 I40E_WRITE_FLUSH(hw);
 155         }
 156
 157 #define VFRESET_MAX_WAIT_CNT 100
 158         /* Wait until VF reset is done */
 159         for (i = 0; i < VFRESET_MAX_WAIT_CNT; i++) {
 160                 rte_delay_us(10);
 161                 val = I40E_READ_REG(hw, I40E_VPGEN_VFRSTAT(vf_id));
 162                 if (val & I40E_VPGEN_VFRSTAT_VFRD_MASK)
 163                         break;
 164         }
 165
 166         if (i >= VFRESET_MAX_WAIT_CNT) {
 167                 PMD_DRV_LOG(ERR, "VF reset timeout");
 168                 return -ETIMEDOUT;
 169         }
 170
 171         /* This is not first time to do reset, do cleanup job first */
 172         if (vf->vsi) {
 173                 /* Disable queues */
 174                 memset(&qsel, 0, sizeof(qsel));
 175                 for (i = 0; i < vf->vsi->nb_qps; i++)
 176                         qsel.rx_queues |= 1 << i;
 177                 qsel.tx_queues = qsel.rx_queues;
 178                 ret = i40e_pf_host_switch_queues(vf, &qsel, false);
 179                 if (ret != I40E_SUCCESS) {
 180                         PMD_DRV_LOG(ERR, "Disable VF queues failed");
 181                         return -EFAULT;
 182                 }
 183
 184                 /* Disable VF interrupt setting */
 185                 vf_msix_num = hw->func_caps.num_msix_vectors_vf;
 186                 for (i = 0; i < vf_msix_num; i++) {
 187                         if (!i)
 188                                 val = I40E_VFINT_DYN_CTL0(vf_id);
 189                         else
 190                                 val = I40E_VFINT_DYN_CTLN(((vf_msix_num - 1) *
 191                                                         (vf_id)) + (i - 1));
 192                         I40E_WRITE_REG(hw, val, I40E_VFINT_DYN_CTLN_CLEARPBA_MASK);
 193                 }
 194                 I40E_WRITE_FLUSH(hw);
 195
 196                 /* remove VSI */
 197                 ret = i40e_vsi_release(vf->vsi);
 198                 if (ret != I40E_SUCCESS) {
 199                         PMD_DRV_LOG(ERR, "Release VSI failed");
 200                         return -EFAULT;
 201                 }
 202         }
 203
 204 #define I40E_VF_PCI_ADDR  0xAA
 205 #define I40E_VF_PEND_MASK 0x20
 206         /* Check the pending transactions of this VF */
 207         /* Use absolute VF id, refer to datasheet for details */
 208         I40E_WRITE_REG(hw, I40E_PF_PCI_CIAA, I40E_VF_PCI_ADDR |
 209                 (abs_vf_id << I40E_PF_PCI_CIAA_VF_NUM_SHIFT));
 210         for (i = 0; i < VFRESET_MAX_WAIT_CNT; i++) {
 211                 rte_delay_us(1);
 212                 val = I40E_READ_REG(hw, I40E_PF_PCI_CIAD);
 213                 if ((val & I40E_VF_PEND_MASK) == 0)
 214                         break;
 215         }
 216
 217         if (i >= VFRESET_MAX_WAIT_CNT) {
 218                 PMD_DRV_LOG(ERR, "Wait VF PCI transaction end timeout");
 219                 return -ETIMEDOUT;
 220         }
 221
 222         /* Reset done, Set COMPLETE flag and clear reset bit */
 223         I40E_WRITE_REG(hw, I40E_VFGEN_RSTAT1(vf_id), I40E_VFR_COMPLETED);
 224         val = I40E_READ_REG(hw, I40E_VPGEN_VFRTRIG(vf_id));
 225         val &= ~I40E_VPGEN_VFRTRIG_VFSWR_MASK;
 226         I40E_WRITE_REG(hw, I40E_VPGEN_VFRTRIG(vf_id), val);
 227         vf->reset_cnt++;
 228         I40E_WRITE_FLUSH(hw);
 229
 230         /* Allocate resource again */
 231         if (pf->floating_veb && pf->floating_veb_list[vf_id]) {
 232                 vf->vsi = i40e_vsi_setup(vf->pf, I40E_VSI_SRIOV,
 233                                          NULL, vf->vf_idx);
 234         } else {
 235                 vf->vsi = i40e_vsi_setup(vf->pf, I40E_VSI_SRIOV,
 236                                          vf->pf->main_vsi, vf->vf_idx);
 237         }
 238
 239         if (vf->vsi == NULL) {
 240                 PMD_DRV_LOG(ERR, "Add vsi failed");
 241                 return -EFAULT;
 242         }
 243
 244         ret = i40e_pf_vf_queues_mapping(vf);
 245         if (ret != I40E_SUCCESS) {
 246                 PMD_DRV_LOG(ERR, "queue mapping error");
 247                 i40e_vsi_release(vf->vsi);
 248                 return -EFAULT;
 249         }
 250
 251         I40E_WRITE_REG(hw, I40E_VFGEN_RSTAT1(vf_id), I40E_VFR_VFACTIVE);
 252
 253         return ret;
 254 }
 255
 256 int
 257 i40e_pf_host_send_msg_to_vf(struct i40e_pf_vf *vf,
 258                             uint32_t opcode,
 259                             uint32_t retval,
 260                             uint8_t *msg,
 261                             uint16_t msglen)
 262 {
 263         struct i40e_hw *hw = I40E_PF_TO_HW(vf->pf);
 264         uint16_t abs_vf_id = hw->func_caps.vf_base_id + vf->vf_idx;
 265         int ret;
 266
 267         ret = i40e_aq_send_msg_to_vf(hw, abs_vf_id, opcode, retval,
 268                                                 msg, msglen, NULL);
 269         if (ret) {
 270                 PMD_INIT_LOG(ERR, "Fail to send message to VF, err %u",
 271                              hw->aq.asq_last_status);
 272         }
 273
 274         return ret;
 275 }
 276
 277 static void
 278 i40e_pf_host_process_cmd_version(struct i40e_pf_vf *vf, bool b_op)
 279 {
 280         struct i40e_virtchnl_version_info info;
 281
 282         /* Respond like a Linux PF host in order to support both DPDK VF and
 283          * Linux VF driver. The expense is original DPDK host specific feature
 284          * like CFG_VLAN_PVID and CONFIG_VSI_QUEUES_EXT will not available.
 285          *
 286          * DPDK VF also can't identify host driver by version number returned.
 287          * It always assume talking with Linux PF.
 288          */
 289         info.major = I40E_VIRTCHNL_VERSION_MAJOR;
 290         info.minor = I40E_VIRTCHNL_VERSION_MINOR_NO_VF_CAPS;
 291
 292         if (b_op)
 293                 i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_VERSION,
 294                                             I40E_SUCCESS,
 295                                             (uint8_t *)&info,
 296                                             sizeof(info));
 297         else
 298                 i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_VERSION,
 299                                             I40E_NOT_SUPPORTED,
 300                                             (uint8_t *)&info,
 301                                             sizeof(info));
 302 }
 303
 304 static int
 305 i40e_pf_host_process_cmd_reset_vf(struct i40e_pf_vf *vf)
 306 {
 307         i40e_pf_host_vf_reset(vf, 1);
 308
 309         /* No feedback will be sent to VF for VFLR */
 310         return I40E_SUCCESS;
 311 }
 312
 313 static int
 314 i40e_pf_host_process_cmd_get_vf_resource(struct i40e_pf_vf *vf, bool b_op)
 315 {
 316         struct i40e_virtchnl_vf_resource *vf_res = NULL;
 317         struct i40e_hw *hw = I40E_PF_TO_HW(vf->pf);
 318         uint32_t len = 0;
 319         int ret = I40E_SUCCESS;
 320
 321         if (!b_op) {
 322                 i40e_pf_host_send_msg_to_vf(vf,
 323                                             I40E_VIRTCHNL_OP_GET_VF_RESOURCES,
 324                                             I40E_NOT_SUPPORTED, NULL, 0);
 325                 return ret;
 326         }
 327
 328         /* only have 1 VSI by default */
 329         len =  sizeof(struct i40e_virtchnl_vf_resource) +
 330                                 I40E_DEFAULT_VF_VSI_NUM *
 331                 sizeof(struct i40e_virtchnl_vsi_resource);
 332
 333         vf_res = rte_zmalloc("i40e_vf_res", len, 0);
 334         if (vf_res == NULL) {
 335                 PMD_DRV_LOG(ERR, "failed to allocate mem");
 336                 ret = I40E_ERR_NO_MEMORY;
 337                 vf_res = NULL;
 338                 len = 0;
 339                 goto send_msg;
 340         }
 341
 342         vf_res->vf_offload_flags = I40E_VIRTCHNL_VF_OFFLOAD_L2 |
 343                                 I40E_VIRTCHNL_VF_OFFLOAD_VLAN;
 344         vf_res->max_vectors = hw->func_caps.num_msix_vectors_vf;
 345         vf_res->num_queue_pairs = vf->vsi->nb_qps;
 346         vf_res->num_vsis = I40E_DEFAULT_VF_VSI_NUM;
 347
 348         /* Change below setting if PF host can support more VSIs for VF */
 349         vf_res->vsi_res[0].vsi_type = I40E_VSI_SRIOV;
 350         vf_res->vsi_res[0].vsi_id = vf->vsi->vsi_id;
 351         vf_res->vsi_res[0].num_queue_pairs = vf->vsi->nb_qps;
 352         ether_addr_copy(&vf->mac_addr,
 353                 (struct ether_addr *)vf_res->vsi_res[0].default_mac_addr);
 354
 355 send_msg:
 356         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_GET_VF_RESOURCES,
 357                                         ret, (uint8_t *)vf_res, len);
 358         rte_free(vf_res);
 359
 360         return ret;
 361 }
 362
 363 static int
 364 i40e_pf_host_hmc_config_rxq(struct i40e_hw *hw,
 365                             struct i40e_pf_vf *vf,
 366                             struct i40e_virtchnl_rxq_info *rxq,
 367                             uint8_t crcstrip)
 368 {
 369         int err = I40E_SUCCESS;
 370         struct i40e_hmc_obj_rxq rx_ctx;
 371         uint16_t abs_queue_id = vf->vsi->base_queue + rxq->queue_id;
 372
 373         /* Clear the context structure first */
 374         memset(&rx_ctx, 0, sizeof(struct i40e_hmc_obj_rxq));
 375         rx_ctx.dbuff = rxq->databuffer_size >> I40E_RXQ_CTX_DBUFF_SHIFT;
 376         rx_ctx.hbuff = rxq->hdr_size >> I40E_RXQ_CTX_HBUFF_SHIFT;
 377         rx_ctx.base = rxq->dma_ring_addr / I40E_QUEUE_BASE_ADDR_UNIT;
 378         rx_ctx.qlen = rxq->ring_len;
 379 #ifndef RTE_LIBRTE_I40E_16BYTE_RX_DESC
 380         rx_ctx.dsize = 1;
 381 #endif
 382
 383         if (rxq->splithdr_enabled) {
 384                 rx_ctx.hsplit_0 = I40E_HEADER_SPLIT_ALL;
 385                 rx_ctx.dtype = i40e_header_split_enabled;
 386         } else {
 387                 rx_ctx.hsplit_0 = I40E_HEADER_SPLIT_NONE;
 388                 rx_ctx.dtype = i40e_header_split_none;
 389         }
 390         rx_ctx.rxmax = rxq->max_pkt_size;
 391         rx_ctx.tphrdesc_ena = 1;
 392         rx_ctx.tphwdesc_ena = 1;
 393         rx_ctx.tphdata_ena = 1;
 394         rx_ctx.tphhead_ena = 1;
 395         rx_ctx.lrxqthresh = 2;
 396         rx_ctx.crcstrip = crcstrip;
 397         rx_ctx.l2tsel = 1;
 398         rx_ctx.prefena = 1;
 399
 400         err = i40e_clear_lan_rx_queue_context(hw, abs_queue_id);
 401         if (err != I40E_SUCCESS)
 402                 return err;
 403         err = i40e_set_lan_rx_queue_context(hw, abs_queue_id, &rx_ctx);
 404
 405         return err;
 406 }
 407
 408 static int
 409 i40e_pf_host_hmc_config_txq(struct i40e_hw *hw,
 410                             struct i40e_pf_vf *vf,
 411                             struct i40e_virtchnl_txq_info *txq)
 412 {
 413         int err = I40E_SUCCESS;
 414         struct i40e_hmc_obj_txq tx_ctx;
 415         uint32_t qtx_ctl;
 416         uint16_t abs_queue_id = vf->vsi->base_queue + txq->queue_id;
 417
 418
 419         /* clear the context structure first */
 420         memset(&tx_ctx, 0, sizeof(tx_ctx));
 421         tx_ctx.base = txq->dma_ring_addr / I40E_QUEUE_BASE_ADDR_UNIT;
 422         tx_ctx.qlen = txq->ring_len;
 423         tx_ctx.rdylist = rte_le_to_cpu_16(vf->vsi->info.qs_handle[0]);
 424         tx_ctx.head_wb_ena = txq->headwb_enabled;
 425         tx_ctx.head_wb_addr = txq->dma_headwb_addr;
 426
 427         err = i40e_clear_lan_tx_queue_context(hw, abs_queue_id);
 428         if (err != I40E_SUCCESS)
 429                 return err;
 430
 431         err = i40e_set_lan_tx_queue_context(hw, abs_queue_id, &tx_ctx);
 432         if (err != I40E_SUCCESS)
 433                 return err;
 434
 435         /* bind queue with VF function, since TX/QX will appear in pair,
 436          * so only has QTX_CTL to set.
 437          */
 438         qtx_ctl = (I40E_QTX_CTL_VF_QUEUE << I40E_QTX_CTL_PFVF_Q_SHIFT) |
 439                                 ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) &
 440                                 I40E_QTX_CTL_PF_INDX_MASK) |
 441                                 (((vf->vf_idx + hw->func_caps.vf_base_id) <<
 442                                 I40E_QTX_CTL_VFVM_INDX_SHIFT) &
 443                                 I40E_QTX_CTL_VFVM_INDX_MASK);
 444         I40E_WRITE_REG(hw, I40E_QTX_CTL(abs_queue_id), qtx_ctl);
 445         I40E_WRITE_FLUSH(hw);
 446
 447         return I40E_SUCCESS;
 448 }
 449
 450 static int
 451 i40e_pf_host_process_cmd_config_vsi_queues(struct i40e_pf_vf *vf,
 452                                            uint8_t *msg,
 453                                            uint16_t msglen,
 454                                            bool b_op)
 455 {
 456         struct i40e_hw *hw = I40E_PF_TO_HW(vf->pf);
 457         struct i40e_vsi *vsi = vf->vsi;
 458         struct i40e_virtchnl_vsi_queue_config_info *vc_vqci =
 459                 (struct i40e_virtchnl_vsi_queue_config_info *)msg;
 460         struct i40e_virtchnl_queue_pair_info *vc_qpi;
 461         int i, ret = I40E_SUCCESS;
 462
 463         if (!b_op) {
 464                 i40e_pf_host_send_msg_to_vf(vf,
 465                                             I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES,
 466                                             I40E_NOT_SUPPORTED, NULL, 0);
 467                 return ret;
 468         }
 469
 470         if (!msg || vc_vqci->num_queue_pairs > vsi->nb_qps ||
 471                 vc_vqci->num_queue_pairs > I40E_MAX_VSI_QP ||
 472                 msglen < I40E_VIRTCHNL_CONFIG_VSI_QUEUES_SIZE(vc_vqci,
 473                                         vc_vqci->num_queue_pairs)) {
 474                 PMD_DRV_LOG(ERR, "vsi_queue_config_info argument wrong");
 475                 ret = I40E_ERR_PARAM;
 476                 goto send_msg;
 477         }
 478
 479         vc_qpi = vc_vqci->qpair;
 480         for (i = 0; i < vc_vqci->num_queue_pairs; i++) {
 481                 if (vc_qpi[i].rxq.queue_id > vsi->nb_qps - 1 ||
 482                         vc_qpi[i].txq.queue_id > vsi->nb_qps - 1) {
 483                         ret = I40E_ERR_PARAM;
 484                         goto send_msg;
 485                 }
 486
 487                 /*
 488                  * Apply VF RX queue setting to HMC.
 489                  * If the opcode is I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES_EXT,
 490                  * then the extra information of
 491                  * 'struct i40e_virtchnl_queue_pair_extra_info' is needed,
 492                  * otherwise set the last parameter to NULL.
 493                  */
 494                 if (i40e_pf_host_hmc_config_rxq(hw, vf, &vc_qpi[i].rxq,
 495                         I40E_CFG_CRCSTRIP_DEFAULT) != I40E_SUCCESS) {
 496                         PMD_DRV_LOG(ERR, "Configure RX queue HMC failed");
 497                         ret = I40E_ERR_PARAM;
 498                         goto send_msg;
 499                 }
 500
 501                 /* Apply VF TX queue setting to HMC */
 502                 if (i40e_pf_host_hmc_config_txq(hw, vf,
 503                         &vc_qpi[i].txq) != I40E_SUCCESS) {
 504                         PMD_DRV_LOG(ERR, "Configure TX queue HMC failed");
 505                         ret = I40E_ERR_PARAM;
 506                         goto send_msg;
 507                 }
 508         }
 509
 510 send_msg:
 511         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES,
 512                                                         ret, NULL, 0);
 513
 514         return ret;
 515 }
 516
 517 static int
 518 i40e_pf_host_process_cmd_config_vsi_queues_ext(struct i40e_pf_vf *vf,
 519                                                uint8_t *msg,
 520                                                uint16_t msglen,
 521                                                bool b_op)
 522 {
 523         struct i40e_hw *hw = I40E_PF_TO_HW(vf->pf);
 524         struct i40e_vsi *vsi = vf->vsi;
 525         struct i40e_virtchnl_vsi_queue_config_ext_info *vc_vqcei =
 526                 (struct i40e_virtchnl_vsi_queue_config_ext_info *)msg;
 527         struct i40e_virtchnl_queue_pair_ext_info *vc_qpei;
 528         int i, ret = I40E_SUCCESS;
 529
 530         if (!b_op) {
 531                 i40e_pf_host_send_msg_to_vf(
 532                         vf,
 533                         I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES_EXT,
 534                         I40E_NOT_SUPPORTED, NULL, 0);
 535                 return ret;
 536         }
 537
 538         if (!msg || vc_vqcei->num_queue_pairs > vsi->nb_qps ||
 539                 vc_vqcei->num_queue_pairs > I40E_MAX_VSI_QP ||
 540                 msglen < I40E_VIRTCHNL_CONFIG_VSI_QUEUES_SIZE(vc_vqcei,
 541                                         vc_vqcei->num_queue_pairs)) {
 542                 PMD_DRV_LOG(ERR, "vsi_queue_config_ext_info argument wrong");
 543                 ret = I40E_ERR_PARAM;
 544                 goto send_msg;
 545         }
 546
 547         vc_qpei = vc_vqcei->qpair;
 548         for (i = 0; i < vc_vqcei->num_queue_pairs; i++) {
 549                 if (vc_qpei[i].rxq.queue_id > vsi->nb_qps - 1 ||
 550                         vc_qpei[i].txq.queue_id > vsi->nb_qps - 1) {
 551                         ret = I40E_ERR_PARAM;
 552                         goto send_msg;
 553                 }
 554                 /*
 555                  * Apply VF RX queue setting to HMC.
 556                  * If the opcode is I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES_EXT,
 557                  * then the extra information of
 558                  * 'struct i40e_virtchnl_queue_pair_ext_info' is needed,
 559                  * otherwise set the last parameter to NULL.
 560                  */
 561                 if (i40e_pf_host_hmc_config_rxq(hw, vf, &vc_qpei[i].rxq,
 562                         vc_qpei[i].rxq_ext.crcstrip) != I40E_SUCCESS) {
 563                         PMD_DRV_LOG(ERR, "Configure RX queue HMC failed");
 564                         ret = I40E_ERR_PARAM;
 565                         goto send_msg;
 566                 }
 567
 568                 /* Apply VF TX queue setting to HMC */
 569                 if (i40e_pf_host_hmc_config_txq(hw, vf, &vc_qpei[i].txq) !=
 570                                                         I40E_SUCCESS) {
 571                         PMD_DRV_LOG(ERR, "Configure TX queue HMC failed");
 572                         ret = I40E_ERR_PARAM;
 573                         goto send_msg;
 574                 }
 575         }
 576
 577 send_msg:
 578         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES_EXT,
 579                                                                 ret, NULL, 0);
 580
 581         return ret;
 582 }
 583
 584 static void
 585 i40e_pf_config_irq_link_list(struct i40e_pf_vf *vf,
 586                               struct i40e_virtchnl_vector_map *vvm)
 587 {
 588 #define BITS_PER_CHAR 8
 589         uint64_t linklistmap = 0, tempmap;
 590         struct i40e_hw *hw = I40E_PF_TO_HW(vf->pf);
 591         uint16_t qid;
 592         bool b_first_q = true;
 593         enum i40e_queue_type qtype;
 594         uint16_t vector_id;
 595         uint32_t reg, reg_idx;
 596         uint16_t itr_idx = 0, i;
 597
 598         vector_id = vvm->vector_id;
 599         /* setup the head */
 600         if (!vector_id)
 601                 reg_idx = I40E_VPINT_LNKLST0(vf->vf_idx);
 602         else
 603                 reg_idx = I40E_VPINT_LNKLSTN(
 604                 ((hw->func_caps.num_msix_vectors_vf - 1) * vf->vf_idx)
 605                 + (vector_id - 1));
 606
 607         if (vvm->rxq_map == 0 && vvm->txq_map == 0) {
 608                 I40E_WRITE_REG(hw, reg_idx,
 609                         I40E_VPINT_LNKLST0_FIRSTQ_INDX_MASK);
 610                 goto cfg_irq_done;
 611         }
 612
 613         /* sort all rx and tx queues */
 614         tempmap = vvm->rxq_map;
 615         for (i = 0; i < sizeof(vvm->rxq_map) * BITS_PER_CHAR; i++) {
 616                 if (tempmap & 0x1)
 617                         linklistmap |= (1 << (2 * i));
 618                 tempmap >>= 1;
 619         }
 620
 621         tempmap = vvm->txq_map;
 622         for (i = 0; i < sizeof(vvm->txq_map) * BITS_PER_CHAR; i++) {
 623                 if (tempmap & 0x1)
 624                         linklistmap |= (1 << (2 * i + 1));
 625                 tempmap >>= 1;
 626         }
 627
 628         /* Link all rx and tx queues into a chained list */
 629         tempmap = linklistmap;
 630         i = 0;
 631         b_first_q = true;
 632         do {
 633                 if (tempmap & 0x1) {
 634                         qtype = (enum i40e_queue_type)(i % 2);
 635                         qid = vf->vsi->base_queue + i / 2;
 636                         if (b_first_q) {
 637                                 /* This is header */
 638                                 b_first_q = false;
 639                                 reg = ((qtype <<
 640                                 I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_SHIFT)
 641                                 | qid);
 642                         } else {
 643                                 /* element in the link list */
 644                                 reg = (vector_id) |
 645                                 (qtype << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT) |
 646                                 (qid << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT) |
 647                                 BIT(I40E_QINT_RQCTL_CAUSE_ENA_SHIFT) |
 648                                 (itr_idx << I40E_QINT_RQCTL_ITR_INDX_SHIFT);
 649                         }
 650                         I40E_WRITE_REG(hw, reg_idx, reg);
 651                         /* find next register to program */
 652                         switch (qtype) {
 653                         case I40E_QUEUE_TYPE_RX:
 654                                 reg_idx = I40E_QINT_RQCTL(qid);
 655                                 itr_idx = vvm->rxitr_idx;
 656                                 break;
 657                         case I40E_QUEUE_TYPE_TX:
 658                                 reg_idx = I40E_QINT_TQCTL(qid);
 659                                 itr_idx = vvm->txitr_idx;
 660                                 break;
 661                         default:
 662                                 break;
 663                         }
 664                 }
 665                 i++;
 666                 tempmap >>= 1;
 667         } while (tempmap);
 668
 669         /* Terminate the link list */
 670         reg = (vector_id) |
 671                 (0 << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT) |
 672                 (0x7FF << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT) |
 673                 BIT(I40E_QINT_RQCTL_CAUSE_ENA_SHIFT) |
 674                 (itr_idx << I40E_QINT_RQCTL_ITR_INDX_SHIFT);
 675         I40E_WRITE_REG(hw, reg_idx, reg);
 676
 677 cfg_irq_done:
 678         I40E_WRITE_FLUSH(hw);
 679 }
 680
 681 static int
 682 i40e_pf_host_process_cmd_config_irq_map(struct i40e_pf_vf *vf,
 683                                         uint8_t *msg, uint16_t msglen,
 684                                         bool b_op)
 685 {
 686         int ret = I40E_SUCCESS;
 687         struct i40e_pf *pf = vf->pf;
 688         struct i40e_hw *hw = I40E_PF_TO_HW(vf->pf);
 689         struct i40e_virtchnl_irq_map_info *irqmap =
 690             (struct i40e_virtchnl_irq_map_info *)msg;
 691         struct i40e_virtchnl_vector_map *map;
 692         int i;
 693         uint16_t vector_id;
 694         unsigned long qbit_max;
 695
 696         if (!b_op) {
 697                 i40e_pf_host_send_msg_to_vf(
 698                         vf,
 699                         I40E_VIRTCHNL_OP_CONFIG_IRQ_MAP,
 700                         I40E_NOT_SUPPORTED, NULL, 0);
 701                 return ret;
 702         }
 703
 704         if (msg == NULL || msglen < sizeof(struct i40e_virtchnl_irq_map_info)) {
 705                 PMD_DRV_LOG(ERR, "buffer too short");
 706                 ret = I40E_ERR_PARAM;
 707                 goto send_msg;
 708         }
 709
 710         /* PF host will support both DPDK VF or Linux VF driver, identify by
 711          * number of vectors requested.
 712          */
 713
 714         /* DPDK VF only requires single vector */
 715         if (irqmap->num_vectors == 1) {
 716                 /* This MSIX intr store the intr in VF range */
 717                 vf->vsi->msix_intr = irqmap->vecmap[0].vector_id;
 718                 vf->vsi->nb_msix = irqmap->num_vectors;
 719                 vf->vsi->nb_used_qps = vf->vsi->nb_qps;
 720
 721                 /* Don't care how the TX/RX queue mapping with this vector.
 722                  * Link all VF RX queues together. Only did mapping work.
 723                  * VF can disable/enable the intr by itself.
 724                  */
 725                 i40e_vsi_queues_bind_intr(vf->vsi);
 726                 goto send_msg;
 727         }
 728
 729         /* Then, it's Linux VF driver */
 730         qbit_max = 1 << pf->vf_nb_qp_max;
 731         for (i = 0; i < irqmap->num_vectors; i++) {
 732                 map = &irqmap->vecmap[i];
 733
 734                 vector_id = map->vector_id;
 735                 /* validate msg params */
 736                 if (vector_id >= hw->func_caps.num_msix_vectors_vf) {
 737                         ret = I40E_ERR_PARAM;
 738                         goto send_msg;
 739                 }
 740
 741                 if ((map->rxq_map < qbit_max) && (map->txq_map < qbit_max)) {
 742                         i40e_pf_config_irq_link_list(vf, map);
 743                 } else {
 744                         /* configured queue size excceed limit */
 745                         ret = I40E_ERR_PARAM;
 746                         goto send_msg;
 747                 }
 748         }
 749
 750 send_msg:
 751         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_CONFIG_IRQ_MAP,
 752                                                         ret, NULL, 0);
 753
 754         return ret;
 755 }
 756
 757 static int
 758 i40e_pf_host_switch_queues(struct i40e_pf_vf *vf,
 759                            struct i40e_virtchnl_queue_select *qsel,
 760                            bool on)
 761 {
 762         int ret = I40E_SUCCESS;
 763         int i;
 764         struct i40e_hw *hw = I40E_PF_TO_HW(vf->pf);
 765         uint16_t baseq = vf->vsi->base_queue;
 766
 767         if (qsel->rx_queues + qsel->tx_queues == 0)
 768                 return I40E_ERR_PARAM;
 769
 770         /* always enable RX first and disable last */
 771         /* Enable RX if it's enable */
 772         if (on) {
 773                 for (i = 0; i < I40E_MAX_QP_NUM_PER_VF; i++)
 774                         if (qsel->rx_queues & (1 << i)) {
 775                                 ret = i40e_switch_rx_queue(hw, baseq + i, on);
 776                                 if (ret != I40E_SUCCESS)
 777                                         return ret;
 778                         }
 779         }
 780
 781         /* Enable/Disable TX */
 782         for (i = 0; i < I40E_MAX_QP_NUM_PER_VF; i++)
 783                 if (qsel->tx_queues & (1 << i)) {
 784                         ret = i40e_switch_tx_queue(hw, baseq + i, on);
 785                         if (ret != I40E_SUCCESS)
 786                                 return ret;
 787                 }
 788
 789         /* disable RX last if it's disable */
 790         if (!on) {
 791                 /* disable RX */
 792                 for (i = 0; i < I40E_MAX_QP_NUM_PER_VF; i++)
 793                         if (qsel->rx_queues & (1 << i)) {
 794                                 ret = i40e_switch_rx_queue(hw, baseq + i, on);
 795                                 if (ret != I40E_SUCCESS)
 796                                         return ret;
 797                         }
 798         }
 799
 800         return ret;
 801 }
 802
 803 static int
 804 i40e_pf_host_process_cmd_enable_queues(struct i40e_pf_vf *vf,
 805                                        uint8_t *msg,
 806                                        uint16_t msglen)
 807 {
 808         int ret = I40E_SUCCESS;
 809         struct i40e_virtchnl_queue_select *q_sel =
 810                 (struct i40e_virtchnl_queue_select *)msg;
 811
 812         if (msg == NULL || msglen != sizeof(*q_sel)) {
 813                 ret = I40E_ERR_PARAM;
 814                 goto send_msg;
 815         }
 816         ret = i40e_pf_host_switch_queues(vf, q_sel, true);
 817
 818 send_msg:
 819         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_ENABLE_QUEUES,
 820                                                         ret, NULL, 0);
 821
 822         return ret;
 823 }
 824
 825 static int
 826 i40e_pf_host_process_cmd_disable_queues(struct i40e_pf_vf *vf,
 827                                         uint8_t *msg,
 828                                         uint16_t msglen,
 829                                         bool b_op)
 830 {
 831         int ret = I40E_SUCCESS;
 832         struct i40e_virtchnl_queue_select *q_sel =
 833                 (struct i40e_virtchnl_queue_select *)msg;
 834
 835         if (!b_op) {
 836                 i40e_pf_host_send_msg_to_vf(
 837                         vf,
 838                         I40E_VIRTCHNL_OP_DISABLE_QUEUES,
 839                         I40E_NOT_SUPPORTED, NULL, 0);
 840                 return ret;
 841         }
 842
 843         if (msg == NULL || msglen != sizeof(*q_sel)) {
 844                 ret = I40E_ERR_PARAM;
 845                 goto send_msg;
 846         }
 847         ret = i40e_pf_host_switch_queues(vf, q_sel, false);
 848
 849 send_msg:
 850         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_DISABLE_QUEUES,
 851                                                         ret, NULL, 0);
 852
 853         return ret;
 854 }
 855
 856
 857 static int
 858 i40e_pf_host_process_cmd_add_ether_address(struct i40e_pf_vf *vf,
 859                                            uint8_t *msg,
 860                                            uint16_t msglen,
 861                                            bool b_op)
 862 {
 863         int ret = I40E_SUCCESS;
 864         struct i40e_virtchnl_ether_addr_list *addr_list =
 865                         (struct i40e_virtchnl_ether_addr_list *)msg;
 866         struct i40e_mac_filter_info filter;
 867         int i;
 868         struct ether_addr *mac;
 869
 870         if (!b_op) {
 871                 i40e_pf_host_send_msg_to_vf(
 872                         vf,
 873                         I40E_VIRTCHNL_OP_ADD_ETHER_ADDRESS,
 874                         I40E_NOT_SUPPORTED, NULL, 0);
 875                 return ret;
 876         }
 877
 878         memset(&filter, 0 , sizeof(struct i40e_mac_filter_info));
 879
 880         if (msg == NULL || msglen <= sizeof(*addr_list)) {
 881                 PMD_DRV_LOG(ERR, "add_ether_address argument too short");
 882                 ret = I40E_ERR_PARAM;
 883                 goto send_msg;
 884         }
 885
 886         for (i = 0; i < addr_list->num_elements; i++) {
 887                 mac = (struct ether_addr *)(addr_list->list[i].addr);
 888                 (void)rte_memcpy(&filter.mac_addr, mac, ETHER_ADDR_LEN);
 889                 filter.filter_type = RTE_MACVLAN_PERFECT_MATCH;
 890                 if (is_zero_ether_addr(mac) ||
 891                     i40e_vsi_add_mac(vf->vsi, &filter)) {
 892                         ret = I40E_ERR_INVALID_MAC_ADDR;
 893                         goto send_msg;
 894                 }
 895         }
 896
 897 send_msg:
 898         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_ADD_ETHER_ADDRESS,
 899                                                         ret, NULL, 0);
 900
 901         return ret;
 902 }
 903
 904 static int
 905 i40e_pf_host_process_cmd_del_ether_address(struct i40e_pf_vf *vf,
 906                                            uint8_t *msg,
 907                                            uint16_t msglen,
 908                                            bool b_op)
 909 {
 910         int ret = I40E_SUCCESS;
 911         struct i40e_virtchnl_ether_addr_list *addr_list =
 912                 (struct i40e_virtchnl_ether_addr_list *)msg;
 913         int i;
 914         struct ether_addr *mac;
 915
 916         if (!b_op) {
 917                 i40e_pf_host_send_msg_to_vf(
 918                         vf,
 919                         I40E_VIRTCHNL_OP_DEL_ETHER_ADDRESS,
 920                         I40E_NOT_SUPPORTED, NULL, 0);
 921                 return ret;
 922         }
 923
 924         if (msg == NULL || msglen <= sizeof(*addr_list)) {
 925                 PMD_DRV_LOG(ERR, "delete_ether_address argument too short");
 926                 ret = I40E_ERR_PARAM;
 927                 goto send_msg;
 928         }
 929
 930         for (i = 0; i < addr_list->num_elements; i++) {
 931                 mac = (struct ether_addr *)(addr_list->list[i].addr);
 932                 if(is_zero_ether_addr(mac) ||
 933                         i40e_vsi_delete_mac(vf->vsi, mac)) {
 934                         ret = I40E_ERR_INVALID_MAC_ADDR;
 935                         goto send_msg;
 936                 }
 937         }
 938
 939 send_msg:
 940         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_DEL_ETHER_ADDRESS,
 941                                                         ret, NULL, 0);
 942
 943         return ret;
 944 }
 945
 946 static int
 947 i40e_pf_host_process_cmd_add_vlan(struct i40e_pf_vf *vf,
 948                                 uint8_t *msg, uint16_t msglen,
 949                                 bool b_op)
 950 {
 951         int ret = I40E_SUCCESS;
 952         struct i40e_virtchnl_vlan_filter_list *vlan_filter_list =
 953                 (struct i40e_virtchnl_vlan_filter_list *)msg;
 954         int i;
 955         uint16_t *vid;
 956
 957         if (!b_op) {
 958                 i40e_pf_host_send_msg_to_vf(
 959                         vf,
 960                         I40E_VIRTCHNL_OP_ADD_VLAN,
 961                         I40E_NOT_SUPPORTED, NULL, 0);
 962                 return ret;
 963         }
 964
 965         if (msg == NULL || msglen <= sizeof(*vlan_filter_list)) {
 966                 PMD_DRV_LOG(ERR, "add_vlan argument too short");
 967                 ret = I40E_ERR_PARAM;
 968                 goto send_msg;
 969         }
 970
 971         vid = vlan_filter_list->vlan_id;
 972
 973         for (i = 0; i < vlan_filter_list->num_elements; i++) {
 974                 ret = i40e_vsi_add_vlan(vf->vsi, vid[i]);
 975                 if(ret != I40E_SUCCESS)
 976                         goto send_msg;
 977         }
 978
 979 send_msg:
 980         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_ADD_VLAN,
 981                                                 ret, NULL, 0);
 982
 983         return ret;
 984 }
 985
 986 static int
 987 i40e_pf_host_process_cmd_del_vlan(struct i40e_pf_vf *vf,
 988                                   uint8_t *msg,
 989                                   uint16_t msglen,
 990                                   bool b_op)
 991 {
 992         int ret = I40E_SUCCESS;
 993         struct i40e_virtchnl_vlan_filter_list *vlan_filter_list =
 994                         (struct i40e_virtchnl_vlan_filter_list *)msg;
 995         int i;
 996         uint16_t *vid;
 997
 998         if (!b_op) {
 999                 i40e_pf_host_send_msg_to_vf(
1000                         vf,
1001                         I40E_VIRTCHNL_OP_DEL_VLAN,
1002                         I40E_NOT_SUPPORTED, NULL, 0);
1003                 return ret;
1004         }
1005
1006         if (msg == NULL || msglen <= sizeof(*vlan_filter_list)) {
1007                 PMD_DRV_LOG(ERR, "delete_vlan argument too short");
1008                 ret = I40E_ERR_PARAM;
1009                 goto send_msg;
1010         }
1011
1012         vid = vlan_filter_list->vlan_id;
1013         for (i = 0; i < vlan_filter_list->num_elements; i++) {
1014                 ret = i40e_vsi_delete_vlan(vf->vsi, vid[i]);
1015                 if(ret != I40E_SUCCESS)
1016                         goto send_msg;
1017         }
1018
1019 send_msg:
1020         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_DEL_VLAN,
1021                                                 ret, NULL, 0);
1022
1023         return ret;
1024 }
1025
1026 static int
1027 i40e_pf_host_process_cmd_config_promisc_mode(
1028                                         struct i40e_pf_vf *vf,
1029                                         uint8_t *msg,
1030                                         uint16_t msglen,
1031                                         bool b_op)
1032 {
1033         int ret = I40E_SUCCESS;
1034         struct i40e_virtchnl_promisc_info *promisc =
1035                                 (struct i40e_virtchnl_promisc_info *)msg;
1036         struct i40e_hw *hw = I40E_PF_TO_HW(vf->pf);
1037         bool unicast = FALSE, multicast = FALSE;
1038
1039         if (!b_op) {
1040                 i40e_pf_host_send_msg_to_vf(
1041                         vf,
1042                         I40E_VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE,
1043                         I40E_NOT_SUPPORTED, NULL, 0);
1044                 return ret;
1045         }
1046
1047         if (msg == NULL || msglen != sizeof(*promisc)) {
1048                 ret = I40E_ERR_PARAM;
1049                 goto send_msg;
1050         }
1051
1052         if (promisc->flags & I40E_FLAG_VF_UNICAST_PROMISC)
1053                 unicast = TRUE;
1054         ret = i40e_aq_set_vsi_unicast_promiscuous(hw,
1055                         vf->vsi->seid, unicast, NULL, true);
1056         if (ret != I40E_SUCCESS)
1057                 goto send_msg;
1058
1059         if (promisc->flags & I40E_FLAG_VF_MULTICAST_PROMISC)
1060                 multicast = TRUE;
1061         ret = i40e_aq_set_vsi_multicast_promiscuous(hw, vf->vsi->seid,
1062                                                 multicast, NULL);
1063
1064 send_msg:
1065         i40e_pf_host_send_msg_to_vf(vf,
1066                 I40E_VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE, ret, NULL, 0);
1067
1068         return ret;
1069 }
1070
1071 static int
1072 i40e_pf_host_process_cmd_get_stats(struct i40e_pf_vf *vf, bool b_op)
1073 {
1074         i40e_update_vsi_stats(vf->vsi);
1075
1076         if (b_op)
1077                 i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_GET_STATS,
1078                                             I40E_SUCCESS,
1079                                             (uint8_t *)&vf->vsi->eth_stats,
1080                                             sizeof(vf->vsi->eth_stats));
1081         else
1082                 i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_GET_STATS,
1083                                             I40E_NOT_SUPPORTED,
1084                                             (uint8_t *)&vf->vsi->eth_stats,
1085                                             sizeof(vf->vsi->eth_stats));
1086
1087         return I40E_SUCCESS;
1088 }
1089
1090 static int
1091 i40e_pf_host_process_cmd_cfg_vlan_offload(
1092                                         struct i40e_pf_vf *vf,
1093                                         uint8_t *msg,
1094                                         uint16_t msglen,
1095                                         bool b_op)
1096 {
1097         int ret = I40E_SUCCESS;
1098         struct i40e_virtchnl_vlan_offload_info *offload =
1099                         (struct i40e_virtchnl_vlan_offload_info *)msg;
1100
1101         if (!b_op) {
1102                 i40e_pf_host_send_msg_to_vf(
1103                         vf,
1104                         I40E_VIRTCHNL_OP_CFG_VLAN_OFFLOAD,
1105                         I40E_NOT_SUPPORTED, NULL, 0);
1106                 return ret;
1107         }
1108
1109         if (msg == NULL || msglen != sizeof(*offload)) {
1110                 ret = I40E_ERR_PARAM;
1111                 goto send_msg;
1112         }
1113
1114         ret = i40e_vsi_config_vlan_stripping(vf->vsi,
1115                                                 !!offload->enable_vlan_strip);
1116         if (ret != 0)
1117                 PMD_DRV_LOG(ERR, "Failed to configure vlan stripping");
1118
1119 send_msg:
1120         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_CFG_VLAN_OFFLOAD,
1121                                         ret, NULL, 0);
1122
1123         return ret;
1124 }
1125
1126 static int
1127 i40e_pf_host_process_cmd_cfg_pvid(struct i40e_pf_vf *vf,
1128                                         uint8_t *msg,
1129                                         uint16_t msglen,
1130                                         bool b_op)
1131 {
1132         int ret = I40E_SUCCESS;
1133         struct i40e_virtchnl_pvid_info  *tpid_info =
1134                         (struct i40e_virtchnl_pvid_info *)msg;
1135
1136         if (!b_op) {
1137                 i40e_pf_host_send_msg_to_vf(
1138                         vf,
1139                         I40E_VIRTCHNL_OP_CFG_VLAN_PVID,
1140                         I40E_NOT_SUPPORTED, NULL, 0);
1141                 return ret;
1142         }
1143
1144         if (msg == NULL || msglen != sizeof(*tpid_info)) {
1145                 ret = I40E_ERR_PARAM;
1146                 goto send_msg;
1147         }
1148
1149         ret = i40e_vsi_vlan_pvid_set(vf->vsi, &tpid_info->info);
1150
1151 send_msg:
1152         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_CFG_VLAN_PVID,
1153                                         ret, NULL, 0);
1154
1155         return ret;
1156 }
1157
1158 void
1159 i40e_notify_vf_link_status(struct rte_eth_dev *dev, struct i40e_pf_vf *vf)
1160 {
1161         struct i40e_virtchnl_pf_event event;
1162
1163         event.event = I40E_VIRTCHNL_EVENT_LINK_CHANGE;
1164         event.event_data.link_event.link_status =
1165                 dev->data->dev_link.link_status;
1166         event.event_data.link_event.link_speed =
1167                 (enum i40e_aq_link_speed)dev->data->dev_link.link_speed;
1168         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_EVENT,
1169                 I40E_SUCCESS, (uint8_t *)&event, sizeof(event));
1170 }
1171
1172 void
1173 i40e_pf_host_handle_vf_msg(struct rte_eth_dev *dev,
1174                            uint16_t abs_vf_id, uint32_t opcode,
1175                            __rte_unused uint32_t retval,
1176                            uint8_t *msg,
1177                            uint16_t msglen)
1178 {
1179         struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);
1180         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1181         struct i40e_pf_vf *vf;
1182         /* AdminQ will pass absolute VF id, transfer to internal vf id */
1183         uint16_t vf_id = abs_vf_id - hw->func_caps.vf_base_id;
1184         struct rte_pmd_i40e_mb_event_param cb_param;
1185         bool b_op = TRUE;
1186
1187         if (vf_id > pf->vf_num - 1 || !pf->vfs) {
1188                 PMD_DRV_LOG(ERR, "invalid argument");
1189                 return;
1190         }
1191
1192         vf = &pf->vfs[vf_id];
1193         if (!vf->vsi) {
1194                 PMD_DRV_LOG(ERR, "NO VSI associated with VF found");
1195                 i40e_pf_host_send_msg_to_vf(vf, opcode,
1196                         I40E_ERR_NO_AVAILABLE_VSI, NULL, 0);
1197                 return;
1198         }
1199
1200         /**
1201          * initialise structure to send to user application
1202          * will return response from user in retval field
1203          */
1204         cb_param.retval = RTE_PMD_I40E_MB_EVENT_PROCEED;
1205         cb_param.vfid = vf_id;
1206         cb_param.msg_type = opcode;
1207         cb_param.msg = (void *)msg;
1208         cb_param.msglen = msglen;
1209
1210         /**
1211          * Ask user application if we're allowed to perform those functions.
1212          * If we get cb_param.retval == RTE_PMD_I40E_MB_EVENT_PROCEED,
1213          * then business as usual.
1214          * If RTE_PMD_I40E_MB_EVENT_NOOP_ACK or RTE_PMD_I40E_MB_EVENT_NOOP_NACK,
1215          * do nothing and send not_supported to VF. As PF must send a response
1216          * to VF and ACK/NACK is not defined.
1217          */
1218         _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_VF_MBOX, &cb_param);
1219         if (cb_param.retval != RTE_PMD_I40E_MB_EVENT_PROCEED) {
1220                 PMD_DRV_LOG(WARNING, "VF to PF message(%d) is not permitted!",
1221                             opcode);
1222                 b_op = FALSE;
1223         }
1224
1225         switch (opcode) {
1226         case I40E_VIRTCHNL_OP_VERSION :
1227                 PMD_DRV_LOG(INFO, "OP_VERSION received");
1228                 i40e_pf_host_process_cmd_version(vf, b_op);
1229                 break;
1230         case I40E_VIRTCHNL_OP_RESET_VF :
1231                 PMD_DRV_LOG(INFO, "OP_RESET_VF received");
1232                 i40e_pf_host_process_cmd_reset_vf(vf);
1233                 break;
1234         case I40E_VIRTCHNL_OP_GET_VF_RESOURCES:
1235                 PMD_DRV_LOG(INFO, "OP_GET_VF_RESOURCES received");
1236                 i40e_pf_host_process_cmd_get_vf_resource(vf, b_op);
1237                 break;
1238         case I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES:
1239                 PMD_DRV_LOG(INFO, "OP_CONFIG_VSI_QUEUES received");
1240                 i40e_pf_host_process_cmd_config_vsi_queues(vf, msg,
1241                                                            msglen, b_op);
1242                 break;
1243         case I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES_EXT:
1244                 PMD_DRV_LOG(INFO, "OP_CONFIG_VSI_QUEUES_EXT received");
1245                 i40e_pf_host_process_cmd_config_vsi_queues_ext(vf, msg,
1246                                                                msglen, b_op);
1247                 break;
1248         case I40E_VIRTCHNL_OP_CONFIG_IRQ_MAP:
1249                 PMD_DRV_LOG(INFO, "OP_CONFIG_IRQ_MAP received");
1250                 i40e_pf_host_process_cmd_config_irq_map(vf, msg, msglen, b_op);
1251                 break;
1252         case I40E_VIRTCHNL_OP_ENABLE_QUEUES:
1253                 PMD_DRV_LOG(INFO, "OP_ENABLE_QUEUES received");
1254                 if (b_op) {
1255                         i40e_pf_host_process_cmd_enable_queues(vf, msg, msglen);
1256                         i40e_notify_vf_link_status(dev, vf);
1257                 } else {
1258                         i40e_pf_host_send_msg_to_vf(
1259                                 vf, I40E_VIRTCHNL_OP_ENABLE_QUEUES,
1260                                 I40E_NOT_SUPPORTED, NULL, 0);
1261                 }
1262                 break;
1263         case I40E_VIRTCHNL_OP_DISABLE_QUEUES:
1264                 PMD_DRV_LOG(INFO, "OP_DISABLE_QUEUE received");
1265                 i40e_pf_host_process_cmd_disable_queues(vf, msg, msglen, b_op);
1266                 break;
1267         case I40E_VIRTCHNL_OP_ADD_ETHER_ADDRESS:
1268                 PMD_DRV_LOG(INFO, "OP_ADD_ETHER_ADDRESS received");
1269                 i40e_pf_host_process_cmd_add_ether_address(vf, msg,
1270                                                            msglen, b_op);
1271                 break;
1272         case I40E_VIRTCHNL_OP_DEL_ETHER_ADDRESS:
1273                 PMD_DRV_LOG(INFO, "OP_DEL_ETHER_ADDRESS received");
1274                 i40e_pf_host_process_cmd_del_ether_address(vf, msg,
1275                                                            msglen, b_op);
1276                 break;
1277         case I40E_VIRTCHNL_OP_ADD_VLAN:
1278                 PMD_DRV_LOG(INFO, "OP_ADD_VLAN received");
1279                 i40e_pf_host_process_cmd_add_vlan(vf, msg, msglen, b_op);
1280                 break;
1281         case I40E_VIRTCHNL_OP_DEL_VLAN:
1282                 PMD_DRV_LOG(INFO, "OP_DEL_VLAN received");
1283                 i40e_pf_host_process_cmd_del_vlan(vf, msg, msglen, b_op);
1284                 break;
1285         case I40E_VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE:
1286                 PMD_DRV_LOG(INFO, "OP_CONFIG_PROMISCUOUS_MODE received");
1287                 i40e_pf_host_process_cmd_config_promisc_mode(vf, msg,
1288                                                              msglen, b_op);
1289                 break;
1290         case I40E_VIRTCHNL_OP_GET_STATS:
1291                 PMD_DRV_LOG(INFO, "OP_GET_STATS received");
1292                 i40e_pf_host_process_cmd_get_stats(vf, b_op);
1293                 break;
1294         case I40E_VIRTCHNL_OP_CFG_VLAN_OFFLOAD:
1295                 PMD_DRV_LOG(INFO, "OP_CFG_VLAN_OFFLOAD received");
1296                 i40e_pf_host_process_cmd_cfg_vlan_offload(vf, msg,
1297                                                           msglen, b_op);
1298                 break;
1299         case I40E_VIRTCHNL_OP_CFG_VLAN_PVID:
1300                 PMD_DRV_LOG(INFO, "OP_CFG_VLAN_PVID received");
1301                 i40e_pf_host_process_cmd_cfg_pvid(vf, msg, msglen, b_op);
1302                 break;
1303         /* Don't add command supported below, which will
1304          * return an error code.
1305          */
1306         default:
1307                 PMD_DRV_LOG(ERR, "%u received, not supported", opcode);
1308                 i40e_pf_host_send_msg_to_vf(vf, opcode, I40E_ERR_PARAM,
1309                                                                 NULL, 0);
1310                 break;
1311         }
1312 }
1313
1314 int
1315 i40e_pf_host_init(struct rte_eth_dev *dev)
1316 {
1317         struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);
1318         struct i40e_hw *hw = I40E_PF_TO_HW(pf);
1319         int ret, i;
1320         uint32_t val;
1321
1322         PMD_INIT_FUNC_TRACE();
1323
1324         /**
1325          * return if SRIOV not enabled, VF number not configured or
1326          * no queue assigned.
1327          */
1328         if(!hw->func_caps.sr_iov_1_1 || pf->vf_num == 0 || pf->vf_nb_qps == 0)
1329                 return I40E_SUCCESS;
1330
1331         /* Allocate memory to store VF structure */
1332         pf->vfs = rte_zmalloc("i40e_pf_vf",sizeof(*pf->vfs) * pf->vf_num, 0);
1333         if(pf->vfs == NULL)
1334                 return -ENOMEM;
1335
1336         /* Disable irq0 for VFR event */
1337         i40e_pf_disable_irq0(hw);
1338
1339         /* Disable VF link status interrupt */
1340         val = I40E_READ_REG(hw, I40E_PFGEN_PORTMDIO_NUM);
1341         val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK;
1342         I40E_WRITE_REG(hw, I40E_PFGEN_PORTMDIO_NUM, val);
1343         I40E_WRITE_FLUSH(hw);
1344
1345         for (i = 0; i < pf->vf_num; i++) {
1346                 pf->vfs[i].pf = pf;
1347                 pf->vfs[i].state = I40E_VF_INACTIVE;
1348                 pf->vfs[i].vf_idx = i;
1349                 ret = i40e_pf_host_vf_reset(&pf->vfs[i], 0);
1350                 if (ret != I40E_SUCCESS)
1351                         goto fail;
1352                 eth_random_addr(pf->vfs[i].mac_addr.addr_bytes);
1353         }
1354
1355         /* restore irq0 */
1356         i40e_pf_enable_irq0(hw);
1357
1358         return I40E_SUCCESS;
1359
1360 fail:
1361         rte_free(pf->vfs);
1362         i40e_pf_enable_irq0(hw);
1363
1364         return ret;
1365 }
1366
1367 int
1368 i40e_pf_host_uninit(struct rte_eth_dev *dev)
1369 {
1370         struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);
1371         struct i40e_hw *hw = I40E_PF_TO_HW(pf);
1372         uint32_t val;
1373
1374         PMD_INIT_FUNC_TRACE();
1375
1376         /**
1377          * return if SRIOV not enabled, VF number not configured or
1378          * no queue assigned.
1379          */
1380         if ((!hw->func_caps.sr_iov_1_1) ||
1381                 (pf->vf_num == 0) ||
1382                 (pf->vf_nb_qps == 0))
1383                 return I40E_SUCCESS;
1384
1385         /* free memory to store VF structure */
1386         rte_free(pf->vfs);
1387         pf->vfs = NULL;
1388
1389         /* Disable irq0 for VFR event */
1390         i40e_pf_disable_irq0(hw);
1391
1392         /* Disable VF link status interrupt */
1393         val = I40E_READ_REG(hw, I40E_PFGEN_PORTMDIO_NUM);
1394         val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK;
1395         I40E_WRITE_REG(hw, I40E_PFGEN_PORTMDIO_NUM, val);
1396         I40E_WRITE_FLUSH(hw);
1397
1398         return I40E_SUCCESS;
1399 }