drivers/net/vmxnet3/vmxnet3_ethdev.c

   1 /*-
   2  *   BSD LICENSE
   3  *
   4  *   Copyright(c) 2010-2015 Intel Corporation. All rights reserved.
   5  *   All rights reserved.
   6  *
   7  *   Redistribution and use in source and binary forms, with or without
   8  *   modification, are permitted provided that the following conditions
   9  *   are met:
  10  *
  11  *     * Redistributions of source code must retain the above copyright
  12  *       notice, this list of conditions and the following disclaimer.
  13  *     * Redistributions in binary form must reproduce the above copyright
  14  *       notice, this list of conditions and the following disclaimer in
  15  *       the documentation and/or other materials provided with the
  16  *       distribution.
  17  *     * Neither the name of Intel Corporation nor the names of its
  18  *       contributors may be used to endorse or promote products derived
  19  *       from this software without specific prior written permission.
  20  *
  21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32  */
  33
  34 #include <sys/queue.h>
  35 #include <stdio.h>
  36 #include <errno.h>
  37 #include <stdint.h>
  38 #include <string.h>
  39 #include <unistd.h>
  40 #include <stdarg.h>
  41 #include <fcntl.h>
  42 #include <inttypes.h>
  43 #include <rte_byteorder.h>
  44 #include <rte_common.h>
  45 #include <rte_cycles.h>
  46
  47 #include <rte_interrupts.h>
  48 #include <rte_log.h>
  49 #include <rte_debug.h>
  50 #include <rte_pci.h>
  51 #include <rte_atomic.h>
  52 #include <rte_branch_prediction.h>
  53 #include <rte_memory.h>
  54 #include <rte_memzone.h>
  55 #include <rte_eal.h>
  56 #include <rte_alarm.h>
  57 #include <rte_ether.h>
  58 #include <rte_ethdev.h>
  59 #include <rte_ethdev_pci.h>
  60 #include <rte_string_fns.h>
  61 #include <rte_malloc.h>
  62 #include <rte_dev.h>
  63
  64 #include "base/vmxnet3_defs.h"
  65
  66 #include "vmxnet3_ring.h"
  67 #include "vmxnet3_logs.h"
  68 #include "vmxnet3_ethdev.h"
  69
  70 #define PROCESS_SYS_EVENTS 0
  71
  72 #define VMXNET3_TX_MAX_SEG      UINT8_MAX
  73
  74 static int eth_vmxnet3_dev_init(struct rte_eth_dev *eth_dev);
  75 static int eth_vmxnet3_dev_uninit(struct rte_eth_dev *eth_dev);
  76 static int vmxnet3_dev_configure(struct rte_eth_dev *dev);
  77 static int vmxnet3_dev_start(struct rte_eth_dev *dev);
  78 static void vmxnet3_dev_stop(struct rte_eth_dev *dev);
  79 static void vmxnet3_dev_close(struct rte_eth_dev *dev);
  80 static void vmxnet3_dev_set_rxmode(struct vmxnet3_hw *hw, uint32_t feature, int set);
  81 static void vmxnet3_dev_promiscuous_enable(struct rte_eth_dev *dev);
  82 static void vmxnet3_dev_promiscuous_disable(struct rte_eth_dev *dev);
  83 static void vmxnet3_dev_allmulticast_enable(struct rte_eth_dev *dev);
  84 static void vmxnet3_dev_allmulticast_disable(struct rte_eth_dev *dev);
  85 static int __vmxnet3_dev_link_update(struct rte_eth_dev *dev,
  86                                      int wait_to_complete);
  87 static int vmxnet3_dev_link_update(struct rte_eth_dev *dev,
  88                                    int wait_to_complete);
  89 static void vmxnet3_hw_stats_save(struct vmxnet3_hw *hw);
  90 static int vmxnet3_dev_stats_get(struct rte_eth_dev *dev,
  91                                   struct rte_eth_stats *stats);
  92 static int vmxnet3_dev_xstats_get_names(struct rte_eth_dev *dev,
  93                                         struct rte_eth_xstat_name *xstats,
  94                                         unsigned int n);
  95 static int vmxnet3_dev_xstats_get(struct rte_eth_dev *dev,
  96                                   struct rte_eth_xstat *xstats, unsigned int n);
  97 static void vmxnet3_dev_info_get(struct rte_eth_dev *dev,
  98                                  struct rte_eth_dev_info *dev_info);
  99 static const uint32_t *
 100 vmxnet3_dev_supported_ptypes_get(struct rte_eth_dev *dev);
 101 static int vmxnet3_dev_vlan_filter_set(struct rte_eth_dev *dev,
 102                                        uint16_t vid, int on);
 103 static int vmxnet3_dev_vlan_offload_set(struct rte_eth_dev *dev, int mask);
 104 static void vmxnet3_mac_addr_set(struct rte_eth_dev *dev,
 105                                  struct ether_addr *mac_addr);
 106 static void vmxnet3_interrupt_handler(void *param);
 107
 108 /*
 109  * The set of PCI devices this driver supports
 110  */
 111 #define VMWARE_PCI_VENDOR_ID 0x15AD
 112 #define VMWARE_DEV_ID_VMXNET3 0x07B0
 113 static const struct rte_pci_id pci_id_vmxnet3_map[] = {
 114         { RTE_PCI_DEVICE(VMWARE_PCI_VENDOR_ID, VMWARE_DEV_ID_VMXNET3) },
 115         { .vendor_id = 0, /* sentinel */ },
 116 };
 117
 118 static const struct eth_dev_ops vmxnet3_eth_dev_ops = {
 119         .dev_configure        = vmxnet3_dev_configure,
 120         .dev_start            = vmxnet3_dev_start,
 121         .dev_stop             = vmxnet3_dev_stop,
 122         .dev_close            = vmxnet3_dev_close,
 123         .promiscuous_enable   = vmxnet3_dev_promiscuous_enable,
 124         .promiscuous_disable  = vmxnet3_dev_promiscuous_disable,
 125         .allmulticast_enable  = vmxnet3_dev_allmulticast_enable,
 126         .allmulticast_disable = vmxnet3_dev_allmulticast_disable,
 127         .link_update          = vmxnet3_dev_link_update,
 128         .stats_get            = vmxnet3_dev_stats_get,
 129         .xstats_get_names     = vmxnet3_dev_xstats_get_names,
 130         .xstats_get           = vmxnet3_dev_xstats_get,
 131         .mac_addr_set         = vmxnet3_mac_addr_set,
 132         .dev_infos_get        = vmxnet3_dev_info_get,
 133         .dev_supported_ptypes_get = vmxnet3_dev_supported_ptypes_get,
 134         .vlan_filter_set      = vmxnet3_dev_vlan_filter_set,
 135         .vlan_offload_set     = vmxnet3_dev_vlan_offload_set,
 136         .rx_queue_setup       = vmxnet3_dev_rx_queue_setup,
 137         .rx_queue_release     = vmxnet3_dev_rx_queue_release,
 138         .tx_queue_setup       = vmxnet3_dev_tx_queue_setup,
 139         .tx_queue_release     = vmxnet3_dev_tx_queue_release,
 140 };
 141
 142 struct vmxnet3_xstats_name_off {
 143         char name[RTE_ETH_XSTATS_NAME_SIZE];
 144         unsigned int offset;
 145 };
 146
 147 /* tx_qX_ is prepended to the name string here */
 148 static const struct vmxnet3_xstats_name_off vmxnet3_txq_stat_strings[] = {
 149         {"drop_total",         offsetof(struct vmxnet3_txq_stats, drop_total)},
 150         {"drop_too_many_segs", offsetof(struct vmxnet3_txq_stats, drop_too_many_segs)},
 151         {"drop_tso",           offsetof(struct vmxnet3_txq_stats, drop_tso)},
 152         {"tx_ring_full",       offsetof(struct vmxnet3_txq_stats, tx_ring_full)},
 153 };
 154
 155 /* rx_qX_ is prepended to the name string here */
 156 static const struct vmxnet3_xstats_name_off vmxnet3_rxq_stat_strings[] = {
 157         {"drop_total",           offsetof(struct vmxnet3_rxq_stats, drop_total)},
 158         {"drop_err",             offsetof(struct vmxnet3_rxq_stats, drop_err)},
 159         {"drop_fcs",             offsetof(struct vmxnet3_rxq_stats, drop_fcs)},
 160         {"rx_buf_alloc_failure", offsetof(struct vmxnet3_rxq_stats, rx_buf_alloc_failure)},
 161 };
 162
 163 static const struct rte_memzone *
 164 gpa_zone_reserve(struct rte_eth_dev *dev, uint32_t size,
 165                  const char *post_string, int socket_id,
 166                  uint16_t align, bool reuse)
 167 {
 168         char z_name[RTE_MEMZONE_NAMESIZE];
 169         const struct rte_memzone *mz;
 170
 171         snprintf(z_name, sizeof(z_name), "%s_%d_%s",
 172                  dev->device->driver->name, dev->data->port_id, post_string);
 173
 174         mz = rte_memzone_lookup(z_name);
 175         if (!reuse) {
 176                 if (mz)
 177                         rte_memzone_free(mz);
 178                 return rte_memzone_reserve_aligned(z_name, size, socket_id,
 179                                                    0, align);
 180         }
 181
 182         if (mz)
 183                 return mz;
 184
 185         return rte_memzone_reserve_aligned(z_name, size, socket_id, 0, align);
 186 }
 187
 188 /**
 189  * Atomically reads the link status information from global
 190  * structure rte_eth_dev.
 191  *
 192  * @param dev
 193  *   - Pointer to the structure rte_eth_dev to read from.
 194  *   - Pointer to the buffer to be saved with the link status.
 195  *
 196  * @return
 197  *   - On success, zero.
 198  *   - On failure, negative value.
 199  */
 200
 201 static int
 202 vmxnet3_dev_atomic_read_link_status(struct rte_eth_dev *dev,
 203                                     struct rte_eth_link *link)
 204 {
 205         struct rte_eth_link *dst = link;
 206         struct rte_eth_link *src = &(dev->data->dev_link);
 207
 208         if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
 209                                 *(uint64_t *)src) == 0)
 210                 return -1;
 211
 212         return 0;
 213 }
 214
 215 /**
 216  * Atomically writes the link status information into global
 217  * structure rte_eth_dev.
 218  *
 219  * @param dev
 220  *   - Pointer to the structure rte_eth_dev to write to.
 221  *   - Pointer to the buffer to be saved with the link status.
 222  *
 223  * @return
 224  *   - On success, zero.
 225  *   - On failure, negative value.
 226  */
 227 static int
 228 vmxnet3_dev_atomic_write_link_status(struct rte_eth_dev *dev,
 229                                      struct rte_eth_link *link)
 230 {
 231         struct rte_eth_link *dst = &(dev->data->dev_link);
 232         struct rte_eth_link *src = link;
 233
 234         if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
 235                                 *(uint64_t *)src) == 0)
 236                 return -1;
 237
 238         return 0;
 239 }
 240
 241 /*
 242  * This function is based on vmxnet3_disable_intr()
 243  */
 244 static void
 245 vmxnet3_disable_intr(struct vmxnet3_hw *hw)
 246 {
 247         int i;
 248
 249         PMD_INIT_FUNC_TRACE();
 250
 251         hw->shared->devRead.intrConf.intrCtrl |= VMXNET3_IC_DISABLE_ALL;
 252         for (i = 0; i < hw->num_intrs; i++)
 253                 VMXNET3_WRITE_BAR0_REG(hw, VMXNET3_REG_IMR + i * 8, 1);
 254 }
 255
 256 static void
 257 vmxnet3_enable_intr(struct vmxnet3_hw *hw)
 258 {
 259         int i;
 260
 261         PMD_INIT_FUNC_TRACE();
 262
 263         hw->shared->devRead.intrConf.intrCtrl &= ~VMXNET3_IC_DISABLE_ALL;
 264         for (i = 0; i < hw->num_intrs; i++)
 265                 VMXNET3_WRITE_BAR0_REG(hw, VMXNET3_REG_IMR + i * 8, 0);
 266 }
 267
 268 /*
 269  * Gets tx data ring descriptor size.
 270  */
 271 static uint16_t
 272 eth_vmxnet3_txdata_get(struct vmxnet3_hw *hw)
 273 {
 274         uint16 txdata_desc_size;
 275
 276         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
 277                                VMXNET3_CMD_GET_TXDATA_DESC_SIZE);
 278         txdata_desc_size = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_CMD);
 279
 280         return (txdata_desc_size < VMXNET3_TXDATA_DESC_MIN_SIZE ||
 281                 txdata_desc_size > VMXNET3_TXDATA_DESC_MAX_SIZE ||
 282                 txdata_desc_size & VMXNET3_TXDATA_DESC_SIZE_MASK) ?
 283                 sizeof(struct Vmxnet3_TxDataDesc) : txdata_desc_size;
 284 }
 285
 286 /*
 287  * It returns 0 on success.
 288  */
 289 static int
 290 eth_vmxnet3_dev_init(struct rte_eth_dev *eth_dev)
 291 {
 292         struct rte_pci_device *pci_dev;
 293         struct vmxnet3_hw *hw = eth_dev->data->dev_private;
 294         uint32_t mac_hi, mac_lo, ver;
 295
 296         PMD_INIT_FUNC_TRACE();
 297
 298         eth_dev->dev_ops = &vmxnet3_eth_dev_ops;
 299         eth_dev->rx_pkt_burst = &vmxnet3_recv_pkts;
 300         eth_dev->tx_pkt_burst = &vmxnet3_xmit_pkts;
 301         eth_dev->tx_pkt_prepare = vmxnet3_prep_pkts;
 302         pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
 303
 304         /*
 305          * for secondary processes, we don't initialize any further as primary
 306          * has already done this work.
 307          */
 308         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 309                 return 0;
 310
 311         rte_eth_copy_pci_info(eth_dev, pci_dev);
 312
 313         /* Vendor and Device ID need to be set before init of shared code */
 314         hw->device_id = pci_dev->id.device_id;
 315         hw->vendor_id = pci_dev->id.vendor_id;
 316         hw->hw_addr0 = (void *)pci_dev->mem_resource[0].addr;
 317         hw->hw_addr1 = (void *)pci_dev->mem_resource[1].addr;
 318
 319         hw->num_rx_queues = 1;
 320         hw->num_tx_queues = 1;
 321         hw->bufs_per_pkt = 1;
 322
 323         /* Check h/w version compatibility with driver. */
 324         ver = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_VRRS);
 325         PMD_INIT_LOG(DEBUG, "Hardware version : %d", ver);
 326
 327         if (ver & (1 << VMXNET3_REV_3)) {
 328                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_VRRS,
 329                                        1 << VMXNET3_REV_3);
 330                 hw->version = VMXNET3_REV_3 + 1;
 331         } else if (ver & (1 << VMXNET3_REV_2)) {
 332                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_VRRS,
 333                                        1 << VMXNET3_REV_2);
 334                 hw->version = VMXNET3_REV_2 + 1;
 335         } else if (ver & (1 << VMXNET3_REV_1)) {
 336                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_VRRS,
 337                                        1 << VMXNET3_REV_1);
 338                 hw->version = VMXNET3_REV_1 + 1;
 339         } else {
 340                 PMD_INIT_LOG(ERR, "Incompatible hardware version: %d", ver);
 341                 return -EIO;
 342         }
 343
 344         PMD_INIT_LOG(DEBUG, "Using device version %d\n", hw->version);
 345
 346         /* Check UPT version compatibility with driver. */
 347         ver = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_UVRS);
 348         PMD_INIT_LOG(DEBUG, "UPT hardware version : %d", ver);
 349         if (ver & 0x1)
 350                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_UVRS, 1);
 351         else {
 352                 PMD_INIT_LOG(ERR, "Incompatible UPT version.");
 353                 return -EIO;
 354         }
 355
 356         /* Getting MAC Address */
 357         mac_lo = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_MACL);
 358         mac_hi = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_MACH);
 359         memcpy(hw->perm_addr, &mac_lo, 4);
 360         memcpy(hw->perm_addr + 4, &mac_hi, 2);
 361
 362         /* Allocate memory for storing MAC addresses */
 363         eth_dev->data->mac_addrs = rte_zmalloc("vmxnet3", ETHER_ADDR_LEN *
 364                                                VMXNET3_MAX_MAC_ADDRS, 0);
 365         if (eth_dev->data->mac_addrs == NULL) {
 366                 PMD_INIT_LOG(ERR,
 367                              "Failed to allocate %d bytes needed to store MAC addresses",
 368                              ETHER_ADDR_LEN * VMXNET3_MAX_MAC_ADDRS);
 369                 return -ENOMEM;
 370         }
 371         /* Copy the permanent MAC address */
 372         ether_addr_copy((struct ether_addr *) hw->perm_addr,
 373                         &eth_dev->data->mac_addrs[0]);
 374
 375         PMD_INIT_LOG(DEBUG, "MAC Address : %02x:%02x:%02x:%02x:%02x:%02x",
 376                      hw->perm_addr[0], hw->perm_addr[1], hw->perm_addr[2],
 377                      hw->perm_addr[3], hw->perm_addr[4], hw->perm_addr[5]);
 378
 379         /* Put device in Quiesce Mode */
 380         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_QUIESCE_DEV);
 381
 382         /* allow untagged pkts */
 383         VMXNET3_SET_VFTABLE_ENTRY(hw->shadow_vfta, 0);
 384
 385         hw->txdata_desc_size = VMXNET3_VERSION_GE_3(hw) ?
 386                 eth_vmxnet3_txdata_get(hw) : sizeof(struct Vmxnet3_TxDataDesc);
 387
 388         hw->rxdata_desc_size = VMXNET3_VERSION_GE_3(hw) ?
 389                 VMXNET3_DEF_RXDATA_DESC_SIZE : 0;
 390         RTE_ASSERT((hw->rxdata_desc_size & ~VMXNET3_RXDATA_DESC_SIZE_MASK) ==
 391                    hw->rxdata_desc_size);
 392
 393         /* clear shadow stats */
 394         memset(hw->saved_tx_stats, 0, sizeof(hw->saved_tx_stats));
 395         memset(hw->saved_rx_stats, 0, sizeof(hw->saved_rx_stats));
 396
 397         return 0;
 398 }
 399
 400 static int
 401 eth_vmxnet3_dev_uninit(struct rte_eth_dev *eth_dev)
 402 {
 403         struct vmxnet3_hw *hw = eth_dev->data->dev_private;
 404
 405         PMD_INIT_FUNC_TRACE();
 406
 407         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 408                 return 0;
 409
 410         if (hw->adapter_stopped == 0)
 411                 vmxnet3_dev_close(eth_dev);
 412
 413         eth_dev->dev_ops = NULL;
 414         eth_dev->rx_pkt_burst = NULL;
 415         eth_dev->tx_pkt_burst = NULL;
 416         eth_dev->tx_pkt_prepare = NULL;
 417
 418         rte_free(eth_dev->data->mac_addrs);
 419         eth_dev->data->mac_addrs = NULL;
 420
 421         return 0;
 422 }
 423
 424 static int eth_vmxnet3_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
 425         struct rte_pci_device *pci_dev)
 426 {
 427         return rte_eth_dev_pci_generic_probe(pci_dev,
 428                 sizeof(struct vmxnet3_hw), eth_vmxnet3_dev_init);
 429 }
 430
 431 static int eth_vmxnet3_pci_remove(struct rte_pci_device *pci_dev)
 432 {
 433         return rte_eth_dev_pci_generic_remove(pci_dev, eth_vmxnet3_dev_uninit);
 434 }
 435
 436 static struct rte_pci_driver rte_vmxnet3_pmd = {
 437         .id_table = pci_id_vmxnet3_map,
 438         .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC,
 439         .probe = eth_vmxnet3_pci_probe,
 440         .remove = eth_vmxnet3_pci_remove,
 441 };
 442
 443 static int
 444 vmxnet3_dev_configure(struct rte_eth_dev *dev)
 445 {
 446         const struct rte_memzone *mz;
 447         struct vmxnet3_hw *hw = dev->data->dev_private;
 448         size_t size;
 449
 450         PMD_INIT_FUNC_TRACE();
 451
 452         if (dev->data->nb_tx_queues > VMXNET3_MAX_TX_QUEUES ||
 453             dev->data->nb_rx_queues > VMXNET3_MAX_RX_QUEUES) {
 454                 PMD_INIT_LOG(ERR, "ERROR: Number of queues not supported");
 455                 return -EINVAL;
 456         }
 457
 458         if (!rte_is_power_of_2(dev->data->nb_rx_queues)) {
 459                 PMD_INIT_LOG(ERR, "ERROR: Number of rx queues not power of 2");
 460                 return -EINVAL;
 461         }
 462
 463         size = dev->data->nb_rx_queues * sizeof(struct Vmxnet3_TxQueueDesc) +
 464                 dev->data->nb_tx_queues * sizeof(struct Vmxnet3_RxQueueDesc);
 465
 466         if (size > UINT16_MAX)
 467                 return -EINVAL;
 468
 469         hw->num_rx_queues = (uint8_t)dev->data->nb_rx_queues;
 470         hw->num_tx_queues = (uint8_t)dev->data->nb_tx_queues;
 471
 472         /*
 473          * Allocate a memzone for Vmxnet3_DriverShared - Vmxnet3_DSDevRead
 474          * on current socket
 475          */
 476         mz = gpa_zone_reserve(dev, sizeof(struct Vmxnet3_DriverShared),
 477                               "shared", rte_socket_id(), 8, 1);
 478
 479         if (mz == NULL) {
 480                 PMD_INIT_LOG(ERR, "ERROR: Creating shared zone");
 481                 return -ENOMEM;
 482         }
 483         memset(mz->addr, 0, mz->len);
 484
 485         hw->shared = mz->addr;
 486         hw->sharedPA = mz->phys_addr;
 487
 488         /*
 489          * Allocate a memzone for Vmxnet3_RxQueueDesc - Vmxnet3_TxQueueDesc
 490          * on current socket.
 491          *
 492          * We cannot reuse this memzone from previous allocation as its size
 493          * depends on the number of tx and rx queues, which could be different
 494          * from one config to another.
 495          */
 496         mz = gpa_zone_reserve(dev, size, "queuedesc", rte_socket_id(),
 497                               VMXNET3_QUEUE_DESC_ALIGN, 0);
 498         if (mz == NULL) {
 499                 PMD_INIT_LOG(ERR, "ERROR: Creating queue descriptors zone");
 500                 return -ENOMEM;
 501         }
 502         memset(mz->addr, 0, mz->len);
 503
 504         hw->tqd_start = (Vmxnet3_TxQueueDesc *)mz->addr;
 505         hw->rqd_start = (Vmxnet3_RxQueueDesc *)(hw->tqd_start + hw->num_tx_queues);
 506
 507         hw->queueDescPA = mz->phys_addr;
 508         hw->queue_desc_len = (uint16_t)size;
 509
 510         if (dev->data->dev_conf.rxmode.mq_mode == ETH_MQ_RX_RSS) {
 511                 /* Allocate memory structure for UPT1_RSSConf and configure */
 512                 mz = gpa_zone_reserve(dev, sizeof(struct VMXNET3_RSSConf),
 513                                       "rss_conf", rte_socket_id(),
 514                                       RTE_CACHE_LINE_SIZE, 1);
 515                 if (mz == NULL) {
 516                         PMD_INIT_LOG(ERR,
 517                                      "ERROR: Creating rss_conf structure zone");
 518                         return -ENOMEM;
 519                 }
 520                 memset(mz->addr, 0, mz->len);
 521
 522                 hw->rss_conf = mz->addr;
 523                 hw->rss_confPA = mz->phys_addr;
 524         }
 525
 526         return 0;
 527 }
 528
 529 static void
 530 vmxnet3_write_mac(struct vmxnet3_hw *hw, const uint8_t *addr)
 531 {
 532         uint32_t val;
 533
 534         PMD_INIT_LOG(DEBUG,
 535                      "Writing MAC Address : %02x:%02x:%02x:%02x:%02x:%02x",
 536                      addr[0], addr[1], addr[2],
 537                      addr[3], addr[4], addr[5]);
 538
 539         memcpy(&val, addr, 4);
 540         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_MACL, val);
 541
 542         memcpy(&val, addr + 4, 2);
 543         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_MACH, val);
 544 }
 545
 546 static int
 547 vmxnet3_dev_setup_memreg(struct rte_eth_dev *dev)
 548 {
 549         struct vmxnet3_hw *hw = dev->data->dev_private;
 550         Vmxnet3_DriverShared *shared = hw->shared;
 551         Vmxnet3_CmdInfo *cmdInfo;
 552         struct rte_mempool *mp[VMXNET3_MAX_RX_QUEUES];
 553         uint8_t index[VMXNET3_MAX_RX_QUEUES + VMXNET3_MAX_TX_QUEUES];
 554         uint32_t num, i, j, size;
 555
 556         if (hw->memRegsPA == 0) {
 557                 const struct rte_memzone *mz;
 558
 559                 size = sizeof(Vmxnet3_MemRegs) +
 560                         (VMXNET3_MAX_RX_QUEUES + VMXNET3_MAX_TX_QUEUES) *
 561                         sizeof(Vmxnet3_MemoryRegion);
 562
 563                 mz = gpa_zone_reserve(dev, size, "memRegs", rte_socket_id(), 8,
 564                                       1);
 565                 if (mz == NULL) {
 566                         PMD_INIT_LOG(ERR, "ERROR: Creating memRegs zone");
 567                         return -ENOMEM;
 568                 }
 569                 memset(mz->addr, 0, mz->len);
 570                 hw->memRegs = mz->addr;
 571                 hw->memRegsPA = mz->phys_addr;
 572         }
 573
 574         num = hw->num_rx_queues;
 575
 576         for (i = 0; i < num; i++) {
 577                 vmxnet3_rx_queue_t *rxq = dev->data->rx_queues[i];
 578
 579                 mp[i] = rxq->mp;
 580                 index[i] = 1 << i;
 581         }
 582
 583         /*
 584          * The same mempool could be used by multiple queues. In such a case,
 585          * remove duplicate mempool entries. Only one entry is kept with
 586          * bitmask indicating queues that are using this mempool.
 587          */
 588         for (i = 1; i < num; i++) {
 589                 for (j = 0; j < i; j++) {
 590                         if (mp[i] == mp[j]) {
 591                                 mp[i] = NULL;
 592                                 index[j] |= 1 << i;
 593                                 break;
 594                         }
 595                 }
 596         }
 597
 598         j = 0;
 599         for (i = 0; i < num; i++) {
 600                 if (mp[i] == NULL)
 601                         continue;
 602
 603                 Vmxnet3_MemoryRegion *mr = &hw->memRegs->memRegs[j];
 604
 605                 mr->startPA =
 606                         (uintptr_t)STAILQ_FIRST(&mp[i]->mem_list)->phys_addr;
 607                 mr->length = STAILQ_FIRST(&mp[i]->mem_list)->len <= INT32_MAX ?
 608                         STAILQ_FIRST(&mp[i]->mem_list)->len : INT32_MAX;
 609                 mr->txQueueBits = index[i];
 610                 mr->rxQueueBits = index[i];
 611
 612                 PMD_INIT_LOG(INFO,
 613                              "index: %u startPA: %" PRIu64 " length: %u, "
 614                              "rxBits: %x",
 615                              j, mr->startPA, mr->length, mr->rxQueueBits);
 616                 j++;
 617         }
 618         hw->memRegs->numRegs = j;
 619         PMD_INIT_LOG(INFO, "numRegs: %u", j);
 620
 621         size = sizeof(Vmxnet3_MemRegs) +
 622                 (j - 1) * sizeof(Vmxnet3_MemoryRegion);
 623
 624         cmdInfo = &shared->cu.cmdInfo;
 625         cmdInfo->varConf.confVer = 1;
 626         cmdInfo->varConf.confLen = size;
 627         cmdInfo->varConf.confPA = hw->memRegsPA;
 628
 629         return 0;
 630 }
 631
 632 static int
 633 vmxnet3_setup_driver_shared(struct rte_eth_dev *dev)
 634 {
 635         struct rte_eth_conf port_conf = dev->data->dev_conf;
 636         struct vmxnet3_hw *hw = dev->data->dev_private;
 637         uint32_t mtu = dev->data->mtu;
 638         Vmxnet3_DriverShared *shared = hw->shared;
 639         Vmxnet3_DSDevRead *devRead = &shared->devRead;
 640         uint32_t i;
 641         int ret;
 642
 643         shared->magic = VMXNET3_REV1_MAGIC;
 644         devRead->misc.driverInfo.version = VMXNET3_DRIVER_VERSION_NUM;
 645
 646         /* Setting up Guest OS information */
 647         devRead->misc.driverInfo.gos.gosBits   = sizeof(void *) == 4 ?
 648                 VMXNET3_GOS_BITS_32 : VMXNET3_GOS_BITS_64;
 649         devRead->misc.driverInfo.gos.gosType   = VMXNET3_GOS_TYPE_LINUX;
 650         devRead->misc.driverInfo.vmxnet3RevSpt = 1;
 651         devRead->misc.driverInfo.uptVerSpt     = 1;
 652
 653         devRead->misc.mtu = rte_le_to_cpu_32(mtu);
 654         devRead->misc.queueDescPA  = hw->queueDescPA;
 655         devRead->misc.queueDescLen = hw->queue_desc_len;
 656         devRead->misc.numTxQueues  = hw->num_tx_queues;
 657         devRead->misc.numRxQueues  = hw->num_rx_queues;
 658
 659         /*
 660          * Set number of interrupts to 1
 661          * PMD by default disables all the interrupts but this is MUST
 662          * to activate device. It needs at least one interrupt for
 663          * link events to handle
 664          */
 665         hw->num_intrs = devRead->intrConf.numIntrs = 1;
 666         devRead->intrConf.intrCtrl |= VMXNET3_IC_DISABLE_ALL;
 667
 668         for (i = 0; i < hw->num_tx_queues; i++) {
 669                 Vmxnet3_TxQueueDesc *tqd = &hw->tqd_start[i];
 670                 vmxnet3_tx_queue_t *txq  = dev->data->tx_queues[i];
 671
 672                 tqd->ctrl.txNumDeferred  = 0;
 673                 tqd->ctrl.txThreshold    = 1;
 674                 tqd->conf.txRingBasePA   = txq->cmd_ring.basePA;
 675                 tqd->conf.compRingBasePA = txq->comp_ring.basePA;
 676                 tqd->conf.dataRingBasePA = txq->data_ring.basePA;
 677
 678                 tqd->conf.txRingSize   = txq->cmd_ring.size;
 679                 tqd->conf.compRingSize = txq->comp_ring.size;
 680                 tqd->conf.dataRingSize = txq->data_ring.size;
 681                 tqd->conf.txDataRingDescSize = txq->txdata_desc_size;
 682                 tqd->conf.intrIdx      = txq->comp_ring.intr_idx;
 683                 tqd->status.stopped    = TRUE;
 684                 tqd->status.error      = 0;
 685                 memset(&tqd->stats, 0, sizeof(tqd->stats));
 686         }
 687
 688         for (i = 0; i < hw->num_rx_queues; i++) {
 689                 Vmxnet3_RxQueueDesc *rqd  = &hw->rqd_start[i];
 690                 vmxnet3_rx_queue_t *rxq   = dev->data->rx_queues[i];
 691
 692                 rqd->conf.rxRingBasePA[0] = rxq->cmd_ring[0].basePA;
 693                 rqd->conf.rxRingBasePA[1] = rxq->cmd_ring[1].basePA;
 694                 rqd->conf.compRingBasePA  = rxq->comp_ring.basePA;
 695
 696                 rqd->conf.rxRingSize[0]   = rxq->cmd_ring[0].size;
 697                 rqd->conf.rxRingSize[1]   = rxq->cmd_ring[1].size;
 698                 rqd->conf.compRingSize    = rxq->comp_ring.size;
 699                 rqd->conf.intrIdx         = rxq->comp_ring.intr_idx;
 700                 if (VMXNET3_VERSION_GE_3(hw)) {
 701                         rqd->conf.rxDataRingBasePA = rxq->data_ring.basePA;
 702                         rqd->conf.rxDataRingDescSize = rxq->data_desc_size;
 703                 }
 704                 rqd->status.stopped       = TRUE;
 705                 rqd->status.error         = 0;
 706                 memset(&rqd->stats, 0, sizeof(rqd->stats));
 707         }
 708
 709         /* RxMode set to 0 of VMXNET3_RXM_xxx */
 710         devRead->rxFilterConf.rxMode = 0;
 711
 712         /* Setting up feature flags */
 713         if (dev->data->dev_conf.rxmode.hw_ip_checksum)
 714                 devRead->misc.uptFeatures |= VMXNET3_F_RXCSUM;
 715
 716         if (dev->data->dev_conf.rxmode.enable_lro) {
 717                 devRead->misc.uptFeatures |= VMXNET3_F_LRO;
 718                 devRead->misc.maxNumRxSG = 0;
 719         }
 720
 721         if (port_conf.rxmode.mq_mode == ETH_MQ_RX_RSS) {
 722                 ret = vmxnet3_rss_configure(dev);
 723                 if (ret != VMXNET3_SUCCESS)
 724                         return ret;
 725
 726                 devRead->misc.uptFeatures |= VMXNET3_F_RSS;
 727                 devRead->rssConfDesc.confVer = 1;
 728                 devRead->rssConfDesc.confLen = sizeof(struct VMXNET3_RSSConf);
 729                 devRead->rssConfDesc.confPA  = hw->rss_confPA;
 730         }
 731
 732         ret = vmxnet3_dev_vlan_offload_set(dev,
 733                         ETH_VLAN_STRIP_MASK | ETH_VLAN_FILTER_MASK);
 734         if (ret)
 735                 return ret;
 736
 737         vmxnet3_write_mac(hw, dev->data->mac_addrs->addr_bytes);
 738
 739         return VMXNET3_SUCCESS;
 740 }
 741
 742 /*
 743  * Configure device link speed and setup link.
 744  * Must be called after eth_vmxnet3_dev_init. Other wise it might fail
 745  * It returns 0 on success.
 746  */
 747 static int
 748 vmxnet3_dev_start(struct rte_eth_dev *dev)
 749 {
 750         int ret;
 751         struct vmxnet3_hw *hw = dev->data->dev_private;
 752
 753         PMD_INIT_FUNC_TRACE();
 754
 755         /* Save stats before it is reset by CMD_ACTIVATE */
 756         vmxnet3_hw_stats_save(hw);
 757
 758         ret = vmxnet3_setup_driver_shared(dev);
 759         if (ret != VMXNET3_SUCCESS)
 760                 return ret;
 761
 762         /* check if lsc interrupt feature is enabled */
 763         if (dev->data->dev_conf.intr_conf.lsc) {
 764                 struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(dev->device);
 765
 766                 /* Setup interrupt callback  */
 767                 rte_intr_callback_register(&pci_dev->intr_handle,
 768                                            vmxnet3_interrupt_handler, dev);
 769
 770                 if (rte_intr_enable(&pci_dev->intr_handle) < 0) {
 771                         PMD_INIT_LOG(ERR, "interrupt enable failed");
 772                         return -EIO;
 773                 }
 774         }
 775
 776         /* Exchange shared data with device */
 777         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_DSAL,
 778                                VMXNET3_GET_ADDR_LO(hw->sharedPA));
 779         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_DSAH,
 780                                VMXNET3_GET_ADDR_HI(hw->sharedPA));
 781
 782         /* Activate device by register write */
 783         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_ACTIVATE_DEV);
 784         ret = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_CMD);
 785
 786         if (ret != 0) {
 787                 PMD_INIT_LOG(ERR, "Device activation: UNSUCCESSFUL");
 788                 return -EINVAL;
 789         }
 790
 791         /* Setup memory region for rx buffers */
 792         ret = vmxnet3_dev_setup_memreg(dev);
 793         if (ret == 0) {
 794                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
 795                                        VMXNET3_CMD_REGISTER_MEMREGS);
 796                 ret = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_CMD);
 797                 if (ret != 0)
 798                         PMD_INIT_LOG(DEBUG,
 799                                      "Failed in setup memory region cmd\n");
 800                 ret = 0;
 801         } else {
 802                 PMD_INIT_LOG(DEBUG, "Failed to setup memory region\n");
 803         }
 804
 805         /* Disable interrupts */
 806         vmxnet3_disable_intr(hw);
 807
 808         /*
 809          * Load RX queues with blank mbufs and update next2fill index for device
 810          * Update RxMode of the device
 811          */
 812         ret = vmxnet3_dev_rxtx_init(dev);
 813         if (ret != VMXNET3_SUCCESS) {
 814                 PMD_INIT_LOG(ERR, "Device queue init: UNSUCCESSFUL");
 815                 return ret;
 816         }
 817
 818         hw->adapter_stopped = FALSE;
 819
 820         /* Setting proper Rx Mode and issue Rx Mode Update command */
 821         vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_UCAST | VMXNET3_RXM_BCAST, 1);
 822
 823         if (dev->data->dev_conf.intr_conf.lsc) {
 824                 vmxnet3_enable_intr(hw);
 825
 826                 /*
 827                  * Update link state from device since this won't be
 828                  * done upon starting with lsc in use. This is done
 829                  * only after enabling interrupts to avoid any race
 830                  * where the link state could change without an
 831                  * interrupt being fired.
 832                  */
 833                 __vmxnet3_dev_link_update(dev, 0);
 834         }
 835
 836         return VMXNET3_SUCCESS;
 837 }
 838
 839 /*
 840  * Stop device: disable rx and tx functions to allow for reconfiguring.
 841  */
 842 static void
 843 vmxnet3_dev_stop(struct rte_eth_dev *dev)
 844 {
 845         struct rte_eth_link link;
 846         struct vmxnet3_hw *hw = dev->data->dev_private;
 847
 848         PMD_INIT_FUNC_TRACE();
 849
 850         if (hw->adapter_stopped == 1) {
 851                 PMD_INIT_LOG(DEBUG, "Device already closed.");
 852                 return;
 853         }
 854
 855         /* disable interrupts */
 856         vmxnet3_disable_intr(hw);
 857
 858         if (dev->data->dev_conf.intr_conf.lsc) {
 859                 struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(dev->device);
 860
 861                 rte_intr_disable(&pci_dev->intr_handle);
 862
 863                 rte_intr_callback_unregister(&pci_dev->intr_handle,
 864                                              vmxnet3_interrupt_handler, dev);
 865         }
 866
 867         /* quiesce the device first */
 868         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_QUIESCE_DEV);
 869         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_DSAL, 0);
 870         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_DSAH, 0);
 871
 872         /* reset the device */
 873         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_RESET_DEV);
 874         PMD_INIT_LOG(DEBUG, "Device reset.");
 875         hw->adapter_stopped = 0;
 876
 877         vmxnet3_dev_clear_queues(dev);
 878
 879         /* Clear recorded link status */
 880         memset(&link, 0, sizeof(link));
 881         vmxnet3_dev_atomic_write_link_status(dev, &link);
 882 }
 883
 884 /*
 885  * Reset and stop device.
 886  */
 887 static void
 888 vmxnet3_dev_close(struct rte_eth_dev *dev)
 889 {
 890         struct vmxnet3_hw *hw = dev->data->dev_private;
 891
 892         PMD_INIT_FUNC_TRACE();
 893
 894         vmxnet3_dev_stop(dev);
 895         hw->adapter_stopped = 1;
 896 }
 897
 898 static void
 899 vmxnet3_hw_tx_stats_get(struct vmxnet3_hw *hw, unsigned int q,
 900                         struct UPT1_TxStats *res)
 901 {
 902 #define VMXNET3_UPDATE_TX_STAT(h, i, f, r)              \
 903                 ((r)->f = (h)->tqd_start[(i)].stats.f + \
 904                         (h)->saved_tx_stats[(i)].f)
 905
 906         VMXNET3_UPDATE_TX_STAT(hw, q, ucastPktsTxOK, res);
 907         VMXNET3_UPDATE_TX_STAT(hw, q, mcastPktsTxOK, res);
 908         VMXNET3_UPDATE_TX_STAT(hw, q, bcastPktsTxOK, res);
 909         VMXNET3_UPDATE_TX_STAT(hw, q, ucastBytesTxOK, res);
 910         VMXNET3_UPDATE_TX_STAT(hw, q, mcastBytesTxOK, res);
 911         VMXNET3_UPDATE_TX_STAT(hw, q, bcastBytesTxOK, res);
 912         VMXNET3_UPDATE_TX_STAT(hw, q, pktsTxError, res);
 913         VMXNET3_UPDATE_TX_STAT(hw, q, pktsTxDiscard, res);
 914
 915 #undef VMXNET3_UPDATE_TX_STAT
 916 }
 917
 918 static void
 919 vmxnet3_hw_rx_stats_get(struct vmxnet3_hw *hw, unsigned int q,
 920                         struct UPT1_RxStats *res)
 921 {
 922 #define VMXNET3_UPDATE_RX_STAT(h, i, f, r)              \
 923                 ((r)->f = (h)->rqd_start[(i)].stats.f + \
 924                         (h)->saved_rx_stats[(i)].f)
 925
 926         VMXNET3_UPDATE_RX_STAT(hw, q, ucastPktsRxOK, res);
 927         VMXNET3_UPDATE_RX_STAT(hw, q, mcastPktsRxOK, res);
 928         VMXNET3_UPDATE_RX_STAT(hw, q, bcastPktsRxOK, res);
 929         VMXNET3_UPDATE_RX_STAT(hw, q, ucastBytesRxOK, res);
 930         VMXNET3_UPDATE_RX_STAT(hw, q, mcastBytesRxOK, res);
 931         VMXNET3_UPDATE_RX_STAT(hw, q, bcastBytesRxOK, res);
 932         VMXNET3_UPDATE_RX_STAT(hw, q, pktsRxError, res);
 933         VMXNET3_UPDATE_RX_STAT(hw, q, pktsRxOutOfBuf, res);
 934
 935 #undef VMXNET3_UPDATE_RX_STATS
 936 }
 937
 938 static void
 939 vmxnet3_hw_stats_save(struct vmxnet3_hw *hw)
 940 {
 941         unsigned int i;
 942
 943         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_GET_STATS);
 944
 945         RTE_BUILD_BUG_ON(RTE_ETHDEV_QUEUE_STAT_CNTRS < VMXNET3_MAX_TX_QUEUES);
 946
 947         for (i = 0; i < hw->num_tx_queues; i++)
 948                 vmxnet3_hw_tx_stats_get(hw, i, &hw->saved_tx_stats[i]);
 949         for (i = 0; i < hw->num_rx_queues; i++)
 950                 vmxnet3_hw_rx_stats_get(hw, i, &hw->saved_rx_stats[i]);
 951 }
 952
 953 static int
 954 vmxnet3_dev_xstats_get_names(struct rte_eth_dev *dev,
 955                              struct rte_eth_xstat_name *xstats_names,
 956                              unsigned int n)
 957 {
 958         unsigned int i, t, count = 0;
 959         unsigned int nstats =
 960                 dev->data->nb_tx_queues * RTE_DIM(vmxnet3_txq_stat_strings) +
 961                 dev->data->nb_rx_queues * RTE_DIM(vmxnet3_rxq_stat_strings);
 962
 963         if (!xstats_names || n < nstats)
 964                 return nstats;
 965
 966         for (i = 0; i < dev->data->nb_rx_queues; i++) {
 967                 if (!dev->data->rx_queues[i])
 968                         continue;
 969
 970                 for (t = 0; t < RTE_DIM(vmxnet3_rxq_stat_strings); t++) {
 971                         snprintf(xstats_names[count].name,
 972                                  sizeof(xstats_names[count].name),
 973                                  "rx_q%u_%s", i,
 974                                  vmxnet3_rxq_stat_strings[t].name);
 975                         count++;
 976                 }
 977         }
 978
 979         for (i = 0; i < dev->data->nb_tx_queues; i++) {
 980                 if (!dev->data->tx_queues[i])
 981                         continue;
 982
 983                 for (t = 0; t < RTE_DIM(vmxnet3_txq_stat_strings); t++) {
 984                         snprintf(xstats_names[count].name,
 985                                  sizeof(xstats_names[count].name),
 986                                  "tx_q%u_%s", i,
 987                                  vmxnet3_txq_stat_strings[t].name);
 988                         count++;
 989                 }
 990         }
 991
 992         return count;
 993 }
 994
 995 static int
 996 vmxnet3_dev_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats,
 997                        unsigned int n)
 998 {
 999         unsigned int i, t, count = 0;
1000         unsigned int nstats =
1001                 dev->data->nb_tx_queues * RTE_DIM(vmxnet3_txq_stat_strings) +
1002                 dev->data->nb_rx_queues * RTE_DIM(vmxnet3_rxq_stat_strings);
1003
1004         if (n < nstats)
1005                 return nstats;
1006
1007         for (i = 0; i < dev->data->nb_rx_queues; i++) {
1008                 struct vmxnet3_rx_queue *rxq = dev->data->rx_queues[i];
1009
1010                 if (rxq == NULL)
1011                         continue;
1012
1013                 for (t = 0; t < RTE_DIM(vmxnet3_rxq_stat_strings); t++) {
1014                         xstats[count].value = *(uint64_t *)(((char *)&rxq->stats) +
1015                                 vmxnet3_rxq_stat_strings[t].offset);
1016                         xstats[count].id = count;
1017                         count++;
1018                 }
1019         }
1020
1021         for (i = 0; i < dev->data->nb_tx_queues; i++) {
1022                 struct vmxnet3_tx_queue *txq = dev->data->tx_queues[i];
1023
1024                 if (txq == NULL)
1025                         continue;
1026
1027                 for (t = 0; t < RTE_DIM(vmxnet3_txq_stat_strings); t++) {
1028                         xstats[count].value = *(uint64_t *)(((char *)&txq->stats) +
1029                                 vmxnet3_txq_stat_strings[t].offset);
1030                         xstats[count].id = count;
1031                         count++;
1032                 }
1033         }
1034
1035         return count;
1036 }
1037
1038 static int
1039 vmxnet3_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
1040 {
1041         unsigned int i;
1042         struct vmxnet3_hw *hw = dev->data->dev_private;
1043         struct UPT1_TxStats txStats;
1044         struct UPT1_RxStats rxStats;
1045
1046         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_GET_STATS);
1047
1048         RTE_BUILD_BUG_ON(RTE_ETHDEV_QUEUE_STAT_CNTRS < VMXNET3_MAX_TX_QUEUES);
1049         for (i = 0; i < hw->num_tx_queues; i++) {
1050                 vmxnet3_hw_tx_stats_get(hw, i, &txStats);
1051
1052                 stats->q_opackets[i] = txStats.ucastPktsTxOK +
1053                         txStats.mcastPktsTxOK +
1054                         txStats.bcastPktsTxOK;
1055
1056                 stats->q_obytes[i] = txStats.ucastBytesTxOK +
1057                         txStats.mcastBytesTxOK +
1058                         txStats.bcastBytesTxOK;
1059
1060                 stats->opackets += stats->q_opackets[i];
1061                 stats->obytes += stats->q_obytes[i];
1062                 stats->oerrors += txStats.pktsTxError + txStats.pktsTxDiscard;
1063         }
1064
1065         RTE_BUILD_BUG_ON(RTE_ETHDEV_QUEUE_STAT_CNTRS < VMXNET3_MAX_RX_QUEUES);
1066         for (i = 0; i < hw->num_rx_queues; i++) {
1067                 vmxnet3_hw_rx_stats_get(hw, i, &rxStats);
1068
1069                 stats->q_ipackets[i] = rxStats.ucastPktsRxOK +
1070                         rxStats.mcastPktsRxOK +
1071                         rxStats.bcastPktsRxOK;
1072
1073                 stats->q_ibytes[i] = rxStats.ucastBytesRxOK +
1074                         rxStats.mcastBytesRxOK +
1075                         rxStats.bcastBytesRxOK;
1076
1077                 stats->ipackets += stats->q_ipackets[i];
1078                 stats->ibytes += stats->q_ibytes[i];
1079
1080                 stats->q_errors[i] = rxStats.pktsRxError;
1081                 stats->ierrors += rxStats.pktsRxError;
1082                 stats->rx_nombuf += rxStats.pktsRxOutOfBuf;
1083         }
1084
1085         return 0;
1086 }
1087
1088 static void
1089 vmxnet3_dev_info_get(struct rte_eth_dev *dev,
1090                      struct rte_eth_dev_info *dev_info)
1091 {
1092         dev_info->pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1093
1094         dev_info->max_rx_queues = VMXNET3_MAX_RX_QUEUES;
1095         dev_info->max_tx_queues = VMXNET3_MAX_TX_QUEUES;
1096         dev_info->min_rx_bufsize = 1518 + RTE_PKTMBUF_HEADROOM;
1097         dev_info->max_rx_pktlen = 16384; /* includes CRC, cf MAXFRS register */
1098         dev_info->speed_capa = ETH_LINK_SPEED_10G;
1099         dev_info->max_mac_addrs = VMXNET3_MAX_MAC_ADDRS;
1100
1101         dev_info->default_txconf.txq_flags = ETH_TXQ_FLAGS_NOXSUMSCTP;
1102         dev_info->flow_type_rss_offloads = VMXNET3_RSS_OFFLOAD_ALL;
1103
1104         dev_info->rx_desc_lim = (struct rte_eth_desc_lim) {
1105                 .nb_max = VMXNET3_RX_RING_MAX_SIZE,
1106                 .nb_min = VMXNET3_DEF_RX_RING_SIZE,
1107                 .nb_align = 1,
1108         };
1109
1110         dev_info->tx_desc_lim = (struct rte_eth_desc_lim) {
1111                 .nb_max = VMXNET3_TX_RING_MAX_SIZE,
1112                 .nb_min = VMXNET3_DEF_TX_RING_SIZE,
1113                 .nb_align = 1,
1114                 .nb_seg_max = VMXNET3_TX_MAX_SEG,
1115                 .nb_mtu_seg_max = VMXNET3_MAX_TXD_PER_PKT,
1116         };
1117
1118         dev_info->rx_offload_capa =
1119                 DEV_RX_OFFLOAD_VLAN_STRIP |
1120                 DEV_RX_OFFLOAD_UDP_CKSUM |
1121                 DEV_RX_OFFLOAD_TCP_CKSUM |
1122                 DEV_RX_OFFLOAD_TCP_LRO;
1123
1124         dev_info->tx_offload_capa =
1125                 DEV_TX_OFFLOAD_VLAN_INSERT |
1126                 DEV_TX_OFFLOAD_TCP_CKSUM |
1127                 DEV_TX_OFFLOAD_UDP_CKSUM |
1128                 DEV_TX_OFFLOAD_TCP_TSO;
1129 }
1130
1131 static const uint32_t *
1132 vmxnet3_dev_supported_ptypes_get(struct rte_eth_dev *dev)
1133 {
1134         static const uint32_t ptypes[] = {
1135                 RTE_PTYPE_L3_IPV4_EXT,
1136                 RTE_PTYPE_L3_IPV4,
1137                 RTE_PTYPE_UNKNOWN
1138         };
1139
1140         if (dev->rx_pkt_burst == vmxnet3_recv_pkts)
1141                 return ptypes;
1142         return NULL;
1143 }
1144
1145 static void
1146 vmxnet3_mac_addr_set(struct rte_eth_dev *dev, struct ether_addr *mac_addr)
1147 {
1148         struct vmxnet3_hw *hw = dev->data->dev_private;
1149
1150         ether_addr_copy(mac_addr, (struct ether_addr *)(hw->perm_addr));
1151         ether_addr_copy(mac_addr, &dev->data->mac_addrs[0]);
1152         vmxnet3_write_mac(hw, mac_addr->addr_bytes);
1153 }
1154
1155 /* return 0 means link status changed, -1 means not changed */
1156 static int
1157 __vmxnet3_dev_link_update(struct rte_eth_dev *dev,
1158                           __rte_unused int wait_to_complete)
1159 {
1160         struct vmxnet3_hw *hw = dev->data->dev_private;
1161         struct rte_eth_link old = { 0 }, link;
1162         uint32_t ret;
1163
1164         memset(&link, 0, sizeof(link));
1165         vmxnet3_dev_atomic_read_link_status(dev, &old);
1166
1167         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_GET_LINK);
1168         ret = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_CMD);
1169
1170         if (ret & 0x1) {
1171                 link.link_status = ETH_LINK_UP;
1172                 link.link_duplex = ETH_LINK_FULL_DUPLEX;
1173                 link.link_speed = ETH_SPEED_NUM_10G;
1174                 link.link_autoneg = ETH_LINK_SPEED_FIXED;
1175         }
1176
1177         vmxnet3_dev_atomic_write_link_status(dev, &link);
1178
1179         return (old.link_status == link.link_status) ? -1 : 0;
1180 }
1181
1182 static int
1183 vmxnet3_dev_link_update(struct rte_eth_dev *dev, int wait_to_complete)
1184 {
1185         /* Link status doesn't change for stopped dev */
1186         if (dev->data->dev_started == 0)
1187                 return -1;
1188
1189         return __vmxnet3_dev_link_update(dev, wait_to_complete);
1190 }
1191
1192 /* Updating rxmode through Vmxnet3_DriverShared structure in adapter */
1193 static void
1194 vmxnet3_dev_set_rxmode(struct vmxnet3_hw *hw, uint32_t feature, int set)
1195 {
1196         struct Vmxnet3_RxFilterConf *rxConf = &hw->shared->devRead.rxFilterConf;
1197
1198         if (set)
1199                 rxConf->rxMode = rxConf->rxMode | feature;
1200         else
1201                 rxConf->rxMode = rxConf->rxMode & (~feature);
1202
1203         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_UPDATE_RX_MODE);
1204 }
1205
1206 /* Promiscuous supported only if Vmxnet3_DriverShared is initialized in adapter */
1207 static void
1208 vmxnet3_dev_promiscuous_enable(struct rte_eth_dev *dev)
1209 {
1210         struct vmxnet3_hw *hw = dev->data->dev_private;
1211         uint32_t *vf_table = hw->shared->devRead.rxFilterConf.vfTable;
1212
1213         memset(vf_table, 0, VMXNET3_VFT_TABLE_SIZE);
1214         vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_PROMISC, 1);
1215
1216         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
1217                                VMXNET3_CMD_UPDATE_VLAN_FILTERS);
1218 }
1219
1220 /* Promiscuous supported only if Vmxnet3_DriverShared is initialized in adapter */
1221 static void
1222 vmxnet3_dev_promiscuous_disable(struct rte_eth_dev *dev)
1223 {
1224         struct vmxnet3_hw *hw = dev->data->dev_private;
1225         uint32_t *vf_table = hw->shared->devRead.rxFilterConf.vfTable;
1226
1227         if (dev->data->dev_conf.rxmode.hw_vlan_filter)
1228                 memcpy(vf_table, hw->shadow_vfta, VMXNET3_VFT_TABLE_SIZE);
1229         else
1230                 memset(vf_table, 0xff, VMXNET3_VFT_TABLE_SIZE);
1231         vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_PROMISC, 0);
1232         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
1233                                VMXNET3_CMD_UPDATE_VLAN_FILTERS);
1234 }
1235
1236 /* Allmulticast supported only if Vmxnet3_DriverShared is initialized in adapter */
1237 static void
1238 vmxnet3_dev_allmulticast_enable(struct rte_eth_dev *dev)
1239 {
1240         struct vmxnet3_hw *hw = dev->data->dev_private;
1241
1242         vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_ALL_MULTI, 1);
1243 }
1244
1245 /* Allmulticast supported only if Vmxnet3_DriverShared is initialized in adapter */
1246 static void
1247 vmxnet3_dev_allmulticast_disable(struct rte_eth_dev *dev)
1248 {
1249         struct vmxnet3_hw *hw = dev->data->dev_private;
1250
1251         vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_ALL_MULTI, 0);
1252 }
1253
1254 /* Enable/disable filter on vlan */
1255 static int
1256 vmxnet3_dev_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vid, int on)
1257 {
1258         struct vmxnet3_hw *hw = dev->data->dev_private;
1259         struct Vmxnet3_RxFilterConf *rxConf = &hw->shared->devRead.rxFilterConf;
1260         uint32_t *vf_table = rxConf->vfTable;
1261
1262         /* save state for restore */
1263         if (on)
1264                 VMXNET3_SET_VFTABLE_ENTRY(hw->shadow_vfta, vid);
1265         else
1266                 VMXNET3_CLEAR_VFTABLE_ENTRY(hw->shadow_vfta, vid);
1267
1268         /* don't change active filter if in promiscuous mode */
1269         if (rxConf->rxMode & VMXNET3_RXM_PROMISC)
1270                 return 0;
1271
1272         /* set in hardware */
1273         if (on)
1274                 VMXNET3_SET_VFTABLE_ENTRY(vf_table, vid);
1275         else
1276                 VMXNET3_CLEAR_VFTABLE_ENTRY(vf_table, vid);
1277
1278         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
1279                                VMXNET3_CMD_UPDATE_VLAN_FILTERS);
1280         return 0;
1281 }
1282
1283 static int
1284 vmxnet3_dev_vlan_offload_set(struct rte_eth_dev *dev, int mask)
1285 {
1286         struct vmxnet3_hw *hw = dev->data->dev_private;
1287         Vmxnet3_DSDevRead *devRead = &hw->shared->devRead;
1288         uint32_t *vf_table = devRead->rxFilterConf.vfTable;
1289
1290         if (mask & ETH_VLAN_STRIP_MASK) {
1291                 if (dev->data->dev_conf.rxmode.hw_vlan_strip)
1292                         devRead->misc.uptFeatures |= UPT1_F_RXVLAN;
1293                 else
1294                         devRead->misc.uptFeatures &= ~UPT1_F_RXVLAN;
1295
1296                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
1297                                        VMXNET3_CMD_UPDATE_FEATURE);
1298         }
1299
1300         if (mask & ETH_VLAN_FILTER_MASK) {
1301                 if (dev->data->dev_conf.rxmode.hw_vlan_filter)
1302                         memcpy(vf_table, hw->shadow_vfta, VMXNET3_VFT_TABLE_SIZE);
1303                 else
1304                         memset(vf_table, 0xff, VMXNET3_VFT_TABLE_SIZE);
1305
1306                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
1307                                        VMXNET3_CMD_UPDATE_VLAN_FILTERS);
1308         }
1309
1310         return 0;
1311 }
1312
1313 static void
1314 vmxnet3_process_events(struct rte_eth_dev *dev)
1315 {
1316         struct vmxnet3_hw *hw = dev->data->dev_private;
1317         uint32_t events = hw->shared->ecr;
1318
1319         if (!events)
1320                 return;
1321
1322         /*
1323          * ECR bits when written with 1b are cleared. Hence write
1324          * events back to ECR so that the bits which were set will be reset.
1325          */
1326         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_ECR, events);
1327
1328         /* Check if link state has changed */
1329         if (events & VMXNET3_ECR_LINK) {
1330                 PMD_DRV_LOG(DEBUG, "Process events: VMXNET3_ECR_LINK event");
1331                 if (vmxnet3_dev_link_update(dev, 0) == 0)
1332                         _rte_eth_dev_callback_process(dev,
1333                                                       RTE_ETH_EVENT_INTR_LSC,
1334                                                       NULL, NULL);
1335         }
1336
1337         /* Check if there is an error on xmit/recv queues */
1338         if (events & (VMXNET3_ECR_TQERR | VMXNET3_ECR_RQERR)) {
1339                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
1340                                        VMXNET3_CMD_GET_QUEUE_STATUS);
1341
1342                 if (hw->tqd_start->status.stopped)
1343                         PMD_DRV_LOG(ERR, "tq error 0x%x",
1344                                     hw->tqd_start->status.error);
1345
1346                 if (hw->rqd_start->status.stopped)
1347                         PMD_DRV_LOG(ERR, "rq error 0x%x",
1348                                      hw->rqd_start->status.error);
1349
1350                 /* Reset the device */
1351                 /* Have to reset the device */
1352         }
1353
1354         if (events & VMXNET3_ECR_DIC)
1355                 PMD_DRV_LOG(DEBUG, "Device implementation change event.");
1356
1357         if (events & VMXNET3_ECR_DEBUG)
1358                 PMD_DRV_LOG(DEBUG, "Debug event generated by device.");
1359 }
1360
1361 static void
1362 vmxnet3_interrupt_handler(void *param)
1363 {
1364         struct rte_eth_dev *dev = param;
1365         struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(dev->device);
1366
1367         vmxnet3_process_events(dev);
1368
1369         if (rte_intr_enable(&pci_dev->intr_handle) < 0)
1370                 PMD_DRV_LOG(ERR, "interrupt enable failed");
1371 }
1372
1373 RTE_PMD_REGISTER_PCI(net_vmxnet3, rte_vmxnet3_pmd);
1374 RTE_PMD_REGISTER_PCI_TABLE(net_vmxnet3, pci_id_vmxnet3_map);
1375 RTE_PMD_REGISTER_KMOD_DEP(net_vmxnet3, "* igb_uio | uio_pci_generic | vfio-pci");