lib/librte_eal/common/include/rte_pci_dev_ids.h

   1 /*-
   2  * This file is provided under a dual BSD/GPLv2 license.  When using or
   3  *   redistributing this file, you may do so under either license.
   4  *
   5  *   GPL LICENSE SUMMARY
   6  *
   7  *   Copyright(c) 2010-2012 Intel Corporation. All rights reserved.
   8  *
   9  *   This program is free software; you can redistribute it and/or modify
  10  *   it under the terms of version 2 of the GNU General Public License as
  11  *   published by the Free Software Foundation.
  12  *
  13  *   This program is distributed in the hope that it will be useful, but
  14  *   WITHOUT ANY WARRANTY; without even the implied warranty of
  15  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  16  *   General Public License for more details.
  17  *
  18  *   You should have received a copy of the GNU General Public License
  19  *   along with this program; if not, write to the Free Software
  20  *   Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  21  *   The full GNU General Public License is included in this distribution
  22  *   in the file called LICENSE.GPL.
  23  *
  24  *   Contact Information:
  25  *   Intel Corporation
  26  *
  27  *   BSD LICENSE
  28  *
  29  *   Copyright(c) 2010-2012 Intel Corporation. All rights reserved.
  30  *   All rights reserved.
  31  *
  32  *   Redistribution and use in source and binary forms, with or without
  33  *   modification, are permitted provided that the following conditions
  34  *   are met:
  35  *
  36  *     * Redistributions of source code must retain the above copyright
  37  *       notice, this list of conditions and the following disclaimer.
  38  *     * Redistributions in binary form must reproduce the above copyright
  39  *       notice, this list of conditions and the following disclaimer in
  40  *       the documentation and/or other materials provided with the
  41  *       distribution.
  42  *     * Neither the name of Intel Corporation nor the names of its
  43  *       contributors may be used to endorse or promote products derived
  44  *       from this software without specific prior written permission.
  45  *
  46  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  47  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  48  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  49  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  50  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  51  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  52  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  53  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  54  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  55  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  56  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  57  *
  58  *
  59  */
  60
  61 /**
  62  * @file
  63  *
  64  * This file contains a list of the PCI device IDs recognised by DPDK, which
  65  * can be used to fill out an array of structures describing the devices.
  66  *
  67  * Currently two families of devices are recognised: those supported by the
  68  * IGB driver, and those supported by the IXGBE driver. The inclusion of these
  69  * in an array built using this file depends on the definition of
  70  * RTE_LIBRTE_IGB_PMD and RTE_LIBRTE_IXGBE_PMD at the time when this file is
  71  * included.
  72  *
  73  * In order to populate an array, the user of this file must define this macro:
  74  * RTE_PCI_DEV_ID_DECL(vendorID, deviceID). For example:
  75  *
  76  * @code
  77  * struct device {
  78  *     int vend;
  79  *     int dev;
  80  * };
  81  *
  82  * struct device devices[] = {
  83  * #define RTE_PCI_DEV_ID_DECL(vendorID, deviceID) {vend, dev},
  84  * #include <rte_pci_dev_ids.h>
  85  * };
  86  * @endcode
  87  *
  88  * Note that this file can be included multiple times within the same file.
  89  */
  90
  91 #ifndef RTE_PCI_DEV_ID_DECL
  92 #error "You must define RTE_PCI_DEV_ID_DECL before including rte_pci_dev_ids.h"
  93 #endif
  94
  95 #ifndef PCI_VENDOR_ID_INTEL
  96 /** Vendor ID used by Intel devices */
  97 #define PCI_VENDOR_ID_INTEL 0x8086
  98 #endif
  99
 100 /******************** Physical IGB devices from e1000_hw.h ********************/
 101 #ifdef RTE_LIBRTE_IGB_PMD
 102
 103 #define E1000_DEV_ID_82576                      0x10C9
 104 #define E1000_DEV_ID_82576_FIBER                0x10E6
 105 #define E1000_DEV_ID_82576_SERDES               0x10E7
 106 #define E1000_DEV_ID_82576_QUAD_COPPER          0x10E8
 107 #define E1000_DEV_ID_82576_QUAD_COPPER_ET2      0x1526
 108 #define E1000_DEV_ID_82576_NS                   0x150A
 109 #define E1000_DEV_ID_82576_NS_SERDES            0x1518
 110 #define E1000_DEV_ID_82576_SERDES_QUAD          0x150D
 111 #define E1000_DEV_ID_82575EB_COPPER             0x10A7
 112 #define E1000_DEV_ID_82575EB_FIBER_SERDES       0x10A9
 113 #define E1000_DEV_ID_82575GB_QUAD_COPPER        0x10D6
 114 #define E1000_DEV_ID_82580_COPPER               0x150E
 115 #define E1000_DEV_ID_82580_FIBER                0x150F
 116 #define E1000_DEV_ID_82580_SERDES               0x1510
 117 #define E1000_DEV_ID_82580_SGMII                0x1511
 118 #define E1000_DEV_ID_82580_COPPER_DUAL          0x1516
 119 #define E1000_DEV_ID_82580_QUAD_FIBER           0x1527
 120 #define E1000_DEV_ID_I350_COPPER                0x1521
 121 #define E1000_DEV_ID_I350_FIBER                 0x1522
 122 #define E1000_DEV_ID_I350_SERDES                0x1523
 123 #define E1000_DEV_ID_I350_SGMII                 0x1524
 124 #define E1000_DEV_ID_I350_DA4                   0x1546
 125 #define E1000_DEV_ID_DH89XXCC_SGMII             0x0438
 126 #define E1000_DEV_ID_DH89XXCC_SERDES            0x043A
 127 #define E1000_DEV_ID_DH89XXCC_BACKPLANE         0x043C
 128 #define E1000_DEV_ID_DH89XXCC_SFP               0x0440
 129
 130 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82576)
 131 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82576_FIBER)
 132 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82576_SERDES)
 133 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82576_QUAD_COPPER)
 134 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82576_QUAD_COPPER_ET2)
 135 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82576_NS)
 136 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82576_NS_SERDES)
 137 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82576_SERDES_QUAD)
 138
 139 /* This device is the on-board NIC on some development boards. */
 140 #ifdef RTE_PCI_DEV_USE_82575EB_COPPER
 141 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82575EB_COPPER)
 142 #endif
 143
 144 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82575EB_FIBER_SERDES)
 145 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82575GB_QUAD_COPPER)
 146
 147 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82580_COPPER)
 148 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82580_FIBER)
 149 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82580_SERDES)
 150 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82580_SGMII)
 151 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82580_COPPER_DUAL)
 152 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82580_QUAD_FIBER)
 153
 154 /* This device is the on-board NIC on some development boards. */
 155 #ifndef RTE_PCI_DEV_NO_USE_I350_COPPER
 156 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I350_COPPER)
 157 #endif
 158
 159 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I350_FIBER)
 160 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I350_SERDES)
 161 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I350_SGMII)
 162 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I350_DA4)
 163 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_DH89XXCC_SGMII)
 164 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_DH89XXCC_SERDES)
 165 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_DH89XXCC_BACKPLANE)
 166 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_DH89XXCC_SFP)
 167
 168 #endif /* RTE_LIBRTE_IGB_PMD */
 169
 170
 171 /****************** Physical IXGBE devices from ixgbe_type.h ******************/
 172 #ifdef RTE_LIBRTE_IXGBE_PMD
 173
 174 #define IXGBE_DEV_ID_82598                      0x10B6
 175 #define IXGBE_DEV_ID_82598_BX                   0x1508
 176 #define IXGBE_DEV_ID_82598AF_DUAL_PORT          0x10C6
 177 #define IXGBE_DEV_ID_82598AF_SINGLE_PORT        0x10C7
 178 #define IXGBE_DEV_ID_82598AT                    0x10C8
 179 #define IXGBE_DEV_ID_82598AT2                   0x150B
 180 #define IXGBE_DEV_ID_82598EB_SFP_LOM            0x10DB
 181 #define IXGBE_DEV_ID_82598EB_CX4                0x10DD
 182 #define IXGBE_DEV_ID_82598_CX4_DUAL_PORT        0x10EC
 183 #define IXGBE_DEV_ID_82598_DA_DUAL_PORT         0x10F1
 184 #define IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM      0x10E1
 185 #define IXGBE_DEV_ID_82598EB_XF_LR              0x10F4
 186 #define IXGBE_DEV_ID_82599_KX4                  0x10F7
 187 #define IXGBE_DEV_ID_82599_KX4_MEZZ             0x1514
 188 #define IXGBE_DEV_ID_82599_KR                   0x1517
 189 #define IXGBE_DEV_ID_82599_COMBO_BACKPLANE      0x10F8
 190 #define IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ       0x000C
 191 #define IXGBE_DEV_ID_82599_CX4                  0x10F9
 192 #define IXGBE_DEV_ID_82599_SFP                  0x10FB
 193 #define IXGBE_SUBDEV_ID_82599_SFP               0x11A9
 194 #define IXGBE_DEV_ID_82599_BACKPLANE_FCOE       0x152A
 195 #define IXGBE_DEV_ID_82599_SFP_FCOE             0x1529
 196 #define IXGBE_DEV_ID_82599_SFP_EM               0x1507
 197 #define IXGBE_DEV_ID_82599EN_SFP                0x1557
 198 #define IXGBE_DEV_ID_82599_XAUI_LOM             0x10FC
 199 #define IXGBE_DEV_ID_82599_T3_LOM               0x151C
 200 #define IXGBE_DEV_ID_X540T                      0x1528
 201
 202 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598)
 203 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598_BX)
 204 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT)
 205 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT)
 206 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598AT)
 207 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598AT2)
 208 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598EB_SFP_LOM)
 209 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598EB_CX4)
 210 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT)
 211 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598_DA_DUAL_PORT)
 212 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM)
 213 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598EB_XF_LR)
 214 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_KX4)
 215 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_KX4_MEZZ)
 216 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_KR)
 217 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_COMBO_BACKPLANE)
 218 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ)
 219 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_CX4)
 220 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_SFP)
 221 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_SUBDEV_ID_82599_SFP)
 222 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_BACKPLANE_FCOE)
 223 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_SFP_FCOE)
 224 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_SFP_EM)
 225 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599EN_SFP)
 226 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_XAUI_LOM)
 227 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_T3_LOM)
 228 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X540T)
 229
 230 #endif /* RTE_LIBRTE_IXGBE_PMD */