lib/librte_eal/linuxapp/kni/ethtool/igb/igb_main.c

   1 /*******************************************************************************
   2
   3   Intel(R) Gigabit Ethernet Linux driver
   4   Copyright(c) 2007-2013 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Contact Information:
  23   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  24   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  25
  26 *******************************************************************************/
  27
  28 #include <linux/module.h>
  29 #include <linux/types.h>
  30 #include <linux/init.h>
  31 #include <linux/vmalloc.h>
  32 #include <linux/pagemap.h>
  33 #include <linux/netdevice.h>
  34 #include <linux/tcp.h>
  35 #ifdef NETIF_F_TSO
  36 #include <net/checksum.h>
  37 #ifdef NETIF_F_TSO6
  38 #include <linux/ipv6.h>
  39 #include <net/ip6_checksum.h>
  40 #endif
  41 #endif
  42 #ifdef SIOCGMIIPHY
  43 #include <linux/mii.h>
  44 #endif
  45 #ifdef SIOCETHTOOL
  46 #include <linux/ethtool.h>
  47 #endif
  48 #include <linux/if_vlan.h>
  49 #ifdef CONFIG_PM_RUNTIME
  50 #include <linux/pm_runtime.h>
  51 #endif /* CONFIG_PM_RUNTIME */
  52
  53 #include <linux/if_bridge.h>
  54 #include "igb.h"
  55 #include "igb_vmdq.h"
  56
  57 #include <linux/uio_driver.h>
  58
  59 #if defined(DEBUG) || defined (DEBUG_DUMP) || defined (DEBUG_ICR) || defined(DEBUG_ITR)
  60 #define DRV_DEBUG "_debug"
  61 #else
  62 #define DRV_DEBUG
  63 #endif
  64 #define DRV_HW_PERF
  65 #define VERSION_SUFFIX
  66
  67 #define MAJ 5
  68 #define MIN 0
  69 #define BUILD 6
  70 #define DRV_VERSION __stringify(MAJ) "." __stringify(MIN) "." __stringify(BUILD) VERSION_SUFFIX DRV_DEBUG DRV_HW_PERF
  71
  72 char igb_driver_name[] = "igb";
  73 char igb_driver_version[] = DRV_VERSION;
  74 static const char igb_driver_string[] =
  75                                 "Intel(R) Gigabit Ethernet Network Driver";
  76 static const char igb_copyright[] =
  77                                 "Copyright (c) 2007-2013 Intel Corporation.";
  78
  79 static DEFINE_PCI_DEVICE_TABLE(igb_pci_tbl) = {
  80         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_1GBPS) },
  81         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_SGMII) },
  82         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_2_5GBPS) },
  83         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER) },
  84         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_FIBER) },
  85         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES) },
  86         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SGMII) },
  87         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER_FLASHLESS) },
  88         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES_FLASHLESS) },
  89         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I211_COPPER) },
  90         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_COPPER) },
  91         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_FIBER) },
  92         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SERDES) },
  93         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SGMII) },
  94         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER) },
  95         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_FIBER) },
  96         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_QUAD_FIBER) },
  97         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SERDES) },
  98         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SGMII) },
  99         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER_DUAL) },
 100         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SGMII) },
 101         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SERDES) },
 102         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_BACKPLANE) },
 103         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SFP) },
 104         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576) },
 105         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS) },
 106         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS_SERDES) },
 107         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_FIBER) },
 108         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES) },
 109         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES_QUAD) },
 110         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER_ET2) },
 111         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER) },
 112         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_COPPER) },
 113         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_FIBER_SERDES) },
 114         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575GB_QUAD_COPPER) },
 115         /* required last entry */
 116         {0, }
 117 };
 118
 119 //MODULE_DEVICE_TABLE(pci, igb_pci_tbl);
 120 static void igb_set_sriov_capability(struct igb_adapter *adapter) __attribute__((__unused__));
 121 void igb_reset(struct igb_adapter *);
 122 static int igb_setup_all_tx_resources(struct igb_adapter *);
 123 static int igb_setup_all_rx_resources(struct igb_adapter *);
 124 static void igb_free_all_tx_resources(struct igb_adapter *);
 125 static void igb_free_all_rx_resources(struct igb_adapter *);
 126 static void igb_setup_mrqc(struct igb_adapter *);
 127 void igb_update_stats(struct igb_adapter *);
 128 static int igb_probe(struct pci_dev *, const struct pci_device_id *);
 129 static void __devexit igb_remove(struct pci_dev *pdev);
 130 static int igb_sw_init(struct igb_adapter *);
 131 static int igb_open(struct net_device *);
 132 static int igb_close(struct net_device *);
 133 static void igb_configure(struct igb_adapter *);
 134 static void igb_configure_tx(struct igb_adapter *);
 135 static void igb_configure_rx(struct igb_adapter *);
 136 static void igb_clean_all_tx_rings(struct igb_adapter *);
 137 static void igb_clean_all_rx_rings(struct igb_adapter *);
 138 static void igb_clean_tx_ring(struct igb_ring *);
 139 static void igb_set_rx_mode(struct net_device *);
 140 static void igb_update_phy_info(unsigned long);
 141 static void igb_watchdog(unsigned long);
 142 static void igb_watchdog_task(struct work_struct *);
 143 static void igb_dma_err_task(struct work_struct *);
 144 static void igb_dma_err_timer(unsigned long data);
 145 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb, struct net_device *);
 146 static struct net_device_stats *igb_get_stats(struct net_device *);
 147 static int igb_change_mtu(struct net_device *, int);
 148 void igb_full_sync_mac_table(struct igb_adapter *adapter);
 149 static int igb_set_mac(struct net_device *, void *);
 150 static void igb_set_uta(struct igb_adapter *adapter);
 151 static irqreturn_t igb_intr(int irq, void *);
 152 static irqreturn_t igb_intr_msi(int irq, void *);
 153 static irqreturn_t igb_msix_other(int irq, void *);
 154 static irqreturn_t igb_msix_ring(int irq, void *);
 155 #ifdef IGB_DCA
 156 static void igb_update_dca(struct igb_q_vector *);
 157 static void igb_setup_dca(struct igb_adapter *);
 158 #endif /* IGB_DCA */
 159 static int igb_poll(struct napi_struct *, int);
 160 static bool igb_clean_tx_irq(struct igb_q_vector *);
 161 static bool igb_clean_rx_irq(struct igb_q_vector *, int);
 162 static int igb_ioctl(struct net_device *, struct ifreq *, int cmd);
 163 static void igb_tx_timeout(struct net_device *);
 164 static void igb_reset_task(struct work_struct *);
 165 #ifdef HAVE_VLAN_RX_REGISTER
 166 static void igb_vlan_mode(struct net_device *, struct vlan_group *);
 167 #endif
 168 #ifdef HAVE_VLAN_PROTOCOL
 169 static int igb_vlan_rx_add_vid(struct net_device *,
 170                                __be16 proto, u16);
 171 static int igb_vlan_rx_kill_vid(struct net_device *,
 172                                 __be16 proto, u16);
 173 #elif defined HAVE_INT_NDO_VLAN_RX_ADD_VID
 174 #ifdef NETIF_F_HW_VLAN_CTAG_RX
 175 static int igb_vlan_rx_add_vid(struct net_device *,
 176                                __always_unused __be16 proto, u16);
 177 static int igb_vlan_rx_kill_vid(struct net_device *,
 178                                 __always_unused __be16 proto, u16);
 179 #else
 180 static int igb_vlan_rx_add_vid(struct net_device *, u16);
 181 static int igb_vlan_rx_kill_vid(struct net_device *, u16);
 182 #endif
 183 #else
 184 static void igb_vlan_rx_add_vid(struct net_device *, u16);
 185 static void igb_vlan_rx_kill_vid(struct net_device *, u16);
 186 #endif
 187 static void igb_restore_vlan(struct igb_adapter *);
 188 void igb_rar_set(struct igb_adapter *adapter, u32 index);
 189 static void igb_ping_all_vfs(struct igb_adapter *);
 190 static void igb_msg_task(struct igb_adapter *);
 191 static void igb_vmm_control(struct igb_adapter *);
 192 static int igb_set_vf_mac(struct igb_adapter *, int, unsigned char *);
 193 static void igb_restore_vf_multicasts(struct igb_adapter *adapter);
 194 static void igb_process_mdd_event(struct igb_adapter *);
 195 #ifdef IFLA_VF_MAX
 196 static int igb_ndo_set_vf_mac( struct net_device *netdev, int vf, u8 *mac);
 197 static int igb_ndo_set_vf_vlan(struct net_device *netdev,
 198                                 int vf, u16 vlan, u8 qos);
 199 #ifdef HAVE_VF_SPOOFCHK_CONFIGURE
 200 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
 201                                 bool setting);
 202 #endif
 203 static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf, int tx_rate);
 204 static int igb_ndo_get_vf_config(struct net_device *netdev, int vf,
 205                                  struct ifla_vf_info *ivi);
 206 static void igb_check_vf_rate_limit(struct igb_adapter *);
 207 #endif
 208 static int igb_vf_configure(struct igb_adapter *adapter, int vf);
 209 #ifdef CONFIG_PM
 210 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
 211 static int igb_suspend(struct device *dev);
 212 static int igb_resume(struct device *dev);
 213 #ifdef CONFIG_PM_RUNTIME
 214 static int igb_runtime_suspend(struct device *dev);
 215 static int igb_runtime_resume(struct device *dev);
 216 static int igb_runtime_idle(struct device *dev);
 217 #endif /* CONFIG_PM_RUNTIME */
 218 static const struct dev_pm_ops igb_pm_ops = {
 219 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,34)
 220         .suspend = igb_suspend,
 221         .resume = igb_resume,
 222         .freeze = igb_suspend,
 223         .thaw = igb_resume,
 224         .poweroff = igb_suspend,
 225         .restore = igb_resume,
 226 #ifdef CONFIG_PM_RUNTIME
 227         .runtime_suspend = igb_runtime_suspend,
 228         .runtime_resume = igb_runtime_resume,
 229         .runtime_idle = igb_runtime_idle,
 230 #endif
 231 #else /* Linux >= 2.6.34 */
 232         SET_SYSTEM_SLEEP_PM_OPS(igb_suspend, igb_resume)
 233 #ifdef CONFIG_PM_RUNTIME
 234         SET_RUNTIME_PM_OPS(igb_runtime_suspend, igb_runtime_resume,
 235                         igb_runtime_idle)
 236 #endif /* CONFIG_PM_RUNTIME */
 237 #endif /* Linux version */
 238 };
 239 #else
 240 static int igb_suspend(struct pci_dev *pdev, pm_message_t state);
 241 static int igb_resume(struct pci_dev *pdev);
 242 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
 243 #endif /* CONFIG_PM */
 244 #ifndef USE_REBOOT_NOTIFIER
 245 static void igb_shutdown(struct pci_dev *);
 246 #else
 247 static int igb_notify_reboot(struct notifier_block *, unsigned long, void *);
 248 static struct notifier_block igb_notifier_reboot = {
 249         .notifier_call  = igb_notify_reboot,
 250         .next           = NULL,
 251         .priority       = 0
 252 };
 253 #endif
 254 #ifdef IGB_DCA
 255 static int igb_notify_dca(struct notifier_block *, unsigned long, void *);
 256 static struct notifier_block dca_notifier = {
 257         .notifier_call  = igb_notify_dca,
 258         .next           = NULL,
 259         .priority       = 0
 260 };
 261 #endif
 262 #ifdef CONFIG_NET_POLL_CONTROLLER
 263 /* for netdump / net console */
 264 static void igb_netpoll(struct net_device *);
 265 #endif
 266
 267 #ifdef HAVE_PCI_ERS
 268 static pci_ers_result_t igb_io_error_detected(struct pci_dev *,
 269                      pci_channel_state_t);
 270 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *);
 271 static void igb_io_resume(struct pci_dev *);
 272
 273 static struct pci_error_handlers igb_err_handler = {
 274         .error_detected = igb_io_error_detected,
 275         .slot_reset = igb_io_slot_reset,
 276         .resume = igb_io_resume,
 277 };
 278 #endif
 279
 280 static void igb_init_fw(struct igb_adapter *adapter);
 281 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba);
 282
 283 static struct pci_driver igb_driver = {
 284         .name     = igb_driver_name,
 285         .id_table = igb_pci_tbl,
 286         .probe    = igb_probe,
 287         .remove   = __devexit_p(igb_remove),
 288 #ifdef CONFIG_PM
 289 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
 290         .driver.pm = &igb_pm_ops,
 291 #else
 292         .suspend  = igb_suspend,
 293         .resume   = igb_resume,
 294 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
 295 #endif /* CONFIG_PM */
 296 #ifndef USE_REBOOT_NOTIFIER
 297         .shutdown = igb_shutdown,
 298 #endif
 299 #ifdef HAVE_PCI_ERS
 300         .err_handler = &igb_err_handler
 301 #endif
 302 };
 303
 304 //MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
 305 //MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
 306 //MODULE_LICENSE("GPL");
 307 //MODULE_VERSION(DRV_VERSION);
 308
 309 static void igb_vfta_set(struct igb_adapter *adapter, u32 vid, bool add)
 310 {
 311         struct e1000_hw *hw = &adapter->hw;
 312         struct e1000_host_mng_dhcp_cookie *mng_cookie = &hw->mng_cookie;
 313         u32 index = (vid >> E1000_VFTA_ENTRY_SHIFT) & E1000_VFTA_ENTRY_MASK;
 314         u32 mask = 1 << (vid & E1000_VFTA_ENTRY_BIT_SHIFT_MASK);
 315         u32 vfta;
 316
 317         /*
 318          * if this is the management vlan the only option is to add it in so
 319          * that the management pass through will continue to work
 320          */
 321         if ((mng_cookie->status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
 322             (vid == mng_cookie->vlan_id))
 323                 add = TRUE;
 324
 325         vfta = adapter->shadow_vfta[index];
 326
 327         if (add)
 328                 vfta |= mask;
 329         else
 330                 vfta &= ~mask;
 331
 332         e1000_write_vfta(hw, index, vfta);
 333         adapter->shadow_vfta[index] = vfta;
 334 }
 335
 336 static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
 337 //module_param(debug, int, 0);
 338 //MODULE_PARM_DESC(debug, "Debug level (0=none, ..., 16=all)");
 339
 340 /**
 341  * igb_init_module - Driver Registration Routine
 342  *
 343  * igb_init_module is the first routine called when the driver is
 344  * loaded. All it does is register with the PCI subsystem.
 345  **/
 346 static int __init igb_init_module(void)
 347 {
 348         int ret;
 349
 350         printk(KERN_INFO "%s - version %s\n",
 351                igb_driver_string, igb_driver_version);
 352
 353         printk(KERN_INFO "%s\n", igb_copyright);
 354 #ifdef IGB_HWMON
 355 /* only use IGB_PROCFS if IGB_HWMON is not defined */
 356 #else
 357 #ifdef IGB_PROCFS
 358         if (igb_procfs_topdir_init())
 359                 printk(KERN_INFO "Procfs failed to initialize topdir\n");
 360 #endif /* IGB_PROCFS */
 361 #endif /* IGB_HWMON  */
 362
 363 #ifdef IGB_DCA
 364         dca_register_notify(&dca_notifier);
 365 #endif
 366         ret = pci_register_driver(&igb_driver);
 367 #ifdef USE_REBOOT_NOTIFIER
 368         if (ret >= 0) {
 369                 register_reboot_notifier(&igb_notifier_reboot);
 370         }
 371 #endif
 372         return ret;
 373 }
 374
 375 #undef module_init
 376 #define module_init(x) static int x(void)  __attribute__((__unused__));
 377 module_init(igb_init_module);
 378
 379 /**
 380  * igb_exit_module - Driver Exit Cleanup Routine
 381  *
 382  * igb_exit_module is called just before the driver is removed
 383  * from memory.
 384  **/
 385 static void __exit igb_exit_module(void)
 386 {
 387 #ifdef IGB_DCA
 388         dca_unregister_notify(&dca_notifier);
 389 #endif
 390 #ifdef USE_REBOOT_NOTIFIER
 391         unregister_reboot_notifier(&igb_notifier_reboot);
 392 #endif
 393         pci_unregister_driver(&igb_driver);
 394
 395 #ifdef IGB_HWMON
 396 /* only compile IGB_PROCFS if IGB_HWMON is not defined */
 397 #else
 398 #ifdef IGB_PROCFS
 399         igb_procfs_topdir_exit();
 400 #endif /* IGB_PROCFS */
 401 #endif /* IGB_HWMON */
 402 }
 403
 404 #undef module_exit
 405 #define module_exit(x) static void x(void)  __attribute__((__unused__));
 406 module_exit(igb_exit_module);
 407
 408 #define Q_IDX_82576(i) (((i & 0x1) << 3) + (i >> 1))
 409 /**
 410  * igb_cache_ring_register - Descriptor ring to register mapping
 411  * @adapter: board private structure to initialize
 412  *
 413  * Once we know the feature-set enabled for the device, we'll cache
 414  * the register offset the descriptor ring is assigned to.
 415  **/
 416 static void igb_cache_ring_register(struct igb_adapter *adapter)
 417 {
 418         int i = 0, j = 0;
 419         u32 rbase_offset = adapter->vfs_allocated_count;
 420
 421         switch (adapter->hw.mac.type) {
 422         case e1000_82576:
 423                 /* The queues are allocated for virtualization such that VF 0
 424                  * is allocated queues 0 and 8, VF 1 queues 1 and 9, etc.
 425                  * In order to avoid collision we start at the first free queue
 426                  * and continue consuming queues in the same sequence
 427                  */
 428                 if ((adapter->rss_queues > 1) && adapter->vmdq_pools) {
 429                         for (; i < adapter->rss_queues; i++)
 430                                 adapter->rx_ring[i]->reg_idx = rbase_offset +
 431                                                                Q_IDX_82576(i);
 432                 }
 433         case e1000_82575:
 434         case e1000_82580:
 435         case e1000_i350:
 436         case e1000_i354:
 437         case e1000_i210:
 438         case e1000_i211:
 439         default:
 440                 for (; i < adapter->num_rx_queues; i++)
 441                         adapter->rx_ring[i]->reg_idx = rbase_offset + i;
 442                 for (; j < adapter->num_tx_queues; j++)
 443                         adapter->tx_ring[j]->reg_idx = rbase_offset + j;
 444                 break;
 445         }
 446 }
 447
 448 static void igb_configure_lli(struct igb_adapter *adapter)
 449 {
 450         struct e1000_hw *hw = &adapter->hw;
 451         u16 port;
 452
 453         /* LLI should only be enabled for MSI-X or MSI interrupts */
 454         if (!adapter->msix_entries && !(adapter->flags & IGB_FLAG_HAS_MSI))
 455                 return;
 456
 457         if (adapter->lli_port) {
 458                 /* use filter 0 for port */
 459                 port = htons((u16)adapter->lli_port);
 460                 E1000_WRITE_REG(hw, E1000_IMIR(0),
 461                         (port | E1000_IMIR_PORT_IM_EN));
 462                 E1000_WRITE_REG(hw, E1000_IMIREXT(0),
 463                         (E1000_IMIREXT_SIZE_BP | E1000_IMIREXT_CTRL_BP));
 464         }
 465
 466         if (adapter->flags & IGB_FLAG_LLI_PUSH) {
 467                 /* use filter 1 for push flag */
 468                 E1000_WRITE_REG(hw, E1000_IMIR(1),
 469                         (E1000_IMIR_PORT_BP | E1000_IMIR_PORT_IM_EN));
 470                 E1000_WRITE_REG(hw, E1000_IMIREXT(1),
 471                         (E1000_IMIREXT_SIZE_BP | E1000_IMIREXT_CTRL_PSH));
 472         }
 473
 474         if (adapter->lli_size) {
 475                 /* use filter 2 for size */
 476                 E1000_WRITE_REG(hw, E1000_IMIR(2),
 477                         (E1000_IMIR_PORT_BP | E1000_IMIR_PORT_IM_EN));
 478                 E1000_WRITE_REG(hw, E1000_IMIREXT(2),
 479                         (adapter->lli_size | E1000_IMIREXT_CTRL_BP));
 480         }
 481
 482 }
 483
 484 /**
 485  *  igb_write_ivar - configure ivar for given MSI-X vector
 486  *  @hw: pointer to the HW structure
 487  *  @msix_vector: vector number we are allocating to a given ring
 488  *  @index: row index of IVAR register to write within IVAR table
 489  *  @offset: column offset of in IVAR, should be multiple of 8
 490  *
 491  *  This function is intended to handle the writing of the IVAR register
 492  *  for adapters 82576 and newer.  The IVAR table consists of 2 columns,
 493  *  each containing an cause allocation for an Rx and Tx ring, and a
 494  *  variable number of rows depending on the number of queues supported.
 495  **/
 496 static void igb_write_ivar(struct e1000_hw *hw, int msix_vector,
 497                            int index, int offset)
 498 {
 499         u32 ivar = E1000_READ_REG_ARRAY(hw, E1000_IVAR0, index);
 500
 501         /* clear any bits that are currently set */
 502         ivar &= ~((u32)0xFF << offset);
 503
 504         /* write vector and valid bit */
 505         ivar |= (msix_vector | E1000_IVAR_VALID) << offset;
 506
 507         E1000_WRITE_REG_ARRAY(hw, E1000_IVAR0, index, ivar);
 508 }
 509
 510 #define IGB_N0_QUEUE -1
 511 static void igb_assign_vector(struct igb_q_vector *q_vector, int msix_vector)
 512 {
 513         struct igb_adapter *adapter = q_vector->adapter;
 514         struct e1000_hw *hw = &adapter->hw;
 515         int rx_queue = IGB_N0_QUEUE;
 516         int tx_queue = IGB_N0_QUEUE;
 517         u32 msixbm = 0;
 518
 519         if (q_vector->rx.ring)
 520                 rx_queue = q_vector->rx.ring->reg_idx;
 521         if (q_vector->tx.ring)
 522                 tx_queue = q_vector->tx.ring->reg_idx;
 523
 524         switch (hw->mac.type) {
 525         case e1000_82575:
 526                 /* The 82575 assigns vectors using a bitmask, which matches the
 527                    bitmask for the EICR/EIMS/EIMC registers.  To assign one
 528                    or more queues to a vector, we write the appropriate bits
 529                    into the MSIXBM register for that vector. */
 530                 if (rx_queue > IGB_N0_QUEUE)
 531                         msixbm = E1000_EICR_RX_QUEUE0 << rx_queue;
 532                 if (tx_queue > IGB_N0_QUEUE)
 533                         msixbm |= E1000_EICR_TX_QUEUE0 << tx_queue;
 534                 if (!adapter->msix_entries && msix_vector == 0)
 535                         msixbm |= E1000_EIMS_OTHER;
 536                 E1000_WRITE_REG_ARRAY(hw, E1000_MSIXBM(0), msix_vector, msixbm);
 537                 q_vector->eims_value = msixbm;
 538                 break;
 539         case e1000_82576:
 540                 /*
 541                  * 82576 uses a table that essentially consists of 2 columns
 542                  * with 8 rows.  The ordering is column-major so we use the
 543                  * lower 3 bits as the row index, and the 4th bit as the
 544                  * column offset.
 545                  */
 546                 if (rx_queue > IGB_N0_QUEUE)
 547                         igb_write_ivar(hw, msix_vector,
 548                                        rx_queue & 0x7,
 549                                        (rx_queue & 0x8) << 1);
 550                 if (tx_queue > IGB_N0_QUEUE)
 551                         igb_write_ivar(hw, msix_vector,
 552                                        tx_queue & 0x7,
 553                                        ((tx_queue & 0x8) << 1) + 8);
 554                 q_vector->eims_value = 1 << msix_vector;
 555                 break;
 556         case e1000_82580:
 557         case e1000_i350:
 558         case e1000_i354:
 559         case e1000_i210:
 560         case e1000_i211:
 561                 /*
 562                  * On 82580 and newer adapters the scheme is similar to 82576
 563                  * however instead of ordering column-major we have things
 564                  * ordered row-major.  So we traverse the table by using
 565                  * bit 0 as the column offset, and the remaining bits as the
 566                  * row index.
 567                  */
 568                 if (rx_queue > IGB_N0_QUEUE)
 569                         igb_write_ivar(hw, msix_vector,
 570                                        rx_queue >> 1,
 571                                        (rx_queue & 0x1) << 4);
 572                 if (tx_queue > IGB_N0_QUEUE)
 573                         igb_write_ivar(hw, msix_vector,
 574                                        tx_queue >> 1,
 575                                        ((tx_queue & 0x1) << 4) + 8);
 576                 q_vector->eims_value = 1 << msix_vector;
 577                 break;
 578         default:
 579                 BUG();
 580                 break;
 581         }
 582
 583         /* add q_vector eims value to global eims_enable_mask */
 584         adapter->eims_enable_mask |= q_vector->eims_value;
 585
 586         /* configure q_vector to set itr on first interrupt */
 587         q_vector->set_itr = 1;
 588 }
 589
 590 /**
 591  * igb_configure_msix - Configure MSI-X hardware
 592  *
 593  * igb_configure_msix sets up the hardware to properly
 594  * generate MSI-X interrupts.
 595  **/
 596 static void igb_configure_msix(struct igb_adapter *adapter)
 597 {
 598         u32 tmp;
 599         int i, vector = 0;
 600         struct e1000_hw *hw = &adapter->hw;
 601
 602         adapter->eims_enable_mask = 0;
 603
 604         /* set vector for other causes, i.e. link changes */
 605         switch (hw->mac.type) {
 606         case e1000_82575:
 607                 tmp = E1000_READ_REG(hw, E1000_CTRL_EXT);
 608                 /* enable MSI-X PBA support*/
 609                 tmp |= E1000_CTRL_EXT_PBA_CLR;
 610
 611                 /* Auto-Mask interrupts upon ICR read. */
 612                 tmp |= E1000_CTRL_EXT_EIAME;
 613                 tmp |= E1000_CTRL_EXT_IRCA;
 614
 615                 E1000_WRITE_REG(hw, E1000_CTRL_EXT, tmp);
 616
 617                 /* enable msix_other interrupt */
 618                 E1000_WRITE_REG_ARRAY(hw, E1000_MSIXBM(0), vector++,
 619                                       E1000_EIMS_OTHER);
 620                 adapter->eims_other = E1000_EIMS_OTHER;
 621
 622                 break;
 623
 624         case e1000_82576:
 625         case e1000_82580:
 626         case e1000_i350:
 627         case e1000_i354:
 628         case e1000_i210:
 629         case e1000_i211:
 630                 /* Turn on MSI-X capability first, or our settings
 631                  * won't stick.  And it will take days to debug. */
 632                 E1000_WRITE_REG(hw, E1000_GPIE, E1000_GPIE_MSIX_MODE |
 633                                 E1000_GPIE_PBA | E1000_GPIE_EIAME |
 634                                 E1000_GPIE_NSICR);
 635
 636                 /* enable msix_other interrupt */
 637                 adapter->eims_other = 1 << vector;
 638                 tmp = (vector++ | E1000_IVAR_VALID) << 8;
 639
 640                 E1000_WRITE_REG(hw, E1000_IVAR_MISC, tmp);
 641                 break;
 642         default:
 643                 /* do nothing, since nothing else supports MSI-X */
 644                 break;
 645         } /* switch (hw->mac.type) */
 646
 647         adapter->eims_enable_mask |= adapter->eims_other;
 648
 649         for (i = 0; i < adapter->num_q_vectors; i++)
 650                 igb_assign_vector(adapter->q_vector[i], vector++);
 651
 652         E1000_WRITE_FLUSH(hw);
 653 }
 654
 655 /**
 656  * igb_request_msix - Initialize MSI-X interrupts
 657  *
 658  * igb_request_msix allocates MSI-X vectors and requests interrupts from the
 659  * kernel.
 660  **/
 661 static int igb_request_msix(struct igb_adapter *adapter)
 662 {
 663         struct net_device *netdev = adapter->netdev;
 664         struct e1000_hw *hw = &adapter->hw;
 665         int i, err = 0, vector = 0, free_vector = 0;
 666
 667         err = request_irq(adapter->msix_entries[vector].vector,
 668                           &igb_msix_other, 0, netdev->name, adapter);
 669         if (err)
 670                 goto err_out;
 671
 672         for (i = 0; i < adapter->num_q_vectors; i++) {
 673                 struct igb_q_vector *q_vector = adapter->q_vector[i];
 674
 675                 vector++;
 676
 677                 q_vector->itr_register = hw->hw_addr + E1000_EITR(vector);
 678
 679                 if (q_vector->rx.ring && q_vector->tx.ring)
 680                         sprintf(q_vector->name, "%s-TxRx-%u", netdev->name,
 681                                 q_vector->rx.ring->queue_index);
 682                 else if (q_vector->tx.ring)
 683                         sprintf(q_vector->name, "%s-tx-%u", netdev->name,
 684                                 q_vector->tx.ring->queue_index);
 685                 else if (q_vector->rx.ring)
 686                         sprintf(q_vector->name, "%s-rx-%u", netdev->name,
 687                                 q_vector->rx.ring->queue_index);
 688                 else
 689                         sprintf(q_vector->name, "%s-unused", netdev->name);
 690
 691                 err = request_irq(adapter->msix_entries[vector].vector,
 692                                   igb_msix_ring, 0, q_vector->name,
 693                                   q_vector);
 694                 if (err)
 695                         goto err_free;
 696         }
 697
 698         igb_configure_msix(adapter);
 699         return 0;
 700
 701 err_free:
 702         /* free already assigned IRQs */
 703         free_irq(adapter->msix_entries[free_vector++].vector, adapter);
 704
 705         vector--;
 706         for (i = 0; i < vector; i++) {
 707                 free_irq(adapter->msix_entries[free_vector++].vector,
 708                          adapter->q_vector[i]);
 709         }
 710 err_out:
 711         return err;
 712 }
 713
 714 static void igb_reset_interrupt_capability(struct igb_adapter *adapter)
 715 {
 716         if (adapter->msix_entries) {
 717                 pci_disable_msix(adapter->pdev);
 718                 kfree(adapter->msix_entries);
 719                 adapter->msix_entries = NULL;
 720         } else if (adapter->flags & IGB_FLAG_HAS_MSI) {
 721                 pci_disable_msi(adapter->pdev);
 722         }
 723 }
 724
 725 /**
 726  * igb_free_q_vector - Free memory allocated for specific interrupt vector
 727  * @adapter: board private structure to initialize
 728  * @v_idx: Index of vector to be freed
 729  *
 730  * This function frees the memory allocated to the q_vector.  In addition if
 731  * NAPI is enabled it will delete any references to the NAPI struct prior
 732  * to freeing the q_vector.
 733  **/
 734 static void igb_free_q_vector(struct igb_adapter *adapter, int v_idx)
 735 {
 736         struct igb_q_vector *q_vector = adapter->q_vector[v_idx];
 737
 738         if (q_vector->tx.ring)
 739                 adapter->tx_ring[q_vector->tx.ring->queue_index] = NULL;
 740
 741         if (q_vector->rx.ring)
 742                 adapter->tx_ring[q_vector->rx.ring->queue_index] = NULL;
 743
 744         adapter->q_vector[v_idx] = NULL;
 745         netif_napi_del(&q_vector->napi);
 746 #ifndef IGB_NO_LRO
 747         __skb_queue_purge(&q_vector->lrolist.active);
 748 #endif
 749         kfree(q_vector);
 750 }
 751
 752 /**
 753  * igb_free_q_vectors - Free memory allocated for interrupt vectors
 754  * @adapter: board private structure to initialize
 755  *
 756  * This function frees the memory allocated to the q_vectors.  In addition if
 757  * NAPI is enabled it will delete any references to the NAPI struct prior
 758  * to freeing the q_vector.
 759  **/
 760 static void igb_free_q_vectors(struct igb_adapter *adapter)
 761 {
 762         int v_idx = adapter->num_q_vectors;
 763
 764         adapter->num_tx_queues = 0;
 765         adapter->num_rx_queues = 0;
 766         adapter->num_q_vectors = 0;
 767
 768         while (v_idx--)
 769                 igb_free_q_vector(adapter, v_idx);
 770 }
 771
 772 /**
 773  * igb_clear_interrupt_scheme - reset the device to a state of no interrupts
 774  *
 775  * This function resets the device so that it has 0 rx queues, tx queues, and
 776  * MSI-X interrupts allocated.
 777  */
 778 static void igb_clear_interrupt_scheme(struct igb_adapter *adapter)
 779 {
 780         igb_free_q_vectors(adapter);
 781         igb_reset_interrupt_capability(adapter);
 782 }
 783
 784 /**
 785  * igb_process_mdd_event
 786  * @adapter - board private structure
 787  *
 788  * Identify a malicious VF, disable the VF TX/RX queues and log a message.
 789  */
 790 static void igb_process_mdd_event(struct igb_adapter *adapter)
 791 {
 792         struct e1000_hw *hw = &adapter->hw;
 793         u32 lvmmc, vfte, vfre, mdfb;
 794         u8 vf_queue;
 795
 796         lvmmc = E1000_READ_REG(hw, E1000_LVMMC);
 797         vf_queue = lvmmc >> 29;
 798
 799         /* VF index cannot be bigger or equal to VFs allocated */
 800         if (vf_queue >= adapter->vfs_allocated_count)
 801                 return;
 802
 803         netdev_info(adapter->netdev,
 804                     "VF %d misbehaved. VF queues are disabled. "
 805                     "VM misbehavior code is 0x%x\n", vf_queue, lvmmc);
 806
 807         /* Disable VFTE and VFRE related bits */
 808         vfte = E1000_READ_REG(hw, E1000_VFTE);
 809         vfte &= ~(1 << vf_queue);
 810         E1000_WRITE_REG(hw, E1000_VFTE, vfte);
 811
 812         vfre = E1000_READ_REG(hw, E1000_VFRE);
 813         vfre &= ~(1 << vf_queue);
 814         E1000_WRITE_REG(hw, E1000_VFRE, vfre);
 815
 816         /* Disable MDFB related bit. Clear on write */
 817         mdfb = E1000_READ_REG(hw, E1000_MDFB);
 818         mdfb |= (1 << vf_queue);
 819         E1000_WRITE_REG(hw, E1000_MDFB, mdfb);
 820
 821         /* Reset the specific VF */
 822         E1000_WRITE_REG(hw, E1000_VTCTRL(vf_queue), E1000_VTCTRL_RST);
 823 }
 824
 825 /**
 826  * igb_disable_mdd
 827  * @adapter - board private structure
 828  *
 829  * Disable MDD behavior in the HW
 830  **/
 831 static void igb_disable_mdd(struct igb_adapter *adapter)
 832 {
 833         struct e1000_hw *hw = &adapter->hw;
 834         u32 reg;
 835
 836         if ((hw->mac.type != e1000_i350) ||
 837             (hw->mac.type != e1000_i354))
 838                 return;
 839
 840         reg = E1000_READ_REG(hw, E1000_DTXCTL);
 841         reg &= (~E1000_DTXCTL_MDP_EN);
 842         E1000_WRITE_REG(hw, E1000_DTXCTL, reg);
 843 }
 844
 845 /**
 846  * igb_enable_mdd
 847  * @adapter - board private structure
 848  *
 849  * Enable the HW to detect malicious driver and sends an interrupt to
 850  * the driver.
 851  **/
 852 static void igb_enable_mdd(struct igb_adapter *adapter)
 853 {
 854         struct e1000_hw *hw = &adapter->hw;
 855         u32 reg;
 856
 857         /* Only available on i350 device */
 858         if (hw->mac.type != e1000_i350)
 859                 return;
 860
 861         reg = E1000_READ_REG(hw, E1000_DTXCTL);
 862         reg |= E1000_DTXCTL_MDP_EN;
 863         E1000_WRITE_REG(hw, E1000_DTXCTL, reg);
 864 }
 865
 866 /**
 867  * igb_reset_sriov_capability - disable SR-IOV if enabled
 868  *
 869  * Attempt to disable single root IO virtualization capabilites present in the
 870  * kernel.
 871  **/
 872 static void igb_reset_sriov_capability(struct igb_adapter *adapter)
 873 {
 874         struct pci_dev *pdev = adapter->pdev;
 875         struct e1000_hw *hw = &adapter->hw;
 876
 877         /* reclaim resources allocated to VFs */
 878         if (adapter->vf_data) {
 879                 if (!pci_vfs_assigned(pdev)) {
 880                         /*
 881                          * disable iov and allow time for transactions to
 882                          * clear
 883                          */
 884                         pci_disable_sriov(pdev);
 885                         msleep(500);
 886
 887                         dev_info(pci_dev_to_dev(pdev), "IOV Disabled\n");
 888                 } else {
 889                         dev_info(pci_dev_to_dev(pdev), "IOV Not Disabled\n "
 890                                         "VF(s) are assigned to guests!\n");
 891                 }
 892                 /* Disable Malicious Driver Detection */
 893                 igb_disable_mdd(adapter);
 894
 895                 /* free vf data storage */
 896                 kfree(adapter->vf_data);
 897                 adapter->vf_data = NULL;
 898
 899                 /* switch rings back to PF ownership */
 900                 E1000_WRITE_REG(hw, E1000_IOVCTL,
 901                                 E1000_IOVCTL_REUSE_VFQ);
 902                 E1000_WRITE_FLUSH(hw);
 903                 msleep(100);
 904         }
 905
 906         adapter->vfs_allocated_count = 0;
 907 }
 908
 909 /**
 910  * igb_set_sriov_capability - setup SR-IOV if supported
 911  *
 912  * Attempt to enable single root IO virtualization capabilites present in the
 913  * kernel.
 914  **/
 915 static void igb_set_sriov_capability(struct igb_adapter *adapter)
 916 {
 917         struct pci_dev *pdev = adapter->pdev;
 918         int old_vfs = 0;
 919         int i;
 920
 921         old_vfs = pci_num_vf(pdev);
 922         if (old_vfs) {
 923                 dev_info(pci_dev_to_dev(pdev),
 924                                 "%d pre-allocated VFs found - override "
 925                                 "max_vfs setting of %d\n", old_vfs,
 926                                 adapter->vfs_allocated_count);
 927                 adapter->vfs_allocated_count = old_vfs;
 928         }
 929         /* no VFs requested, do nothing */
 930         if (!adapter->vfs_allocated_count)
 931                 return;
 932
 933         /* allocate vf data storage */
 934         adapter->vf_data = kcalloc(adapter->vfs_allocated_count,
 935                                    sizeof(struct vf_data_storage),
 936                                    GFP_KERNEL);
 937
 938         if (adapter->vf_data) {
 939                 if (!old_vfs) {
 940                         if (pci_enable_sriov(pdev,
 941                                         adapter->vfs_allocated_count))
 942                                 goto err_out;
 943                 }
 944                 for (i = 0; i < adapter->vfs_allocated_count; i++)
 945                         igb_vf_configure(adapter, i);
 946
 947                 switch (adapter->hw.mac.type) {
 948                 case e1000_82576:
 949                 case e1000_i350:
 950                         /* Enable VM to VM loopback by default */
 951                         adapter->flags |= IGB_FLAG_LOOPBACK_ENABLE;
 952                         break;
 953                 default:
 954                         /* Currently no other hardware supports loopback */
 955                         break;
 956                 }
 957
 958                 /* DMA Coalescing is not supported in IOV mode. */
 959                 if (adapter->hw.mac.type >= e1000_i350)
 960                 adapter->dmac = IGB_DMAC_DISABLE;
 961                 if (adapter->hw.mac.type < e1000_i350)
 962                 adapter->flags |= IGB_FLAG_DETECT_BAD_DMA;
 963                 return;
 964
 965         }
 966
 967 err_out:
 968         kfree(adapter->vf_data);
 969         adapter->vf_data = NULL;
 970         adapter->vfs_allocated_count = 0;
 971         dev_warn(pci_dev_to_dev(pdev),
 972                         "Failed to initialize SR-IOV virtualization\n");
 973 }
 974
 975 /**
 976  * igb_set_interrupt_capability - set MSI or MSI-X if supported
 977  *
 978  * Attempt to configure interrupts using the best available
 979  * capabilities of the hardware and kernel.
 980  **/
 981 static void igb_set_interrupt_capability(struct igb_adapter *adapter, bool msix)
 982 {
 983         struct pci_dev *pdev = adapter->pdev;
 984         int err;
 985         int numvecs, i;
 986
 987         if (!msix)
 988                 adapter->int_mode = IGB_INT_MODE_MSI;
 989
 990         /* Number of supported queues. */
 991         adapter->num_rx_queues = adapter->rss_queues;
 992
 993         if (adapter->vmdq_pools > 1)
 994                 adapter->num_rx_queues += adapter->vmdq_pools - 1;
 995
 996 #ifdef HAVE_TX_MQ
 997         if (adapter->vmdq_pools)
 998                 adapter->num_tx_queues = adapter->vmdq_pools;
 999         else
1000                 adapter->num_tx_queues = adapter->num_rx_queues;
1001 #else
1002         adapter->num_tx_queues = max_t(u32, 1, adapter->vmdq_pools);
1003 #endif
1004
1005         switch (adapter->int_mode) {
1006         case IGB_INT_MODE_MSIX:
1007                 /* start with one vector for every rx queue */
1008                 numvecs = adapter->num_rx_queues;
1009
1010                 /* if tx handler is separate add 1 for every tx queue */
1011                 if (!(adapter->flags & IGB_FLAG_QUEUE_PAIRS))
1012                         numvecs += adapter->num_tx_queues;
1013
1014                 /* store the number of vectors reserved for queues */
1015                 adapter->num_q_vectors = numvecs;
1016
1017                 /* add 1 vector for link status interrupts */
1018                 numvecs++;
1019                 adapter->msix_entries = kcalloc(numvecs,
1020                                                 sizeof(struct msix_entry),
1021                                                 GFP_KERNEL);
1022                 if (adapter->msix_entries) {
1023                         for (i = 0; i < numvecs; i++)
1024                                 adapter->msix_entries[i].entry = i;
1025
1026                         err = pci_enable_msix(pdev,
1027                                               adapter->msix_entries, numvecs);
1028                         if (err == 0)
1029                                 break;
1030                 }
1031                 /* MSI-X failed, so fall through and try MSI */
1032                 dev_warn(pci_dev_to_dev(pdev), "Failed to initialize MSI-X interrupts. "
1033                          "Falling back to MSI interrupts.\n");
1034                 igb_reset_interrupt_capability(adapter);
1035         case IGB_INT_MODE_MSI:
1036                 if (!pci_enable_msi(pdev))
1037                         adapter->flags |= IGB_FLAG_HAS_MSI;
1038                 else
1039                         dev_warn(pci_dev_to_dev(pdev), "Failed to initialize MSI "
1040                                  "interrupts.  Falling back to legacy "
1041                                  "interrupts.\n");
1042                 /* Fall through */
1043         case IGB_INT_MODE_LEGACY:
1044                 /* disable advanced features and set number of queues to 1 */
1045                 igb_reset_sriov_capability(adapter);
1046                 adapter->vmdq_pools = 0;
1047                 adapter->rss_queues = 1;
1048                 adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
1049                 adapter->num_rx_queues = 1;
1050                 adapter->num_tx_queues = 1;
1051                 adapter->num_q_vectors = 1;
1052                 /* Don't do anything; this is system default */
1053                 break;
1054         }
1055 }
1056
1057 static void igb_add_ring(struct igb_ring *ring,
1058                          struct igb_ring_container *head)
1059 {
1060         head->ring = ring;
1061         head->count++;
1062 }
1063
1064 /**
1065  * igb_alloc_q_vector - Allocate memory for a single interrupt vector
1066  * @adapter: board private structure to initialize
1067  * @v_count: q_vectors allocated on adapter, used for ring interleaving
1068  * @v_idx: index of vector in adapter struct
1069  * @txr_count: total number of Tx rings to allocate
1070  * @txr_idx: index of first Tx ring to allocate
1071  * @rxr_count: total number of Rx rings to allocate
1072  * @rxr_idx: index of first Rx ring to allocate
1073  *
1074  * We allocate one q_vector.  If allocation fails we return -ENOMEM.
1075  **/
1076 static int igb_alloc_q_vector(struct igb_adapter *adapter,
1077                               unsigned int v_count, unsigned int v_idx,
1078                               unsigned int txr_count, unsigned int txr_idx,
1079                               unsigned int rxr_count, unsigned int rxr_idx)
1080 {
1081         struct igb_q_vector *q_vector;
1082         struct igb_ring *ring;
1083         int ring_count, size;
1084
1085         /* igb only supports 1 Tx and/or 1 Rx queue per vector */
1086         if (txr_count > 1 || rxr_count > 1)
1087                 return -ENOMEM;
1088
1089         ring_count = txr_count + rxr_count;
1090         size = sizeof(struct igb_q_vector) +
1091                (sizeof(struct igb_ring) * ring_count);
1092
1093         /* allocate q_vector and rings */
1094         q_vector = kzalloc(size, GFP_KERNEL);
1095         if (!q_vector)
1096                 return -ENOMEM;
1097
1098 #ifndef IGB_NO_LRO
1099         /* initialize LRO */
1100         __skb_queue_head_init(&q_vector->lrolist.active);
1101
1102 #endif
1103         /* initialize NAPI */
1104         netif_napi_add(adapter->netdev, &q_vector->napi,
1105                        igb_poll, 64);
1106
1107         /* tie q_vector and adapter together */
1108         adapter->q_vector[v_idx] = q_vector;
1109         q_vector->adapter = adapter;
1110
1111         /* initialize work limits */
1112         q_vector->tx.work_limit = adapter->tx_work_limit;
1113
1114         /* initialize ITR configuration */
1115         q_vector->itr_register = adapter->hw.hw_addr + E1000_EITR(0);
1116         q_vector->itr_val = IGB_START_ITR;
1117
1118         /* initialize pointer to rings */
1119         ring = q_vector->ring;
1120
1121         /* intialize ITR */
1122         if (rxr_count) {
1123                 /* rx or rx/tx vector */
1124                 if (!adapter->rx_itr_setting || adapter->rx_itr_setting > 3)
1125                         q_vector->itr_val = adapter->rx_itr_setting;
1126         } else {
1127                 /* tx only vector */
1128                 if (!adapter->tx_itr_setting || adapter->tx_itr_setting > 3)
1129                         q_vector->itr_val = adapter->tx_itr_setting;
1130         }
1131
1132         if (txr_count) {
1133                 /* assign generic ring traits */
1134                 ring->dev = &adapter->pdev->dev;
1135                 ring->netdev = adapter->netdev;
1136
1137                 /* configure backlink on ring */
1138                 ring->q_vector = q_vector;
1139
1140                 /* update q_vector Tx values */
1141                 igb_add_ring(ring, &q_vector->tx);
1142
1143                 /* For 82575, context index must be unique per ring. */
1144                 if (adapter->hw.mac.type == e1000_82575)
1145                         set_bit(IGB_RING_FLAG_TX_CTX_IDX, &ring->flags);
1146
1147                 /* apply Tx specific ring traits */
1148                 ring->count = adapter->tx_ring_count;
1149                 ring->queue_index = txr_idx;
1150
1151                 /* assign ring to adapter */
1152                 adapter->tx_ring[txr_idx] = ring;
1153
1154                 /* push pointer to next ring */
1155                 ring++;
1156         }
1157
1158         if (rxr_count) {
1159                 /* assign generic ring traits */
1160                 ring->dev = &adapter->pdev->dev;
1161                 ring->netdev = adapter->netdev;
1162
1163                 /* configure backlink on ring */
1164                 ring->q_vector = q_vector;
1165
1166                 /* update q_vector Rx values */
1167                 igb_add_ring(ring, &q_vector->rx);
1168
1169 #ifndef HAVE_NDO_SET_FEATURES
1170                 /* enable rx checksum */
1171                 set_bit(IGB_RING_FLAG_RX_CSUM, &ring->flags);
1172
1173 #endif
1174                 /* set flag indicating ring supports SCTP checksum offload */
1175                 if (adapter->hw.mac.type >= e1000_82576)
1176                         set_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags);
1177
1178                 if ((adapter->hw.mac.type == e1000_i350) ||
1179                     (adapter->hw.mac.type == e1000_i354))
1180                         set_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &ring->flags);
1181
1182                 /* apply Rx specific ring traits */
1183                 ring->count = adapter->rx_ring_count;
1184                 ring->queue_index = rxr_idx;
1185
1186                 /* assign ring to adapter */
1187                 adapter->rx_ring[rxr_idx] = ring;
1188         }
1189
1190         return 0;
1191 }
1192
1193 /**
1194  * igb_alloc_q_vectors - Allocate memory for interrupt vectors
1195  * @adapter: board private structure to initialize
1196  *
1197  * We allocate one q_vector per queue interrupt.  If allocation fails we
1198  * return -ENOMEM.
1199  **/
1200 static int igb_alloc_q_vectors(struct igb_adapter *adapter)
1201 {
1202         int q_vectors = adapter->num_q_vectors;
1203         int rxr_remaining = adapter->num_rx_queues;
1204         int txr_remaining = adapter->num_tx_queues;
1205         int rxr_idx = 0, txr_idx = 0, v_idx = 0;
1206         int err;
1207
1208         if (q_vectors >= (rxr_remaining + txr_remaining)) {
1209                 for (; rxr_remaining; v_idx++) {
1210                         err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1211                                                  0, 0, 1, rxr_idx);
1212
1213                         if (err)
1214                                 goto err_out;
1215
1216                         /* update counts and index */
1217                         rxr_remaining--;
1218                         rxr_idx++;
1219                 }
1220         }
1221
1222         for (; v_idx < q_vectors; v_idx++) {
1223                 int rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - v_idx);
1224                 int tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - v_idx);
1225                 err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1226                                          tqpv, txr_idx, rqpv, rxr_idx);
1227
1228                 if (err)
1229                         goto err_out;
1230
1231                 /* update counts and index */
1232                 rxr_remaining -= rqpv;
1233                 txr_remaining -= tqpv;
1234                 rxr_idx++;
1235                 txr_idx++;
1236         }
1237
1238         return 0;
1239
1240 err_out:
1241         adapter->num_tx_queues = 0;
1242         adapter->num_rx_queues = 0;
1243         adapter->num_q_vectors = 0;
1244
1245         while (v_idx--)
1246                 igb_free_q_vector(adapter, v_idx);
1247
1248         return -ENOMEM;
1249 }
1250
1251 /**
1252  * igb_init_interrupt_scheme - initialize interrupts, allocate queues/vectors
1253  *
1254  * This function initializes the interrupts and allocates all of the queues.
1255  **/
1256 static int igb_init_interrupt_scheme(struct igb_adapter *adapter, bool msix)
1257 {
1258         struct pci_dev *pdev = adapter->pdev;
1259         int err;
1260
1261         igb_set_interrupt_capability(adapter, msix);
1262
1263         err = igb_alloc_q_vectors(adapter);
1264         if (err) {
1265                 dev_err(pci_dev_to_dev(pdev), "Unable to allocate memory for vectors\n");
1266                 goto err_alloc_q_vectors;
1267         }
1268
1269         igb_cache_ring_register(adapter);
1270
1271         return 0;
1272
1273 err_alloc_q_vectors:
1274         igb_reset_interrupt_capability(adapter);
1275         return err;
1276 }
1277
1278 /**
1279  * igb_request_irq - initialize interrupts
1280  *
1281  * Attempts to configure interrupts using the best available
1282  * capabilities of the hardware and kernel.
1283  **/
1284 static int igb_request_irq(struct igb_adapter *adapter)
1285 {
1286         struct net_device *netdev = adapter->netdev;
1287         struct pci_dev *pdev = adapter->pdev;
1288         int err = 0;
1289
1290         if (adapter->msix_entries) {
1291                 err = igb_request_msix(adapter);
1292                 if (!err)
1293                         goto request_done;
1294                 /* fall back to MSI */
1295                 igb_free_all_tx_resources(adapter);
1296                 igb_free_all_rx_resources(adapter);
1297
1298                 igb_clear_interrupt_scheme(adapter);
1299                 igb_reset_sriov_capability(adapter);
1300                 err = igb_init_interrupt_scheme(adapter, false);
1301                 if (err)
1302                         goto request_done;
1303                 igb_setup_all_tx_resources(adapter);
1304                 igb_setup_all_rx_resources(adapter);
1305                 igb_configure(adapter);
1306         }
1307
1308         igb_assign_vector(adapter->q_vector[0], 0);
1309
1310         if (adapter->flags & IGB_FLAG_HAS_MSI) {
1311                 err = request_irq(pdev->irq, &igb_intr_msi, 0,
1312                                   netdev->name, adapter);
1313                 if (!err)
1314                         goto request_done;
1315
1316                 /* fall back to legacy interrupts */
1317                 igb_reset_interrupt_capability(adapter);
1318                 adapter->flags &= ~IGB_FLAG_HAS_MSI;
1319         }
1320
1321         err = request_irq(pdev->irq, &igb_intr, IRQF_SHARED,
1322                           netdev->name, adapter);
1323
1324         if (err)
1325                 dev_err(pci_dev_to_dev(pdev), "Error %d getting interrupt\n",
1326                         err);
1327
1328 request_done:
1329         return err;
1330 }
1331
1332 static void igb_free_irq(struct igb_adapter *adapter)
1333 {
1334         if (adapter->msix_entries) {
1335                 int vector = 0, i;
1336
1337                 free_irq(adapter->msix_entries[vector++].vector, adapter);
1338
1339                 for (i = 0; i < adapter->num_q_vectors; i++)
1340                         free_irq(adapter->msix_entries[vector++].vector,
1341                                  adapter->q_vector[i]);
1342         } else {
1343                 free_irq(adapter->pdev->irq, adapter);
1344         }
1345 }
1346
1347 /**
1348  * igb_irq_disable - Mask off interrupt generation on the NIC
1349  * @adapter: board private structure
1350  **/
1351 static void igb_irq_disable(struct igb_adapter *adapter)
1352 {
1353         struct e1000_hw *hw = &adapter->hw;
1354
1355         /*
1356          * we need to be careful when disabling interrupts.  The VFs are also
1357          * mapped into these registers and so clearing the bits can cause
1358          * issues on the VF drivers so we only need to clear what we set
1359          */
1360         if (adapter->msix_entries) {
1361                 u32 regval = E1000_READ_REG(hw, E1000_EIAM);
1362                 E1000_WRITE_REG(hw, E1000_EIAM, regval & ~adapter->eims_enable_mask);
1363                 E1000_WRITE_REG(hw, E1000_EIMC, adapter->eims_enable_mask);
1364                 regval = E1000_READ_REG(hw, E1000_EIAC);
1365                 E1000_WRITE_REG(hw, E1000_EIAC, regval & ~adapter->eims_enable_mask);
1366         }
1367
1368         E1000_WRITE_REG(hw, E1000_IAM, 0);
1369         E1000_WRITE_REG(hw, E1000_IMC, ~0);
1370         E1000_WRITE_FLUSH(hw);
1371
1372         if (adapter->msix_entries) {
1373                 int vector = 0, i;
1374
1375                 synchronize_irq(adapter->msix_entries[vector++].vector);
1376
1377                 for (i = 0; i < adapter->num_q_vectors; i++)
1378                         synchronize_irq(adapter->msix_entries[vector++].vector);
1379         } else {
1380                 synchronize_irq(adapter->pdev->irq);
1381         }
1382 }
1383
1384 /**
1385  * igb_irq_enable - Enable default interrupt generation settings
1386  * @adapter: board private structure
1387  **/
1388 static void igb_irq_enable(struct igb_adapter *adapter)
1389 {
1390         struct e1000_hw *hw = &adapter->hw;
1391
1392         if (adapter->msix_entries) {
1393                 u32 ims = E1000_IMS_LSC | E1000_IMS_DOUTSYNC | E1000_IMS_DRSTA;
1394                 u32 regval = E1000_READ_REG(hw, E1000_EIAC);
1395                 E1000_WRITE_REG(hw, E1000_EIAC, regval | adapter->eims_enable_mask);
1396                 regval = E1000_READ_REG(hw, E1000_EIAM);
1397                 E1000_WRITE_REG(hw, E1000_EIAM, regval | adapter->eims_enable_mask);
1398                 E1000_WRITE_REG(hw, E1000_EIMS, adapter->eims_enable_mask);
1399                 if (adapter->vfs_allocated_count) {
1400                         E1000_WRITE_REG(hw, E1000_MBVFIMR, 0xFF);
1401                         ims |= E1000_IMS_VMMB;
1402                         if (adapter->mdd)
1403                                 if ((adapter->hw.mac.type == e1000_i350) ||
1404                                     (adapter->hw.mac.type == e1000_i354))
1405                                 ims |= E1000_IMS_MDDET;
1406                 }
1407                 E1000_WRITE_REG(hw, E1000_IMS, ims);
1408         } else {
1409                 E1000_WRITE_REG(hw, E1000_IMS, IMS_ENABLE_MASK |
1410                                 E1000_IMS_DRSTA);
1411                 E1000_WRITE_REG(hw, E1000_IAM, IMS_ENABLE_MASK |
1412                                 E1000_IMS_DRSTA);
1413         }
1414 }
1415
1416 static void igb_update_mng_vlan(struct igb_adapter *adapter)
1417 {
1418         struct e1000_hw *hw = &adapter->hw;
1419         u16 vid = adapter->hw.mng_cookie.vlan_id;
1420         u16 old_vid = adapter->mng_vlan_id;
1421
1422         if (hw->mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
1423                 /* add VID to filter table */
1424                 igb_vfta_set(adapter, vid, TRUE);
1425                 adapter->mng_vlan_id = vid;
1426         } else {
1427                 adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
1428         }
1429
1430         if ((old_vid != (u16)IGB_MNG_VLAN_NONE) &&
1431             (vid != old_vid) &&
1432 #ifdef HAVE_VLAN_RX_REGISTER
1433             !vlan_group_get_device(adapter->vlgrp, old_vid)) {
1434 #else
1435             !test_bit(old_vid, adapter->active_vlans)) {
1436 #endif
1437                 /* remove VID from filter table */
1438                 igb_vfta_set(adapter, old_vid, FALSE);
1439         }
1440 }
1441
1442 /**
1443  * igb_release_hw_control - release control of the h/w to f/w
1444  * @adapter: address of board private structure
1445  *
1446  * igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
1447  * For ASF and Pass Through versions of f/w this means that the
1448  * driver is no longer loaded.
1449  *
1450  **/
1451 static void igb_release_hw_control(struct igb_adapter *adapter)
1452 {
1453         struct e1000_hw *hw = &adapter->hw;
1454         u32 ctrl_ext;
1455
1456         /* Let firmware take over control of h/w */
1457         ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
1458         E1000_WRITE_REG(hw, E1000_CTRL_EXT,
1459                         ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
1460 }
1461
1462 /**
1463  * igb_get_hw_control - get control of the h/w from f/w
1464  * @adapter: address of board private structure
1465  *
1466  * igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
1467  * For ASF and Pass Through versions of f/w this means that
1468  * the driver is loaded.
1469  *
1470  **/
1471 static void igb_get_hw_control(struct igb_adapter *adapter)
1472 {
1473         struct e1000_hw *hw = &adapter->hw;
1474         u32 ctrl_ext;
1475
1476         /* Let firmware know the driver has taken over */
1477         ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
1478         E1000_WRITE_REG(hw, E1000_CTRL_EXT,
1479                         ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
1480 }
1481
1482 /**
1483  * igb_configure - configure the hardware for RX and TX
1484  * @adapter: private board structure
1485  **/
1486 static void igb_configure(struct igb_adapter *adapter)
1487 {
1488         struct net_device *netdev = adapter->netdev;
1489         int i;
1490
1491         igb_get_hw_control(adapter);
1492         igb_set_rx_mode(netdev);
1493
1494         igb_restore_vlan(adapter);
1495
1496         igb_setup_tctl(adapter);
1497         igb_setup_mrqc(adapter);
1498         igb_setup_rctl(adapter);
1499
1500         igb_configure_tx(adapter);
1501         igb_configure_rx(adapter);
1502
1503         e1000_rx_fifo_flush_82575(&adapter->hw);
1504 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
1505         if (adapter->num_tx_queues > 1)
1506                 netdev->features |= NETIF_F_MULTI_QUEUE;
1507         else
1508                 netdev->features &= ~NETIF_F_MULTI_QUEUE;
1509 #endif
1510
1511         /* call igb_desc_unused which always leaves
1512          * at least 1 descriptor unused to make sure
1513          * next_to_use != next_to_clean */
1514         for (i = 0; i < adapter->num_rx_queues; i++) {
1515                 struct igb_ring *ring = adapter->rx_ring[i];
1516                 igb_alloc_rx_buffers(ring, igb_desc_unused(ring));
1517         }
1518 }
1519
1520 /**
1521  * igb_power_up_link - Power up the phy/serdes link
1522  * @adapter: address of board private structure
1523  **/
1524 void igb_power_up_link(struct igb_adapter *adapter)
1525 {
1526         e1000_phy_hw_reset(&adapter->hw);
1527
1528         if (adapter->hw.phy.media_type == e1000_media_type_copper)
1529                 e1000_power_up_phy(&adapter->hw);
1530         else
1531                 e1000_power_up_fiber_serdes_link(&adapter->hw);
1532 }
1533
1534 /**
1535  * igb_power_down_link - Power down the phy/serdes link
1536  * @adapter: address of board private structure
1537  */
1538 static void igb_power_down_link(struct igb_adapter *adapter)
1539 {
1540         if (adapter->hw.phy.media_type == e1000_media_type_copper)
1541                 e1000_power_down_phy(&adapter->hw);
1542         else
1543                 e1000_shutdown_fiber_serdes_link(&adapter->hw);
1544 }
1545
1546 /* Detect and switch function for Media Auto Sense */
1547 static void igb_check_swap_media(struct igb_adapter *adapter)
1548 {
1549         struct e1000_hw *hw = &adapter->hw;
1550         u32 ctrl_ext, connsw;
1551         bool swap_now = false;
1552         bool link;
1553
1554         ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
1555         connsw = E1000_READ_REG(hw, E1000_CONNSW);
1556         link = igb_has_link(adapter);
1557
1558         /* need to live swap if current media is copper and we have fiber/serdes
1559          * to go to.
1560          */
1561
1562         if ((hw->phy.media_type == e1000_media_type_copper) &&
1563             (!(connsw & E1000_CONNSW_AUTOSENSE_EN))) {
1564                 swap_now = true;
1565         } else if (!(connsw & E1000_CONNSW_SERDESD)) {
1566                 /* copper signal takes time to appear */
1567                 if (adapter->copper_tries < 2) {
1568                         adapter->copper_tries++;
1569                         connsw |= E1000_CONNSW_AUTOSENSE_CONF;
1570                         E1000_WRITE_REG(hw, E1000_CONNSW, connsw);
1571                         return;
1572                 } else {
1573                         adapter->copper_tries = 0;
1574                         if ((connsw & E1000_CONNSW_PHYSD) &&
1575                             (!(connsw & E1000_CONNSW_PHY_PDN))) {
1576                                 swap_now = true;
1577                                 connsw &= ~E1000_CONNSW_AUTOSENSE_CONF;
1578                                 E1000_WRITE_REG(hw, E1000_CONNSW, connsw);
1579                         }
1580                 }
1581         }
1582
1583         if (swap_now) {
1584                 switch (hw->phy.media_type) {
1585                 case e1000_media_type_copper:
1586                         dev_info(pci_dev_to_dev(adapter->pdev),
1587                                  "%s:MAS: changing media to fiber/serdes\n",
1588                         adapter->netdev->name);
1589                         ctrl_ext |=
1590                                 E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES;
1591                         adapter->flags |= IGB_FLAG_MEDIA_RESET;
1592                         adapter->copper_tries = 0;
1593                         break;
1594                 case e1000_media_type_internal_serdes:
1595                 case e1000_media_type_fiber:
1596                         dev_info(pci_dev_to_dev(adapter->pdev),
1597                                  "%s:MAS: changing media to copper\n",
1598                                  adapter->netdev->name);
1599                         ctrl_ext &=
1600                                 ~E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES;
1601                         adapter->flags |= IGB_FLAG_MEDIA_RESET;
1602                         break;
1603                 default:
1604                         /* shouldn't get here during regular operation */
1605                         dev_err(pci_dev_to_dev(adapter->pdev),
1606                                 "%s:AMS: Invalid media type found, returning\n",
1607                                 adapter->netdev->name);
1608                         break;
1609                 }
1610                 E1000_WRITE_REG(hw, E1000_CTRL_EXT, ctrl_ext);
1611         }
1612 }
1613
1614 #ifdef HAVE_I2C_SUPPORT
1615 /*  igb_get_i2c_data - Reads the I2C SDA data bit
1616  *  @hw: pointer to hardware structure
1617  *  @i2cctl: Current value of I2CCTL register
1618  *
1619  *  Returns the I2C data bit value
1620  */
1621 static int igb_get_i2c_data(void *data)
1622 {
1623         struct igb_adapter *adapter = (struct igb_adapter *)data;
1624         struct e1000_hw *hw = &adapter->hw;
1625         s32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS);
1626
1627         return ((i2cctl & E1000_I2C_DATA_IN) != 0);
1628 }
1629
1630 /* igb_set_i2c_data - Sets the I2C data bit
1631  *  @data: pointer to hardware structure
1632  *  @state: I2C data value (0 or 1) to set
1633  *
1634  *  Sets the I2C data bit
1635  */
1636 static void igb_set_i2c_data(void *data, int state)
1637 {
1638         struct igb_adapter *adapter = (struct igb_adapter *)data;
1639         struct e1000_hw *hw = &adapter->hw;
1640         s32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS);
1641
1642         if (state)
1643                 i2cctl |= E1000_I2C_DATA_OUT;
1644         else
1645                 i2cctl &= ~E1000_I2C_DATA_OUT;
1646
1647         i2cctl &= ~E1000_I2C_DATA_OE_N;
1648         i2cctl |= E1000_I2C_CLK_OE_N;
1649
1650         E1000_WRITE_REG(hw, E1000_I2CPARAMS, i2cctl);
1651         E1000_WRITE_FLUSH(hw);
1652
1653 }
1654
1655 /* igb_set_i2c_clk - Sets the I2C SCL clock
1656  *  @data: pointer to hardware structure
1657  *  @state: state to set clock
1658  *
1659  *  Sets the I2C clock line to state
1660  */
1661 static void igb_set_i2c_clk(void *data, int state)
1662 {
1663         struct igb_adapter *adapter = (struct igb_adapter *)data;
1664         struct e1000_hw *hw = &adapter->hw;
1665         s32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS);
1666
1667         if (state) {
1668                 i2cctl |= E1000_I2C_CLK_OUT;
1669                 i2cctl &= ~E1000_I2C_CLK_OE_N;
1670         } else {
1671                 i2cctl &= ~E1000_I2C_CLK_OUT;
1672                 i2cctl &= ~E1000_I2C_CLK_OE_N;
1673         }
1674         E1000_WRITE_REG(hw, E1000_I2CPARAMS, i2cctl);
1675         E1000_WRITE_FLUSH(hw);
1676 }
1677
1678 /* igb_get_i2c_clk - Gets the I2C SCL clock state
1679  *  @data: pointer to hardware structure
1680  *
1681  *  Gets the I2C clock state
1682  */
1683 static int igb_get_i2c_clk(void *data)
1684 {
1685         struct igb_adapter *adapter = (struct igb_adapter *)data;
1686         struct e1000_hw *hw = &adapter->hw;
1687         s32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS);
1688
1689         return ((i2cctl & E1000_I2C_CLK_IN) != 0);
1690 }
1691
1692 static const struct i2c_algo_bit_data igb_i2c_algo = {
1693         .setsda         = igb_set_i2c_data,
1694         .setscl         = igb_set_i2c_clk,
1695         .getsda         = igb_get_i2c_data,
1696         .getscl         = igb_get_i2c_clk,
1697         .udelay         = 5,
1698         .timeout        = 20,
1699 };
1700
1701 /*  igb_init_i2c - Init I2C interface
1702  *  @adapter: pointer to adapter structure
1703  *
1704  */
1705 static s32 igb_init_i2c(struct igb_adapter *adapter)
1706 {
1707         s32 status = E1000_SUCCESS;
1708
1709         /* I2C interface supported on i350 devices */
1710         if (adapter->hw.mac.type != e1000_i350)
1711                 return E1000_SUCCESS;
1712
1713         /* Initialize the i2c bus which is controlled by the registers.
1714          * This bus will use the i2c_algo_bit structue that implements
1715          * the protocol through toggling of the 4 bits in the register.
1716          */
1717         adapter->i2c_adap.owner = THIS_MODULE;
1718         adapter->i2c_algo = igb_i2c_algo;
1719         adapter->i2c_algo.data = adapter;
1720         adapter->i2c_adap.algo_data = &adapter->i2c_algo;
1721         adapter->i2c_adap.dev.parent = &adapter->pdev->dev;
1722         strlcpy(adapter->i2c_adap.name, "igb BB",
1723                 sizeof(adapter->i2c_adap.name));
1724         status = i2c_bit_add_bus(&adapter->i2c_adap);
1725         return status;
1726 }
1727
1728 #endif /* HAVE_I2C_SUPPORT */
1729 /**
1730  * igb_up - Open the interface and prepare it to handle traffic
1731  * @adapter: board private structure
1732  **/
1733 int igb_up(struct igb_adapter *adapter)
1734 {
1735         struct e1000_hw *hw = &adapter->hw;
1736         int i;
1737
1738         /* hardware has been reset, we need to reload some things */
1739         igb_configure(adapter);
1740
1741         clear_bit(__IGB_DOWN, &adapter->state);
1742
1743         for (i = 0; i < adapter->num_q_vectors; i++)
1744                 napi_enable(&(adapter->q_vector[i]->napi));
1745
1746         if (adapter->msix_entries)
1747                 igb_configure_msix(adapter);
1748         else
1749                 igb_assign_vector(adapter->q_vector[0], 0);
1750
1751         igb_configure_lli(adapter);
1752
1753         /* Clear any pending interrupts. */
1754         E1000_READ_REG(hw, E1000_ICR);
1755         igb_irq_enable(adapter);
1756
1757         /* notify VFs that reset has been completed */
1758         if (adapter->vfs_allocated_count) {
1759                 u32 reg_data = E1000_READ_REG(hw, E1000_CTRL_EXT);
1760                 reg_data |= E1000_CTRL_EXT_PFRSTD;
1761                 E1000_WRITE_REG(hw, E1000_CTRL_EXT, reg_data);
1762         }
1763
1764         netif_tx_start_all_queues(adapter->netdev);
1765
1766         if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
1767                 schedule_work(&adapter->dma_err_task);
1768         /* start the watchdog. */
1769         hw->mac.get_link_status = 1;
1770         schedule_work(&adapter->watchdog_task);
1771
1772         if ((adapter->flags & IGB_FLAG_EEE) &&
1773             (!hw->dev_spec._82575.eee_disable))
1774                 adapter->eee_advert = MDIO_EEE_100TX | MDIO_EEE_1000T;
1775
1776         return 0;
1777 }
1778
1779 void igb_down(struct igb_adapter *adapter)
1780 {
1781         struct net_device *netdev = adapter->netdev;
1782         struct e1000_hw *hw = &adapter->hw;
1783         u32 tctl, rctl;
1784         int i;
1785
1786         /* signal that we're down so the interrupt handler does not
1787          * reschedule our watchdog timer */
1788         set_bit(__IGB_DOWN, &adapter->state);
1789
1790         /* disable receives in the hardware */
1791         rctl = E1000_READ_REG(hw, E1000_RCTL);
1792         E1000_WRITE_REG(hw, E1000_RCTL, rctl & ~E1000_RCTL_EN);
1793         /* flush and sleep below */
1794
1795         netif_tx_stop_all_queues(netdev);
1796
1797         /* disable transmits in the hardware */
1798         tctl = E1000_READ_REG(hw, E1000_TCTL);
1799         tctl &= ~E1000_TCTL_EN;
1800         E1000_WRITE_REG(hw, E1000_TCTL, tctl);
1801         /* flush both disables and wait for them to finish */
1802         E1000_WRITE_FLUSH(hw);
1803         usleep_range(10000, 20000);
1804
1805         for (i = 0; i < adapter->num_q_vectors; i++)
1806                 napi_disable(&(adapter->q_vector[i]->napi));
1807
1808         igb_irq_disable(adapter);
1809
1810         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
1811
1812         del_timer_sync(&adapter->watchdog_timer);
1813         if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
1814                 del_timer_sync(&adapter->dma_err_timer);
1815         del_timer_sync(&adapter->phy_info_timer);
1816
1817         netif_carrier_off(netdev);
1818
1819         /* record the stats before reset*/
1820         igb_update_stats(adapter);
1821
1822         adapter->link_speed = 0;
1823         adapter->link_duplex = 0;
1824
1825 #ifdef HAVE_PCI_ERS
1826         if (!pci_channel_offline(adapter->pdev))
1827                 igb_reset(adapter);
1828 #else
1829         igb_reset(adapter);
1830 #endif
1831         igb_clean_all_tx_rings(adapter);
1832         igb_clean_all_rx_rings(adapter);
1833 #ifdef IGB_DCA
1834         /* since we reset the hardware DCA settings were cleared */
1835         igb_setup_dca(adapter);
1836 #endif
1837 }
1838
1839 void igb_reinit_locked(struct igb_adapter *adapter)
1840 {
1841         WARN_ON(in_interrupt());
1842         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
1843                 usleep_range(1000, 2000);
1844         igb_down(adapter);
1845         igb_up(adapter);
1846         clear_bit(__IGB_RESETTING, &adapter->state);
1847 }
1848
1849 /**
1850  * igb_enable_mas - Media Autosense re-enable after swap
1851  *
1852  * @adapter: adapter struct
1853  **/
1854 static s32  igb_enable_mas(struct igb_adapter *adapter)
1855 {
1856         struct e1000_hw *hw = &adapter->hw;
1857         u32 connsw;
1858         s32 ret_val = E1000_SUCCESS;
1859
1860         connsw = E1000_READ_REG(hw, E1000_CONNSW);
1861         if (hw->phy.media_type == e1000_media_type_copper) {
1862                 /* configure for SerDes media detect */
1863                 if (!(connsw & E1000_CONNSW_SERDESD)) {
1864                         connsw |= E1000_CONNSW_ENRGSRC;
1865                         connsw |= E1000_CONNSW_AUTOSENSE_EN;
1866                         E1000_WRITE_REG(hw, E1000_CONNSW, connsw);
1867                         E1000_WRITE_FLUSH(hw);
1868                 } else if (connsw & E1000_CONNSW_SERDESD) {
1869                         /* already SerDes, no need to enable anything */
1870                         return ret_val;
1871                 } else {
1872                         dev_info(pci_dev_to_dev(adapter->pdev),
1873                         "%s:MAS: Unable to configure feature, disabling..\n",
1874                         adapter->netdev->name);
1875                         adapter->flags &= ~IGB_FLAG_MAS_ENABLE;
1876                 }
1877         }
1878         return ret_val;
1879 }
1880
1881 void igb_reset(struct igb_adapter *adapter)
1882 {
1883         struct pci_dev *pdev = adapter->pdev;
1884         struct e1000_hw *hw = &adapter->hw;
1885         struct e1000_mac_info *mac = &hw->mac;
1886         struct e1000_fc_info *fc = &hw->fc;
1887         u32 pba = 0, tx_space, min_tx_space, min_rx_space, hwm;
1888
1889         /* Repartition Pba for greater than 9k mtu
1890          * To take effect CTRL.RST is required.
1891          */
1892         switch (mac->type) {
1893         case e1000_i350:
1894         case e1000_82580:
1895         case e1000_i354:
1896                 pba = E1000_READ_REG(hw, E1000_RXPBS);
1897                 pba = e1000_rxpbs_adjust_82580(pba);
1898                 break;
1899         case e1000_82576:
1900                 pba = E1000_READ_REG(hw, E1000_RXPBS);
1901                 pba &= E1000_RXPBS_SIZE_MASK_82576;
1902                 break;
1903         case e1000_82575:
1904         case e1000_i210:
1905         case e1000_i211:
1906         default:
1907                 pba = E1000_PBA_34K;
1908                 break;
1909         }
1910
1911         if ((adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) &&
1912             (mac->type < e1000_82576)) {
1913                 /* adjust PBA for jumbo frames */
1914                 E1000_WRITE_REG(hw, E1000_PBA, pba);
1915
1916                 /* To maintain wire speed transmits, the Tx FIFO should be
1917                  * large enough to accommodate two full transmit packets,
1918                  * rounded up to the next 1KB and expressed in KB.  Likewise,
1919                  * the Rx FIFO should be large enough to accommodate at least
1920                  * one full receive packet and is similarly rounded up and
1921                  * expressed in KB. */
1922                 pba = E1000_READ_REG(hw, E1000_PBA);
1923                 /* upper 16 bits has Tx packet buffer allocation size in KB */
1924                 tx_space = pba >> 16;
1925                 /* lower 16 bits has Rx packet buffer allocation size in KB */
1926                 pba &= 0xffff;
1927                 /* the tx fifo also stores 16 bytes of information about the tx
1928                  * but don't include ethernet FCS because hardware appends it */
1929                 min_tx_space = (adapter->max_frame_size +
1930                                 sizeof(union e1000_adv_tx_desc) -
1931                                 ETH_FCS_LEN) * 2;
1932                 min_tx_space = ALIGN(min_tx_space, 1024);
1933                 min_tx_space >>= 10;
1934                 /* software strips receive CRC, so leave room for it */
1935                 min_rx_space = adapter->max_frame_size;
1936                 min_rx_space = ALIGN(min_rx_space, 1024);
1937                 min_rx_space >>= 10;
1938
1939                 /* If current Tx allocation is less than the min Tx FIFO size,
1940                  * and the min Tx FIFO size is less than the current Rx FIFO
1941                  * allocation, take space away from current Rx allocation */
1942                 if (tx_space < min_tx_space &&
1943                     ((min_tx_space - tx_space) < pba)) {
1944                         pba = pba - (min_tx_space - tx_space);
1945
1946                         /* if short on rx space, rx wins and must trump tx
1947                          * adjustment */
1948                         if (pba < min_rx_space)
1949                                 pba = min_rx_space;
1950                 }
1951                 E1000_WRITE_REG(hw, E1000_PBA, pba);
1952         }
1953
1954         /* flow control settings */
1955         /* The high water mark must be low enough to fit one full frame
1956          * (or the size used for early receive) above it in the Rx FIFO.
1957          * Set it to the lower of:
1958          * - 90% of the Rx FIFO size, or
1959          * - the full Rx FIFO size minus one full frame */
1960         hwm = min(((pba << 10) * 9 / 10),
1961                         ((pba << 10) - 2 * adapter->max_frame_size));
1962
1963         fc->high_water = hwm & 0xFFFFFFF0;      /* 16-byte granularity */
1964         fc->low_water = fc->high_water - 16;
1965         fc->pause_time = 0xFFFF;
1966         fc->send_xon = 1;
1967         fc->current_mode = fc->requested_mode;
1968
1969         /* disable receive for all VFs and wait one second */
1970         if (adapter->vfs_allocated_count) {
1971                 int i;
1972                 /*
1973                  * Clear all flags except indication that the PF has set
1974                  * the VF MAC addresses administratively
1975                  */
1976                 for (i = 0 ; i < adapter->vfs_allocated_count; i++)
1977                         adapter->vf_data[i].flags &= IGB_VF_FLAG_PF_SET_MAC;
1978
1979                 /* ping all the active vfs to let them know we are going down */
1980                 igb_ping_all_vfs(adapter);
1981
1982                 /* disable transmits and receives */
1983                 E1000_WRITE_REG(hw, E1000_VFRE, 0);
1984                 E1000_WRITE_REG(hw, E1000_VFTE, 0);
1985         }
1986
1987         /* Allow time for pending master requests to run */
1988         e1000_reset_hw(hw);
1989         E1000_WRITE_REG(hw, E1000_WUC, 0);
1990
1991         if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
1992                 e1000_setup_init_funcs(hw, TRUE);
1993                 igb_check_options(adapter);
1994                 e1000_get_bus_info(hw);
1995                 adapter->flags &= ~IGB_FLAG_MEDIA_RESET;
1996         }
1997         if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
1998                 if (igb_enable_mas(adapter))
1999                         dev_err(pci_dev_to_dev(pdev),
2000                                 "Error enabling Media Auto Sense\n");
2001         }
2002         if (e1000_init_hw(hw))
2003                 dev_err(pci_dev_to_dev(pdev), "Hardware Error\n");
2004
2005         /*
2006          * Flow control settings reset on hardware reset, so guarantee flow
2007          * control is off when forcing speed.
2008          */
2009         if (!hw->mac.autoneg)
2010                 e1000_force_mac_fc(hw);
2011
2012         igb_init_dmac(adapter, pba);
2013         /* Re-initialize the thermal sensor on i350 devices. */
2014         if (mac->type == e1000_i350 && hw->bus.func == 0) {
2015                 /*
2016                  * If present, re-initialize the external thermal sensor
2017                  * interface.
2018                  */
2019                 if (adapter->ets)
2020                         e1000_set_i2c_bb(hw);
2021                 e1000_init_thermal_sensor_thresh(hw);
2022         }
2023
2024         /*Re-establish EEE setting */
2025         if (hw->phy.media_type == e1000_media_type_copper) {
2026                 switch (mac->type) {
2027                 case e1000_i350:
2028                 case e1000_i210:
2029                 case e1000_i211:
2030                         e1000_set_eee_i350(hw);
2031                         break;
2032                 case e1000_i354:
2033                         e1000_set_eee_i354(hw);
2034                         break;
2035                 default:
2036                         break;
2037                 }
2038         }
2039
2040         if (!netif_running(adapter->netdev))
2041                 igb_power_down_link(adapter);
2042
2043         igb_update_mng_vlan(adapter);
2044
2045         /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
2046         E1000_WRITE_REG(hw, E1000_VET, ETHERNET_IEEE_VLAN_TYPE);
2047
2048
2049 #ifdef HAVE_PTP_1588_CLOCK
2050         /* Re-enable PTP, where applicable. */
2051         igb_ptp_reset(adapter);
2052 #endif /* HAVE_PTP_1588_CLOCK */
2053
2054         e1000_get_phy_info(hw);
2055
2056         adapter->devrc++;
2057 }
2058
2059 #ifdef HAVE_NDO_SET_FEATURES
2060 static kni_netdev_features_t igb_fix_features(struct net_device *netdev,
2061                                               kni_netdev_features_t features)
2062 {
2063         /*
2064          * Since there is no support for separate tx vlan accel
2065          * enabled make sure tx flag is cleared if rx is.
2066          */
2067 #ifdef NETIF_F_HW_VLAN_CTAG_RX
2068         if (!(features & NETIF_F_HW_VLAN_CTAG_RX))
2069                 features &= ~NETIF_F_HW_VLAN_CTAG_TX;
2070 #else
2071         if (!(features & NETIF_F_HW_VLAN_RX))
2072                 features &= ~NETIF_F_HW_VLAN_TX;
2073 #endif
2074
2075         /* If Rx checksum is disabled, then LRO should also be disabled */
2076         if (!(features & NETIF_F_RXCSUM))
2077                 features &= ~NETIF_F_LRO;
2078
2079         return features;
2080 }
2081
2082 static int igb_set_features(struct net_device *netdev,
2083                             kni_netdev_features_t features)
2084 {
2085         u32 changed = netdev->features ^ features;
2086
2087 #ifdef NETIF_F_HW_VLAN_CTAG_RX
2088         if (changed & NETIF_F_HW_VLAN_CTAG_RX)
2089 #else
2090         if (changed & NETIF_F_HW_VLAN_RX)
2091 #endif
2092                 igb_vlan_mode(netdev, features);
2093
2094         return 0;
2095 }
2096
2097 #ifdef NTF_SELF
2098 #ifdef USE_CONST_DEV_UC_CHAR
2099 static int igb_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
2100                            struct net_device *dev,
2101                            const unsigned char *addr,
2102                            u16 flags)
2103 #else
2104 static int igb_ndo_fdb_add(struct ndmsg *ndm,
2105                            struct net_device *dev,
2106                            unsigned char *addr,
2107                            u16 flags)
2108 #endif
2109 {
2110         struct igb_adapter *adapter = netdev_priv(dev);
2111         struct e1000_hw *hw = &adapter->hw;
2112         int err;
2113
2114         if (!(adapter->vfs_allocated_count))
2115                 return -EOPNOTSUPP;
2116
2117         /* Hardware does not support aging addresses so if a
2118          * ndm_state is given only allow permanent addresses
2119          */
2120         if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
2121                 pr_info("%s: FDB only supports static addresses\n",
2122                         igb_driver_name);
2123                 return -EINVAL;
2124         }
2125
2126         if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) {
2127                 u32 rar_uc_entries = hw->mac.rar_entry_count -
2128                                         (adapter->vfs_allocated_count + 1);
2129
2130                 if (netdev_uc_count(dev) < rar_uc_entries)
2131                         err = dev_uc_add_excl(dev, addr);
2132                 else
2133                         err = -ENOMEM;
2134         } else if (is_multicast_ether_addr(addr)) {
2135                 err = dev_mc_add_excl(dev, addr);
2136         } else {
2137                 err = -EINVAL;
2138         }
2139
2140         /* Only return duplicate errors if NLM_F_EXCL is set */
2141         if (err == -EEXIST && !(flags & NLM_F_EXCL))
2142                 err = 0;
2143
2144         return err;
2145 }
2146
2147 #ifndef USE_DEFAULT_FDB_DEL_DUMP
2148 #ifdef USE_CONST_DEV_UC_CHAR
2149 static int igb_ndo_fdb_del(struct ndmsg *ndm,
2150                            struct net_device *dev,
2151                            const unsigned char *addr)
2152 #else
2153 static int igb_ndo_fdb_del(struct ndmsg *ndm,
2154                            struct net_device *dev,
2155                            unsigned char *addr)
2156 #endif
2157 {
2158         struct igb_adapter *adapter = netdev_priv(dev);
2159         int err = -EOPNOTSUPP;
2160
2161         if (ndm->ndm_state & NUD_PERMANENT) {
2162                 pr_info("%s: FDB only supports static addresses\n",
2163                         igb_driver_name);
2164                 return -EINVAL;
2165         }
2166
2167         if (adapter->vfs_allocated_count) {
2168                 if (is_unicast_ether_addr(addr))
2169                         err = dev_uc_del(dev, addr);
2170                 else if (is_multicast_ether_addr(addr))
2171                         err = dev_mc_del(dev, addr);
2172                 else
2173                         err = -EINVAL;
2174         }
2175
2176         return err;
2177 }
2178
2179 static int igb_ndo_fdb_dump(struct sk_buff *skb,
2180                             struct netlink_callback *cb,
2181                             struct net_device *dev,
2182                             int idx)
2183 {
2184         struct igb_adapter *adapter = netdev_priv(dev);
2185
2186         if (adapter->vfs_allocated_count)
2187                 idx = ndo_dflt_fdb_dump(skb, cb, dev, idx);
2188
2189         return idx;
2190 }
2191 #endif /* USE_DEFAULT_FDB_DEL_DUMP */
2192
2193 #ifdef HAVE_BRIDGE_ATTRIBS
2194 static int igb_ndo_bridge_setlink(struct net_device *dev,
2195                                   struct nlmsghdr *nlh)
2196 {
2197         struct igb_adapter *adapter = netdev_priv(dev);
2198         struct e1000_hw *hw = &adapter->hw;
2199         struct nlattr *attr, *br_spec;
2200         int rem;
2201
2202         if (!(adapter->vfs_allocated_count))
2203                 return -EOPNOTSUPP;
2204
2205         switch (adapter->hw.mac.type) {
2206         case e1000_82576:
2207         case e1000_i350:
2208         case e1000_i354:
2209                 break;
2210         default:
2211                 return -EOPNOTSUPP;
2212         }
2213
2214         br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
2215
2216         nla_for_each_nested(attr, br_spec, rem) {
2217                 __u16 mode;
2218
2219                 if (nla_type(attr) != IFLA_BRIDGE_MODE)
2220                         continue;
2221
2222                 mode = nla_get_u16(attr);
2223                 if (mode == BRIDGE_MODE_VEPA) {
2224                         e1000_vmdq_set_loopback_pf(hw, 0);
2225                         adapter->flags &= ~IGB_FLAG_LOOPBACK_ENABLE;
2226                 } else if (mode == BRIDGE_MODE_VEB) {
2227                         e1000_vmdq_set_loopback_pf(hw, 1);
2228                         adapter->flags |= IGB_FLAG_LOOPBACK_ENABLE;
2229                 } else
2230                         return -EINVAL;
2231
2232                 netdev_info(adapter->netdev, "enabling bridge mode: %s\n",
2233                             mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
2234         }
2235
2236         return 0;
2237 }
2238
2239 #ifdef HAVE_BRIDGE_FILTER
2240 static int igb_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
2241                                   struct net_device *dev, u32 filter_mask)
2242 #else
2243 static int igb_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
2244                                   struct net_device *dev)
2245 #endif
2246 {
2247         struct igb_adapter *adapter = netdev_priv(dev);
2248         u16 mode;
2249
2250         if (!(adapter->vfs_allocated_count))
2251                 return -EOPNOTSUPP;
2252
2253         if (adapter->flags & IGB_FLAG_LOOPBACK_ENABLE)
2254                 mode = BRIDGE_MODE_VEB;
2255         else
2256                 mode = BRIDGE_MODE_VEPA;
2257
2258         return ndo_dflt_bridge_getlink(skb, pid, seq, dev, mode);
2259 }
2260 #endif /* HAVE_BRIDGE_ATTRIBS */
2261 #endif /* NTF_SELF */
2262
2263 #endif /* HAVE_NDO_SET_FEATURES */
2264 #ifdef HAVE_NET_DEVICE_OPS
2265 static const struct net_device_ops igb_netdev_ops = {
2266         .ndo_open               = igb_open,
2267         .ndo_stop               = igb_close,
2268         .ndo_start_xmit         = igb_xmit_frame,
2269         .ndo_get_stats          = igb_get_stats,
2270         .ndo_set_rx_mode        = igb_set_rx_mode,
2271         .ndo_set_mac_address    = igb_set_mac,
2272         .ndo_change_mtu         = igb_change_mtu,
2273         .ndo_do_ioctl           = igb_ioctl,
2274         .ndo_tx_timeout         = igb_tx_timeout,
2275         .ndo_validate_addr      = eth_validate_addr,
2276         .ndo_vlan_rx_add_vid    = igb_vlan_rx_add_vid,
2277         .ndo_vlan_rx_kill_vid   = igb_vlan_rx_kill_vid,
2278 #ifdef IFLA_VF_MAX
2279         .ndo_set_vf_mac         = igb_ndo_set_vf_mac,
2280         .ndo_set_vf_vlan        = igb_ndo_set_vf_vlan,
2281         .ndo_set_vf_tx_rate     = igb_ndo_set_vf_bw,
2282         .ndo_get_vf_config      = igb_ndo_get_vf_config,
2283 #ifdef HAVE_VF_SPOOFCHK_CONFIGURE
2284         .ndo_set_vf_spoofchk    = igb_ndo_set_vf_spoofchk,
2285 #endif /* HAVE_VF_SPOOFCHK_CONFIGURE */
2286 #endif /* IFLA_VF_MAX */
2287 #ifdef CONFIG_NET_POLL_CONTROLLER
2288         .ndo_poll_controller    = igb_netpoll,
2289 #endif
2290 #ifdef HAVE_NDO_SET_FEATURES
2291         .ndo_fix_features       = igb_fix_features,
2292         .ndo_set_features       = igb_set_features,
2293 #endif
2294 #ifdef HAVE_VLAN_RX_REGISTER
2295         .ndo_vlan_rx_register   = igb_vlan_mode,
2296 #endif
2297 #ifndef HAVE_RHEL6_NETDEV_OPS_EXT_FDB
2298 #ifdef NTF_SELF
2299         .ndo_fdb_add            = igb_ndo_fdb_add,
2300 #ifndef USE_DEFAULT_FDB_DEL_DUMP
2301         .ndo_fdb_del            = igb_ndo_fdb_del,
2302         .ndo_fdb_dump           = igb_ndo_fdb_dump,
2303 #endif
2304 #endif /* ! HAVE_RHEL6_NETDEV_OPS_EXT_FDB */
2305 #ifdef HAVE_BRIDGE_ATTRIBS
2306         .ndo_bridge_setlink     = igb_ndo_bridge_setlink,
2307         .ndo_bridge_getlink     = igb_ndo_bridge_getlink,
2308 #endif /* HAVE_BRIDGE_ATTRIBS */
2309 #endif
2310 };
2311
2312 #ifdef CONFIG_IGB_VMDQ_NETDEV
2313 static const struct net_device_ops igb_vmdq_ops = {
2314         .ndo_open               = &igb_vmdq_open,
2315         .ndo_stop               = &igb_vmdq_close,
2316         .ndo_start_xmit         = &igb_vmdq_xmit_frame,
2317         .ndo_get_stats          = &igb_vmdq_get_stats,
2318         .ndo_set_rx_mode        = &igb_vmdq_set_rx_mode,
2319         .ndo_validate_addr      = eth_validate_addr,
2320         .ndo_set_mac_address    = &igb_vmdq_set_mac,
2321         .ndo_change_mtu         = &igb_vmdq_change_mtu,
2322         .ndo_tx_timeout         = &igb_vmdq_tx_timeout,
2323         .ndo_vlan_rx_register   = &igb_vmdq_vlan_rx_register,
2324         .ndo_vlan_rx_add_vid    = &igb_vmdq_vlan_rx_add_vid,
2325         .ndo_vlan_rx_kill_vid   = &igb_vmdq_vlan_rx_kill_vid,
2326 };
2327
2328 #endif /* CONFIG_IGB_VMDQ_NETDEV */
2329 #endif /* HAVE_NET_DEVICE_OPS */
2330 #ifdef CONFIG_IGB_VMDQ_NETDEV
2331 void igb_assign_vmdq_netdev_ops(struct net_device *vnetdev)
2332 {
2333 #ifdef HAVE_NET_DEVICE_OPS
2334         vnetdev->netdev_ops = &igb_vmdq_ops;
2335 #else
2336         dev->open = &igb_vmdq_open;
2337         dev->stop = &igb_vmdq_close;
2338         dev->hard_start_xmit = &igb_vmdq_xmit_frame;
2339         dev->get_stats = &igb_vmdq_get_stats;
2340 #ifdef HAVE_SET_RX_MODE
2341         dev->set_rx_mode = &igb_vmdq_set_rx_mode;
2342 #endif
2343         dev->set_multicast_list = &igb_vmdq_set_rx_mode;
2344         dev->set_mac_address = &igb_vmdq_set_mac;
2345         dev->change_mtu = &igb_vmdq_change_mtu;
2346 #ifdef HAVE_TX_TIMEOUT
2347         dev->tx_timeout = &igb_vmdq_tx_timeout;
2348 #endif
2349 #if defined(NETIF_F_HW_VLAN_TX) || defined(NETIF_F_HW_VLAN_CTAG_TX)
2350         dev->vlan_rx_register = &igb_vmdq_vlan_rx_register;
2351         dev->vlan_rx_add_vid = &igb_vmdq_vlan_rx_add_vid;
2352         dev->vlan_rx_kill_vid = &igb_vmdq_vlan_rx_kill_vid;
2353 #endif
2354 #endif
2355         igb_vmdq_set_ethtool_ops(vnetdev);
2356         vnetdev->watchdog_timeo = 5 * HZ;
2357
2358 }
2359
2360 int igb_init_vmdq_netdevs(struct igb_adapter *adapter)
2361 {
2362         int pool, err = 0, base_queue;
2363         struct net_device *vnetdev;
2364         struct igb_vmdq_adapter *vmdq_adapter;
2365
2366         for (pool = 1; pool < adapter->vmdq_pools; pool++) {
2367                 int qpp = (!adapter->rss_queues ? 1 : adapter->rss_queues);
2368                 base_queue = pool * qpp;
2369                 vnetdev = alloc_etherdev(sizeof(struct igb_vmdq_adapter));
2370                 if (!vnetdev) {
2371                         err = -ENOMEM;
2372                         break;
2373                 }
2374                 vmdq_adapter = netdev_priv(vnetdev);
2375                 vmdq_adapter->vnetdev = vnetdev;
2376                 vmdq_adapter->real_adapter = adapter;
2377                 vmdq_adapter->rx_ring = adapter->rx_ring[base_queue];
2378                 vmdq_adapter->tx_ring = adapter->tx_ring[base_queue];
2379                 igb_assign_vmdq_netdev_ops(vnetdev);
2380                 snprintf(vnetdev->name, IFNAMSIZ, "%sv%d",
2381                          adapter->netdev->name, pool);
2382                 vnetdev->features = adapter->netdev->features;
2383 #ifdef HAVE_NETDEV_VLAN_FEATURES
2384                 vnetdev->vlan_features = adapter->netdev->vlan_features;
2385 #endif
2386                 adapter->vmdq_netdev[pool-1] = vnetdev;
2387                 err = register_netdev(vnetdev);
2388                 if (err)
2389                         break;
2390         }
2391         return err;
2392 }
2393
2394 int igb_remove_vmdq_netdevs(struct igb_adapter *adapter)
2395 {
2396         int pool, err = 0;
2397
2398         for (pool = 1; pool < adapter->vmdq_pools; pool++) {
2399                 unregister_netdev(adapter->vmdq_netdev[pool-1]);
2400                 free_netdev(adapter->vmdq_netdev[pool-1]);
2401                 adapter->vmdq_netdev[pool-1] = NULL;
2402         }
2403         return err;
2404 }
2405 #endif /* CONFIG_IGB_VMDQ_NETDEV */
2406
2407 /**
2408  * igb_set_fw_version - Configure version string for ethtool
2409  * @adapter: adapter struct
2410  *
2411  **/
2412 static void igb_set_fw_version(struct igb_adapter *adapter)
2413 {
2414         struct e1000_hw *hw = &adapter->hw;
2415         struct e1000_fw_version fw;
2416
2417         e1000_get_fw_version(hw, &fw);
2418
2419         switch (hw->mac.type) {
2420         case e1000_i210:
2421         case e1000_i211:
2422                 if (!(e1000_get_flash_presence_i210(hw))) {
2423                         snprintf(adapter->fw_version,
2424                             sizeof(adapter->fw_version),
2425                             "%2d.%2d-%d",
2426                             fw.invm_major, fw.invm_minor, fw.invm_img_type);
2427                         break;
2428                 }
2429                 /* fall through */
2430         default:
2431                 /* if option rom is valid, display its version too*/
2432                 if (fw.or_valid) {
2433                         snprintf(adapter->fw_version,
2434                             sizeof(adapter->fw_version),
2435                             "%d.%d, 0x%08x, %d.%d.%d",
2436                             fw.eep_major, fw.eep_minor, fw.etrack_id,
2437                             fw.or_major, fw.or_build, fw.or_patch);
2438                 /* no option rom */
2439                 } else {
2440                         if (fw.etrack_id != 0X0000) {
2441                         snprintf(adapter->fw_version,
2442                             sizeof(adapter->fw_version),
2443                             "%d.%d, 0x%08x",
2444                             fw.eep_major, fw.eep_minor, fw.etrack_id);
2445                         } else {
2446                         snprintf(adapter->fw_version,
2447                             sizeof(adapter->fw_version),
2448                             "%d.%d.%d",
2449                             fw.eep_major, fw.eep_minor, fw.eep_build);
2450                         }
2451                 }
2452                 break;
2453         }
2454
2455         return;
2456 }
2457
2458 /**
2459  * igb_init_mas - init Media Autosense feature if enabled in the NVM
2460  *
2461  * @adapter: adapter struct
2462  **/
2463 static void igb_init_mas(struct igb_adapter *adapter)
2464 {
2465         struct e1000_hw *hw = &adapter->hw;
2466         u16 eeprom_data;
2467
2468         e1000_read_nvm(hw, NVM_COMPAT, 1, &eeprom_data);
2469         switch (hw->bus.func) {
2470         case E1000_FUNC_0:
2471                 if (eeprom_data & IGB_MAS_ENABLE_0)
2472                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2473                 break;
2474         case E1000_FUNC_1:
2475                 if (eeprom_data & IGB_MAS_ENABLE_1)
2476                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2477                 break;
2478         case E1000_FUNC_2:
2479                 if (eeprom_data & IGB_MAS_ENABLE_2)
2480                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2481                 break;
2482         case E1000_FUNC_3:
2483                 if (eeprom_data & IGB_MAS_ENABLE_3)
2484                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2485                 break;
2486         default:
2487                 /* Shouldn't get here */
2488                 dev_err(pci_dev_to_dev(adapter->pdev),
2489                         "%s:AMS: Invalid port configuration, returning\n",
2490                         adapter->netdev->name);
2491                 break;
2492         }
2493 }
2494
2495 /**
2496  * igb_probe - Device Initialization Routine
2497  * @pdev: PCI device information struct
2498  * @ent: entry in igb_pci_tbl
2499  *
2500  * Returns 0 on success, negative on failure
2501  *
2502  * igb_probe initializes an adapter identified by a pci_dev structure.
2503  * The OS initialization, configuring of the adapter private structure,
2504  * and a hardware reset occur.
2505  **/
2506 static int __devinit igb_probe(struct pci_dev *pdev,
2507                                const struct pci_device_id *ent)
2508 {
2509         struct net_device *netdev;
2510         struct igb_adapter *adapter;
2511         struct e1000_hw *hw;
2512         u16 eeprom_data = 0;
2513         u8 pba_str[E1000_PBANUM_LENGTH];
2514         s32 ret_val;
2515         static int global_quad_port_a; /* global quad port a indication */
2516         int i, err, pci_using_dac;
2517         static int cards_found;
2518
2519         err = pci_enable_device_mem(pdev);
2520         if (err)
2521                 return err;
2522
2523         pci_using_dac = 0;
2524         err = dma_set_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(64));
2525         if (!err) {
2526                 err = dma_set_coherent_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(64));
2527                 if (!err)
2528                         pci_using_dac = 1;
2529         } else {
2530                 err = dma_set_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(32));
2531                 if (err) {
2532                         err = dma_set_coherent_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(32));
2533                         if (err) {
2534                                 IGB_ERR("No usable DMA configuration, "
2535                                         "aborting\n");
2536                                 goto err_dma;
2537                         }
2538                 }
2539         }
2540
2541 #ifndef HAVE_ASPM_QUIRKS
2542         /* 82575 requires that the pci-e link partner disable the L0s state */
2543         switch (pdev->device) {
2544         case E1000_DEV_ID_82575EB_COPPER:
2545         case E1000_DEV_ID_82575EB_FIBER_SERDES:
2546         case E1000_DEV_ID_82575GB_QUAD_COPPER:
2547                 pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S);
2548         default:
2549                 break;
2550         }
2551
2552 #endif /* HAVE_ASPM_QUIRKS */
2553         err = pci_request_selected_regions(pdev,
2554                                            pci_select_bars(pdev,
2555                                                            IORESOURCE_MEM),
2556                                            igb_driver_name);
2557         if (err)
2558                 goto err_pci_reg;
2559
2560         pci_enable_pcie_error_reporting(pdev);
2561
2562         pci_set_master(pdev);
2563
2564         err = -ENOMEM;
2565 #ifdef HAVE_TX_MQ
2566         netdev = alloc_etherdev_mq(sizeof(struct igb_adapter),
2567                                    IGB_MAX_TX_QUEUES);
2568 #else
2569         netdev = alloc_etherdev(sizeof(struct igb_adapter));
2570 #endif /* HAVE_TX_MQ */
2571         if (!netdev)
2572                 goto err_alloc_etherdev;
2573
2574         SET_MODULE_OWNER(netdev);
2575         SET_NETDEV_DEV(netdev, &pdev->dev);
2576
2577         pci_set_drvdata(pdev, netdev);
2578         adapter = netdev_priv(netdev);
2579         adapter->netdev = netdev;
2580         adapter->pdev = pdev;
2581         hw = &adapter->hw;
2582         hw->back = adapter;
2583         adapter->port_num = hw->bus.func;
2584         adapter->msg_enable = (1 << debug) - 1;
2585
2586 #ifdef HAVE_PCI_ERS
2587         err = pci_save_state(pdev);
2588         if (err)
2589                 goto err_ioremap;
2590 #endif
2591         err = -EIO;
2592         hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
2593                               pci_resource_len(pdev, 0));
2594         if (!hw->hw_addr)
2595                 goto err_ioremap;
2596
2597 #ifdef HAVE_NET_DEVICE_OPS
2598         netdev->netdev_ops = &igb_netdev_ops;
2599 #else /* HAVE_NET_DEVICE_OPS */
2600         netdev->open = &igb_open;
2601         netdev->stop = &igb_close;
2602         netdev->get_stats = &igb_get_stats;
2603 #ifdef HAVE_SET_RX_MODE
2604         netdev->set_rx_mode = &igb_set_rx_mode;
2605 #endif
2606         netdev->set_multicast_list = &igb_set_rx_mode;
2607         netdev->set_mac_address = &igb_set_mac;
2608         netdev->change_mtu = &igb_change_mtu;
2609         netdev->do_ioctl = &igb_ioctl;
2610 #ifdef HAVE_TX_TIMEOUT
2611         netdev->tx_timeout = &igb_tx_timeout;
2612 #endif
2613         netdev->vlan_rx_register = igb_vlan_mode;
2614         netdev->vlan_rx_add_vid = igb_vlan_rx_add_vid;
2615         netdev->vlan_rx_kill_vid = igb_vlan_rx_kill_vid;
2616 #ifdef CONFIG_NET_POLL_CONTROLLER
2617         netdev->poll_controller = igb_netpoll;
2618 #endif
2619         netdev->hard_start_xmit = &igb_xmit_frame;
2620 #endif /* HAVE_NET_DEVICE_OPS */
2621         igb_set_ethtool_ops(netdev);
2622 #ifdef HAVE_TX_TIMEOUT
2623         netdev->watchdog_timeo = 5 * HZ;
2624 #endif
2625
2626         strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
2627
2628         adapter->bd_number = cards_found;
2629
2630         /* setup the private structure */
2631         err = igb_sw_init(adapter);
2632         if (err)
2633                 goto err_sw_init;
2634
2635         e1000_get_bus_info(hw);
2636
2637         hw->phy.autoneg_wait_to_complete = FALSE;
2638         hw->mac.adaptive_ifs = FALSE;
2639
2640         /* Copper options */
2641         if (hw->phy.media_type == e1000_media_type_copper) {
2642                 hw->phy.mdix = AUTO_ALL_MODES;
2643                 hw->phy.disable_polarity_correction = FALSE;
2644                 hw->phy.ms_type = e1000_ms_hw_default;
2645         }
2646
2647         if (e1000_check_reset_block(hw))
2648                 dev_info(pci_dev_to_dev(pdev),
2649                         "PHY reset is blocked due to SOL/IDER session.\n");
2650
2651         /*
2652          * features is initialized to 0 in allocation, it might have bits
2653          * set by igb_sw_init so we should use an or instead of an
2654          * assignment.
2655          */
2656         netdev->features |= NETIF_F_SG |
2657                             NETIF_F_IP_CSUM |
2658 #ifdef NETIF_F_IPV6_CSUM
2659                             NETIF_F_IPV6_CSUM |
2660 #endif
2661 #ifdef NETIF_F_TSO
2662                             NETIF_F_TSO |
2663 #ifdef NETIF_F_TSO6
2664                             NETIF_F_TSO6 |
2665 #endif
2666 #endif /* NETIF_F_TSO */
2667 #ifdef NETIF_F_RXHASH
2668                             NETIF_F_RXHASH |
2669 #endif
2670                             NETIF_F_RXCSUM |
2671 #ifdef NETIF_F_HW_VLAN_CTAG_RX
2672                             NETIF_F_HW_VLAN_CTAG_RX |
2673                             NETIF_F_HW_VLAN_CTAG_TX;
2674 #else
2675                             NETIF_F_HW_VLAN_RX |
2676                             NETIF_F_HW_VLAN_TX;
2677 #endif
2678
2679         if (hw->mac.type >= e1000_82576)
2680                 netdev->features |= NETIF_F_SCTP_CSUM;
2681
2682 #ifdef HAVE_NDO_SET_FEATURES
2683         /* copy netdev features into list of user selectable features */
2684         netdev->hw_features |= netdev->features;
2685 #ifndef IGB_NO_LRO
2686
2687         /* give us the option of enabling LRO later */
2688         netdev->hw_features |= NETIF_F_LRO;
2689 #endif
2690 #else
2691 #ifdef NETIF_F_GRO
2692
2693         /* this is only needed on kernels prior to 2.6.39 */
2694         netdev->features |= NETIF_F_GRO;
2695 #endif
2696 #endif
2697
2698         /* set this bit last since it cannot be part of hw_features */
2699 #ifdef NETIF_F_HW_VLAN_CTAG_FILTER
2700         netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER;
2701 #else
2702         netdev->features |= NETIF_F_HW_VLAN_FILTER;
2703 #endif
2704
2705 #ifdef HAVE_NETDEV_VLAN_FEATURES
2706         netdev->vlan_features |= NETIF_F_TSO |
2707                                  NETIF_F_TSO6 |
2708                                  NETIF_F_IP_CSUM |
2709                                  NETIF_F_IPV6_CSUM |
2710                                  NETIF_F_SG;
2711
2712 #endif
2713         if (pci_using_dac)
2714                 netdev->features |= NETIF_F_HIGHDMA;
2715
2716         adapter->en_mng_pt = e1000_enable_mng_pass_thru(hw);
2717 #ifdef DEBUG
2718         if (adapter->dmac != IGB_DMAC_DISABLE)
2719                 printk("%s: DMA Coalescing is enabled..\n", netdev->name);
2720 #endif
2721
2722         /* before reading the NVM, reset the controller to put the device in a
2723          * known good starting state */
2724         e1000_reset_hw(hw);
2725
2726         /* make sure the NVM is good */
2727         if (e1000_validate_nvm_checksum(hw) < 0) {
2728                 dev_err(pci_dev_to_dev(pdev), "The NVM Checksum Is Not"
2729                         " Valid\n");
2730                 err = -EIO;
2731                 goto err_eeprom;
2732         }
2733
2734         /* copy the MAC address out of the NVM */
2735         if (e1000_read_mac_addr(hw))
2736                 dev_err(pci_dev_to_dev(pdev), "NVM Read Error\n");
2737         memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
2738 #ifdef ETHTOOL_GPERMADDR
2739         memcpy(netdev->perm_addr, hw->mac.addr, netdev->addr_len);
2740
2741         if (!is_valid_ether_addr(netdev->perm_addr)) {
2742 #else
2743         if (!is_valid_ether_addr(netdev->dev_addr)) {
2744 #endif
2745                 dev_err(pci_dev_to_dev(pdev), "Invalid MAC Address\n");
2746                 err = -EIO;
2747                 goto err_eeprom;
2748         }
2749
2750         memcpy(&adapter->mac_table[0].addr, hw->mac.addr, netdev->addr_len);
2751         adapter->mac_table[0].queue = adapter->vfs_allocated_count;
2752         adapter->mac_table[0].state = (IGB_MAC_STATE_DEFAULT | IGB_MAC_STATE_IN_USE);
2753         igb_rar_set(adapter, 0);
2754
2755         /* get firmware version for ethtool -i */
2756         igb_set_fw_version(adapter);
2757
2758         /* Check if Media Autosense is enabled */
2759         if (hw->mac.type == e1000_82580)
2760                 igb_init_mas(adapter);
2761         setup_timer(&adapter->watchdog_timer, &igb_watchdog,
2762                     (unsigned long) adapter);
2763         if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
2764                 setup_timer(&adapter->dma_err_timer, &igb_dma_err_timer,
2765                             (unsigned long) adapter);
2766         setup_timer(&adapter->phy_info_timer, &igb_update_phy_info,
2767                     (unsigned long) adapter);
2768
2769         INIT_WORK(&adapter->reset_task, igb_reset_task);
2770         INIT_WORK(&adapter->watchdog_task, igb_watchdog_task);
2771         if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
2772                 INIT_WORK(&adapter->dma_err_task, igb_dma_err_task);
2773
2774         /* Initialize link properties that are user-changeable */
2775         adapter->fc_autoneg = true;
2776         hw->mac.autoneg = true;
2777         hw->phy.autoneg_advertised = 0x2f;
2778
2779         hw->fc.requested_mode = e1000_fc_default;
2780         hw->fc.current_mode = e1000_fc_default;
2781
2782         e1000_validate_mdi_setting(hw);
2783
2784         /* By default, support wake on port A */
2785         if (hw->bus.func == 0)
2786                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2787
2788         /* Check the NVM for wake support for non-port A ports */
2789         if (hw->mac.type >= e1000_82580)
2790                 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_A +
2791                                  NVM_82580_LAN_FUNC_OFFSET(hw->bus.func), 1,
2792                                  &eeprom_data);
2793         else if (hw->bus.func == 1)
2794                 e1000_read_nvm(hw, NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
2795
2796         if (eeprom_data & IGB_EEPROM_APME)
2797                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2798
2799         /* now that we have the eeprom settings, apply the special cases where
2800          * the eeprom may be wrong or the board simply won't support wake on
2801          * lan on a particular port */
2802         switch (pdev->device) {
2803         case E1000_DEV_ID_82575GB_QUAD_COPPER:
2804                 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2805                 break;
2806         case E1000_DEV_ID_82575EB_FIBER_SERDES:
2807         case E1000_DEV_ID_82576_FIBER:
2808         case E1000_DEV_ID_82576_SERDES:
2809                 /* Wake events only supported on port A for dual fiber
2810                  * regardless of eeprom setting */
2811                 if (E1000_READ_REG(hw, E1000_STATUS) & E1000_STATUS_FUNC_1)
2812                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2813                 break;
2814         case E1000_DEV_ID_82576_QUAD_COPPER:
2815         case E1000_DEV_ID_82576_QUAD_COPPER_ET2:
2816                 /* if quad port adapter, disable WoL on all but port A */
2817                 if (global_quad_port_a != 0)
2818                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2819                 else
2820                         adapter->flags |= IGB_FLAG_QUAD_PORT_A;
2821                 /* Reset for multiple quad port adapters */
2822                 if (++global_quad_port_a == 4)
2823                         global_quad_port_a = 0;
2824                 break;
2825         default:
2826                 /* If the device can't wake, don't set software support */
2827                 if (!device_can_wakeup(&adapter->pdev->dev))
2828                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2829                 break;
2830         }
2831
2832         /* initialize the wol settings based on the eeprom settings */
2833         if (adapter->flags & IGB_FLAG_WOL_SUPPORTED)
2834                 adapter->wol |= E1000_WUFC_MAG;
2835
2836         /* Some vendors want WoL disabled by default, but still supported */
2837         if ((hw->mac.type == e1000_i350) &&
2838             (pdev->subsystem_vendor == PCI_VENDOR_ID_HP)) {
2839                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2840                 adapter->wol = 0;
2841         }
2842
2843         device_set_wakeup_enable(pci_dev_to_dev(adapter->pdev),
2844                                  adapter->flags & IGB_FLAG_WOL_SUPPORTED);
2845
2846         /* reset the hardware with the new settings */
2847         igb_reset(adapter);
2848         adapter->devrc = 0;
2849
2850 #ifdef HAVE_I2C_SUPPORT
2851         /* Init the I2C interface */
2852         err = igb_init_i2c(adapter);
2853         if (err) {
2854                 dev_err(&pdev->dev, "failed to init i2c interface\n");
2855                 goto err_eeprom;
2856         }
2857 #endif /* HAVE_I2C_SUPPORT */
2858
2859         /* let the f/w know that the h/w is now under the control of the
2860          * driver. */
2861         igb_get_hw_control(adapter);
2862
2863         strncpy(netdev->name, "eth%d", IFNAMSIZ);
2864         err = register_netdev(netdev);
2865         if (err)
2866                 goto err_register;
2867
2868 #ifdef CONFIG_IGB_VMDQ_NETDEV
2869         err = igb_init_vmdq_netdevs(adapter);
2870         if (err)
2871                 goto err_register;
2872 #endif
2873         /* carrier off reporting is important to ethtool even BEFORE open */
2874         netif_carrier_off(netdev);
2875
2876 #ifdef IGB_DCA
2877         if (dca_add_requester(&pdev->dev) == E1000_SUCCESS) {
2878                 adapter->flags |= IGB_FLAG_DCA_ENABLED;
2879                 dev_info(pci_dev_to_dev(pdev), "DCA enabled\n");
2880                 igb_setup_dca(adapter);
2881         }
2882
2883 #endif
2884 #ifdef HAVE_PTP_1588_CLOCK
2885         /* do hw tstamp init after resetting */
2886         igb_ptp_init(adapter);
2887 #endif /* HAVE_PTP_1588_CLOCK */
2888
2889         dev_info(pci_dev_to_dev(pdev), "Intel(R) Gigabit Ethernet Network Connection\n");
2890         /* print bus type/speed/width info */
2891         dev_info(pci_dev_to_dev(pdev), "%s: (PCIe:%s:%s) ",
2892                  netdev->name,
2893                  ((hw->bus.speed == e1000_bus_speed_2500) ? "2.5GT/s" :
2894                   (hw->bus.speed == e1000_bus_speed_5000) ? "5.0GT/s" :
2895                   (hw->mac.type == e1000_i354) ? "integrated" :
2896                                                             "unknown"),
2897                  ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
2898                   (hw->bus.width == e1000_bus_width_pcie_x2) ? "Width x2" :
2899                   (hw->bus.width == e1000_bus_width_pcie_x1) ? "Width x1" :
2900                   (hw->mac.type == e1000_i354) ? "integrated" :
2901                    "unknown"));
2902         dev_info(pci_dev_to_dev(pdev), "%s: MAC: ", netdev->name);
2903         for (i = 0; i < 6; i++)
2904                 printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
2905
2906         ret_val = e1000_read_pba_string(hw, pba_str, E1000_PBANUM_LENGTH);
2907         if (ret_val)
2908                 strncpy(pba_str, "Unknown", sizeof(pba_str) - 1);
2909         dev_info(pci_dev_to_dev(pdev), "%s: PBA No: %s\n", netdev->name,
2910                  pba_str);
2911
2912
2913         /* Initialize the thermal sensor on i350 devices. */
2914         if (hw->mac.type == e1000_i350) {
2915                 if (hw->bus.func == 0) {
2916                         u16 ets_word;
2917
2918                         /*
2919                          * Read the NVM to determine if this i350 device
2920                          * supports an external thermal sensor.
2921                          */
2922                         e1000_read_nvm(hw, NVM_ETS_CFG, 1, &ets_word);
2923                         if (ets_word != 0x0000 && ets_word != 0xFFFF)
2924                                 adapter->ets = true;
2925                         else
2926                                 adapter->ets = false;
2927                 }
2928 #ifdef IGB_HWMON
2929
2930                 igb_sysfs_init(adapter);
2931 #else
2932 #ifdef IGB_PROCFS
2933
2934                 igb_procfs_init(adapter);
2935 #endif /* IGB_PROCFS */
2936 #endif /* IGB_HWMON */
2937         } else {
2938                 adapter->ets = false;
2939         }
2940
2941         if (hw->phy.media_type == e1000_media_type_copper) {
2942                 switch (hw->mac.type) {
2943                 case e1000_i350:
2944                 case e1000_i210:
2945                 case e1000_i211:
2946                         /* Enable EEE for internal copper PHY devices */
2947                         err = e1000_set_eee_i350(hw);
2948                         if ((!err) &&
2949                             (adapter->flags & IGB_FLAG_EEE))
2950                                 adapter->eee_advert =
2951                                         MDIO_EEE_100TX | MDIO_EEE_1000T;
2952                         break;
2953                 case e1000_i354:
2954                         if ((E1000_READ_REG(hw, E1000_CTRL_EXT)) &
2955                             (E1000_CTRL_EXT_LINK_MODE_SGMII)) {
2956                                 err = e1000_set_eee_i354(hw);
2957                                 if ((!err) &&
2958                                     (adapter->flags & IGB_FLAG_EEE))
2959                                         adapter->eee_advert =
2960                                            MDIO_EEE_100TX | MDIO_EEE_1000T;
2961                         }
2962                         break;
2963                 default:
2964                         break;
2965                 }
2966         }
2967
2968         /* send driver version info to firmware */
2969         if (hw->mac.type >= e1000_i350)
2970                 igb_init_fw(adapter);
2971
2972 #ifndef IGB_NO_LRO
2973         if (netdev->features & NETIF_F_LRO)
2974                 dev_info(pci_dev_to_dev(pdev), "Internal LRO is enabled \n");
2975         else
2976                 dev_info(pci_dev_to_dev(pdev), "LRO is disabled \n");
2977 #endif
2978         dev_info(pci_dev_to_dev(pdev),
2979                  "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
2980                  adapter->msix_entries ? "MSI-X" :
2981                  (adapter->flags & IGB_FLAG_HAS_MSI) ? "MSI" : "legacy",
2982                  adapter->num_rx_queues, adapter->num_tx_queues);
2983
2984         cards_found++;
2985
2986         pm_runtime_put_noidle(&pdev->dev);
2987         return 0;
2988
2989 err_register:
2990         igb_release_hw_control(adapter);
2991 #ifdef HAVE_I2C_SUPPORT
2992         memset(&adapter->i2c_adap, 0, sizeof(adapter->i2c_adap));
2993 #endif /* HAVE_I2C_SUPPORT */
2994 err_eeprom:
2995         if (!e1000_check_reset_block(hw))
2996                 e1000_phy_hw_reset(hw);
2997
2998         if (hw->flash_address)
2999                 iounmap(hw->flash_address);
3000 err_sw_init:
3001         igb_clear_interrupt_scheme(adapter);
3002         igb_reset_sriov_capability(adapter);
3003         iounmap(hw->hw_addr);
3004 err_ioremap:
3005         free_netdev(netdev);
3006 err_alloc_etherdev:
3007         pci_release_selected_regions(pdev,
3008                                      pci_select_bars(pdev, IORESOURCE_MEM));
3009 err_pci_reg:
3010 err_dma:
3011         pci_disable_device(pdev);
3012         return err;
3013 }
3014 #ifdef HAVE_I2C_SUPPORT
3015 /*
3016  *  igb_remove_i2c - Cleanup  I2C interface
3017  *  @adapter: pointer to adapter structure
3018  *
3019  */
3020 static void igb_remove_i2c(struct igb_adapter *adapter)
3021 {
3022
3023         /* free the adapter bus structure */
3024         i2c_del_adapter(&adapter->i2c_adap);
3025 }
3026 #endif /* HAVE_I2C_SUPPORT */
3027
3028 /**
3029  * igb_remove - Device Removal Routine
3030  * @pdev: PCI device information struct
3031  *
3032  * igb_remove is called by the PCI subsystem to alert the driver
3033  * that it should release a PCI device.  The could be caused by a
3034  * Hot-Plug event, or because the driver is going to be removed from
3035  * memory.
3036  **/
3037 static void __devexit igb_remove(struct pci_dev *pdev)
3038 {
3039         struct net_device *netdev = pci_get_drvdata(pdev);
3040         struct igb_adapter *adapter = netdev_priv(netdev);
3041         struct e1000_hw *hw = &adapter->hw;
3042
3043         pm_runtime_get_noresume(&pdev->dev);
3044 #ifdef HAVE_I2C_SUPPORT
3045         igb_remove_i2c(adapter);
3046 #endif /* HAVE_I2C_SUPPORT */
3047 #ifdef HAVE_PTP_1588_CLOCK
3048         igb_ptp_stop(adapter);
3049 #endif /* HAVE_PTP_1588_CLOCK */
3050
3051         /* flush_scheduled work may reschedule our watchdog task, so
3052          * explicitly disable watchdog tasks from being rescheduled  */
3053         set_bit(__IGB_DOWN, &adapter->state);
3054         del_timer_sync(&adapter->watchdog_timer);
3055         if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
3056                 del_timer_sync(&adapter->dma_err_timer);
3057         del_timer_sync(&adapter->phy_info_timer);
3058
3059         flush_scheduled_work();
3060
3061 #ifdef IGB_DCA
3062         if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
3063                 dev_info(pci_dev_to_dev(pdev), "DCA disabled\n");
3064                 dca_remove_requester(&pdev->dev);
3065                 adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
3066                 E1000_WRITE_REG(hw, E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_DISABLE);
3067         }
3068 #endif
3069
3070         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
3071          * would have already happened in close and is redundant. */
3072         igb_release_hw_control(adapter);
3073
3074         unregister_netdev(netdev);
3075 #ifdef CONFIG_IGB_VMDQ_NETDEV
3076         igb_remove_vmdq_netdevs(adapter);
3077 #endif
3078
3079         igb_clear_interrupt_scheme(adapter);
3080         igb_reset_sriov_capability(adapter);
3081
3082         iounmap(hw->hw_addr);
3083         if (hw->flash_address)
3084                 iounmap(hw->flash_address);
3085         pci_release_selected_regions(pdev,
3086                                      pci_select_bars(pdev, IORESOURCE_MEM));
3087
3088 #ifdef IGB_HWMON
3089         igb_sysfs_exit(adapter);
3090 #else
3091 #ifdef IGB_PROCFS
3092         igb_procfs_exit(adapter);
3093 #endif /* IGB_PROCFS */
3094 #endif /* IGB_HWMON */
3095         kfree(adapter->mac_table);
3096         kfree(adapter->shadow_vfta);
3097         free_netdev(netdev);
3098
3099         pci_disable_pcie_error_reporting(pdev);
3100
3101         pci_disable_device(pdev);
3102 }
3103
3104 /**
3105  * igb_sw_init - Initialize general software structures (struct igb_adapter)
3106  * @adapter: board private structure to initialize
3107  *
3108  * igb_sw_init initializes the Adapter private data structure.
3109  * Fields are initialized based on PCI device information and
3110  * OS network device settings (MTU size).
3111  **/
3112 static int igb_sw_init(struct igb_adapter *adapter)
3113 {
3114         struct e1000_hw *hw = &adapter->hw;
3115         struct net_device *netdev = adapter->netdev;
3116         struct pci_dev *pdev = adapter->pdev;
3117
3118         /* PCI config space info */
3119
3120         hw->vendor_id = pdev->vendor;
3121         hw->device_id = pdev->device;
3122         hw->subsystem_vendor_id = pdev->subsystem_vendor;
3123         hw->subsystem_device_id = pdev->subsystem_device;
3124
3125         pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
3126
3127         pci_read_config_word(pdev, PCI_COMMAND, &hw->bus.pci_cmd_word);
3128
3129         /* set default ring sizes */
3130         adapter->tx_ring_count = IGB_DEFAULT_TXD;
3131         adapter->rx_ring_count = IGB_DEFAULT_RXD;
3132
3133         /* set default work limits */
3134         adapter->tx_work_limit = IGB_DEFAULT_TX_WORK;
3135
3136         adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN +
3137                                               VLAN_HLEN;
3138
3139         /* Initialize the hardware-specific values */
3140         if (e1000_setup_init_funcs(hw, TRUE)) {
3141                 dev_err(pci_dev_to_dev(pdev), "Hardware Initialization Failure\n");
3142                 return -EIO;
3143         }
3144
3145         adapter->mac_table = kzalloc(sizeof(struct igb_mac_addr) *
3146                                      hw->mac.rar_entry_count,
3147                                      GFP_ATOMIC);
3148
3149         /* Setup and initialize a copy of the hw vlan table array */
3150         adapter->shadow_vfta = (u32 *)kzalloc(sizeof(u32) * E1000_VFTA_ENTRIES,
3151                                         GFP_ATOMIC);
3152 #ifdef NO_KNI
3153         /* These calls may decrease the number of queues */
3154         if (hw->mac.type < e1000_i210) {
3155                 igb_set_sriov_capability(adapter);
3156         }
3157
3158         if (igb_init_interrupt_scheme(adapter, true)) {
3159                 dev_err(pci_dev_to_dev(pdev), "Unable to allocate memory for queues\n");
3160                 return -ENOMEM;
3161         }
3162
3163         /* Explicitly disable IRQ since the NIC can be in any state. */
3164         igb_irq_disable(adapter);
3165
3166         set_bit(__IGB_DOWN, &adapter->state);
3167 #endif
3168         return 0;
3169 }
3170
3171 /**
3172  * igb_open - Called when a network interface is made active
3173  * @netdev: network interface device structure
3174  *
3175  * Returns 0 on success, negative value on failure
3176  *
3177  * The open entry point is called when a network interface is made
3178  * active by the system (IFF_UP).  At this point all resources needed
3179  * for transmit and receive operations are allocated, the interrupt
3180  * handler is registered with the OS, the watchdog timer is started,
3181  * and the stack is notified that the interface is ready.
3182  **/
3183 static int __igb_open(struct net_device *netdev, bool resuming)
3184 {
3185         struct igb_adapter *adapter = netdev_priv(netdev);
3186         struct e1000_hw *hw = &adapter->hw;
3187 #ifdef CONFIG_PM_RUNTIME
3188         struct pci_dev *pdev = adapter->pdev;
3189 #endif /* CONFIG_PM_RUNTIME */
3190         int err;
3191         int i;
3192
3193         /* disallow open during test */
3194         if (test_bit(__IGB_TESTING, &adapter->state)) {
3195                 WARN_ON(resuming);
3196                 return -EBUSY;
3197         }
3198
3199 #ifdef CONFIG_PM_RUNTIME
3200         if (!resuming)
3201                 pm_runtime_get_sync(&pdev->dev);
3202 #endif /* CONFIG_PM_RUNTIME */
3203
3204         netif_carrier_off(netdev);
3205
3206         /* allocate transmit descriptors */
3207         err = igb_setup_all_tx_resources(adapter);
3208         if (err)
3209                 goto err_setup_tx;
3210
3211         /* allocate receive descriptors */
3212         err = igb_setup_all_rx_resources(adapter);
3213         if (err)
3214                 goto err_setup_rx;
3215
3216         igb_power_up_link(adapter);
3217
3218         /* before we allocate an interrupt, we must be ready to handle it.
3219          * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
3220          * as soon as we call pci_request_irq, so we have to setup our
3221          * clean_rx handler before we do so.  */
3222         igb_configure(adapter);
3223
3224         err = igb_request_irq(adapter);
3225         if (err)
3226                 goto err_req_irq;
3227
3228         /* Notify the stack of the actual queue counts. */
3229         netif_set_real_num_tx_queues(netdev,
3230                                      adapter->vmdq_pools ? 1 :
3231                                      adapter->num_tx_queues);
3232
3233         err = netif_set_real_num_rx_queues(netdev,
3234                                            adapter->vmdq_pools ? 1 :
3235                                            adapter->num_rx_queues);
3236         if (err)
3237                 goto err_set_queues;
3238
3239         /* From here on the code is the same as igb_up() */
3240         clear_bit(__IGB_DOWN, &adapter->state);
3241
3242         for (i = 0; i < adapter->num_q_vectors; i++)
3243                 napi_enable(&(adapter->q_vector[i]->napi));
3244         igb_configure_lli(adapter);
3245
3246         /* Clear any pending interrupts. */
3247         E1000_READ_REG(hw, E1000_ICR);
3248
3249         igb_irq_enable(adapter);
3250
3251         /* notify VFs that reset has been completed */
3252         if (adapter->vfs_allocated_count) {
3253                 u32 reg_data = E1000_READ_REG(hw, E1000_CTRL_EXT);
3254                 reg_data |= E1000_CTRL_EXT_PFRSTD;
3255                 E1000_WRITE_REG(hw, E1000_CTRL_EXT, reg_data);
3256         }
3257
3258         netif_tx_start_all_queues(netdev);
3259
3260         if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
3261                 schedule_work(&adapter->dma_err_task);
3262
3263         /* start the watchdog. */
3264         hw->mac.get_link_status = 1;
3265         schedule_work(&adapter->watchdog_task);
3266
3267         return E1000_SUCCESS;
3268
3269 err_set_queues:
3270         igb_free_irq(adapter);
3271 err_req_irq:
3272         igb_release_hw_control(adapter);
3273         igb_power_down_link(adapter);
3274         igb_free_all_rx_resources(adapter);
3275 err_setup_rx:
3276         igb_free_all_tx_resources(adapter);
3277 err_setup_tx:
3278         igb_reset(adapter);
3279
3280 #ifdef CONFIG_PM_RUNTIME
3281         if (!resuming)
3282                 pm_runtime_put(&pdev->dev);
3283 #endif /* CONFIG_PM_RUNTIME */
3284
3285         return err;
3286 }
3287
3288 static int igb_open(struct net_device *netdev)
3289 {
3290         return __igb_open(netdev, false);
3291 }
3292
3293 /**
3294  * igb_close - Disables a network interface
3295  * @netdev: network interface device structure
3296  *
3297  * Returns 0, this is not allowed to fail
3298  *
3299  * The close entry point is called when an interface is de-activated
3300  * by the OS.  The hardware is still under the driver's control, but
3301  * needs to be disabled.  A global MAC reset is issued to stop the
3302  * hardware, and all transmit and receive resources are freed.
3303  **/
3304 static int __igb_close(struct net_device *netdev, bool suspending)
3305 {
3306         struct igb_adapter *adapter = netdev_priv(netdev);
3307 #ifdef CONFIG_PM_RUNTIME
3308         struct pci_dev *pdev = adapter->pdev;
3309 #endif /* CONFIG_PM_RUNTIME */
3310
3311         WARN_ON(test_bit(__IGB_RESETTING, &adapter->state));
3312
3313 #ifdef CONFIG_PM_RUNTIME
3314         if (!suspending)
3315                 pm_runtime_get_sync(&pdev->dev);
3316 #endif /* CONFIG_PM_RUNTIME */
3317
3318         igb_down(adapter);
3319
3320         igb_release_hw_control(adapter);
3321
3322         igb_free_irq(adapter);
3323
3324         igb_free_all_tx_resources(adapter);
3325         igb_free_all_rx_resources(adapter);
3326
3327 #ifdef CONFIG_PM_RUNTIME
3328         if (!suspending)
3329                 pm_runtime_put_sync(&pdev->dev);
3330 #endif /* CONFIG_PM_RUNTIME */
3331
3332         return 0;
3333 }
3334
3335 static int igb_close(struct net_device *netdev)
3336 {
3337         return __igb_close(netdev, false);
3338 }
3339
3340 /**
3341  * igb_setup_tx_resources - allocate Tx resources (Descriptors)
3342  * @tx_ring: tx descriptor ring (for a specific queue) to setup
3343  *
3344  * Return 0 on success, negative on failure
3345  **/
3346 int igb_setup_tx_resources(struct igb_ring *tx_ring)
3347 {
3348         struct device *dev = tx_ring->dev;
3349         int size;
3350
3351         size = sizeof(struct igb_tx_buffer) * tx_ring->count;
3352         tx_ring->tx_buffer_info = vzalloc(size);
3353         if (!tx_ring->tx_buffer_info)
3354                 goto err;
3355
3356         /* round up to nearest 4K */
3357         tx_ring->size = tx_ring->count * sizeof(union e1000_adv_tx_desc);
3358         tx_ring->size = ALIGN(tx_ring->size, 4096);
3359
3360         tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
3361                                            &tx_ring->dma, GFP_KERNEL);
3362
3363         if (!tx_ring->desc)
3364                 goto err;
3365
3366         tx_ring->next_to_use = 0;
3367         tx_ring->next_to_clean = 0;
3368
3369         return 0;
3370
3371 err:
3372         vfree(tx_ring->tx_buffer_info);
3373         dev_err(dev,
3374                 "Unable to allocate memory for the transmit descriptor ring\n");
3375         return -ENOMEM;
3376 }
3377
3378 /**
3379  * igb_setup_all_tx_resources - wrapper to allocate Tx resources
3380  *                                (Descriptors) for all queues
3381  * @adapter: board private structure
3382  *
3383  * Return 0 on success, negative on failure
3384  **/
3385 static int igb_setup_all_tx_resources(struct igb_adapter *adapter)
3386 {
3387         struct pci_dev *pdev = adapter->pdev;
3388         int i, err = 0;
3389
3390         for (i = 0; i < adapter->num_tx_queues; i++) {
3391                 err = igb_setup_tx_resources(adapter->tx_ring[i]);
3392                 if (err) {
3393                         dev_err(pci_dev_to_dev(pdev),
3394                                 "Allocation for Tx Queue %u failed\n", i);
3395                         for (i--; i >= 0; i--)
3396                                 igb_free_tx_resources(adapter->tx_ring[i]);
3397                         break;
3398                 }
3399         }
3400
3401         return err;
3402 }
3403
3404 /**
3405  * igb_setup_tctl - configure the transmit control registers
3406  * @adapter: Board private structure
3407  **/
3408 void igb_setup_tctl(struct igb_adapter *adapter)
3409 {
3410         struct e1000_hw *hw = &adapter->hw;
3411         u32 tctl;
3412
3413         /* disable queue 0 which is enabled by default on 82575 and 82576 */
3414         E1000_WRITE_REG(hw, E1000_TXDCTL(0), 0);
3415
3416         /* Program the Transmit Control Register */
3417         tctl = E1000_READ_REG(hw, E1000_TCTL);
3418         tctl &= ~E1000_TCTL_CT;
3419         tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
3420                 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
3421
3422         e1000_config_collision_dist(hw);
3423
3424         /* Enable transmits */
3425         tctl |= E1000_TCTL_EN;
3426
3427         E1000_WRITE_REG(hw, E1000_TCTL, tctl);
3428 }
3429
3430 static u32 igb_tx_wthresh(struct igb_adapter *adapter)
3431 {
3432         struct e1000_hw *hw = &adapter->hw;
3433         switch (hw->mac.type) {
3434         case e1000_i354:
3435                 return 4;
3436         case e1000_82576:
3437                 if (adapter->msix_entries)
3438                         return 1;
3439         default:
3440                 break;
3441         }
3442
3443         return 16;
3444 }
3445
3446 /**
3447  * igb_configure_tx_ring - Configure transmit ring after Reset
3448  * @adapter: board private structure
3449  * @ring: tx ring to configure
3450  *
3451  * Configure a transmit ring after a reset.
3452  **/
3453 void igb_configure_tx_ring(struct igb_adapter *adapter,
3454                            struct igb_ring *ring)
3455 {
3456         struct e1000_hw *hw = &adapter->hw;
3457         u32 txdctl = 0;
3458         u64 tdba = ring->dma;
3459         int reg_idx = ring->reg_idx;
3460
3461         /* disable the queue */
3462         E1000_WRITE_REG(hw, E1000_TXDCTL(reg_idx), 0);
3463         E1000_WRITE_FLUSH(hw);
3464         mdelay(10);
3465
3466         E1000_WRITE_REG(hw, E1000_TDLEN(reg_idx),
3467                         ring->count * sizeof(union e1000_adv_tx_desc));
3468         E1000_WRITE_REG(hw, E1000_TDBAL(reg_idx),
3469                         tdba & 0x00000000ffffffffULL);
3470         E1000_WRITE_REG(hw, E1000_TDBAH(reg_idx), tdba >> 32);
3471
3472         ring->tail = hw->hw_addr + E1000_TDT(reg_idx);
3473         E1000_WRITE_REG(hw, E1000_TDH(reg_idx), 0);
3474         writel(0, ring->tail);
3475
3476         txdctl |= IGB_TX_PTHRESH;
3477         txdctl |= IGB_TX_HTHRESH << 8;
3478         txdctl |= igb_tx_wthresh(adapter) << 16;
3479
3480         txdctl |= E1000_TXDCTL_QUEUE_ENABLE;
3481         E1000_WRITE_REG(hw, E1000_TXDCTL(reg_idx), txdctl);
3482 }
3483
3484 /**
3485  * igb_configure_tx - Configure transmit Unit after Reset
3486  * @adapter: board private structure
3487  *
3488  * Configure the Tx unit of the MAC after a reset.
3489  **/
3490 static void igb_configure_tx(struct igb_adapter *adapter)
3491 {
3492         int i;
3493
3494         for (i = 0; i < adapter->num_tx_queues; i++)
3495                 igb_configure_tx_ring(adapter, adapter->tx_ring[i]);
3496 }
3497
3498 /**
3499  * igb_setup_rx_resources - allocate Rx resources (Descriptors)
3500  * @rx_ring:    rx descriptor ring (for a specific queue) to setup
3501  *
3502  * Returns 0 on success, negative on failure
3503  **/
3504 int igb_setup_rx_resources(struct igb_ring *rx_ring)
3505 {
3506         struct device *dev = rx_ring->dev;
3507         int size, desc_len;
3508
3509         size = sizeof(struct igb_rx_buffer) * rx_ring->count;
3510         rx_ring->rx_buffer_info = vzalloc(size);
3511         if (!rx_ring->rx_buffer_info)
3512                 goto err;
3513
3514         desc_len = sizeof(union e1000_adv_rx_desc);
3515
3516         /* Round up to nearest 4K */
3517         rx_ring->size = rx_ring->count * desc_len;
3518         rx_ring->size = ALIGN(rx_ring->size, 4096);
3519
3520         rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
3521                                            &rx_ring->dma, GFP_KERNEL);
3522
3523         if (!rx_ring->desc)
3524                 goto err;
3525
3526         rx_ring->next_to_alloc = 0;
3527         rx_ring->next_to_clean = 0;
3528         rx_ring->next_to_use = 0;
3529
3530         return 0;
3531
3532 err:
3533         vfree(rx_ring->rx_buffer_info);
3534         rx_ring->rx_buffer_info = NULL;
3535         dev_err(dev, "Unable to allocate memory for the receive descriptor"
3536                 " ring\n");
3537         return -ENOMEM;
3538 }
3539
3540 /**
3541  * igb_setup_all_rx_resources - wrapper to allocate Rx resources
3542  *                                (Descriptors) for all queues
3543  * @adapter: board private structure
3544  *
3545  * Return 0 on success, negative on failure
3546  **/
3547 static int igb_setup_all_rx_resources(struct igb_adapter *adapter)
3548 {
3549         struct pci_dev *pdev = adapter->pdev;
3550         int i, err = 0;
3551
3552         for (i = 0; i < adapter->num_rx_queues; i++) {
3553                 err = igb_setup_rx_resources(adapter->rx_ring[i]);
3554                 if (err) {
3555                         dev_err(pci_dev_to_dev(pdev),
3556                                 "Allocation for Rx Queue %u failed\n", i);
3557                         for (i--; i >= 0; i--)
3558                                 igb_free_rx_resources(adapter->rx_ring[i]);
3559                         break;
3560                 }
3561         }
3562
3563         return err;
3564 }
3565
3566 /**
3567  * igb_setup_mrqc - configure the multiple receive queue control registers
3568  * @adapter: Board private structure
3569  **/
3570 static void igb_setup_mrqc(struct igb_adapter *adapter)
3571 {
3572         struct e1000_hw *hw = &adapter->hw;
3573         u32 mrqc, rxcsum;
3574         u32 j, num_rx_queues, shift = 0, shift2 = 0;
3575         static const u32 rsskey[10] = { 0xDA565A6D, 0xC20E5B25, 0x3D256741,
3576                                         0xB08FA343, 0xCB2BCAD0, 0xB4307BAE,
3577                                         0xA32DCB77, 0x0CF23080, 0x3BB7426A,
3578                                         0xFA01ACBE };
3579
3580         /* Fill out hash function seeds */
3581         for (j = 0; j < 10; j++)
3582                 E1000_WRITE_REG(hw, E1000_RSSRK(j), rsskey[j]);
3583
3584         num_rx_queues = adapter->rss_queues;
3585
3586         /* 82575 and 82576 supports 2 RSS queues for VMDq */
3587         switch (hw->mac.type) {
3588         case e1000_82575:
3589                 if (adapter->vmdq_pools) {
3590                         shift = 2;
3591                         shift2 = 6;
3592                         break;
3593                 }
3594                 shift = 6;
3595                 break;
3596         case e1000_82576:
3597                 /* 82576 supports 2 RSS queues for SR-IOV */
3598                 if (adapter->vfs_allocated_count || adapter->vmdq_pools) {
3599                         shift = 3;
3600                         num_rx_queues = 2;
3601                 }
3602                 break;
3603         default:
3604                 break;
3605         }
3606
3607         /*
3608          * Populate the redirection table 4 entries at a time.  To do this
3609          * we are generating the results for n and n+2 and then interleaving
3610          * those with the results with n+1 and n+3.
3611          */
3612         for (j = 0; j < 32; j++) {
3613                 /* first pass generates n and n+2 */
3614                 u32 base = ((j * 0x00040004) + 0x00020000) * num_rx_queues;
3615                 u32 reta = (base & 0x07800780) >> (7 - shift);
3616
3617                 /* second pass generates n+1 and n+3 */
3618                 base += 0x00010001 * num_rx_queues;
3619                 reta |= (base & 0x07800780) << (1 + shift);
3620
3621                 /* generate 2nd table for 82575 based parts */
3622                 if (shift2)
3623                         reta |= (0x01010101 * num_rx_queues) << shift2;
3624
3625                 E1000_WRITE_REG(hw, E1000_RETA(j), reta);
3626         }
3627
3628         /*
3629          * Disable raw packet checksumming so that RSS hash is placed in
3630          * descriptor on writeback.  No need to enable TCP/UDP/IP checksum
3631          * offloads as they are enabled by default
3632          */
3633         rxcsum = E1000_READ_REG(hw, E1000_RXCSUM);
3634         rxcsum |= E1000_RXCSUM_PCSD;
3635
3636         if (adapter->hw.mac.type >= e1000_82576)
3637                 /* Enable Receive Checksum Offload for SCTP */
3638                 rxcsum |= E1000_RXCSUM_CRCOFL;
3639
3640         /* Don't need to set TUOFL or IPOFL, they default to 1 */
3641         E1000_WRITE_REG(hw, E1000_RXCSUM, rxcsum);
3642
3643         /* Generate RSS hash based on packet types, TCP/UDP
3644          * port numbers and/or IPv4/v6 src and dst addresses
3645          */
3646         mrqc = E1000_MRQC_RSS_FIELD_IPV4 |
3647                E1000_MRQC_RSS_FIELD_IPV4_TCP |
3648                E1000_MRQC_RSS_FIELD_IPV6 |
3649                E1000_MRQC_RSS_FIELD_IPV6_TCP |
3650                E1000_MRQC_RSS_FIELD_IPV6_TCP_EX;
3651
3652         if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV4_UDP)
3653                 mrqc |= E1000_MRQC_RSS_FIELD_IPV4_UDP;
3654         if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV6_UDP)
3655                 mrqc |= E1000_MRQC_RSS_FIELD_IPV6_UDP;
3656
3657         /* If VMDq is enabled then we set the appropriate mode for that, else
3658          * we default to RSS so that an RSS hash is calculated per packet even
3659          * if we are only using one queue */
3660         if (adapter->vfs_allocated_count || adapter->vmdq_pools) {
3661                 if (hw->mac.type > e1000_82575) {
3662                         /* Set the default pool for the PF's first queue */
3663                         u32 vtctl = E1000_READ_REG(hw, E1000_VT_CTL);
3664                         vtctl &= ~(E1000_VT_CTL_DEFAULT_POOL_MASK |
3665                                    E1000_VT_CTL_DISABLE_DEF_POOL);
3666                         vtctl |= adapter->vfs_allocated_count <<
3667                                 E1000_VT_CTL_DEFAULT_POOL_SHIFT;
3668                         E1000_WRITE_REG(hw, E1000_VT_CTL, vtctl);
3669                 } else if (adapter->rss_queues > 1) {
3670                         /* set default queue for pool 1 to queue 2 */
3671                         E1000_WRITE_REG(hw, E1000_VT_CTL,
3672                                         adapter->rss_queues << 7);
3673                 }
3674                 if (adapter->rss_queues > 1)
3675                         mrqc |= E1000_MRQC_ENABLE_VMDQ_RSS_2Q;
3676                 else
3677                         mrqc |= E1000_MRQC_ENABLE_VMDQ;
3678         } else {
3679                 mrqc |= E1000_MRQC_ENABLE_RSS_4Q;
3680         }
3681         igb_vmm_control(adapter);
3682
3683         E1000_WRITE_REG(hw, E1000_MRQC, mrqc);
3684 }
3685
3686 /**
3687  * igb_setup_rctl - configure the receive control registers
3688  * @adapter: Board private structure
3689  **/
3690 void igb_setup_rctl(struct igb_adapter *adapter)
3691 {
3692         struct e1000_hw *hw = &adapter->hw;
3693         u32 rctl;
3694
3695         rctl = E1000_READ_REG(hw, E1000_RCTL);
3696
3697         rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
3698         rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
3699
3700         rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_RDMTS_HALF |
3701                 (hw->mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
3702
3703         /*
3704          * enable stripping of CRC. It's unlikely this will break BMC
3705          * redirection as it did with e1000. Newer features require
3706          * that the HW strips the CRC.
3707          */
3708         rctl |= E1000_RCTL_SECRC;
3709
3710         /* disable store bad packets and clear size bits. */
3711         rctl &= ~(E1000_RCTL_SBP | E1000_RCTL_SZ_256);
3712
3713         /* enable LPE to prevent packets larger than max_frame_size */
3714         rctl |= E1000_RCTL_LPE;
3715
3716         /* disable queue 0 to prevent tail write w/o re-config */
3717         E1000_WRITE_REG(hw, E1000_RXDCTL(0), 0);
3718
3719         /* Attention!!!  For SR-IOV PF driver operations you must enable
3720          * queue drop for all VF and PF queues to prevent head of line blocking
3721          * if an un-trusted VF does not provide descriptors to hardware.
3722          */
3723         if (adapter->vfs_allocated_count) {
3724                 /* set all queue drop enable bits */
3725                 E1000_WRITE_REG(hw, E1000_QDE, ALL_QUEUES);
3726         }
3727
3728         E1000_WRITE_REG(hw, E1000_RCTL, rctl);
3729 }
3730
3731 static inline int igb_set_vf_rlpml(struct igb_adapter *adapter, int size,
3732                                    int vfn)
3733 {
3734         struct e1000_hw *hw = &adapter->hw;
3735         u32 vmolr;
3736
3737         /* if it isn't the PF check to see if VFs are enabled and
3738          * increase the size to support vlan tags */
3739         if (vfn < adapter->vfs_allocated_count &&
3740             adapter->vf_data[vfn].vlans_enabled)
3741                 size += VLAN_HLEN;
3742
3743 #ifdef CONFIG_IGB_VMDQ_NETDEV
3744         if (vfn >= adapter->vfs_allocated_count) {
3745                 int queue = vfn - adapter->vfs_allocated_count;
3746                 struct igb_vmdq_adapter *vadapter;
3747
3748                 vadapter = netdev_priv(adapter->vmdq_netdev[queue-1]);
3749                 if (vadapter->vlgrp)
3750                         size += VLAN_HLEN;
3751         }
3752 #endif
3753         vmolr = E1000_READ_REG(hw, E1000_VMOLR(vfn));
3754         vmolr &= ~E1000_VMOLR_RLPML_MASK;
3755         vmolr |= size | E1000_VMOLR_LPE;
3756         E1000_WRITE_REG(hw, E1000_VMOLR(vfn), vmolr);
3757
3758         return 0;
3759 }
3760
3761 /**
3762  * igb_rlpml_set - set maximum receive packet size
3763  * @adapter: board private structure
3764  *
3765  * Configure maximum receivable packet size.
3766  **/
3767 static void igb_rlpml_set(struct igb_adapter *adapter)
3768 {
3769         u32 max_frame_size = adapter->max_frame_size;
3770         struct e1000_hw *hw = &adapter->hw;
3771         u16 pf_id = adapter->vfs_allocated_count;
3772
3773         if (adapter->vmdq_pools && hw->mac.type != e1000_82575) {
3774                 int i;
3775                 for (i = 0; i < adapter->vmdq_pools; i++)
3776                         igb_set_vf_rlpml(adapter, max_frame_size, pf_id + i);
3777                 /*
3778                  * If we're in VMDQ or SR-IOV mode, then set global RLPML
3779                  * to our max jumbo frame size, in case we need to enable
3780                  * jumbo frames on one of the rings later.
3781                  * This will not pass over-length frames into the default
3782                  * queue because it's gated by the VMOLR.RLPML.
3783                  */
3784                 max_frame_size = MAX_JUMBO_FRAME_SIZE;
3785         }
3786         /* Set VF RLPML for the PF device. */
3787         if (adapter->vfs_allocated_count)
3788                 igb_set_vf_rlpml(adapter, max_frame_size, pf_id);
3789
3790         E1000_WRITE_REG(hw, E1000_RLPML, max_frame_size);
3791 }
3792
3793 static inline void igb_set_vf_vlan_strip(struct igb_adapter *adapter,
3794                                         int vfn, bool enable)
3795 {
3796         struct e1000_hw *hw = &adapter->hw;
3797         u32 val;
3798         void __iomem *reg;
3799
3800         if (hw->mac.type < e1000_82576)
3801                 return;
3802
3803         if (hw->mac.type == e1000_i350)
3804                 reg = hw->hw_addr + E1000_DVMOLR(vfn);
3805         else
3806                 reg = hw->hw_addr + E1000_VMOLR(vfn);
3807
3808         val = readl(reg);
3809         if (enable)
3810                 val |= E1000_VMOLR_STRVLAN;
3811         else
3812                 val &= ~(E1000_VMOLR_STRVLAN);
3813         writel(val, reg);
3814 }
3815 static inline void igb_set_vmolr(struct igb_adapter *adapter,
3816                                  int vfn, bool aupe)
3817 {
3818         struct e1000_hw *hw = &adapter->hw;
3819         u32 vmolr;
3820
3821         /*
3822          * This register exists only on 82576 and newer so if we are older then
3823          * we should exit and do nothing
3824          */
3825         if (hw->mac.type < e1000_82576)
3826                 return;
3827
3828         vmolr = E1000_READ_REG(hw, E1000_VMOLR(vfn));
3829
3830         if (aupe)
3831                 vmolr |= E1000_VMOLR_AUPE;        /* Accept untagged packets */
3832         else
3833                 vmolr &= ~(E1000_VMOLR_AUPE); /* Tagged packets ONLY */
3834
3835         /* clear all bits that might not be set */
3836         vmolr &= ~E1000_VMOLR_RSSE;
3837
3838         if (adapter->rss_queues > 1 && vfn == adapter->vfs_allocated_count)
3839                 vmolr |= E1000_VMOLR_RSSE; /* enable RSS */
3840
3841         vmolr |= E1000_VMOLR_BAM;          /* Accept broadcast */
3842         vmolr |= E1000_VMOLR_LPE;          /* Accept long packets */
3843
3844         E1000_WRITE_REG(hw, E1000_VMOLR(vfn), vmolr);
3845 }
3846
3847 /**
3848  * igb_configure_rx_ring - Configure a receive ring after Reset
3849  * @adapter: board private structure
3850  * @ring: receive ring to be configured
3851  *
3852  * Configure the Rx unit of the MAC after a reset.
3853  **/
3854 void igb_configure_rx_ring(struct igb_adapter *adapter,
3855                            struct igb_ring *ring)
3856 {
3857         struct e1000_hw *hw = &adapter->hw;
3858         u64 rdba = ring->dma;
3859         int reg_idx = ring->reg_idx;
3860         u32 srrctl = 0, rxdctl = 0;
3861
3862 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
3863         /*
3864          * RLPML prevents us from receiving a frame larger than max_frame so
3865          * it is safe to just set the rx_buffer_len to max_frame without the
3866          * risk of an skb over panic.
3867          */
3868         ring->rx_buffer_len = max_t(u32, adapter->max_frame_size,
3869                                     MAXIMUM_ETHERNET_VLAN_SIZE);
3870
3871 #endif
3872         /* disable the queue */
3873         E1000_WRITE_REG(hw, E1000_RXDCTL(reg_idx), 0);
3874
3875         /* Set DMA base address registers */
3876         E1000_WRITE_REG(hw, E1000_RDBAL(reg_idx),
3877                         rdba & 0x00000000ffffffffULL);
3878         E1000_WRITE_REG(hw, E1000_RDBAH(reg_idx), rdba >> 32);
3879         E1000_WRITE_REG(hw, E1000_RDLEN(reg_idx),
3880                        ring->count * sizeof(union e1000_adv_rx_desc));
3881
3882         /* initialize head and tail */
3883         ring->tail = hw->hw_addr + E1000_RDT(reg_idx);
3884         E1000_WRITE_REG(hw, E1000_RDH(reg_idx), 0);
3885         writel(0, ring->tail);
3886
3887         /* reset next-to- use/clean to place SW in sync with hardwdare */
3888         ring->next_to_clean = 0;
3889         ring->next_to_use = 0;
3890 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
3891         ring->next_to_alloc = 0;
3892
3893 #endif
3894         /* set descriptor configuration */
3895 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
3896         srrctl = IGB_RX_HDR_LEN << E1000_SRRCTL_BSIZEHDRSIZE_SHIFT;
3897         srrctl |= IGB_RX_BUFSZ >> E1000_SRRCTL_BSIZEPKT_SHIFT;
3898 #else /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
3899         srrctl = ALIGN(ring->rx_buffer_len, 1024) >>
3900                  E1000_SRRCTL_BSIZEPKT_SHIFT;
3901 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
3902         srrctl |= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF;
3903 #ifdef HAVE_PTP_1588_CLOCK
3904         if (hw->mac.type >= e1000_82580)
3905                 srrctl |= E1000_SRRCTL_TIMESTAMP;
3906 #endif /* HAVE_PTP_1588_CLOCK */
3907         /*
3908          * We should set the drop enable bit if:
3909          *  SR-IOV is enabled
3910          *   or
3911          *  Flow Control is disabled and number of RX queues > 1
3912          *
3913          *  This allows us to avoid head of line blocking for security
3914          *  and performance reasons.
3915          */
3916         if (adapter->vfs_allocated_count ||
3917             (adapter->num_rx_queues > 1 &&
3918              (hw->fc.requested_mode == e1000_fc_none ||
3919               hw->fc.requested_mode == e1000_fc_rx_pause)))
3920                 srrctl |= E1000_SRRCTL_DROP_EN;
3921
3922         E1000_WRITE_REG(hw, E1000_SRRCTL(reg_idx), srrctl);
3923
3924         /* set filtering for VMDQ pools */
3925         igb_set_vmolr(adapter, reg_idx & 0x7, true);
3926
3927         rxdctl |= IGB_RX_PTHRESH;
3928         rxdctl |= IGB_RX_HTHRESH << 8;
3929         rxdctl |= IGB_RX_WTHRESH << 16;
3930
3931         /* enable receive descriptor fetching */
3932         rxdctl |= E1000_RXDCTL_QUEUE_ENABLE;
3933         E1000_WRITE_REG(hw, E1000_RXDCTL(reg_idx), rxdctl);
3934 }
3935
3936 /**
3937  * igb_configure_rx - Configure receive Unit after Reset
3938  * @adapter: board private structure
3939  *
3940  * Configure the Rx unit of the MAC after a reset.
3941  **/
3942 static void igb_configure_rx(struct igb_adapter *adapter)
3943 {
3944         int i;
3945
3946         /* set UTA to appropriate mode */
3947         igb_set_uta(adapter);
3948
3949         igb_full_sync_mac_table(adapter);
3950         /* Setup the HW Rx Head and Tail Descriptor Pointers and
3951          * the Base and Length of the Rx Descriptor Ring */
3952         for (i = 0; i < adapter->num_rx_queues; i++)
3953                 igb_configure_rx_ring(adapter, adapter->rx_ring[i]);
3954 }
3955
3956 /**
3957  * igb_free_tx_resources - Free Tx Resources per Queue
3958  * @tx_ring: Tx descriptor ring for a specific queue
3959  *
3960  * Free all transmit software resources
3961  **/
3962 void igb_free_tx_resources(struct igb_ring *tx_ring)
3963 {
3964         igb_clean_tx_ring(tx_ring);
3965
3966         vfree(tx_ring->tx_buffer_info);
3967         tx_ring->tx_buffer_info = NULL;
3968
3969         /* if not set, then don't free */
3970         if (!tx_ring->desc)
3971                 return;
3972
3973         dma_free_coherent(tx_ring->dev, tx_ring->size,
3974                           tx_ring->desc, tx_ring->dma);
3975
3976         tx_ring->desc = NULL;
3977 }
3978
3979 /**
3980  * igb_free_all_tx_resources - Free Tx Resources for All Queues
3981  * @adapter: board private structure
3982  *
3983  * Free all transmit software resources
3984  **/
3985 static void igb_free_all_tx_resources(struct igb_adapter *adapter)
3986 {
3987         int i;
3988
3989         for (i = 0; i < adapter->num_tx_queues; i++)
3990                 igb_free_tx_resources(adapter->tx_ring[i]);
3991 }
3992
3993 void igb_unmap_and_free_tx_resource(struct igb_ring *ring,
3994                                     struct igb_tx_buffer *tx_buffer)
3995 {
3996         if (tx_buffer->skb) {
3997                 dev_kfree_skb_any(tx_buffer->skb);
3998                 if (dma_unmap_len(tx_buffer, len))
3999                         dma_unmap_single(ring->dev,
4000                                          dma_unmap_addr(tx_buffer, dma),
4001                                          dma_unmap_len(tx_buffer, len),
4002                                          DMA_TO_DEVICE);
4003         } else if (dma_unmap_len(tx_buffer, len)) {
4004                 dma_unmap_page(ring->dev,
4005                                dma_unmap_addr(tx_buffer, dma),
4006                                dma_unmap_len(tx_buffer, len),
4007                                DMA_TO_DEVICE);
4008         }
4009         tx_buffer->next_to_watch = NULL;
4010         tx_buffer->skb = NULL;
4011         dma_unmap_len_set(tx_buffer, len, 0);
4012         /* buffer_info must be completely set up in the transmit path */
4013 }
4014
4015 /**
4016  * igb_clean_tx_ring - Free Tx Buffers
4017  * @tx_ring: ring to be cleaned
4018  **/
4019 static void igb_clean_tx_ring(struct igb_ring *tx_ring)
4020 {
4021         struct igb_tx_buffer *buffer_info;
4022         unsigned long size;
4023         u16 i;
4024
4025         if (!tx_ring->tx_buffer_info)
4026                 return;
4027         /* Free all the Tx ring sk_buffs */
4028
4029         for (i = 0; i < tx_ring->count; i++) {
4030                 buffer_info = &tx_ring->tx_buffer_info[i];
4031                 igb_unmap_and_free_tx_resource(tx_ring, buffer_info);
4032         }
4033
4034         netdev_tx_reset_queue(txring_txq(tx_ring));
4035
4036         size = sizeof(struct igb_tx_buffer) * tx_ring->count;
4037         memset(tx_ring->tx_buffer_info, 0, size);
4038
4039         /* Zero out the descriptor ring */
4040         memset(tx_ring->desc, 0, tx_ring->size);
4041
4042         tx_ring->next_to_use = 0;
4043         tx_ring->next_to_clean = 0;
4044 }
4045
4046 /**
4047  * igb_clean_all_tx_rings - Free Tx Buffers for all queues
4048  * @adapter: board private structure
4049  **/
4050 static void igb_clean_all_tx_rings(struct igb_adapter *adapter)
4051 {
4052         int i;
4053
4054         for (i = 0; i < adapter->num_tx_queues; i++)
4055                 igb_clean_tx_ring(adapter->tx_ring[i]);
4056 }
4057
4058 /**
4059  * igb_free_rx_resources - Free Rx Resources
4060  * @rx_ring: ring to clean the resources from
4061  *
4062  * Free all receive software resources
4063  **/
4064 void igb_free_rx_resources(struct igb_ring *rx_ring)
4065 {
4066         igb_clean_rx_ring(rx_ring);
4067
4068         vfree(rx_ring->rx_buffer_info);
4069         rx_ring->rx_buffer_info = NULL;
4070
4071         /* if not set, then don't free */
4072         if (!rx_ring->desc)
4073                 return;
4074
4075         dma_free_coherent(rx_ring->dev, rx_ring->size,
4076                           rx_ring->desc, rx_ring->dma);
4077
4078         rx_ring->desc = NULL;
4079 }
4080
4081 /**
4082  * igb_free_all_rx_resources - Free Rx Resources for All Queues
4083  * @adapter: board private structure
4084  *
4085  * Free all receive software resources
4086  **/
4087 static void igb_free_all_rx_resources(struct igb_adapter *adapter)
4088 {
4089         int i;
4090
4091         for (i = 0; i < adapter->num_rx_queues; i++)
4092                 igb_free_rx_resources(adapter->rx_ring[i]);
4093 }
4094
4095 /**
4096  * igb_clean_rx_ring - Free Rx Buffers per Queue
4097  * @rx_ring: ring to free buffers from
4098  **/
4099 void igb_clean_rx_ring(struct igb_ring *rx_ring)
4100 {
4101         unsigned long size;
4102         u16 i;
4103
4104         if (!rx_ring->rx_buffer_info)
4105                 return;
4106
4107 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
4108         if (rx_ring->skb)
4109                 dev_kfree_skb(rx_ring->skb);
4110         rx_ring->skb = NULL;
4111
4112 #endif
4113         /* Free all the Rx ring sk_buffs */
4114         for (i = 0; i < rx_ring->count; i++) {
4115                 struct igb_rx_buffer *buffer_info = &rx_ring->rx_buffer_info[i];
4116 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
4117                 if (buffer_info->dma) {
4118                         dma_unmap_single(rx_ring->dev,
4119                                          buffer_info->dma,
4120                                          rx_ring->rx_buffer_len,
4121                                          DMA_FROM_DEVICE);
4122                         buffer_info->dma = 0;
4123                 }
4124
4125                 if (buffer_info->skb) {
4126                         dev_kfree_skb(buffer_info->skb);
4127                         buffer_info->skb = NULL;
4128                 }
4129 #else
4130                 if (!buffer_info->page)
4131                         continue;
4132
4133                 dma_unmap_page(rx_ring->dev,
4134                                buffer_info->dma,
4135                                PAGE_SIZE,
4136                                DMA_FROM_DEVICE);
4137                 __free_page(buffer_info->page);
4138
4139                 buffer_info->page = NULL;
4140 #endif
4141         }
4142
4143         size = sizeof(struct igb_rx_buffer) * rx_ring->count;
4144         memset(rx_ring->rx_buffer_info, 0, size);
4145
4146         /* Zero out the descriptor ring */
4147         memset(rx_ring->desc, 0, rx_ring->size);
4148
4149         rx_ring->next_to_alloc = 0;
4150         rx_ring->next_to_clean = 0;
4151         rx_ring->next_to_use = 0;
4152 }
4153
4154 /**
4155  * igb_clean_all_rx_rings - Free Rx Buffers for all queues
4156  * @adapter: board private structure
4157  **/
4158 static void igb_clean_all_rx_rings(struct igb_adapter *adapter)
4159 {
4160         int i;
4161
4162         for (i = 0; i < adapter->num_rx_queues; i++)
4163                 igb_clean_rx_ring(adapter->rx_ring[i]);
4164 }
4165
4166 /**
4167  * igb_set_mac - Change the Ethernet Address of the NIC
4168  * @netdev: network interface device structure
4169  * @p: pointer to an address structure
4170  *
4171  * Returns 0 on success, negative on failure
4172  **/
4173 static int igb_set_mac(struct net_device *netdev, void *p)
4174 {
4175         struct igb_adapter *adapter = netdev_priv(netdev);
4176         struct e1000_hw *hw = &adapter->hw;
4177         struct sockaddr *addr = p;
4178
4179         if (!is_valid_ether_addr(addr->sa_data))
4180                 return -EADDRNOTAVAIL;
4181
4182         igb_del_mac_filter(adapter, hw->mac.addr,
4183                            adapter->vfs_allocated_count);
4184         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
4185         memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
4186
4187         /* set the correct pool for the new PF MAC address in entry 0 */
4188         return igb_add_mac_filter(adapter, hw->mac.addr,
4189                            adapter->vfs_allocated_count);
4190 }
4191
4192 /**
4193  * igb_write_mc_addr_list - write multicast addresses to MTA
4194  * @netdev: network interface device structure
4195  *
4196  * Writes multicast address list to the MTA hash table.
4197  * Returns: -ENOMEM on failure
4198  *                0 on no addresses written
4199  *                X on writing X addresses to MTA
4200  **/
4201 int igb_write_mc_addr_list(struct net_device *netdev)
4202 {
4203         struct igb_adapter *adapter = netdev_priv(netdev);
4204         struct e1000_hw *hw = &adapter->hw;
4205 #ifdef NETDEV_HW_ADDR_T_MULTICAST
4206         struct netdev_hw_addr *ha;
4207 #else
4208         struct dev_mc_list *ha;
4209 #endif
4210         u8  *mta_list;
4211         int i, count;
4212 #ifdef CONFIG_IGB_VMDQ_NETDEV
4213         int vm;
4214 #endif
4215         count = netdev_mc_count(netdev);
4216 #ifdef CONFIG_IGB_VMDQ_NETDEV
4217         for (vm = 1; vm < adapter->vmdq_pools; vm++) {
4218                 if (!adapter->vmdq_netdev[vm])
4219                         break;
4220                 if (!netif_running(adapter->vmdq_netdev[vm]))
4221                         continue;
4222                 count += netdev_mc_count(adapter->vmdq_netdev[vm]);
4223         }
4224 #endif
4225
4226         if (!count) {
4227                 e1000_update_mc_addr_list(hw, NULL, 0);
4228                 return 0;
4229         }
4230         mta_list = kzalloc(count * 6, GFP_ATOMIC);
4231         if (!mta_list)
4232                 return -ENOMEM;
4233
4234         /* The shared function expects a packed array of only addresses. */
4235         i = 0;
4236         netdev_for_each_mc_addr(ha, netdev)
4237 #ifdef NETDEV_HW_ADDR_T_MULTICAST
4238                 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
4239 #else
4240                 memcpy(mta_list + (i++ * ETH_ALEN), ha->dmi_addr, ETH_ALEN);
4241 #endif
4242 #ifdef CONFIG_IGB_VMDQ_NETDEV
4243         for (vm = 1; vm < adapter->vmdq_pools; vm++) {
4244                 if (!adapter->vmdq_netdev[vm])
4245                         break;
4246                 if (!netif_running(adapter->vmdq_netdev[vm]) ||
4247                     !netdev_mc_count(adapter->vmdq_netdev[vm]))
4248                         continue;
4249                 netdev_for_each_mc_addr(ha, adapter->vmdq_netdev[vm])
4250 #ifdef NETDEV_HW_ADDR_T_MULTICAST
4251                         memcpy(mta_list + (i++ * ETH_ALEN),
4252                                ha->addr, ETH_ALEN);
4253 #else
4254                         memcpy(mta_list + (i++ * ETH_ALEN),
4255                                ha->dmi_addr, ETH_ALEN);
4256 #endif
4257         }
4258 #endif
4259         e1000_update_mc_addr_list(hw, mta_list, i);
4260         kfree(mta_list);
4261
4262         return count;
4263 }
4264
4265 void igb_rar_set(struct igb_adapter *adapter, u32 index)
4266 {
4267         u32 rar_low, rar_high;
4268         struct e1000_hw *hw = &adapter->hw;
4269         u8 *addr = adapter->mac_table[index].addr;
4270         /* HW expects these in little endian so we reverse the byte order
4271          * from network order (big endian) to little endian
4272          */
4273         rar_low = ((u32) addr[0] | ((u32) addr[1] << 8) |
4274                   ((u32) addr[2] << 16) | ((u32) addr[3] << 24));
4275         rar_high = ((u32) addr[4] | ((u32) addr[5] << 8));
4276
4277         /* Indicate to hardware the Address is Valid. */
4278         if (adapter->mac_table[index].state & IGB_MAC_STATE_IN_USE)
4279                 rar_high |= E1000_RAH_AV;
4280
4281         if (hw->mac.type == e1000_82575)
4282                 rar_high |= E1000_RAH_POOL_1 * adapter->mac_table[index].queue;
4283         else
4284                 rar_high |= E1000_RAH_POOL_1 << adapter->mac_table[index].queue;
4285
4286         E1000_WRITE_REG(hw, E1000_RAL(index), rar_low);
4287         E1000_WRITE_FLUSH(hw);
4288         E1000_WRITE_REG(hw, E1000_RAH(index), rar_high);
4289         E1000_WRITE_FLUSH(hw);
4290 }
4291
4292 void igb_full_sync_mac_table(struct igb_adapter *adapter)
4293 {
4294         struct e1000_hw *hw = &adapter->hw;
4295         int i;
4296         for (i = 0; i < hw->mac.rar_entry_count; i++) {
4297                         igb_rar_set(adapter, i);
4298         }
4299 }
4300
4301 void igb_sync_mac_table(struct igb_adapter *adapter)
4302 {
4303         struct e1000_hw *hw = &adapter->hw;
4304         int i;
4305         for (i = 0; i < hw->mac.rar_entry_count; i++) {
4306                 if (adapter->mac_table[i].state & IGB_MAC_STATE_MODIFIED)
4307                         igb_rar_set(adapter, i);
4308                 adapter->mac_table[i].state &= ~(IGB_MAC_STATE_MODIFIED);
4309         }
4310 }
4311
4312 int igb_available_rars(struct igb_adapter *adapter)
4313 {
4314         struct e1000_hw *hw = &adapter->hw;
4315         int i, count = 0;
4316
4317         for (i = 0; i < hw->mac.rar_entry_count; i++) {
4318                 if (adapter->mac_table[i].state == 0)
4319                         count++;
4320         }
4321         return count;
4322 }
4323
4324 #ifdef HAVE_SET_RX_MODE
4325 /**
4326  * igb_write_uc_addr_list - write unicast addresses to RAR table
4327  * @netdev: network interface device structure
4328  *
4329  * Writes unicast address list to the RAR table.
4330  * Returns: -ENOMEM on failure/insufficient address space
4331  *                0 on no addresses written
4332  *                X on writing X addresses to the RAR table
4333  **/
4334 static int igb_write_uc_addr_list(struct net_device *netdev)
4335 {
4336         struct igb_adapter *adapter = netdev_priv(netdev);
4337         unsigned int vfn = adapter->vfs_allocated_count;
4338         int count = 0;
4339
4340         /* return ENOMEM indicating insufficient memory for addresses */
4341         if (netdev_uc_count(netdev) > igb_available_rars(adapter))
4342                 return -ENOMEM;
4343         if (!netdev_uc_empty(netdev)) {
4344 #ifdef NETDEV_HW_ADDR_T_UNICAST
4345                 struct netdev_hw_addr *ha;
4346 #else
4347                 struct dev_mc_list *ha;
4348 #endif
4349                 netdev_for_each_uc_addr(ha, netdev) {
4350 #ifdef NETDEV_HW_ADDR_T_UNICAST
4351                         igb_del_mac_filter(adapter, ha->addr, vfn);
4352                         igb_add_mac_filter(adapter, ha->addr, vfn);
4353 #else
4354                         igb_del_mac_filter(adapter, ha->da_addr, vfn);
4355                         igb_add_mac_filter(adapter, ha->da_addr, vfn);
4356 #endif
4357                         count++;
4358                 }
4359         }
4360         return count;
4361 }
4362
4363 #endif /* HAVE_SET_RX_MODE */
4364 /**
4365  * igb_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
4366  * @netdev: network interface device structure
4367  *
4368  * The set_rx_mode entry point is called whenever the unicast or multicast
4369  * address lists or the network interface flags are updated.  This routine is
4370  * responsible for configuring the hardware for proper unicast, multicast,
4371  * promiscuous mode, and all-multi behavior.
4372  **/
4373 static void igb_set_rx_mode(struct net_device *netdev)
4374 {
4375         struct igb_adapter *adapter = netdev_priv(netdev);
4376         struct e1000_hw *hw = &adapter->hw;
4377         unsigned int vfn = adapter->vfs_allocated_count;
4378         u32 rctl, vmolr = 0;
4379         int count;
4380
4381         /* Check for Promiscuous and All Multicast modes */
4382         rctl = E1000_READ_REG(hw, E1000_RCTL);
4383
4384         /* clear the effected bits */
4385         rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE | E1000_RCTL_VFE);
4386
4387         if (netdev->flags & IFF_PROMISC) {
4388                 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
4389                 vmolr |= (E1000_VMOLR_ROPE | E1000_VMOLR_MPME);
4390                 /* retain VLAN HW filtering if in VT mode */
4391                 if (adapter->vfs_allocated_count || adapter->vmdq_pools)
4392                         rctl |= E1000_RCTL_VFE;
4393         } else {
4394                 if (netdev->flags & IFF_ALLMULTI) {
4395                         rctl |= E1000_RCTL_MPE;
4396                         vmolr |= E1000_VMOLR_MPME;
4397                 } else {
4398                         /*
4399                          * Write addresses to the MTA, if the attempt fails
4400                          * then we should just turn on promiscuous mode so
4401                          * that we can at least receive multicast traffic
4402                          */
4403                         count = igb_write_mc_addr_list(netdev);
4404                         if (count < 0) {
4405                                 rctl |= E1000_RCTL_MPE;
4406                                 vmolr |= E1000_VMOLR_MPME;
4407                         } else if (count) {
4408                                 vmolr |= E1000_VMOLR_ROMPE;
4409                         }
4410                 }
4411 #ifdef HAVE_SET_RX_MODE
4412                 /*
4413                  * Write addresses to available RAR registers, if there is not
4414                  * sufficient space to store all the addresses then enable
4415                  * unicast promiscuous mode
4416                  */
4417                 count = igb_write_uc_addr_list(netdev);
4418                 if (count < 0) {
4419                         rctl |= E1000_RCTL_UPE;
4420                         vmolr |= E1000_VMOLR_ROPE;
4421                 }
4422 #endif /* HAVE_SET_RX_MODE */
4423                 rctl |= E1000_RCTL_VFE;
4424         }
4425         E1000_WRITE_REG(hw, E1000_RCTL, rctl);
4426
4427         /*
4428          * In order to support SR-IOV and eventually VMDq it is necessary to set
4429          * the VMOLR to enable the appropriate modes.  Without this workaround
4430          * we will have issues with VLAN tag stripping not being done for frames
4431          * that are only arriving because we are the default pool
4432          */
4433         if (hw->mac.type < e1000_82576)
4434                 return;
4435
4436         vmolr |= E1000_READ_REG(hw, E1000_VMOLR(vfn)) &
4437                  ~(E1000_VMOLR_ROPE | E1000_VMOLR_MPME | E1000_VMOLR_ROMPE);
4438         E1000_WRITE_REG(hw, E1000_VMOLR(vfn), vmolr);
4439         igb_restore_vf_multicasts(adapter);
4440 }
4441
4442 static void igb_check_wvbr(struct igb_adapter *adapter)
4443 {
4444         struct e1000_hw *hw = &adapter->hw;
4445         u32 wvbr = 0;
4446
4447         switch (hw->mac.type) {
4448         case e1000_82576:
4449         case e1000_i350:
4450                 if (!(wvbr = E1000_READ_REG(hw, E1000_WVBR)))
4451                         return;
4452                 break;
4453         default:
4454                 break;
4455         }
4456
4457         adapter->wvbr |= wvbr;
4458 }
4459
4460 #define IGB_STAGGERED_QUEUE_OFFSET 8
4461
4462 static void igb_spoof_check(struct igb_adapter *adapter)
4463 {
4464         int j;
4465
4466         if (!adapter->wvbr)
4467                 return;
4468
4469         switch (adapter->hw.mac.type) {
4470         case e1000_82576:
4471                 for (j = 0; j < adapter->vfs_allocated_count; j++) {
4472                         if (adapter->wvbr & (1 << j) ||
4473                             adapter->wvbr & (1 << (j + IGB_STAGGERED_QUEUE_OFFSET))) {
4474                                 DPRINTK(DRV, WARNING,
4475                                         "Spoof event(s) detected on VF %d\n", j);
4476                                 adapter->wvbr &=
4477                                         ~((1 << j) |
4478                                           (1 << (j + IGB_STAGGERED_QUEUE_OFFSET)));
4479                         }
4480                 }
4481                 break;
4482         case e1000_i350:
4483                 for (j = 0; j < adapter->vfs_allocated_count; j++) {
4484                         if (adapter->wvbr & (1 << j)) {
4485                                 DPRINTK(DRV, WARNING,
4486                                         "Spoof event(s) detected on VF %d\n", j);
4487                                 adapter->wvbr &= ~(1 << j);
4488                         }
4489                 }
4490                 break;
4491         default:
4492                 break;
4493         }
4494 }
4495
4496 /* Need to wait a few seconds after link up to get diagnostic information from
4497  * the phy */
4498 static void igb_update_phy_info(unsigned long data)
4499 {
4500         struct igb_adapter *adapter = (struct igb_adapter *) data;
4501         e1000_get_phy_info(&adapter->hw);
4502 }
4503
4504 /**
4505  * igb_has_link - check shared code for link and determine up/down
4506  * @adapter: pointer to driver private info
4507  **/
4508 bool igb_has_link(struct igb_adapter *adapter)
4509 {
4510         struct e1000_hw *hw = &adapter->hw;
4511         bool link_active = FALSE;
4512
4513         /* get_link_status is set on LSC (link status) interrupt or
4514          * rx sequence error interrupt.  get_link_status will stay
4515          * false until the e1000_check_for_link establishes link
4516          * for copper adapters ONLY
4517          */
4518         switch (hw->phy.media_type) {
4519         case e1000_media_type_copper:
4520                 if (!hw->mac.get_link_status)
4521                         return true;
4522         case e1000_media_type_internal_serdes:
4523                 e1000_check_for_link(hw);
4524                 link_active = !hw->mac.get_link_status;
4525                 break;
4526         case e1000_media_type_unknown:
4527         default:
4528                 break;
4529         }
4530
4531         if (((hw->mac.type == e1000_i210) ||
4532              (hw->mac.type == e1000_i211)) &&
4533              (hw->phy.id == I210_I_PHY_ID)) {
4534                 if (!netif_carrier_ok(adapter->netdev)) {
4535                         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
4536                 } else if (!(adapter->flags & IGB_FLAG_NEED_LINK_UPDATE)) {
4537                         adapter->flags |= IGB_FLAG_NEED_LINK_UPDATE;
4538                         adapter->link_check_timeout = jiffies;
4539                 }
4540         }
4541
4542         return link_active;
4543 }
4544
4545 /**
4546  * igb_watchdog - Timer Call-back
4547  * @data: pointer to adapter cast into an unsigned long
4548  **/
4549 static void igb_watchdog(unsigned long data)
4550 {
4551         struct igb_adapter *adapter = (struct igb_adapter *)data;
4552         /* Do the rest outside of interrupt context */
4553         schedule_work(&adapter->watchdog_task);
4554 }
4555
4556 static void igb_watchdog_task(struct work_struct *work)
4557 {
4558         struct igb_adapter *adapter = container_of(work,
4559                                                    struct igb_adapter,
4560                                                    watchdog_task);
4561         struct e1000_hw *hw = &adapter->hw;
4562         struct net_device *netdev = adapter->netdev;
4563         u32 link;
4564         int i;
4565         u32 thstat, ctrl_ext;
4566         u32 connsw;
4567
4568         link = igb_has_link(adapter);
4569         /* Force link down if we have fiber to swap to */
4570         if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
4571                 if (hw->phy.media_type == e1000_media_type_copper) {
4572                         connsw = E1000_READ_REG(hw, E1000_CONNSW);
4573                         if (!(connsw & E1000_CONNSW_AUTOSENSE_EN))
4574                                 link = 0;
4575                 }
4576         }
4577
4578         if (adapter->flags & IGB_FLAG_NEED_LINK_UPDATE) {
4579                 if (time_after(jiffies, (adapter->link_check_timeout + HZ)))
4580                         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
4581                 else
4582                         link = FALSE;
4583         }
4584
4585         if (link) {
4586                 /* Perform a reset if the media type changed. */
4587                 if (hw->dev_spec._82575.media_changed) {
4588                         hw->dev_spec._82575.media_changed = false;
4589                         adapter->flags |= IGB_FLAG_MEDIA_RESET;
4590                         igb_reset(adapter);
4591                 }
4592
4593                 /* Cancel scheduled suspend requests. */
4594                 pm_runtime_resume(netdev->dev.parent);
4595
4596                 if (!netif_carrier_ok(netdev)) {
4597                         u32 ctrl;
4598                         e1000_get_speed_and_duplex(hw,
4599                                                    &adapter->link_speed,
4600                                                    &adapter->link_duplex);
4601
4602                         ctrl = E1000_READ_REG(hw, E1000_CTRL);
4603                         /* Links status message must follow this format */
4604                         printk(KERN_INFO "igb: %s NIC Link is Up %d Mbps %s, "
4605                                  "Flow Control: %s\n",
4606                                netdev->name,
4607                                adapter->link_speed,
4608                                adapter->link_duplex == FULL_DUPLEX ?
4609                                  "Full Duplex" : "Half Duplex",
4610                                ((ctrl & E1000_CTRL_TFCE) &&
4611                                 (ctrl & E1000_CTRL_RFCE)) ? "RX/TX":
4612                                ((ctrl & E1000_CTRL_RFCE) ?  "RX" :
4613                                ((ctrl & E1000_CTRL_TFCE) ?  "TX" : "None")));
4614                         /* adjust timeout factor according to speed/duplex */
4615                         adapter->tx_timeout_factor = 1;
4616                         switch (adapter->link_speed) {
4617                         case SPEED_10:
4618                                 adapter->tx_timeout_factor = 14;
4619                                 break;
4620                         case SPEED_100:
4621                                 /* maybe add some timeout factor ? */
4622                                 break;
4623                         default:
4624                                 break;
4625                         }
4626
4627                         netif_carrier_on(netdev);
4628                         netif_tx_wake_all_queues(netdev);
4629
4630                         igb_ping_all_vfs(adapter);
4631 #ifdef IFLA_VF_MAX
4632                         igb_check_vf_rate_limit(adapter);
4633 #endif /* IFLA_VF_MAX */
4634
4635                         /* link state has changed, schedule phy info update */
4636                         if (!test_bit(__IGB_DOWN, &adapter->state))
4637                                 mod_timer(&adapter->phy_info_timer,
4638                                           round_jiffies(jiffies + 2 * HZ));
4639                 }
4640         } else {
4641                 if (netif_carrier_ok(netdev)) {
4642                         adapter->link_speed = 0;
4643                         adapter->link_duplex = 0;
4644                         /* check for thermal sensor event on i350 */
4645                         if (hw->mac.type == e1000_i350) {
4646                                 thstat = E1000_READ_REG(hw, E1000_THSTAT);
4647                                 ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
4648                                 if ((hw->phy.media_type ==
4649                                         e1000_media_type_copper) &&
4650                                         !(ctrl_ext &
4651                                         E1000_CTRL_EXT_LINK_MODE_SGMII)) {
4652                                         if (thstat & E1000_THSTAT_PWR_DOWN) {
4653                                                 printk(KERN_ERR "igb: %s The "
4654                                                 "network adapter was stopped "
4655                                                 "because it overheated.\n",
4656                                                 netdev->name);
4657                                         }
4658                                         if (thstat & E1000_THSTAT_LINK_THROTTLE) {
4659                                                 printk(KERN_INFO
4660                                                         "igb: %s The network "
4661                                                         "adapter supported "
4662                                                         "link speed "
4663                                                         "was downshifted "
4664                                                         "because it "
4665                                                         "overheated.\n",
4666                                                         netdev->name);
4667                                         }
4668                                 }
4669                         }
4670
4671                         /* Links status message must follow this format */
4672                         printk(KERN_INFO "igb: %s NIC Link is Down\n",
4673                                netdev->name);
4674                         netif_carrier_off(netdev);
4675                         netif_tx_stop_all_queues(netdev);
4676
4677                         igb_ping_all_vfs(adapter);
4678
4679                         /* link state has changed, schedule phy info update */
4680                         if (!test_bit(__IGB_DOWN, &adapter->state))
4681                                 mod_timer(&adapter->phy_info_timer,
4682                                           round_jiffies(jiffies + 2 * HZ));
4683                         /* link is down, time to check for alternate media */
4684                         if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
4685                                 igb_check_swap_media(adapter);
4686                                 if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
4687                                         schedule_work(&adapter->reset_task);
4688                                         /* return immediately */
4689                                         return;
4690                                 }
4691                         }
4692                         pm_schedule_suspend(netdev->dev.parent,
4693                                             MSEC_PER_SEC * 5);
4694
4695                 /* also check for alternate media here */
4696                 } else if (!netif_carrier_ok(netdev) &&
4697                            (adapter->flags & IGB_FLAG_MAS_ENABLE)) {
4698                         hw->mac.ops.power_up_serdes(hw);
4699                         igb_check_swap_media(adapter);
4700                         if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
4701                                 schedule_work(&adapter->reset_task);
4702                                 /* return immediately */
4703                                 return;
4704                         }
4705                 }
4706         }
4707
4708         igb_update_stats(adapter);
4709
4710         for (i = 0; i < adapter->num_tx_queues; i++) {
4711                 struct igb_ring *tx_ring = adapter->tx_ring[i];
4712                 if (!netif_carrier_ok(netdev)) {
4713                         /* We've lost link, so the controller stops DMA,
4714                          * but we've got queued Tx work that's never going
4715                          * to get done, so reset controller to flush Tx.
4716                          * (Do the reset outside of interrupt context). */
4717                         if (igb_desc_unused(tx_ring) + 1 < tx_ring->count) {
4718                                 adapter->tx_timeout_count++;
4719                                 schedule_work(&adapter->reset_task);
4720                                 /* return immediately since reset is imminent */
4721                                 return;
4722                         }
4723                 }
4724
4725                 /* Force detection of hung controller every watchdog period */
4726                 set_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
4727         }
4728
4729         /* Cause software interrupt to ensure rx ring is cleaned */
4730         if (adapter->msix_entries) {
4731                 u32 eics = 0;
4732                 for (i = 0; i < adapter->num_q_vectors; i++)
4733                         eics |= adapter->q_vector[i]->eims_value;
4734                 E1000_WRITE_REG(hw, E1000_EICS, eics);
4735         } else {
4736                 E1000_WRITE_REG(hw, E1000_ICS, E1000_ICS_RXDMT0);
4737         }
4738
4739         igb_spoof_check(adapter);
4740
4741         /* Reset the timer */
4742         if (!test_bit(__IGB_DOWN, &adapter->state)) {
4743                 if (adapter->flags & IGB_FLAG_NEED_LINK_UPDATE)
4744                         mod_timer(&adapter->watchdog_timer,
4745                                   round_jiffies(jiffies +  HZ));
4746                 else
4747                         mod_timer(&adapter->watchdog_timer,
4748                                   round_jiffies(jiffies + 2 * HZ));
4749         }
4750 }
4751
4752 static void igb_dma_err_task(struct work_struct *work)
4753 {
4754         struct igb_adapter *adapter = container_of(work,
4755                                                    struct igb_adapter,
4756                                                    dma_err_task);
4757         int vf;
4758         struct e1000_hw *hw = &adapter->hw;
4759         struct net_device *netdev = adapter->netdev;
4760         u32 hgptc;
4761         u32 ciaa, ciad;
4762
4763         hgptc = E1000_READ_REG(hw, E1000_HGPTC);
4764         if (hgptc) /* If incrementing then no need for the check below */
4765                 goto dma_timer_reset;
4766         /*
4767          * Check to see if a bad DMA write target from an errant or
4768          * malicious VF has caused a PCIe error.  If so then we can
4769          * issue a VFLR to the offending VF(s) and then resume without
4770          * requesting a full slot reset.
4771          */
4772
4773         for (vf = 0; vf < adapter->vfs_allocated_count; vf++) {
4774                 ciaa = (vf << 16) | 0x80000000;
4775                 /* 32 bit read so align, we really want status at offset 6 */
4776                 ciaa |= PCI_COMMAND;
4777                 E1000_WRITE_REG(hw, E1000_CIAA, ciaa);
4778                 ciad = E1000_READ_REG(hw, E1000_CIAD);
4779                 ciaa &= 0x7FFFFFFF;
4780                 /* disable debug mode asap after reading data */
4781                 E1000_WRITE_REG(hw, E1000_CIAA, ciaa);
4782                 /* Get the upper 16 bits which will be the PCI status reg */
4783                 ciad >>= 16;
4784                 if (ciad & (PCI_STATUS_REC_MASTER_ABORT |
4785                             PCI_STATUS_REC_TARGET_ABORT |
4786                             PCI_STATUS_SIG_SYSTEM_ERROR)) {
4787                         netdev_err(netdev, "VF %d suffered error\n", vf);
4788                         /* Issue VFLR */
4789                         ciaa = (vf << 16) | 0x80000000;
4790                         ciaa |= 0xA8;
4791                         E1000_WRITE_REG(hw, E1000_CIAA, ciaa);
4792                         ciad = 0x00008000;  /* VFLR */
4793                         E1000_WRITE_REG(hw, E1000_CIAD, ciad);
4794                         ciaa &= 0x7FFFFFFF;
4795                         E1000_WRITE_REG(hw, E1000_CIAA, ciaa);
4796                 }
4797         }
4798 dma_timer_reset:
4799         /* Reset the timer */
4800         if (!test_bit(__IGB_DOWN, &adapter->state))
4801                 mod_timer(&adapter->dma_err_timer,
4802                           round_jiffies(jiffies + HZ / 10));
4803 }
4804
4805 /**
4806  * igb_dma_err_timer - Timer Call-back
4807  * @data: pointer to adapter cast into an unsigned long
4808  **/
4809 static void igb_dma_err_timer(unsigned long data)
4810 {
4811         struct igb_adapter *adapter = (struct igb_adapter *)data;
4812         /* Do the rest outside of interrupt context */
4813         schedule_work(&adapter->dma_err_task);
4814 }
4815
4816 enum latency_range {
4817         lowest_latency = 0,
4818         low_latency = 1,
4819         bulk_latency = 2,
4820         latency_invalid = 255
4821 };
4822
4823 /**
4824  * igb_update_ring_itr - update the dynamic ITR value based on packet size
4825  *
4826  *      Stores a new ITR value based on strictly on packet size.  This
4827  *      algorithm is less sophisticated than that used in igb_update_itr,
4828  *      due to the difficulty of synchronizing statistics across multiple
4829  *      receive rings.  The divisors and thresholds used by this function
4830  *      were determined based on theoretical maximum wire speed and testing
4831  *      data, in order to minimize response time while increasing bulk
4832  *      throughput.
4833  *      This functionality is controlled by the InterruptThrottleRate module
4834  *      parameter (see igb_param.c)
4835  *      NOTE:  This function is called only when operating in a multiqueue
4836  *             receive environment.
4837  * @q_vector: pointer to q_vector
4838  **/
4839 static void igb_update_ring_itr(struct igb_q_vector *q_vector)
4840 {
4841         int new_val = q_vector->itr_val;
4842         int avg_wire_size = 0;
4843         struct igb_adapter *adapter = q_vector->adapter;
4844         unsigned int packets;
4845
4846         /* For non-gigabit speeds, just fix the interrupt rate at 4000
4847          * ints/sec - ITR timer value of 120 ticks.
4848          */
4849         switch (adapter->link_speed) {
4850         case SPEED_10:
4851         case SPEED_100:
4852                 new_val = IGB_4K_ITR;
4853                 goto set_itr_val;
4854         default:
4855                 break;
4856         }
4857
4858         packets = q_vector->rx.total_packets;
4859         if (packets)
4860                 avg_wire_size = q_vector->rx.total_bytes / packets;
4861
4862         packets = q_vector->tx.total_packets;
4863         if (packets)
4864                 avg_wire_size = max_t(u32, avg_wire_size,
4865                                       q_vector->tx.total_bytes / packets);
4866
4867         /* if avg_wire_size isn't set no work was done */
4868         if (!avg_wire_size)
4869                 goto clear_counts;
4870
4871         /* Add 24 bytes to size to account for CRC, preamble, and gap */
4872         avg_wire_size += 24;
4873
4874         /* Don't starve jumbo frames */
4875         avg_wire_size = min(avg_wire_size, 3000);
4876
4877         /* Give a little boost to mid-size frames */
4878         if ((avg_wire_size > 300) && (avg_wire_size < 1200))
4879                 new_val = avg_wire_size / 3;
4880         else
4881                 new_val = avg_wire_size / 2;
4882
4883         /* conservative mode (itr 3) eliminates the lowest_latency setting */
4884         if (new_val < IGB_20K_ITR &&
4885             ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
4886              (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
4887                 new_val = IGB_20K_ITR;
4888
4889 set_itr_val:
4890         if (new_val != q_vector->itr_val) {
4891                 q_vector->itr_val = new_val;
4892                 q_vector->set_itr = 1;
4893         }
4894 clear_counts:
4895         q_vector->rx.total_bytes = 0;
4896         q_vector->rx.total_packets = 0;
4897         q_vector->tx.total_bytes = 0;
4898         q_vector->tx.total_packets = 0;
4899 }
4900
4901 /**
4902  * igb_update_itr - update the dynamic ITR value based on statistics
4903  *      Stores a new ITR value based on packets and byte
4904  *      counts during the last interrupt.  The advantage of per interrupt
4905  *      computation is faster updates and more accurate ITR for the current
4906  *      traffic pattern.  Constants in this function were computed
4907  *      based on theoretical maximum wire speed and thresholds were set based
4908  *      on testing data as well as attempting to minimize response time
4909  *      while increasing bulk throughput.
4910  *      this functionality is controlled by the InterruptThrottleRate module
4911  *      parameter (see igb_param.c)
4912  *      NOTE:  These calculations are only valid when operating in a single-
4913  *             queue environment.
4914  * @q_vector: pointer to q_vector
4915  * @ring_container: ring info to update the itr for
4916  **/
4917 static void igb_update_itr(struct igb_q_vector *q_vector,
4918                            struct igb_ring_container *ring_container)
4919 {
4920         unsigned int packets = ring_container->total_packets;
4921         unsigned int bytes = ring_container->total_bytes;
4922         u8 itrval = ring_container->itr;
4923
4924         /* no packets, exit with status unchanged */
4925         if (packets == 0)
4926                 return;
4927
4928         switch (itrval) {
4929         case lowest_latency:
4930                 /* handle TSO and jumbo frames */
4931                 if (bytes/packets > 8000)
4932                         itrval = bulk_latency;
4933                 else if ((packets < 5) && (bytes > 512))
4934                         itrval = low_latency;
4935                 break;
4936         case low_latency:  /* 50 usec aka 20000 ints/s */
4937                 if (bytes > 10000) {
4938                         /* this if handles the TSO accounting */
4939                         if (bytes/packets > 8000) {
4940                                 itrval = bulk_latency;
4941                         } else if ((packets < 10) || ((bytes/packets) > 1200)) {
4942                                 itrval = bulk_latency;
4943                         } else if ((packets > 35)) {
4944                                 itrval = lowest_latency;
4945                         }
4946                 } else if (bytes/packets > 2000) {
4947                         itrval = bulk_latency;
4948                 } else if (packets <= 2 && bytes < 512) {
4949                         itrval = lowest_latency;
4950                 }
4951                 break;
4952         case bulk_latency: /* 250 usec aka 4000 ints/s */
4953                 if (bytes > 25000) {
4954                         if (packets > 35)
4955                                 itrval = low_latency;
4956                 } else if (bytes < 1500) {
4957                         itrval = low_latency;
4958                 }
4959                 break;
4960         }
4961
4962         /* clear work counters since we have the values we need */
4963         ring_container->total_bytes = 0;
4964         ring_container->total_packets = 0;
4965
4966         /* write updated itr to ring container */
4967         ring_container->itr = itrval;
4968 }
4969
4970 static void igb_set_itr(struct igb_q_vector *q_vector)
4971 {
4972         struct igb_adapter *adapter = q_vector->adapter;
4973         u32 new_itr = q_vector->itr_val;
4974         u8 current_itr = 0;
4975
4976         /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
4977         switch (adapter->link_speed) {
4978         case SPEED_10:
4979         case SPEED_100:
4980                 current_itr = 0;
4981                 new_itr = IGB_4K_ITR;
4982                 goto set_itr_now;
4983         default:
4984                 break;
4985         }
4986
4987         igb_update_itr(q_vector, &q_vector->tx);
4988         igb_update_itr(q_vector, &q_vector->rx);
4989
4990         current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
4991
4992         /* conservative mode (itr 3) eliminates the lowest_latency setting */
4993         if (current_itr == lowest_latency &&
4994             ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
4995              (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
4996                 current_itr = low_latency;
4997
4998         switch (current_itr) {
4999         /* counts and packets in update_itr are dependent on these numbers */
5000         case lowest_latency:
5001                 new_itr = IGB_70K_ITR; /* 70,000 ints/sec */
5002                 break;
5003         case low_latency:
5004                 new_itr = IGB_20K_ITR; /* 20,000 ints/sec */
5005                 break;
5006         case bulk_latency:
5007                 new_itr = IGB_4K_ITR;  /* 4,000 ints/sec */
5008                 break;
5009         default:
5010                 break;
5011         }
5012
5013 set_itr_now:
5014         if (new_itr != q_vector->itr_val) {
5015                 /* this attempts to bias the interrupt rate towards Bulk
5016                  * by adding intermediate steps when interrupt rate is
5017                  * increasing */
5018                 new_itr = new_itr > q_vector->itr_val ?
5019                              max((new_itr * q_vector->itr_val) /
5020                                  (new_itr + (q_vector->itr_val >> 2)),
5021                                  new_itr) :
5022                              new_itr;
5023                 /* Don't write the value here; it resets the adapter's
5024                  * internal timer, and causes us to delay far longer than
5025                  * we should between interrupts.  Instead, we write the ITR
5026                  * value at the beginning of the next interrupt so the timing
5027                  * ends up being correct.
5028                  */
5029                 q_vector->itr_val = new_itr;
5030                 q_vector->set_itr = 1;
5031         }
5032 }
5033
5034 void igb_tx_ctxtdesc(struct igb_ring *tx_ring, u32 vlan_macip_lens,
5035                      u32 type_tucmd, u32 mss_l4len_idx)
5036 {
5037         struct e1000_adv_tx_context_desc *context_desc;
5038         u16 i = tx_ring->next_to_use;
5039
5040         context_desc = IGB_TX_CTXTDESC(tx_ring, i);
5041
5042         i++;
5043         tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
5044
5045         /* set bits to identify this as an advanced context descriptor */
5046         type_tucmd |= E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT;
5047
5048         /* For 82575, context index must be unique per ring. */
5049         if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
5050                 mss_l4len_idx |= tx_ring->reg_idx << 4;
5051
5052         context_desc->vlan_macip_lens   = cpu_to_le32(vlan_macip_lens);
5053         context_desc->seqnum_seed       = 0;
5054         context_desc->type_tucmd_mlhl   = cpu_to_le32(type_tucmd);
5055         context_desc->mss_l4len_idx     = cpu_to_le32(mss_l4len_idx);
5056 }
5057
5058 static int igb_tso(struct igb_ring *tx_ring,
5059                    struct igb_tx_buffer *first,
5060                    u8 *hdr_len)
5061 {
5062 #ifdef NETIF_F_TSO
5063         struct sk_buff *skb = first->skb;
5064         u32 vlan_macip_lens, type_tucmd;
5065         u32 mss_l4len_idx, l4len;
5066
5067         if (skb->ip_summed != CHECKSUM_PARTIAL)
5068                 return 0;
5069
5070         if (!skb_is_gso(skb))
5071 #endif /* NETIF_F_TSO */
5072                 return 0;
5073 #ifdef NETIF_F_TSO
5074
5075         if (skb_header_cloned(skb)) {
5076                 int err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
5077                 if (err)
5078                         return err;
5079         }
5080
5081         /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
5082         type_tucmd = E1000_ADVTXD_TUCMD_L4T_TCP;
5083
5084         if (first->protocol == __constant_htons(ETH_P_IP)) {
5085                 struct iphdr *iph = ip_hdr(skb);
5086                 iph->tot_len = 0;
5087                 iph->check = 0;
5088                 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
5089                                                          iph->daddr, 0,
5090                                                          IPPROTO_TCP,
5091                                                          0);
5092                 type_tucmd |= E1000_ADVTXD_TUCMD_IPV4;
5093                 first->tx_flags |= IGB_TX_FLAGS_TSO |
5094                                    IGB_TX_FLAGS_CSUM |
5095                                    IGB_TX_FLAGS_IPV4;
5096 #ifdef NETIF_F_TSO6
5097         } else if (skb_is_gso_v6(skb)) {
5098                 ipv6_hdr(skb)->payload_len = 0;
5099                 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
5100                                                        &ipv6_hdr(skb)->daddr,
5101                                                        0, IPPROTO_TCP, 0);
5102                 first->tx_flags |= IGB_TX_FLAGS_TSO |
5103                                    IGB_TX_FLAGS_CSUM;
5104 #endif
5105         }
5106
5107         /* compute header lengths */
5108         l4len = tcp_hdrlen(skb);
5109         *hdr_len = skb_transport_offset(skb) + l4len;
5110
5111         /* update gso size and bytecount with header size */
5112         first->gso_segs = skb_shinfo(skb)->gso_segs;
5113         first->bytecount += (first->gso_segs - 1) * *hdr_len;
5114
5115         /* MSS L4LEN IDX */
5116         mss_l4len_idx = l4len << E1000_ADVTXD_L4LEN_SHIFT;
5117         mss_l4len_idx |= skb_shinfo(skb)->gso_size << E1000_ADVTXD_MSS_SHIFT;
5118
5119         /* VLAN MACLEN IPLEN */
5120         vlan_macip_lens = skb_network_header_len(skb);
5121         vlan_macip_lens |= skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT;
5122         vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
5123
5124         igb_tx_ctxtdesc(tx_ring, vlan_macip_lens, type_tucmd, mss_l4len_idx);
5125
5126         return 1;
5127 #endif  /* NETIF_F_TSO */
5128 }
5129
5130 static void igb_tx_csum(struct igb_ring *tx_ring, struct igb_tx_buffer *first)
5131 {
5132         struct sk_buff *skb = first->skb;
5133         u32 vlan_macip_lens = 0;
5134         u32 mss_l4len_idx = 0;
5135         u32 type_tucmd = 0;
5136
5137         if (skb->ip_summed != CHECKSUM_PARTIAL) {
5138                 if (!(first->tx_flags & IGB_TX_FLAGS_VLAN))
5139                         return;
5140         } else {
5141                 u8 nexthdr = 0;
5142                 switch (first->protocol) {
5143                 case __constant_htons(ETH_P_IP):
5144                         vlan_macip_lens |= skb_network_header_len(skb);
5145                         type_tucmd |= E1000_ADVTXD_TUCMD_IPV4;
5146                         nexthdr = ip_hdr(skb)->protocol;
5147                         break;
5148 #ifdef NETIF_F_IPV6_CSUM
5149                 case __constant_htons(ETH_P_IPV6):
5150                         vlan_macip_lens |= skb_network_header_len(skb);
5151                         nexthdr = ipv6_hdr(skb)->nexthdr;
5152                         break;
5153 #endif
5154                 default:
5155                         if (unlikely(net_ratelimit())) {
5156                                 dev_warn(tx_ring->dev,
5157                                  "partial checksum but proto=%x!\n",
5158                                  first->protocol);
5159                         }
5160                         break;
5161                 }
5162
5163                 switch (nexthdr) {
5164                 case IPPROTO_TCP:
5165                         type_tucmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
5166                         mss_l4len_idx = tcp_hdrlen(skb) <<
5167                                         E1000_ADVTXD_L4LEN_SHIFT;
5168                         break;
5169 #ifdef HAVE_SCTP
5170                 case IPPROTO_SCTP:
5171                         type_tucmd |= E1000_ADVTXD_TUCMD_L4T_SCTP;
5172                         mss_l4len_idx = sizeof(struct sctphdr) <<
5173                                         E1000_ADVTXD_L4LEN_SHIFT;
5174                         break;
5175 #endif
5176                 case IPPROTO_UDP:
5177                         mss_l4len_idx = sizeof(struct udphdr) <<
5178                                         E1000_ADVTXD_L4LEN_SHIFT;
5179                         break;
5180                 default:
5181                         if (unlikely(net_ratelimit())) {
5182                                 dev_warn(tx_ring->dev,
5183                                  "partial checksum but l4 proto=%x!\n",
5184                                  nexthdr);
5185                         }
5186                         break;
5187                 }
5188
5189                 /* update TX checksum flag */
5190                 first->tx_flags |= IGB_TX_FLAGS_CSUM;
5191         }
5192
5193         vlan_macip_lens |= skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT;
5194         vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
5195
5196         igb_tx_ctxtdesc(tx_ring, vlan_macip_lens, type_tucmd, mss_l4len_idx);
5197 }
5198
5199 #define IGB_SET_FLAG(_input, _flag, _result) \
5200         ((_flag <= _result) ? \
5201          ((u32)(_input & _flag) * (_result / _flag)) : \
5202          ((u32)(_input & _flag) / (_flag / _result)))
5203
5204 static u32 igb_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
5205 {
5206         /* set type for advanced descriptor with frame checksum insertion */
5207         u32 cmd_type = E1000_ADVTXD_DTYP_DATA |
5208                        E1000_ADVTXD_DCMD_DEXT |
5209                        E1000_ADVTXD_DCMD_IFCS;
5210
5211         /* set HW vlan bit if vlan is present */
5212         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_VLAN,
5213                                  (E1000_ADVTXD_DCMD_VLE));
5214
5215         /* set segmentation bits for TSO */
5216         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSO,
5217                                  (E1000_ADVTXD_DCMD_TSE));
5218
5219         /* set timestamp bit if present */
5220         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSTAMP,
5221                                  (E1000_ADVTXD_MAC_TSTAMP));
5222
5223         return cmd_type;
5224 }
5225
5226 static void igb_tx_olinfo_status(struct igb_ring *tx_ring,
5227                                  union e1000_adv_tx_desc *tx_desc,
5228                                  u32 tx_flags, unsigned int paylen)
5229 {
5230         u32 olinfo_status = paylen << E1000_ADVTXD_PAYLEN_SHIFT;
5231
5232         /* 82575 requires a unique index per ring */
5233         if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
5234                 olinfo_status |= tx_ring->reg_idx << 4;
5235
5236         /* insert L4 checksum */
5237         olinfo_status |= IGB_SET_FLAG(tx_flags,
5238                                       IGB_TX_FLAGS_CSUM,
5239                                       (E1000_TXD_POPTS_TXSM << 8));
5240
5241         /* insert IPv4 checksum */
5242         olinfo_status |= IGB_SET_FLAG(tx_flags,
5243                                       IGB_TX_FLAGS_IPV4,
5244                                       (E1000_TXD_POPTS_IXSM << 8));
5245
5246         tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
5247 }
5248
5249 static void igb_tx_map(struct igb_ring *tx_ring,
5250                        struct igb_tx_buffer *first,
5251                        const u8 hdr_len)
5252 {
5253         struct sk_buff *skb = first->skb;
5254         struct igb_tx_buffer *tx_buffer;
5255         union e1000_adv_tx_desc *tx_desc;
5256         struct skb_frag_struct *frag;
5257         dma_addr_t dma;
5258         unsigned int data_len, size;
5259         u32 tx_flags = first->tx_flags;
5260         u32 cmd_type = igb_tx_cmd_type(skb, tx_flags);
5261         u16 i = tx_ring->next_to_use;
5262
5263         tx_desc = IGB_TX_DESC(tx_ring, i);
5264
5265         igb_tx_olinfo_status(tx_ring, tx_desc, tx_flags, skb->len - hdr_len);
5266
5267         size = skb_headlen(skb);
5268         data_len = skb->data_len;
5269
5270         dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
5271
5272         tx_buffer = first;
5273
5274         for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
5275                 if (dma_mapping_error(tx_ring->dev, dma))
5276                         goto dma_error;
5277
5278                 /* record length, and DMA address */
5279                 dma_unmap_len_set(tx_buffer, len, size);
5280                 dma_unmap_addr_set(tx_buffer, dma, dma);
5281
5282                 tx_desc->read.buffer_addr = cpu_to_le64(dma);
5283
5284                 while (unlikely(size > IGB_MAX_DATA_PER_TXD)) {
5285                         tx_desc->read.cmd_type_len =
5286                                 cpu_to_le32(cmd_type ^ IGB_MAX_DATA_PER_TXD);
5287
5288                         i++;
5289                         tx_desc++;
5290                         if (i == tx_ring->count) {
5291                                 tx_desc = IGB_TX_DESC(tx_ring, 0);
5292                                 i = 0;
5293                         }
5294                         tx_desc->read.olinfo_status = 0;
5295
5296                         dma += IGB_MAX_DATA_PER_TXD;
5297                         size -= IGB_MAX_DATA_PER_TXD;
5298
5299                         tx_desc->read.buffer_addr = cpu_to_le64(dma);
5300                 }
5301
5302                 if (likely(!data_len))
5303                         break;
5304
5305                 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
5306
5307                 i++;
5308                 tx_desc++;
5309                 if (i == tx_ring->count) {
5310                         tx_desc = IGB_TX_DESC(tx_ring, 0);
5311                         i = 0;
5312                 }
5313                 tx_desc->read.olinfo_status = 0;
5314
5315                 size = skb_frag_size(frag);
5316                 data_len -= size;
5317
5318                 dma = skb_frag_dma_map(tx_ring->dev, frag, 0,
5319                                        size, DMA_TO_DEVICE);
5320
5321                 tx_buffer = &tx_ring->tx_buffer_info[i];
5322         }
5323
5324         /* write last descriptor with RS and EOP bits */
5325         cmd_type |= size | IGB_TXD_DCMD;
5326         tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
5327
5328         netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
5329         /* set the timestamp */
5330         first->time_stamp = jiffies;
5331
5332         /*
5333          * Force memory writes to complete before letting h/w know there
5334          * are new descriptors to fetch.  (Only applicable for weak-ordered
5335          * memory model archs, such as IA-64).
5336          *
5337          * We also need this memory barrier to make certain all of the
5338          * status bits have been updated before next_to_watch is written.
5339          */
5340         wmb();
5341
5342         /* set next_to_watch value indicating a packet is present */
5343         first->next_to_watch = tx_desc;
5344
5345         i++;
5346         if (i == tx_ring->count)
5347                 i = 0;
5348
5349         tx_ring->next_to_use = i;
5350
5351         writel(i, tx_ring->tail);
5352
5353         /* we need this if more than one processor can write to our tail
5354          * at a time, it syncronizes IO on IA64/Altix systems */
5355         mmiowb();
5356
5357         return;
5358
5359 dma_error:
5360         dev_err(tx_ring->dev, "TX DMA map failed\n");
5361
5362         /* clear dma mappings for failed tx_buffer_info map */
5363         for (;;) {
5364                 tx_buffer = &tx_ring->tx_buffer_info[i];
5365                 igb_unmap_and_free_tx_resource(tx_ring, tx_buffer);
5366                 if (tx_buffer == first)
5367                         break;
5368                 if (i == 0)
5369                         i = tx_ring->count;
5370                 i--;
5371         }
5372
5373         tx_ring->next_to_use = i;
5374 }
5375
5376 static int __igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
5377 {
5378         struct net_device *netdev = netdev_ring(tx_ring);
5379
5380         if (netif_is_multiqueue(netdev))
5381                 netif_stop_subqueue(netdev, ring_queue_index(tx_ring));
5382         else
5383                 netif_stop_queue(netdev);
5384
5385         /* Herbert's original patch had:
5386          *  smp_mb__after_netif_stop_queue();
5387          * but since that doesn't exist yet, just open code it. */
5388         smp_mb();
5389
5390         /* We need to check again in a case another CPU has just
5391          * made room available. */
5392         if (igb_desc_unused(tx_ring) < size)
5393                 return -EBUSY;
5394
5395         /* A reprieve! */
5396         if (netif_is_multiqueue(netdev))
5397                 netif_wake_subqueue(netdev, ring_queue_index(tx_ring));
5398         else
5399                 netif_wake_queue(netdev);
5400
5401         tx_ring->tx_stats.restart_queue++;
5402
5403         return 0;
5404 }
5405
5406 static inline int igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
5407 {
5408         if (igb_desc_unused(tx_ring) >= size)
5409                 return 0;
5410         return __igb_maybe_stop_tx(tx_ring, size);
5411 }
5412
5413 netdev_tx_t igb_xmit_frame_ring(struct sk_buff *skb,
5414                                 struct igb_ring *tx_ring)
5415 {
5416         struct igb_tx_buffer *first;
5417         int tso;
5418         u32 tx_flags = 0;
5419 #if PAGE_SIZE > IGB_MAX_DATA_PER_TXD
5420         unsigned short f;
5421 #endif
5422         u16 count = TXD_USE_COUNT(skb_headlen(skb));
5423         __be16 protocol = vlan_get_protocol(skb);
5424         u8 hdr_len = 0;
5425
5426         /*
5427          * need: 1 descriptor per page * PAGE_SIZE/IGB_MAX_DATA_PER_TXD,
5428          *       + 1 desc for skb_headlen/IGB_MAX_DATA_PER_TXD,
5429          *       + 2 desc gap to keep tail from touching head,
5430          *       + 1 desc for context descriptor,
5431          * otherwise try next time
5432          */
5433 #if PAGE_SIZE > IGB_MAX_DATA_PER_TXD
5434         for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
5435                 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
5436 #else
5437         count += skb_shinfo(skb)->nr_frags;
5438 #endif
5439         if (igb_maybe_stop_tx(tx_ring, count + 3)) {
5440                 /* this is a hard error */
5441                 return NETDEV_TX_BUSY;
5442         }
5443
5444         /* record the location of the first descriptor for this packet */
5445         first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
5446         first->skb = skb;
5447         first->bytecount = skb->len;
5448         first->gso_segs = 1;
5449
5450         skb_tx_timestamp(skb);
5451
5452 #ifdef HAVE_PTP_1588_CLOCK
5453         if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)) {
5454                 struct igb_adapter *adapter = netdev_priv(tx_ring->netdev);
5455                 if (!adapter->ptp_tx_skb) {
5456                         skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
5457                         tx_flags |= IGB_TX_FLAGS_TSTAMP;
5458
5459                         adapter->ptp_tx_skb = skb_get(skb);
5460                         adapter->ptp_tx_start = jiffies;
5461                         if (adapter->hw.mac.type == e1000_82576)
5462                                 schedule_work(&adapter->ptp_tx_work);
5463                 }
5464         }
5465 #endif /* HAVE_PTP_1588_CLOCK */
5466
5467         if (vlan_tx_tag_present(skb)) {
5468                 tx_flags |= IGB_TX_FLAGS_VLAN;
5469                 tx_flags |= (vlan_tx_tag_get(skb) << IGB_TX_FLAGS_VLAN_SHIFT);
5470         }
5471
5472         /* record initial flags and protocol */
5473         first->tx_flags = tx_flags;
5474         first->protocol = protocol;
5475
5476         tso = igb_tso(tx_ring, first, &hdr_len);
5477         if (tso < 0)
5478                 goto out_drop;
5479         else if (!tso)
5480                 igb_tx_csum(tx_ring, first);
5481
5482         igb_tx_map(tx_ring, first, hdr_len);
5483
5484 #ifndef HAVE_TRANS_START_IN_QUEUE
5485         netdev_ring(tx_ring)->trans_start = jiffies;
5486
5487 #endif
5488         /* Make sure there is space in the ring for the next send. */
5489         igb_maybe_stop_tx(tx_ring, DESC_NEEDED);
5490
5491         return NETDEV_TX_OK;
5492
5493 out_drop:
5494         igb_unmap_and_free_tx_resource(tx_ring, first);
5495
5496         return NETDEV_TX_OK;
5497 }
5498
5499 #ifdef HAVE_TX_MQ
5500 static inline struct igb_ring *igb_tx_queue_mapping(struct igb_adapter *adapter,
5501                                                     struct sk_buff *skb)
5502 {
5503         unsigned int r_idx = skb->queue_mapping;
5504
5505         if (r_idx >= adapter->num_tx_queues)
5506                 r_idx = r_idx % adapter->num_tx_queues;
5507
5508         return adapter->tx_ring[r_idx];
5509 }
5510 #else
5511 #define igb_tx_queue_mapping(_adapter, _skb) (_adapter)->tx_ring[0]
5512 #endif
5513
5514 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb,
5515                                   struct net_device *netdev)
5516 {
5517         struct igb_adapter *adapter = netdev_priv(netdev);
5518
5519         if (test_bit(__IGB_DOWN, &adapter->state)) {
5520                 dev_kfree_skb_any(skb);
5521                 return NETDEV_TX_OK;
5522         }
5523
5524         if (skb->len <= 0) {
5525                 dev_kfree_skb_any(skb);
5526                 return NETDEV_TX_OK;
5527         }
5528
5529         /*
5530          * The minimum packet size with TCTL.PSP set is 17 so pad the skb
5531          * in order to meet this minimum size requirement.
5532          */
5533         if (skb->len < 17) {
5534                 if (skb_padto(skb, 17))
5535                         return NETDEV_TX_OK;
5536                 skb->len = 17;
5537         }
5538
5539         return igb_xmit_frame_ring(skb, igb_tx_queue_mapping(adapter, skb));
5540 }
5541
5542 /**
5543  * igb_tx_timeout - Respond to a Tx Hang
5544  * @netdev: network interface device structure
5545  **/
5546 static void igb_tx_timeout(struct net_device *netdev)
5547 {
5548         struct igb_adapter *adapter = netdev_priv(netdev);
5549         struct e1000_hw *hw = &adapter->hw;
5550
5551         /* Do the reset outside of interrupt context */
5552         adapter->tx_timeout_count++;
5553
5554         if (hw->mac.type >= e1000_82580)
5555                 hw->dev_spec._82575.global_device_reset = true;
5556
5557         schedule_work(&adapter->reset_task);
5558         E1000_WRITE_REG(hw, E1000_EICS,
5559                         (adapter->eims_enable_mask & ~adapter->eims_other));
5560 }
5561
5562 static void igb_reset_task(struct work_struct *work)
5563 {
5564         struct igb_adapter *adapter;
5565         adapter = container_of(work, struct igb_adapter, reset_task);
5566
5567         igb_reinit_locked(adapter);
5568 }
5569
5570 /**
5571  * igb_get_stats - Get System Network Statistics
5572  * @netdev: network interface device structure
5573  *
5574  * Returns the address of the device statistics structure.
5575  * The statistics are updated here and also from the timer callback.
5576  **/
5577 static struct net_device_stats *igb_get_stats(struct net_device *netdev)
5578 {
5579         struct igb_adapter *adapter = netdev_priv(netdev);
5580
5581         if (!test_bit(__IGB_RESETTING, &adapter->state))
5582                 igb_update_stats(adapter);
5583
5584 #ifdef HAVE_NETDEV_STATS_IN_NETDEV
5585         /* only return the current stats */
5586         return &netdev->stats;
5587 #else
5588         /* only return the current stats */
5589         return &adapter->net_stats;
5590 #endif /* HAVE_NETDEV_STATS_IN_NETDEV */
5591 }
5592
5593 /**
5594  * igb_change_mtu - Change the Maximum Transfer Unit
5595  * @netdev: network interface device structure
5596  * @new_mtu: new value for maximum frame size
5597  *
5598  * Returns 0 on success, negative on failure
5599  **/
5600 static int igb_change_mtu(struct net_device *netdev, int new_mtu)
5601 {
5602         struct igb_adapter *adapter = netdev_priv(netdev);
5603         struct e1000_hw *hw = &adapter->hw;
5604         struct pci_dev *pdev = adapter->pdev;
5605         int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
5606
5607         if ((new_mtu < 68) || (max_frame > MAX_JUMBO_FRAME_SIZE)) {
5608                 dev_err(pci_dev_to_dev(pdev), "Invalid MTU setting\n");
5609                 return -EINVAL;
5610         }
5611
5612 #define MAX_STD_JUMBO_FRAME_SIZE 9238
5613         if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
5614                 dev_err(pci_dev_to_dev(pdev), "MTU > 9216 not supported.\n");
5615                 return -EINVAL;
5616         }
5617
5618         /* adjust max frame to be at least the size of a standard frame */
5619         if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN))
5620                 max_frame = ETH_FRAME_LEN + ETH_FCS_LEN;
5621
5622         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
5623                 usleep_range(1000, 2000);
5624
5625         /* igb_down has a dependency on max_frame_size */
5626         adapter->max_frame_size = max_frame;
5627
5628         if (netif_running(netdev))
5629                 igb_down(adapter);
5630
5631         dev_info(pci_dev_to_dev(pdev), "changing MTU from %d to %d\n",
5632                 netdev->mtu, new_mtu);
5633         netdev->mtu = new_mtu;
5634         hw->dev_spec._82575.mtu = new_mtu;
5635
5636         if (netif_running(netdev))
5637                 igb_up(adapter);
5638         else
5639                 igb_reset(adapter);
5640
5641         clear_bit(__IGB_RESETTING, &adapter->state);
5642
5643         return 0;
5644 }
5645
5646 /**
5647  * igb_update_stats - Update the board statistics counters
5648  * @adapter: board private structure
5649  **/
5650
5651 void igb_update_stats(struct igb_adapter *adapter)
5652 {
5653 #ifdef HAVE_NETDEV_STATS_IN_NETDEV
5654         struct net_device_stats *net_stats = &adapter->netdev->stats;
5655 #else
5656         struct net_device_stats *net_stats = &adapter->net_stats;
5657 #endif /* HAVE_NETDEV_STATS_IN_NETDEV */
5658         struct e1000_hw *hw = &adapter->hw;
5659 #ifdef HAVE_PCI_ERS
5660         struct pci_dev *pdev = adapter->pdev;
5661 #endif
5662         u32 reg, mpc;
5663         u16 phy_tmp;
5664         int i;
5665         u64 bytes, packets;
5666 #ifndef IGB_NO_LRO
5667         u32 flushed = 0, coal = 0;
5668         struct igb_q_vector *q_vector;
5669 #endif
5670
5671 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
5672
5673         /*
5674          * Prevent stats update while adapter is being reset, or if the pci
5675          * connection is down.
5676          */
5677         if (adapter->link_speed == 0)
5678                 return;
5679 #ifdef HAVE_PCI_ERS
5680         if (pci_channel_offline(pdev))
5681                 return;
5682
5683 #endif
5684 #ifndef IGB_NO_LRO
5685         for (i = 0; i < adapter->num_q_vectors; i++) {
5686                 q_vector = adapter->q_vector[i];
5687                 if (!q_vector)
5688                         continue;
5689                 flushed += q_vector->lrolist.stats.flushed;
5690                 coal += q_vector->lrolist.stats.coal;
5691         }
5692         adapter->lro_stats.flushed = flushed;
5693         adapter->lro_stats.coal = coal;
5694
5695 #endif
5696         bytes = 0;
5697         packets = 0;
5698         for (i = 0; i < adapter->num_rx_queues; i++) {
5699                 u32 rqdpc_tmp = E1000_READ_REG(hw, E1000_RQDPC(i)) & 0x0FFF;
5700                 struct igb_ring *ring = adapter->rx_ring[i];
5701                 ring->rx_stats.drops += rqdpc_tmp;
5702                 net_stats->rx_fifo_errors += rqdpc_tmp;
5703 #ifdef CONFIG_IGB_VMDQ_NETDEV
5704                 if (!ring->vmdq_netdev) {
5705                         bytes += ring->rx_stats.bytes;
5706                         packets += ring->rx_stats.packets;
5707                 }
5708 #else
5709                 bytes += ring->rx_stats.bytes;
5710                 packets += ring->rx_stats.packets;
5711 #endif
5712         }
5713
5714         net_stats->rx_bytes = bytes;
5715         net_stats->rx_packets = packets;
5716
5717         bytes = 0;
5718         packets = 0;
5719         for (i = 0; i < adapter->num_tx_queues; i++) {
5720                 struct igb_ring *ring = adapter->tx_ring[i];
5721 #ifdef CONFIG_IGB_VMDQ_NETDEV
5722                 if (!ring->vmdq_netdev) {
5723                         bytes += ring->tx_stats.bytes;
5724                         packets += ring->tx_stats.packets;
5725                 }
5726 #else
5727                 bytes += ring->tx_stats.bytes;
5728                 packets += ring->tx_stats.packets;
5729 #endif
5730         }
5731         net_stats->tx_bytes = bytes;
5732         net_stats->tx_packets = packets;
5733
5734         /* read stats registers */
5735         adapter->stats.crcerrs += E1000_READ_REG(hw, E1000_CRCERRS);
5736         adapter->stats.gprc += E1000_READ_REG(hw, E1000_GPRC);
5737         adapter->stats.gorc += E1000_READ_REG(hw, E1000_GORCL);
5738         E1000_READ_REG(hw, E1000_GORCH); /* clear GORCL */
5739         adapter->stats.bprc += E1000_READ_REG(hw, E1000_BPRC);
5740         adapter->stats.mprc += E1000_READ_REG(hw, E1000_MPRC);
5741         adapter->stats.roc += E1000_READ_REG(hw, E1000_ROC);
5742
5743         adapter->stats.prc64 += E1000_READ_REG(hw, E1000_PRC64);
5744         adapter->stats.prc127 += E1000_READ_REG(hw, E1000_PRC127);
5745         adapter->stats.prc255 += E1000_READ_REG(hw, E1000_PRC255);
5746         adapter->stats.prc511 += E1000_READ_REG(hw, E1000_PRC511);
5747         adapter->stats.prc1023 += E1000_READ_REG(hw, E1000_PRC1023);
5748         adapter->stats.prc1522 += E1000_READ_REG(hw, E1000_PRC1522);
5749         adapter->stats.symerrs += E1000_READ_REG(hw, E1000_SYMERRS);
5750         adapter->stats.sec += E1000_READ_REG(hw, E1000_SEC);
5751
5752         mpc = E1000_READ_REG(hw, E1000_MPC);
5753         adapter->stats.mpc += mpc;
5754         net_stats->rx_fifo_errors += mpc;
5755         adapter->stats.scc += E1000_READ_REG(hw, E1000_SCC);
5756         adapter->stats.ecol += E1000_READ_REG(hw, E1000_ECOL);
5757         adapter->stats.mcc += E1000_READ_REG(hw, E1000_MCC);
5758         adapter->stats.latecol += E1000_READ_REG(hw, E1000_LATECOL);
5759         adapter->stats.dc += E1000_READ_REG(hw, E1000_DC);
5760         adapter->stats.rlec += E1000_READ_REG(hw, E1000_RLEC);
5761         adapter->stats.xonrxc += E1000_READ_REG(hw, E1000_XONRXC);
5762         adapter->stats.xontxc += E1000_READ_REG(hw, E1000_XONTXC);
5763         adapter->stats.xoffrxc += E1000_READ_REG(hw, E1000_XOFFRXC);
5764         adapter->stats.xofftxc += E1000_READ_REG(hw, E1000_XOFFTXC);
5765         adapter->stats.fcruc += E1000_READ_REG(hw, E1000_FCRUC);
5766         adapter->stats.gptc += E1000_READ_REG(hw, E1000_GPTC);
5767         adapter->stats.gotc += E1000_READ_REG(hw, E1000_GOTCL);
5768         E1000_READ_REG(hw, E1000_GOTCH); /* clear GOTCL */
5769         adapter->stats.rnbc += E1000_READ_REG(hw, E1000_RNBC);
5770         adapter->stats.ruc += E1000_READ_REG(hw, E1000_RUC);
5771         adapter->stats.rfc += E1000_READ_REG(hw, E1000_RFC);
5772         adapter->stats.rjc += E1000_READ_REG(hw, E1000_RJC);
5773         adapter->stats.tor += E1000_READ_REG(hw, E1000_TORH);
5774         adapter->stats.tot += E1000_READ_REG(hw, E1000_TOTH);
5775         adapter->stats.tpr += E1000_READ_REG(hw, E1000_TPR);
5776
5777         adapter->stats.ptc64 += E1000_READ_REG(hw, E1000_PTC64);
5778         adapter->stats.ptc127 += E1000_READ_REG(hw, E1000_PTC127);
5779         adapter->stats.ptc255 += E1000_READ_REG(hw, E1000_PTC255);
5780         adapter->stats.ptc511 += E1000_READ_REG(hw, E1000_PTC511);
5781         adapter->stats.ptc1023 += E1000_READ_REG(hw, E1000_PTC1023);
5782         adapter->stats.ptc1522 += E1000_READ_REG(hw, E1000_PTC1522);
5783
5784         adapter->stats.mptc += E1000_READ_REG(hw, E1000_MPTC);
5785         adapter->stats.bptc += E1000_READ_REG(hw, E1000_BPTC);
5786
5787         adapter->stats.tpt += E1000_READ_REG(hw, E1000_TPT);
5788         adapter->stats.colc += E1000_READ_REG(hw, E1000_COLC);
5789
5790         adapter->stats.algnerrc += E1000_READ_REG(hw, E1000_ALGNERRC);
5791         /* read internal phy sepecific stats */
5792         reg = E1000_READ_REG(hw, E1000_CTRL_EXT);
5793         if (!(reg & E1000_CTRL_EXT_LINK_MODE_MASK)) {
5794                 adapter->stats.rxerrc += E1000_READ_REG(hw, E1000_RXERRC);
5795
5796                 /* this stat has invalid values on i210/i211 */
5797                 if ((hw->mac.type != e1000_i210) &&
5798                     (hw->mac.type != e1000_i211))
5799                         adapter->stats.tncrs += E1000_READ_REG(hw, E1000_TNCRS);
5800         }
5801         adapter->stats.tsctc += E1000_READ_REG(hw, E1000_TSCTC);
5802         adapter->stats.tsctfc += E1000_READ_REG(hw, E1000_TSCTFC);
5803
5804         adapter->stats.iac += E1000_READ_REG(hw, E1000_IAC);
5805         adapter->stats.icrxoc += E1000_READ_REG(hw, E1000_ICRXOC);
5806         adapter->stats.icrxptc += E1000_READ_REG(hw, E1000_ICRXPTC);
5807         adapter->stats.icrxatc += E1000_READ_REG(hw, E1000_ICRXATC);
5808         adapter->stats.ictxptc += E1000_READ_REG(hw, E1000_ICTXPTC);
5809         adapter->stats.ictxatc += E1000_READ_REG(hw, E1000_ICTXATC);
5810         adapter->stats.ictxqec += E1000_READ_REG(hw, E1000_ICTXQEC);
5811         adapter->stats.ictxqmtc += E1000_READ_REG(hw, E1000_ICTXQMTC);
5812         adapter->stats.icrxdmtc += E1000_READ_REG(hw, E1000_ICRXDMTC);
5813
5814         /* Fill out the OS statistics structure */
5815         net_stats->multicast = adapter->stats.mprc;
5816         net_stats->collisions = adapter->stats.colc;
5817
5818         /* Rx Errors */
5819
5820         /* RLEC on some newer hardware can be incorrect so build
5821          * our own version based on RUC and ROC */
5822         net_stats->rx_errors = adapter->stats.rxerrc +
5823                 adapter->stats.crcerrs + adapter->stats.algnerrc +
5824                 adapter->stats.ruc + adapter->stats.roc +
5825                 adapter->stats.cexterr;
5826         net_stats->rx_length_errors = adapter->stats.ruc +
5827                                       adapter->stats.roc;
5828         net_stats->rx_crc_errors = adapter->stats.crcerrs;
5829         net_stats->rx_frame_errors = adapter->stats.algnerrc;
5830         net_stats->rx_missed_errors = adapter->stats.mpc;
5831
5832         /* Tx Errors */
5833         net_stats->tx_errors = adapter->stats.ecol +
5834                                adapter->stats.latecol;
5835         net_stats->tx_aborted_errors = adapter->stats.ecol;
5836         net_stats->tx_window_errors = adapter->stats.latecol;
5837         net_stats->tx_carrier_errors = adapter->stats.tncrs;
5838
5839         /* Tx Dropped needs to be maintained elsewhere */
5840
5841         /* Phy Stats */
5842         if (hw->phy.media_type == e1000_media_type_copper) {
5843                 if ((adapter->link_speed == SPEED_1000) &&
5844                    (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
5845                         phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
5846                         adapter->phy_stats.idle_errors += phy_tmp;
5847                 }
5848         }
5849
5850         /* Management Stats */
5851         adapter->stats.mgptc += E1000_READ_REG(hw, E1000_MGTPTC);
5852         adapter->stats.mgprc += E1000_READ_REG(hw, E1000_MGTPRC);
5853         if (hw->mac.type > e1000_82580) {
5854                 adapter->stats.o2bgptc += E1000_READ_REG(hw, E1000_O2BGPTC);
5855                 adapter->stats.o2bspc += E1000_READ_REG(hw, E1000_O2BSPC);
5856                 adapter->stats.b2ospc += E1000_READ_REG(hw, E1000_B2OSPC);
5857                 adapter->stats.b2ogprc += E1000_READ_REG(hw, E1000_B2OGPRC);
5858         }
5859 }
5860
5861 static irqreturn_t igb_msix_other(int irq, void *data)
5862 {
5863         struct igb_adapter *adapter = data;
5864         struct e1000_hw *hw = &adapter->hw;
5865         u32 icr = E1000_READ_REG(hw, E1000_ICR);
5866         /* reading ICR causes bit 31 of EICR to be cleared */
5867
5868         if (icr & E1000_ICR_DRSTA)
5869                 schedule_work(&adapter->reset_task);
5870
5871         if (icr & E1000_ICR_DOUTSYNC) {
5872                 /* HW is reporting DMA is out of sync */
5873                 adapter->stats.doosync++;
5874                 /* The DMA Out of Sync is also indication of a spoof event
5875                  * in IOV mode. Check the Wrong VM Behavior register to
5876                  * see if it is really a spoof event. */
5877                 igb_check_wvbr(adapter);
5878         }
5879
5880         /* Check for a mailbox event */
5881         if (icr & E1000_ICR_VMMB)
5882                 igb_msg_task(adapter);
5883
5884         if (icr & E1000_ICR_LSC) {
5885                 hw->mac.get_link_status = 1;
5886                 /* guard against interrupt when we're going down */
5887                 if (!test_bit(__IGB_DOWN, &adapter->state))
5888                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
5889         }
5890
5891 #ifdef HAVE_PTP_1588_CLOCK
5892         if (icr & E1000_ICR_TS) {
5893                 u32 tsicr = E1000_READ_REG(hw, E1000_TSICR);
5894
5895                 if (tsicr & E1000_TSICR_TXTS) {
5896                         /* acknowledge the interrupt */
5897                         E1000_WRITE_REG(hw, E1000_TSICR, E1000_TSICR_TXTS);
5898                         /* retrieve hardware timestamp */
5899                         schedule_work(&adapter->ptp_tx_work);
5900                 }
5901         }
5902 #endif /* HAVE_PTP_1588_CLOCK */
5903
5904         /* Check for MDD event */
5905         if (icr & E1000_ICR_MDDET)
5906                 igb_process_mdd_event(adapter);
5907
5908         E1000_WRITE_REG(hw, E1000_EIMS, adapter->eims_other);
5909
5910         return IRQ_HANDLED;
5911 }
5912
5913 static void igb_write_itr(struct igb_q_vector *q_vector)
5914 {
5915         struct igb_adapter *adapter = q_vector->adapter;
5916         u32 itr_val = q_vector->itr_val & 0x7FFC;
5917
5918         if (!q_vector->set_itr)
5919                 return;
5920
5921         if (!itr_val)
5922                 itr_val = 0x4;
5923
5924         if (adapter->hw.mac.type == e1000_82575)
5925                 itr_val |= itr_val << 16;
5926         else
5927                 itr_val |= E1000_EITR_CNT_IGNR;
5928
5929         writel(itr_val, q_vector->itr_register);
5930         q_vector->set_itr = 0;
5931 }
5932
5933 static irqreturn_t igb_msix_ring(int irq, void *data)
5934 {
5935         struct igb_q_vector *q_vector = data;
5936
5937         /* Write the ITR value calculated from the previous interrupt. */
5938         igb_write_itr(q_vector);
5939
5940         napi_schedule(&q_vector->napi);
5941
5942         return IRQ_HANDLED;
5943 }
5944
5945 #ifdef IGB_DCA
5946 static void igb_update_tx_dca(struct igb_adapter *adapter,
5947                               struct igb_ring *tx_ring,
5948                               int cpu)
5949 {
5950         struct e1000_hw *hw = &adapter->hw;
5951         u32 txctrl = dca3_get_tag(tx_ring->dev, cpu);
5952
5953         if (hw->mac.type != e1000_82575)
5954                 txctrl <<= E1000_DCA_TXCTRL_CPUID_SHIFT_82576;
5955
5956         /*
5957          * We can enable relaxed ordering for reads, but not writes when
5958          * DCA is enabled.  This is due to a known issue in some chipsets
5959          * which will cause the DCA tag to be cleared.
5960          */
5961         txctrl |= E1000_DCA_TXCTRL_DESC_RRO_EN |
5962                   E1000_DCA_TXCTRL_DATA_RRO_EN |
5963                   E1000_DCA_TXCTRL_DESC_DCA_EN;
5964
5965         E1000_WRITE_REG(hw, E1000_DCA_TXCTRL(tx_ring->reg_idx), txctrl);
5966 }
5967
5968 static void igb_update_rx_dca(struct igb_adapter *adapter,
5969                               struct igb_ring *rx_ring,
5970                               int cpu)
5971 {
5972         struct e1000_hw *hw = &adapter->hw;
5973         u32 rxctrl = dca3_get_tag(&adapter->pdev->dev, cpu);
5974
5975         if (hw->mac.type != e1000_82575)
5976                 rxctrl <<= E1000_DCA_RXCTRL_CPUID_SHIFT_82576;
5977
5978         /*
5979          * We can enable relaxed ordering for reads, but not writes when
5980          * DCA is enabled.  This is due to a known issue in some chipsets
5981          * which will cause the DCA tag to be cleared.
5982          */
5983         rxctrl |= E1000_DCA_RXCTRL_DESC_RRO_EN |
5984                   E1000_DCA_RXCTRL_DESC_DCA_EN;
5985
5986         E1000_WRITE_REG(hw, E1000_DCA_RXCTRL(rx_ring->reg_idx), rxctrl);
5987 }
5988
5989 static void igb_update_dca(struct igb_q_vector *q_vector)
5990 {
5991         struct igb_adapter *adapter = q_vector->adapter;
5992         int cpu = get_cpu();
5993
5994         if (q_vector->cpu == cpu)
5995                 goto out_no_update;
5996
5997         if (q_vector->tx.ring)
5998                 igb_update_tx_dca(adapter, q_vector->tx.ring, cpu);
5999
6000         if (q_vector->rx.ring)
6001                 igb_update_rx_dca(adapter, q_vector->rx.ring, cpu);
6002
6003         q_vector->cpu = cpu;
6004 out_no_update:
6005         put_cpu();
6006 }
6007
6008 static void igb_setup_dca(struct igb_adapter *adapter)
6009 {
6010         struct e1000_hw *hw = &adapter->hw;
6011         int i;
6012
6013         if (!(adapter->flags & IGB_FLAG_DCA_ENABLED))
6014                 return;
6015
6016         /* Always use CB2 mode, difference is masked in the CB driver. */
6017         E1000_WRITE_REG(hw, E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_CB2);
6018
6019         for (i = 0; i < adapter->num_q_vectors; i++) {
6020                 adapter->q_vector[i]->cpu = -1;
6021                 igb_update_dca(adapter->q_vector[i]);
6022         }
6023 }
6024
6025 static int __igb_notify_dca(struct device *dev, void *data)
6026 {
6027         struct net_device *netdev = dev_get_drvdata(dev);
6028         struct igb_adapter *adapter = netdev_priv(netdev);
6029         struct pci_dev *pdev = adapter->pdev;
6030         struct e1000_hw *hw = &adapter->hw;
6031         unsigned long event = *(unsigned long *)data;
6032
6033         switch (event) {
6034         case DCA_PROVIDER_ADD:
6035                 /* if already enabled, don't do it again */
6036                 if (adapter->flags & IGB_FLAG_DCA_ENABLED)
6037                         break;
6038                 if (dca_add_requester(dev) == E1000_SUCCESS) {
6039                         adapter->flags |= IGB_FLAG_DCA_ENABLED;
6040                         dev_info(pci_dev_to_dev(pdev), "DCA enabled\n");
6041                         igb_setup_dca(adapter);
6042                         break;
6043                 }
6044                 /* Fall Through since DCA is disabled. */
6045         case DCA_PROVIDER_REMOVE:
6046                 if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
6047                         /* without this a class_device is left
6048                          * hanging around in the sysfs model */
6049                         dca_remove_requester(dev);
6050                         dev_info(pci_dev_to_dev(pdev), "DCA disabled\n");
6051                         adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
6052                         E1000_WRITE_REG(hw, E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_DISABLE);
6053                 }
6054                 break;
6055         }
6056
6057         return E1000_SUCCESS;
6058 }
6059
6060 static int igb_notify_dca(struct notifier_block *nb, unsigned long event,
6061                           void *p)
6062 {
6063         int ret_val;
6064
6065         ret_val = driver_for_each_device(&igb_driver.driver, NULL, &event,
6066                                          __igb_notify_dca);
6067
6068         return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
6069 }
6070 #endif /* IGB_DCA */
6071
6072 static int igb_vf_configure(struct igb_adapter *adapter, int vf)
6073 {
6074         unsigned char mac_addr[ETH_ALEN];
6075
6076         random_ether_addr(mac_addr);
6077         igb_set_vf_mac(adapter, vf, mac_addr);
6078
6079 #ifdef IFLA_VF_MAX
6080 #ifdef HAVE_VF_SPOOFCHK_CONFIGURE
6081         /* By default spoof check is enabled for all VFs */
6082         adapter->vf_data[vf].spoofchk_enabled = true;
6083 #endif
6084 #endif
6085
6086         return true;
6087 }
6088
6089 static void igb_ping_all_vfs(struct igb_adapter *adapter)
6090 {
6091         struct e1000_hw *hw = &adapter->hw;
6092         u32 ping;
6093         int i;
6094
6095         for (i = 0 ; i < adapter->vfs_allocated_count; i++) {
6096                 ping = E1000_PF_CONTROL_MSG;
6097                 if (adapter->vf_data[i].flags & IGB_VF_FLAG_CTS)
6098                         ping |= E1000_VT_MSGTYPE_CTS;
6099                 e1000_write_mbx(hw, &ping, 1, i);
6100         }
6101 }
6102
6103 /**
6104  *  igb_mta_set_ - Set multicast filter table address
6105  *  @adapter: pointer to the adapter structure
6106  *  @hash_value: determines the MTA register and bit to set
6107  *
6108  *  The multicast table address is a register array of 32-bit registers.
6109  *  The hash_value is used to determine what register the bit is in, the
6110  *  current value is read, the new bit is OR'd in and the new value is
6111  *  written back into the register.
6112  **/
6113 void igb_mta_set(struct igb_adapter *adapter, u32 hash_value)
6114 {
6115         struct e1000_hw *hw = &adapter->hw;
6116         u32 hash_bit, hash_reg, mta;
6117
6118         /*
6119          * The MTA is a register array of 32-bit registers. It is
6120          * treated like an array of (32*mta_reg_count) bits.  We want to
6121          * set bit BitArray[hash_value]. So we figure out what register
6122          * the bit is in, read it, OR in the new bit, then write
6123          * back the new value.  The (hw->mac.mta_reg_count - 1) serves as a
6124          * mask to bits 31:5 of the hash value which gives us the
6125          * register we're modifying.  The hash bit within that register
6126          * is determined by the lower 5 bits of the hash value.
6127          */
6128         hash_reg = (hash_value >> 5) & (hw->mac.mta_reg_count - 1);
6129         hash_bit = hash_value & 0x1F;
6130
6131         mta = E1000_READ_REG_ARRAY(hw, E1000_MTA, hash_reg);
6132
6133         mta |= (1 << hash_bit);
6134
6135         E1000_WRITE_REG_ARRAY(hw, E1000_MTA, hash_reg, mta);
6136         E1000_WRITE_FLUSH(hw);
6137 }
6138
6139 static int igb_set_vf_promisc(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
6140 {
6141
6142         struct e1000_hw *hw = &adapter->hw;
6143         u32 vmolr = E1000_READ_REG(hw, E1000_VMOLR(vf));
6144         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6145
6146         vf_data->flags &= ~(IGB_VF_FLAG_UNI_PROMISC |
6147                             IGB_VF_FLAG_MULTI_PROMISC);
6148         vmolr &= ~(E1000_VMOLR_ROPE | E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
6149
6150 #ifdef IGB_ENABLE_VF_PROMISC
6151         if (*msgbuf & E1000_VF_SET_PROMISC_UNICAST) {
6152                 vmolr |= E1000_VMOLR_ROPE;
6153                 vf_data->flags |= IGB_VF_FLAG_UNI_PROMISC;
6154                 *msgbuf &= ~E1000_VF_SET_PROMISC_UNICAST;
6155         }
6156 #endif
6157         if (*msgbuf & E1000_VF_SET_PROMISC_MULTICAST) {
6158                 vmolr |= E1000_VMOLR_MPME;
6159                 vf_data->flags |= IGB_VF_FLAG_MULTI_PROMISC;
6160                 *msgbuf &= ~E1000_VF_SET_PROMISC_MULTICAST;
6161         } else {
6162                 /*
6163                  * if we have hashes and we are clearing a multicast promisc
6164                  * flag we need to write the hashes to the MTA as this step
6165                  * was previously skipped
6166                  */
6167                 if (vf_data->num_vf_mc_hashes > 30) {
6168                         vmolr |= E1000_VMOLR_MPME;
6169                 } else if (vf_data->num_vf_mc_hashes) {
6170                         int j;
6171                         vmolr |= E1000_VMOLR_ROMPE;
6172                         for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
6173                                 igb_mta_set(adapter, vf_data->vf_mc_hashes[j]);
6174                 }
6175         }
6176
6177         E1000_WRITE_REG(hw, E1000_VMOLR(vf), vmolr);
6178
6179         /* there are flags left unprocessed, likely not supported */
6180         if (*msgbuf & E1000_VT_MSGINFO_MASK)
6181                 return -EINVAL;
6182
6183         return 0;
6184
6185 }
6186
6187 static int igb_set_vf_multicasts(struct igb_adapter *adapter,
6188                                   u32 *msgbuf, u32 vf)
6189 {
6190         int n = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
6191         u16 *hash_list = (u16 *)&msgbuf[1];
6192         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6193         int i;
6194
6195         /* salt away the number of multicast addresses assigned
6196          * to this VF for later use to restore when the PF multi cast
6197          * list changes
6198          */
6199         vf_data->num_vf_mc_hashes = n;
6200
6201         /* only up to 30 hash values supported */
6202         if (n > 30)
6203                 n = 30;
6204
6205         /* store the hashes for later use */
6206         for (i = 0; i < n; i++)
6207                 vf_data->vf_mc_hashes[i] = hash_list[i];
6208
6209         /* Flush and reset the mta with the new values */
6210         igb_set_rx_mode(adapter->netdev);
6211
6212         return 0;
6213 }
6214
6215 static void igb_restore_vf_multicasts(struct igb_adapter *adapter)
6216 {
6217         struct e1000_hw *hw = &adapter->hw;
6218         struct vf_data_storage *vf_data;
6219         int i, j;
6220
6221         for (i = 0; i < adapter->vfs_allocated_count; i++) {
6222                 u32 vmolr = E1000_READ_REG(hw, E1000_VMOLR(i));
6223                 vmolr &= ~(E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
6224
6225                 vf_data = &adapter->vf_data[i];
6226
6227                 if ((vf_data->num_vf_mc_hashes > 30) ||
6228                     (vf_data->flags & IGB_VF_FLAG_MULTI_PROMISC)) {
6229                         vmolr |= E1000_VMOLR_MPME;
6230                 } else if (vf_data->num_vf_mc_hashes) {
6231                         vmolr |= E1000_VMOLR_ROMPE;
6232                         for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
6233                                 igb_mta_set(adapter, vf_data->vf_mc_hashes[j]);
6234                 }
6235                 E1000_WRITE_REG(hw, E1000_VMOLR(i), vmolr);
6236         }
6237 }
6238
6239 static void igb_clear_vf_vfta(struct igb_adapter *adapter, u32 vf)
6240 {
6241         struct e1000_hw *hw = &adapter->hw;
6242         u32 pool_mask, reg, vid;
6243         u16 vlan_default;
6244         int i;
6245
6246         pool_mask = 1 << (E1000_VLVF_POOLSEL_SHIFT + vf);
6247
6248         /* Find the vlan filter for this id */
6249         for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
6250                 reg = E1000_READ_REG(hw, E1000_VLVF(i));
6251
6252                 /* remove the vf from the pool */
6253                 reg &= ~pool_mask;
6254
6255                 /* if pool is empty then remove entry from vfta */
6256                 if (!(reg & E1000_VLVF_POOLSEL_MASK) &&
6257                     (reg & E1000_VLVF_VLANID_ENABLE)) {
6258                         reg = 0;
6259                         vid = reg & E1000_VLVF_VLANID_MASK;
6260                         igb_vfta_set(adapter, vid, FALSE);
6261                 }
6262
6263                 E1000_WRITE_REG(hw, E1000_VLVF(i), reg);
6264         }
6265
6266         adapter->vf_data[vf].vlans_enabled = 0;
6267
6268         vlan_default = adapter->vf_data[vf].default_vf_vlan_id;
6269         if (vlan_default)
6270                 igb_vlvf_set(adapter, vlan_default, true, vf);
6271 }
6272
6273 s32 igb_vlvf_set(struct igb_adapter *adapter, u32 vid, bool add, u32 vf)
6274 {
6275         struct e1000_hw *hw = &adapter->hw;
6276         u32 reg, i;
6277
6278         /* The vlvf table only exists on 82576 hardware and newer */
6279         if (hw->mac.type < e1000_82576)
6280                 return -1;
6281
6282         /* we only need to do this if VMDq is enabled */
6283         if (!adapter->vmdq_pools)
6284                 return -1;
6285
6286         /* Find the vlan filter for this id */
6287         for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
6288                 reg = E1000_READ_REG(hw, E1000_VLVF(i));
6289                 if ((reg & E1000_VLVF_VLANID_ENABLE) &&
6290                     vid == (reg & E1000_VLVF_VLANID_MASK))
6291                         break;
6292         }
6293
6294         if (add) {
6295                 if (i == E1000_VLVF_ARRAY_SIZE) {
6296                         /* Did not find a matching VLAN ID entry that was
6297                          * enabled.  Search for a free filter entry, i.e.
6298                          * one without the enable bit set
6299                          */
6300                         for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
6301                                 reg = E1000_READ_REG(hw, E1000_VLVF(i));
6302                                 if (!(reg & E1000_VLVF_VLANID_ENABLE))
6303                                         break;
6304                         }
6305                 }
6306                 if (i < E1000_VLVF_ARRAY_SIZE) {
6307                         /* Found an enabled/available entry */
6308                         reg |= 1 << (E1000_VLVF_POOLSEL_SHIFT + vf);
6309
6310                         /* if !enabled we need to set this up in vfta */
6311                         if (!(reg & E1000_VLVF_VLANID_ENABLE)) {
6312                                 /* add VID to filter table */
6313                                 igb_vfta_set(adapter, vid, TRUE);
6314                                 reg |= E1000_VLVF_VLANID_ENABLE;
6315                         }
6316                         reg &= ~E1000_VLVF_VLANID_MASK;
6317                         reg |= vid;
6318                         E1000_WRITE_REG(hw, E1000_VLVF(i), reg);
6319
6320                         /* do not modify RLPML for PF devices */
6321                         if (vf >= adapter->vfs_allocated_count)
6322                                 return E1000_SUCCESS;
6323
6324                         if (!adapter->vf_data[vf].vlans_enabled) {
6325                                 u32 size;
6326                                 reg = E1000_READ_REG(hw, E1000_VMOLR(vf));
6327                                 size = reg & E1000_VMOLR_RLPML_MASK;
6328                                 size += 4;
6329                                 reg &= ~E1000_VMOLR_RLPML_MASK;
6330                                 reg |= size;
6331                                 E1000_WRITE_REG(hw, E1000_VMOLR(vf), reg);
6332                         }
6333
6334                         adapter->vf_data[vf].vlans_enabled++;
6335                 }
6336         } else {
6337                 if (i < E1000_VLVF_ARRAY_SIZE) {
6338                         /* remove vf from the pool */
6339                         reg &= ~(1 << (E1000_VLVF_POOLSEL_SHIFT + vf));
6340                         /* if pool is empty then remove entry from vfta */
6341                         if (!(reg & E1000_VLVF_POOLSEL_MASK)) {
6342                                 reg = 0;
6343                                 igb_vfta_set(adapter, vid, FALSE);
6344                         }
6345                         E1000_WRITE_REG(hw, E1000_VLVF(i), reg);
6346
6347                         /* do not modify RLPML for PF devices */
6348                         if (vf >= adapter->vfs_allocated_count)
6349                                 return E1000_SUCCESS;
6350
6351                         adapter->vf_data[vf].vlans_enabled--;
6352                         if (!adapter->vf_data[vf].vlans_enabled) {
6353                                 u32 size;
6354                                 reg = E1000_READ_REG(hw, E1000_VMOLR(vf));
6355                                 size = reg & E1000_VMOLR_RLPML_MASK;
6356                                 size -= 4;
6357                                 reg &= ~E1000_VMOLR_RLPML_MASK;
6358                                 reg |= size;
6359                                 E1000_WRITE_REG(hw, E1000_VMOLR(vf), reg);
6360                         }
6361                 }
6362         }
6363         return E1000_SUCCESS;
6364 }
6365
6366 #ifdef IFLA_VF_MAX
6367 static void igb_set_vmvir(struct igb_adapter *adapter, u32 vid, u32 vf)
6368 {
6369         struct e1000_hw *hw = &adapter->hw;
6370
6371         if (vid)
6372                 E1000_WRITE_REG(hw, E1000_VMVIR(vf), (vid | E1000_VMVIR_VLANA_DEFAULT));
6373         else
6374                 E1000_WRITE_REG(hw, E1000_VMVIR(vf), 0);
6375 }
6376
6377 static int igb_ndo_set_vf_vlan(struct net_device *netdev,
6378                                int vf, u16 vlan, u8 qos)
6379 {
6380         int err = 0;
6381         struct igb_adapter *adapter = netdev_priv(netdev);
6382
6383         /* VLAN IDs accepted range 0-4094 */
6384         if ((vf >= adapter->vfs_allocated_count) || (vlan > VLAN_VID_MASK-1) || (qos > 7))
6385                 return -EINVAL;
6386         if (vlan || qos) {
6387                 err = igb_vlvf_set(adapter, vlan, !!vlan, vf);
6388                 if (err)
6389                         goto out;
6390                 igb_set_vmvir(adapter, vlan | (qos << VLAN_PRIO_SHIFT), vf);
6391                 igb_set_vmolr(adapter, vf, !vlan);
6392                 adapter->vf_data[vf].pf_vlan = vlan;
6393                 adapter->vf_data[vf].pf_qos = qos;
6394                 igb_set_vf_vlan_strip(adapter, vf, true);
6395                 dev_info(&adapter->pdev->dev,
6396                          "Setting VLAN %d, QOS 0x%x on VF %d\n", vlan, qos, vf);
6397                 if (test_bit(__IGB_DOWN, &adapter->state)) {
6398                         dev_warn(&adapter->pdev->dev,
6399                                  "The VF VLAN has been set,"
6400                                  " but the PF device is not up.\n");
6401                         dev_warn(&adapter->pdev->dev,
6402                                  "Bring the PF device up before"
6403                                  " attempting to use the VF device.\n");
6404                 }
6405         } else {
6406                 if (adapter->vf_data[vf].pf_vlan)
6407                         dev_info(&adapter->pdev->dev,
6408                                  "Clearing VLAN on VF %d\n", vf);
6409                 igb_vlvf_set(adapter, adapter->vf_data[vf].pf_vlan,
6410                                    false, vf);
6411                 igb_set_vmvir(adapter, vlan, vf);
6412                 igb_set_vmolr(adapter, vf, true);
6413                 igb_set_vf_vlan_strip(adapter, vf, false);
6414                 adapter->vf_data[vf].pf_vlan = 0;
6415                 adapter->vf_data[vf].pf_qos = 0;
6416        }
6417 out:
6418        return err;
6419 }
6420
6421 #ifdef HAVE_VF_SPOOFCHK_CONFIGURE
6422 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
6423                                 bool setting)
6424 {
6425         struct igb_adapter *adapter = netdev_priv(netdev);
6426         struct e1000_hw *hw = &adapter->hw;
6427         u32 dtxswc, reg_offset;
6428
6429         if (!adapter->vfs_allocated_count)
6430                 return -EOPNOTSUPP;
6431
6432         if (vf >= adapter->vfs_allocated_count)
6433                 return -EINVAL;
6434
6435         reg_offset = (hw->mac.type == e1000_82576) ? E1000_DTXSWC : E1000_TXSWC;
6436         dtxswc = E1000_READ_REG(hw, reg_offset);
6437         if (setting)
6438                 dtxswc |= ((1 << vf) |
6439                            (1 << (vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT)));
6440         else
6441                 dtxswc &= ~((1 << vf) |
6442                             (1 << (vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT)));
6443         E1000_WRITE_REG(hw, reg_offset, dtxswc);
6444
6445         adapter->vf_data[vf].spoofchk_enabled = setting;
6446         return E1000_SUCCESS;
6447 }
6448 #endif /* HAVE_VF_SPOOFCHK_CONFIGURE */
6449 #endif /* IFLA_VF_MAX */
6450
6451 static int igb_find_vlvf_entry(struct igb_adapter *adapter, int vid)
6452 {
6453         struct e1000_hw *hw = &adapter->hw;
6454         int i;
6455         u32 reg;
6456
6457         /* Find the vlan filter for this id */
6458         for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
6459                 reg = E1000_READ_REG(hw, E1000_VLVF(i));
6460                 if ((reg & E1000_VLVF_VLANID_ENABLE) &&
6461                     vid == (reg & E1000_VLVF_VLANID_MASK))
6462                         break;
6463         }
6464
6465         if (i >= E1000_VLVF_ARRAY_SIZE)
6466                 i = -1;
6467
6468         return i;
6469 }
6470
6471 static int igb_set_vf_vlan(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
6472 {
6473         struct e1000_hw *hw = &adapter->hw;
6474         int add = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
6475         int vid = (msgbuf[1] & E1000_VLVF_VLANID_MASK);
6476         int err = 0;
6477
6478         if (vid)
6479                 igb_set_vf_vlan_strip(adapter, vf, true);
6480         else
6481                 igb_set_vf_vlan_strip(adapter, vf, false);
6482
6483         /* If in promiscuous mode we need to make sure the PF also has
6484          * the VLAN filter set.
6485          */
6486         if (add && (adapter->netdev->flags & IFF_PROMISC))
6487                 err = igb_vlvf_set(adapter, vid, add,
6488                                    adapter->vfs_allocated_count);
6489         if (err)
6490                 goto out;
6491
6492         err = igb_vlvf_set(adapter, vid, add, vf);
6493
6494         if (err)
6495                 goto out;
6496
6497         /* Go through all the checks to see if the VLAN filter should
6498          * be wiped completely.
6499          */
6500         if (!add && (adapter->netdev->flags & IFF_PROMISC)) {
6501                 u32 vlvf, bits;
6502
6503                 int regndx = igb_find_vlvf_entry(adapter, vid);
6504                 if (regndx < 0)
6505                         goto out;
6506                 /* See if any other pools are set for this VLAN filter
6507                  * entry other than the PF.
6508                  */
6509                 vlvf = bits = E1000_READ_REG(hw, E1000_VLVF(regndx));
6510                 bits &= 1 << (E1000_VLVF_POOLSEL_SHIFT +
6511                               adapter->vfs_allocated_count);
6512                 /* If the filter was removed then ensure PF pool bit
6513                  * is cleared if the PF only added itself to the pool
6514                  * because the PF is in promiscuous mode.
6515                  */
6516                 if ((vlvf & VLAN_VID_MASK) == vid &&
6517 #ifndef HAVE_VLAN_RX_REGISTER
6518                     !test_bit(vid, adapter->active_vlans) &&
6519 #endif
6520                     !bits)
6521                         igb_vlvf_set(adapter, vid, add,
6522                                      adapter->vfs_allocated_count);
6523         }
6524
6525 out:
6526         return err;
6527 }
6528
6529 static inline void igb_vf_reset(struct igb_adapter *adapter, u32 vf)
6530 {
6531         struct e1000_hw *hw = &adapter->hw;
6532
6533         /* clear flags except flag that the PF has set the MAC */
6534         adapter->vf_data[vf].flags &= IGB_VF_FLAG_PF_SET_MAC;
6535         adapter->vf_data[vf].last_nack = jiffies;
6536
6537         /* reset offloads to defaults */
6538         igb_set_vmolr(adapter, vf, true);
6539
6540         /* reset vlans for device */
6541         igb_clear_vf_vfta(adapter, vf);
6542 #ifdef IFLA_VF_MAX
6543         if (adapter->vf_data[vf].pf_vlan)
6544                 igb_ndo_set_vf_vlan(adapter->netdev, vf,
6545                                     adapter->vf_data[vf].pf_vlan,
6546                                     adapter->vf_data[vf].pf_qos);
6547         else
6548                 igb_clear_vf_vfta(adapter, vf);
6549 #endif
6550
6551         /* reset multicast table array for vf */
6552         adapter->vf_data[vf].num_vf_mc_hashes = 0;
6553
6554         /* Flush and reset the mta with the new values */
6555         igb_set_rx_mode(adapter->netdev);
6556
6557         /*
6558          * Reset the VFs TDWBAL and TDWBAH registers which are not
6559          * cleared by a VFLR
6560          */
6561         E1000_WRITE_REG(hw, E1000_TDWBAH(vf), 0);
6562         E1000_WRITE_REG(hw, E1000_TDWBAL(vf), 0);
6563         if (hw->mac.type == e1000_82576) {
6564                 E1000_WRITE_REG(hw, E1000_TDWBAH(IGB_MAX_VF_FUNCTIONS + vf), 0);
6565                 E1000_WRITE_REG(hw, E1000_TDWBAL(IGB_MAX_VF_FUNCTIONS + vf), 0);
6566         }
6567 }
6568
6569 static void igb_vf_reset_event(struct igb_adapter *adapter, u32 vf)
6570 {
6571         unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
6572
6573         /* generate a new mac address as we were hotplug removed/added */
6574         if (!(adapter->vf_data[vf].flags & IGB_VF_FLAG_PF_SET_MAC))
6575                 random_ether_addr(vf_mac);
6576
6577         /* process remaining reset events */
6578         igb_vf_reset(adapter, vf);
6579 }
6580
6581 static void igb_vf_reset_msg(struct igb_adapter *adapter, u32 vf)
6582 {
6583         struct e1000_hw *hw = &adapter->hw;
6584         unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
6585         u32 reg, msgbuf[3];
6586         u8 *addr = (u8 *)(&msgbuf[1]);
6587
6588         /* process all the same items cleared in a function level reset */
6589         igb_vf_reset(adapter, vf);
6590
6591         /* set vf mac address */
6592         igb_del_mac_filter(adapter, vf_mac, vf);
6593         igb_add_mac_filter(adapter, vf_mac, vf);
6594
6595         /* enable transmit and receive for vf */
6596         reg = E1000_READ_REG(hw, E1000_VFTE);
6597         E1000_WRITE_REG(hw, E1000_VFTE, reg | (1 << vf));
6598         reg = E1000_READ_REG(hw, E1000_VFRE);
6599         E1000_WRITE_REG(hw, E1000_VFRE, reg | (1 << vf));
6600
6601         adapter->vf_data[vf].flags |= IGB_VF_FLAG_CTS;
6602
6603         /* reply to reset with ack and vf mac address */
6604         msgbuf[0] = E1000_VF_RESET | E1000_VT_MSGTYPE_ACK;
6605         memcpy(addr, vf_mac, 6);
6606         e1000_write_mbx(hw, msgbuf, 3, vf);
6607 }
6608
6609 static int igb_set_vf_mac_addr(struct igb_adapter *adapter, u32 *msg, int vf)
6610 {
6611         /*
6612          * The VF MAC Address is stored in a packed array of bytes
6613          * starting at the second 32 bit word of the msg array
6614          */
6615         unsigned char *addr = (unsigned char *)&msg[1];
6616         int err = -1;
6617
6618         if (is_valid_ether_addr(addr))
6619                 err = igb_set_vf_mac(adapter, vf, addr);
6620
6621         return err;
6622 }
6623
6624 static void igb_rcv_ack_from_vf(struct igb_adapter *adapter, u32 vf)
6625 {
6626         struct e1000_hw *hw = &adapter->hw;
6627         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6628         u32 msg = E1000_VT_MSGTYPE_NACK;
6629
6630         /* if device isn't clear to send it shouldn't be reading either */
6631         if (!(vf_data->flags & IGB_VF_FLAG_CTS) &&
6632             time_after(jiffies, vf_data->last_nack + (2 * HZ))) {
6633                 e1000_write_mbx(hw, &msg, 1, vf);
6634                 vf_data->last_nack = jiffies;
6635         }
6636 }
6637
6638 static void igb_rcv_msg_from_vf(struct igb_adapter *adapter, u32 vf)
6639 {
6640         struct pci_dev *pdev = adapter->pdev;
6641         u32 msgbuf[E1000_VFMAILBOX_SIZE];
6642         struct e1000_hw *hw = &adapter->hw;
6643         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6644         s32 retval;
6645
6646         retval = e1000_read_mbx(hw, msgbuf, E1000_VFMAILBOX_SIZE, vf);
6647
6648         if (retval) {
6649                 dev_err(pci_dev_to_dev(pdev), "Error receiving message from VF\n");
6650                 return;
6651         }
6652
6653         /* this is a message we already processed, do nothing */
6654         if (msgbuf[0] & (E1000_VT_MSGTYPE_ACK | E1000_VT_MSGTYPE_NACK))
6655                 return;
6656
6657         /*
6658          * until the vf completes a reset it should not be
6659          * allowed to start any configuration.
6660          */
6661
6662         if (msgbuf[0] == E1000_VF_RESET) {
6663                 igb_vf_reset_msg(adapter, vf);
6664                 return;
6665         }
6666
6667         if (!(vf_data->flags & IGB_VF_FLAG_CTS)) {
6668                 msgbuf[0] = E1000_VT_MSGTYPE_NACK;
6669                 if (time_after(jiffies, vf_data->last_nack + (2 * HZ))) {
6670                         e1000_write_mbx(hw, msgbuf, 1, vf);
6671                         vf_data->last_nack = jiffies;
6672                 }
6673                 return;
6674         }
6675
6676         switch ((msgbuf[0] & 0xFFFF)) {
6677         case E1000_VF_SET_MAC_ADDR:
6678                 retval = -EINVAL;
6679 #ifndef IGB_DISABLE_VF_MAC_SET
6680                 if (!(vf_data->flags & IGB_VF_FLAG_PF_SET_MAC))
6681                         retval = igb_set_vf_mac_addr(adapter, msgbuf, vf);
6682                 else
6683                         DPRINTK(DRV, INFO,
6684                                 "VF %d attempted to override administratively "
6685                                 "set MAC address\nReload the VF driver to "
6686                                 "resume operations\n", vf);
6687 #endif
6688                 break;
6689         case E1000_VF_SET_PROMISC:
6690                 retval = igb_set_vf_promisc(adapter, msgbuf, vf);
6691                 break;
6692         case E1000_VF_SET_MULTICAST:
6693                 retval = igb_set_vf_multicasts(adapter, msgbuf, vf);
6694                 break;
6695         case E1000_VF_SET_LPE:
6696                 retval = igb_set_vf_rlpml(adapter, msgbuf[1], vf);
6697                 break;
6698         case E1000_VF_SET_VLAN:
6699                 retval = -1;
6700 #ifdef IFLA_VF_MAX
6701                 if (vf_data->pf_vlan)
6702                         DPRINTK(DRV, INFO,
6703                                 "VF %d attempted to override administratively "
6704                                 "set VLAN tag\nReload the VF driver to "
6705                                 "resume operations\n", vf);
6706                 else
6707 #endif
6708                         retval = igb_set_vf_vlan(adapter, msgbuf, vf);
6709                 break;
6710         default:
6711                 dev_err(pci_dev_to_dev(pdev), "Unhandled Msg %08x\n", msgbuf[0]);
6712                 retval = -E1000_ERR_MBX;
6713                 break;
6714         }
6715
6716         /* notify the VF of the results of what it sent us */
6717         if (retval)
6718                 msgbuf[0] |= E1000_VT_MSGTYPE_NACK;
6719         else
6720                 msgbuf[0] |= E1000_VT_MSGTYPE_ACK;
6721
6722         msgbuf[0] |= E1000_VT_MSGTYPE_CTS;
6723
6724         e1000_write_mbx(hw, msgbuf, 1, vf);
6725 }
6726
6727 static void igb_msg_task(struct igb_adapter *adapter)
6728 {
6729         struct e1000_hw *hw = &adapter->hw;
6730         u32 vf;
6731
6732         for (vf = 0; vf < adapter->vfs_allocated_count; vf++) {
6733                 /* process any reset requests */
6734                 if (!e1000_check_for_rst(hw, vf))
6735                         igb_vf_reset_event(adapter, vf);
6736
6737                 /* process any messages pending */
6738                 if (!e1000_check_for_msg(hw, vf))
6739                         igb_rcv_msg_from_vf(adapter, vf);
6740
6741                 /* process any acks */
6742                 if (!e1000_check_for_ack(hw, vf))
6743                         igb_rcv_ack_from_vf(adapter, vf);
6744         }
6745 }
6746
6747 /**
6748  *  igb_set_uta - Set unicast filter table address
6749  *  @adapter: board private structure
6750  *
6751  *  The unicast table address is a register array of 32-bit registers.
6752  *  The table is meant to be used in a way similar to how the MTA is used
6753  *  however due to certain limitations in the hardware it is necessary to
6754  *  set all the hash bits to 1 and use the VMOLR ROPE bit as a promiscuous
6755  *  enable bit to allow vlan tag stripping when promiscuous mode is enabled
6756  **/
6757 static void igb_set_uta(struct igb_adapter *adapter)
6758 {
6759         struct e1000_hw *hw = &adapter->hw;
6760         int i;
6761
6762         /* The UTA table only exists on 82576 hardware and newer */
6763         if (hw->mac.type < e1000_82576)
6764                 return;
6765
6766         /* we only need to do this if VMDq is enabled */
6767         if (!adapter->vmdq_pools)
6768                 return;
6769
6770         for (i = 0; i < hw->mac.uta_reg_count; i++)
6771                 E1000_WRITE_REG_ARRAY(hw, E1000_UTA, i, ~0);
6772 }
6773
6774 /**
6775  * igb_intr_msi - Interrupt Handler
6776  * @irq: interrupt number
6777  * @data: pointer to a network interface device structure
6778  **/
6779 static irqreturn_t igb_intr_msi(int irq, void *data)
6780 {
6781         struct igb_adapter *adapter = data;
6782         struct igb_q_vector *q_vector = adapter->q_vector[0];
6783         struct e1000_hw *hw = &adapter->hw;
6784         /* read ICR disables interrupts using IAM */
6785         u32 icr = E1000_READ_REG(hw, E1000_ICR);
6786
6787         igb_write_itr(q_vector);
6788
6789         if (icr & E1000_ICR_DRSTA)
6790                 schedule_work(&adapter->reset_task);
6791
6792         if (icr & E1000_ICR_DOUTSYNC) {
6793                 /* HW is reporting DMA is out of sync */
6794                 adapter->stats.doosync++;
6795         }
6796
6797         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
6798                 hw->mac.get_link_status = 1;
6799                 if (!test_bit(__IGB_DOWN, &adapter->state))
6800                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
6801         }
6802
6803 #ifdef HAVE_PTP_1588_CLOCK
6804         if (icr & E1000_ICR_TS) {
6805                 u32 tsicr = E1000_READ_REG(hw, E1000_TSICR);
6806
6807                 if (tsicr & E1000_TSICR_TXTS) {
6808                         /* acknowledge the interrupt */
6809                         E1000_WRITE_REG(hw, E1000_TSICR, E1000_TSICR_TXTS);
6810                         /* retrieve hardware timestamp */
6811                         schedule_work(&adapter->ptp_tx_work);
6812                 }
6813         }
6814 #endif /* HAVE_PTP_1588_CLOCK */
6815
6816         napi_schedule(&q_vector->napi);
6817
6818         return IRQ_HANDLED;
6819 }
6820
6821 /**
6822  * igb_intr - Legacy Interrupt Handler
6823  * @irq: interrupt number
6824  * @data: pointer to a network interface device structure
6825  **/
6826 static irqreturn_t igb_intr(int irq, void *data)
6827 {
6828         struct igb_adapter *adapter = data;
6829         struct igb_q_vector *q_vector = adapter->q_vector[0];
6830         struct e1000_hw *hw = &adapter->hw;
6831         /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked.  No
6832          * need for the IMC write */
6833         u32 icr = E1000_READ_REG(hw, E1000_ICR);
6834
6835         /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
6836          * not set, then the adapter didn't send an interrupt */
6837         if (!(icr & E1000_ICR_INT_ASSERTED))
6838                 return IRQ_NONE;
6839
6840         igb_write_itr(q_vector);
6841
6842         if (icr & E1000_ICR_DRSTA)
6843                 schedule_work(&adapter->reset_task);
6844
6845         if (icr & E1000_ICR_DOUTSYNC) {
6846                 /* HW is reporting DMA is out of sync */
6847                 adapter->stats.doosync++;
6848         }
6849
6850         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
6851                 hw->mac.get_link_status = 1;
6852                 /* guard against interrupt when we're going down */
6853                 if (!test_bit(__IGB_DOWN, &adapter->state))
6854                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
6855         }
6856
6857 #ifdef HAVE_PTP_1588_CLOCK
6858         if (icr & E1000_ICR_TS) {
6859                 u32 tsicr = E1000_READ_REG(hw, E1000_TSICR);
6860
6861                 if (tsicr & E1000_TSICR_TXTS) {
6862                         /* acknowledge the interrupt */
6863                         E1000_WRITE_REG(hw, E1000_TSICR, E1000_TSICR_TXTS);
6864                         /* retrieve hardware timestamp */
6865                         schedule_work(&adapter->ptp_tx_work);
6866                 }
6867         }
6868 #endif /* HAVE_PTP_1588_CLOCK */
6869
6870         napi_schedule(&q_vector->napi);
6871
6872         return IRQ_HANDLED;
6873 }
6874
6875 void igb_ring_irq_enable(struct igb_q_vector *q_vector)
6876 {
6877         struct igb_adapter *adapter = q_vector->adapter;
6878         struct e1000_hw *hw = &adapter->hw;
6879
6880         if ((q_vector->rx.ring && (adapter->rx_itr_setting & 3)) ||
6881             (!q_vector->rx.ring && (adapter->tx_itr_setting & 3))) {
6882                 if ((adapter->num_q_vectors == 1) && !adapter->vf_data)
6883                         igb_set_itr(q_vector);
6884                 else
6885                         igb_update_ring_itr(q_vector);
6886         }
6887
6888         if (!test_bit(__IGB_DOWN, &adapter->state)) {
6889                 if (adapter->msix_entries)
6890                         E1000_WRITE_REG(hw, E1000_EIMS, q_vector->eims_value);
6891                 else
6892                         igb_irq_enable(adapter);
6893         }
6894 }
6895
6896 /**
6897  * igb_poll - NAPI Rx polling callback
6898  * @napi: napi polling structure
6899  * @budget: count of how many packets we should handle
6900  **/
6901 static int igb_poll(struct napi_struct *napi, int budget)
6902 {
6903         struct igb_q_vector *q_vector = container_of(napi, struct igb_q_vector, napi);
6904         bool clean_complete = true;
6905
6906 #ifdef IGB_DCA
6907         if (q_vector->adapter->flags & IGB_FLAG_DCA_ENABLED)
6908                 igb_update_dca(q_vector);
6909 #endif
6910         if (q_vector->tx.ring)
6911                 clean_complete = igb_clean_tx_irq(q_vector);
6912
6913         if (q_vector->rx.ring)
6914                 clean_complete &= igb_clean_rx_irq(q_vector, budget);
6915
6916 #ifndef HAVE_NETDEV_NAPI_LIST
6917         /* if netdev is disabled we need to stop polling */
6918         if (!netif_running(q_vector->adapter->netdev))
6919                 clean_complete = true;
6920
6921 #endif
6922         /* If all work not completed, return budget and keep polling */
6923         if (!clean_complete)
6924                 return budget;
6925
6926         /* If not enough Rx work done, exit the polling mode */
6927         napi_complete(napi);
6928         igb_ring_irq_enable(q_vector);
6929
6930         return 0;
6931 }
6932
6933 /**
6934  * igb_clean_tx_irq - Reclaim resources after transmit completes
6935  * @q_vector: pointer to q_vector containing needed info
6936  * returns TRUE if ring is completely cleaned
6937  **/
6938 static bool igb_clean_tx_irq(struct igb_q_vector *q_vector)
6939 {
6940         struct igb_adapter *adapter = q_vector->adapter;
6941         struct igb_ring *tx_ring = q_vector->tx.ring;
6942         struct igb_tx_buffer *tx_buffer;
6943         union e1000_adv_tx_desc *tx_desc;
6944         unsigned int total_bytes = 0, total_packets = 0;
6945         unsigned int budget = q_vector->tx.work_limit;
6946         unsigned int i = tx_ring->next_to_clean;
6947
6948         if (test_bit(__IGB_DOWN, &adapter->state))
6949                 return true;
6950
6951         tx_buffer = &tx_ring->tx_buffer_info[i];
6952         tx_desc = IGB_TX_DESC(tx_ring, i);
6953         i -= tx_ring->count;
6954
6955         do {
6956                 union e1000_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
6957
6958                 /* if next_to_watch is not set then there is no work pending */
6959                 if (!eop_desc)
6960                         break;
6961
6962                 /* prevent any other reads prior to eop_desc */
6963                 read_barrier_depends();
6964
6965                 /* if DD is not set pending work has not been completed */
6966                 if (!(eop_desc->wb.status & cpu_to_le32(E1000_TXD_STAT_DD)))
6967                         break;
6968
6969                 /* clear next_to_watch to prevent false hangs */
6970                 tx_buffer->next_to_watch = NULL;
6971
6972                 /* update the statistics for this packet */
6973                 total_bytes += tx_buffer->bytecount;
6974                 total_packets += tx_buffer->gso_segs;
6975
6976                 /* free the skb */
6977                 dev_kfree_skb_any(tx_buffer->skb);
6978
6979                 /* unmap skb header data */
6980                 dma_unmap_single(tx_ring->dev,
6981                                  dma_unmap_addr(tx_buffer, dma),
6982                                  dma_unmap_len(tx_buffer, len),
6983                                  DMA_TO_DEVICE);
6984
6985                 /* clear tx_buffer data */
6986                 tx_buffer->skb = NULL;
6987                 dma_unmap_len_set(tx_buffer, len, 0);
6988
6989                 /* clear last DMA location and unmap remaining buffers */
6990                 while (tx_desc != eop_desc) {
6991                         tx_buffer++;
6992                         tx_desc++;
6993                         i++;
6994                         if (unlikely(!i)) {
6995                                 i -= tx_ring->count;
6996                                 tx_buffer = tx_ring->tx_buffer_info;
6997                                 tx_desc = IGB_TX_DESC(tx_ring, 0);
6998                         }
6999
7000                         /* unmap any remaining paged data */
7001                         if (dma_unmap_len(tx_buffer, len)) {
7002                                 dma_unmap_page(tx_ring->dev,
7003                                                dma_unmap_addr(tx_buffer, dma),
7004                                                dma_unmap_len(tx_buffer, len),
7005                                                DMA_TO_DEVICE);
7006                                 dma_unmap_len_set(tx_buffer, len, 0);
7007                         }
7008                 }
7009
7010                 /* move us one more past the eop_desc for start of next pkt */
7011                 tx_buffer++;
7012                 tx_desc++;
7013                 i++;
7014                 if (unlikely(!i)) {
7015                         i -= tx_ring->count;
7016                         tx_buffer = tx_ring->tx_buffer_info;
7017                         tx_desc = IGB_TX_DESC(tx_ring, 0);
7018                 }
7019
7020                 /* issue prefetch for next Tx descriptor */
7021                 prefetch(tx_desc);
7022
7023                 /* update budget accounting */
7024                 budget--;
7025         } while (likely(budget));
7026
7027         netdev_tx_completed_queue(txring_txq(tx_ring),
7028                                   total_packets, total_bytes);
7029
7030         i += tx_ring->count;
7031         tx_ring->next_to_clean = i;
7032         tx_ring->tx_stats.bytes += total_bytes;
7033         tx_ring->tx_stats.packets += total_packets;
7034         q_vector->tx.total_bytes += total_bytes;
7035         q_vector->tx.total_packets += total_packets;
7036
7037 #ifdef DEBUG
7038         if (test_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags) &&
7039             !(adapter->disable_hw_reset && adapter->tx_hang_detected)) {
7040 #else
7041         if (test_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags)) {
7042 #endif
7043                 struct e1000_hw *hw = &adapter->hw;
7044
7045                 /* Detect a transmit hang in hardware, this serializes the
7046                  * check with the clearing of time_stamp and movement of i */
7047                 clear_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
7048                 if (tx_buffer->next_to_watch &&
7049                     time_after(jiffies, tx_buffer->time_stamp +
7050                                (adapter->tx_timeout_factor * HZ))
7051                     && !(E1000_READ_REG(hw, E1000_STATUS) &
7052                          E1000_STATUS_TXOFF)) {
7053
7054                         /* detected Tx unit hang */
7055 #ifdef DEBUG
7056                         adapter->tx_hang_detected = TRUE;
7057                         if (adapter->disable_hw_reset) {
7058                                 DPRINTK(DRV, WARNING,
7059                                         "Deactivating netdev watchdog timer\n");
7060                                 if (del_timer(&netdev_ring(tx_ring)->watchdog_timer))
7061                                         dev_put(netdev_ring(tx_ring));
7062 #ifndef HAVE_NET_DEVICE_OPS
7063                                 netdev_ring(tx_ring)->tx_timeout = NULL;
7064 #endif
7065                         }
7066 #endif /* DEBUG */
7067                         dev_err(tx_ring->dev,
7068                                 "Detected Tx Unit Hang\n"
7069                                 "  Tx Queue             <%d>\n"
7070                                 "  TDH                  <%x>\n"
7071                                 "  TDT                  <%x>\n"
7072                                 "  next_to_use          <%x>\n"
7073                                 "  next_to_clean        <%x>\n"
7074                                 "buffer_info[next_to_clean]\n"
7075                                 "  time_stamp           <%lx>\n"
7076                                 "  next_to_watch        <%p>\n"
7077                                 "  jiffies              <%lx>\n"
7078                                 "  desc.status          <%x>\n",
7079                                 tx_ring->queue_index,
7080                                 E1000_READ_REG(hw, E1000_TDH(tx_ring->reg_idx)),
7081                                 readl(tx_ring->tail),
7082                                 tx_ring->next_to_use,
7083                                 tx_ring->next_to_clean,
7084                                 tx_buffer->time_stamp,
7085                                 tx_buffer->next_to_watch,
7086                                 jiffies,
7087                                 tx_buffer->next_to_watch->wb.status);
7088                         if (netif_is_multiqueue(netdev_ring(tx_ring)))
7089                                 netif_stop_subqueue(netdev_ring(tx_ring),
7090                                                     ring_queue_index(tx_ring));
7091                         else
7092                                 netif_stop_queue(netdev_ring(tx_ring));
7093
7094                         /* we are about to reset, no point in enabling stuff */
7095                         return true;
7096                 }
7097         }
7098
7099 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
7100         if (unlikely(total_packets &&
7101                      netif_carrier_ok(netdev_ring(tx_ring)) &&
7102                      igb_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD)) {
7103                 /* Make sure that anybody stopping the queue after this
7104                  * sees the new next_to_clean.
7105                  */
7106                 smp_mb();
7107                 if (netif_is_multiqueue(netdev_ring(tx_ring))) {
7108                         if (__netif_subqueue_stopped(netdev_ring(tx_ring),
7109                                                      ring_queue_index(tx_ring)) &&
7110                             !(test_bit(__IGB_DOWN, &adapter->state))) {
7111                                 netif_wake_subqueue(netdev_ring(tx_ring),
7112                                                     ring_queue_index(tx_ring));
7113                                 tx_ring->tx_stats.restart_queue++;
7114                         }
7115                 } else {
7116                         if (netif_queue_stopped(netdev_ring(tx_ring)) &&
7117                             !(test_bit(__IGB_DOWN, &adapter->state))) {
7118                                 netif_wake_queue(netdev_ring(tx_ring));
7119                                 tx_ring->tx_stats.restart_queue++;
7120                         }
7121                 }
7122         }
7123
7124         return !!budget;
7125 }
7126
7127 #ifdef HAVE_VLAN_RX_REGISTER
7128 /**
7129  * igb_receive_skb - helper function to handle rx indications
7130  * @q_vector: structure containing interrupt and ring information
7131  * @skb: packet to send up
7132  **/
7133 static void igb_receive_skb(struct igb_q_vector *q_vector,
7134                             struct sk_buff *skb)
7135 {
7136         struct vlan_group **vlgrp = netdev_priv(skb->dev);
7137
7138         if (IGB_CB(skb)->vid) {
7139                 if (*vlgrp) {
7140                         vlan_gro_receive(&q_vector->napi, *vlgrp,
7141                                          IGB_CB(skb)->vid, skb);
7142                 } else {
7143                         dev_kfree_skb_any(skb);
7144                 }
7145         } else {
7146                 napi_gro_receive(&q_vector->napi, skb);
7147         }
7148 }
7149
7150 #endif /* HAVE_VLAN_RX_REGISTER */
7151 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
7152 /**
7153  * igb_reuse_rx_page - page flip buffer and store it back on the ring
7154  * @rx_ring: rx descriptor ring to store buffers on
7155  * @old_buff: donor buffer to have page reused
7156  *
7157  * Synchronizes page for reuse by the adapter
7158  **/
7159 static void igb_reuse_rx_page(struct igb_ring *rx_ring,
7160                               struct igb_rx_buffer *old_buff)
7161 {
7162         struct igb_rx_buffer *new_buff;
7163         u16 nta = rx_ring->next_to_alloc;
7164
7165         new_buff = &rx_ring->rx_buffer_info[nta];
7166
7167         /* update, and store next to alloc */
7168         nta++;
7169         rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
7170
7171         /* transfer page from old buffer to new buffer */
7172         memcpy(new_buff, old_buff, sizeof(struct igb_rx_buffer));
7173
7174         /* sync the buffer for use by the device */
7175         dma_sync_single_range_for_device(rx_ring->dev, old_buff->dma,
7176                                          old_buff->page_offset,
7177                                          IGB_RX_BUFSZ,
7178                                          DMA_FROM_DEVICE);
7179 }
7180
7181 static bool igb_can_reuse_rx_page(struct igb_rx_buffer *rx_buffer,
7182                                   struct page *page,
7183                                   unsigned int truesize)
7184 {
7185         /* avoid re-using remote pages */
7186         if (unlikely(page_to_nid(page) != numa_node_id()))
7187                 return false;
7188
7189 #if (PAGE_SIZE < 8192)
7190         /* if we are only owner of page we can reuse it */
7191         if (unlikely(page_count(page) != 1))
7192                 return false;
7193
7194         /* flip page offset to other buffer */
7195         rx_buffer->page_offset ^= IGB_RX_BUFSZ;
7196
7197 #else
7198         /* move offset up to the next cache line */
7199         rx_buffer->page_offset += truesize;
7200
7201         if (rx_buffer->page_offset > (PAGE_SIZE - IGB_RX_BUFSZ))
7202                 return false;
7203 #endif
7204
7205         /* bump ref count on page before it is given to the stack */
7206         get_page(page);
7207
7208         return true;
7209 }
7210
7211 /**
7212  * igb_add_rx_frag - Add contents of Rx buffer to sk_buff
7213  * @rx_ring: rx descriptor ring to transact packets on
7214  * @rx_buffer: buffer containing page to add
7215  * @rx_desc: descriptor containing length of buffer written by hardware
7216  * @skb: sk_buff to place the data into
7217  *
7218  * This function will add the data contained in rx_buffer->page to the skb.
7219  * This is done either through a direct copy if the data in the buffer is
7220  * less than the skb header size, otherwise it will just attach the page as
7221  * a frag to the skb.
7222  *
7223  * The function will then update the page offset if necessary and return
7224  * true if the buffer can be reused by the adapter.
7225  **/
7226 static bool igb_add_rx_frag(struct igb_ring *rx_ring,
7227                             struct igb_rx_buffer *rx_buffer,
7228                             union e1000_adv_rx_desc *rx_desc,
7229                             struct sk_buff *skb)
7230 {
7231         struct page *page = rx_buffer->page;
7232         unsigned int size = le16_to_cpu(rx_desc->wb.upper.length);
7233 #if (PAGE_SIZE < 8192)
7234         unsigned int truesize = IGB_RX_BUFSZ;
7235 #else
7236         unsigned int truesize = ALIGN(size, L1_CACHE_BYTES);
7237 #endif
7238
7239         if ((size <= IGB_RX_HDR_LEN) && !skb_is_nonlinear(skb)) {
7240                 unsigned char *va = page_address(page) + rx_buffer->page_offset;
7241
7242 #ifdef HAVE_PTP_1588_CLOCK
7243                 if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP)) {
7244                         igb_ptp_rx_pktstamp(rx_ring->q_vector, va, skb);
7245                         va += IGB_TS_HDR_LEN;
7246                         size -= IGB_TS_HDR_LEN;
7247                 }
7248 #endif /* HAVE_PTP_1588_CLOCK */
7249
7250                 memcpy(__skb_put(skb, size), va, ALIGN(size, sizeof(long)));
7251
7252                 /* we can reuse buffer as-is, just make sure it is local */
7253                 if (likely(page_to_nid(page) == numa_node_id()))
7254                         return true;
7255
7256                 /* this page cannot be reused so discard it */
7257                 put_page(page);
7258                 return false;
7259         }
7260
7261         skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, page,
7262                         rx_buffer->page_offset, size, truesize);
7263
7264         return igb_can_reuse_rx_page(rx_buffer, page, truesize);
7265 }
7266
7267 static struct sk_buff *igb_fetch_rx_buffer(struct igb_ring *rx_ring,
7268                                            union e1000_adv_rx_desc *rx_desc,
7269                                            struct sk_buff *skb)
7270 {
7271         struct igb_rx_buffer *rx_buffer;
7272         struct page *page;
7273
7274         rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
7275
7276         page = rx_buffer->page;
7277         prefetchw(page);
7278
7279         if (likely(!skb)) {
7280                 void *page_addr = page_address(page) +
7281                                   rx_buffer->page_offset;
7282
7283                 /* prefetch first cache line of first page */
7284                 prefetch(page_addr);
7285 #if L1_CACHE_BYTES < 128
7286                 prefetch(page_addr + L1_CACHE_BYTES);
7287 #endif
7288
7289                 /* allocate a skb to store the frags */
7290                 skb = netdev_alloc_skb_ip_align(rx_ring->netdev,
7291                                                 IGB_RX_HDR_LEN);
7292                 if (unlikely(!skb)) {
7293                         rx_ring->rx_stats.alloc_failed++;
7294                         return NULL;
7295                 }
7296
7297                 /*
7298                  * we will be copying header into skb->data in
7299                  * pskb_may_pull so it is in our interest to prefetch
7300                  * it now to avoid a possible cache miss
7301                  */
7302                 prefetchw(skb->data);
7303         }
7304
7305         /* we are reusing so sync this buffer for CPU use */
7306         dma_sync_single_range_for_cpu(rx_ring->dev,
7307                                       rx_buffer->dma,
7308                                       rx_buffer->page_offset,
7309                                       IGB_RX_BUFSZ,
7310                                       DMA_FROM_DEVICE);
7311
7312         /* pull page into skb */
7313         if (igb_add_rx_frag(rx_ring, rx_buffer, rx_desc, skb)) {
7314                 /* hand second half of page back to the ring */
7315                 igb_reuse_rx_page(rx_ring, rx_buffer);
7316         } else {
7317                 /* we are not reusing the buffer so unmap it */
7318                 dma_unmap_page(rx_ring->dev, rx_buffer->dma,
7319                                PAGE_SIZE, DMA_FROM_DEVICE);
7320         }
7321
7322         /* clear contents of rx_buffer */
7323         rx_buffer->page = NULL;
7324
7325         return skb;
7326 }
7327
7328 #endif
7329 static inline void igb_rx_checksum(struct igb_ring *ring,
7330                                    union e1000_adv_rx_desc *rx_desc,
7331                                    struct sk_buff *skb)
7332 {
7333         skb_checksum_none_assert(skb);
7334
7335         /* Ignore Checksum bit is set */
7336         if (igb_test_staterr(rx_desc, E1000_RXD_STAT_IXSM))
7337                 return;
7338
7339         /* Rx checksum disabled via ethtool */
7340         if (!(netdev_ring(ring)->features & NETIF_F_RXCSUM))
7341                 return;
7342
7343         /* TCP/UDP checksum error bit is set */
7344         if (igb_test_staterr(rx_desc,
7345                              E1000_RXDEXT_STATERR_TCPE |
7346                              E1000_RXDEXT_STATERR_IPE)) {
7347                 /*
7348                  * work around errata with sctp packets where the TCPE aka
7349                  * L4E bit is set incorrectly on 64 byte (60 byte w/o crc)
7350                  * packets, (aka let the stack check the crc32c)
7351                  */
7352                 if (!((skb->len == 60) &&
7353                       test_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags)))
7354                         ring->rx_stats.csum_err++;
7355
7356                 /* let the stack verify checksum errors */
7357                 return;
7358         }
7359         /* It must be a TCP or UDP packet with a valid checksum */
7360         if (igb_test_staterr(rx_desc, E1000_RXD_STAT_TCPCS |
7361                                       E1000_RXD_STAT_UDPCS))
7362                 skb->ip_summed = CHECKSUM_UNNECESSARY;
7363 }
7364
7365 #ifdef NETIF_F_RXHASH
7366 static inline void igb_rx_hash(struct igb_ring *ring,
7367                                union e1000_adv_rx_desc *rx_desc,
7368                                struct sk_buff *skb)
7369 {
7370         if (netdev_ring(ring)->features & NETIF_F_RXHASH)
7371                 skb_set_hash(skb, le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
7372                              PKT_HASH_TYPE_L3);
7373 }
7374
7375 #endif
7376 #ifndef IGB_NO_LRO
7377 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
7378 /**
7379  * igb_merge_active_tail - merge active tail into lro skb
7380  * @tail: pointer to active tail in frag_list
7381  *
7382  * This function merges the length and data of an active tail into the
7383  * skb containing the frag_list.  It resets the tail's pointer to the head,
7384  * but it leaves the heads pointer to tail intact.
7385  **/
7386 static inline struct sk_buff *igb_merge_active_tail(struct sk_buff *tail)
7387 {
7388         struct sk_buff *head = IGB_CB(tail)->head;
7389
7390         if (!head)
7391                 return tail;
7392
7393         head->len += tail->len;
7394         head->data_len += tail->len;
7395         head->truesize += tail->len;
7396
7397         IGB_CB(tail)->head = NULL;
7398
7399         return head;
7400 }
7401
7402 /**
7403  * igb_add_active_tail - adds an active tail into the skb frag_list
7404  * @head: pointer to the start of the skb
7405  * @tail: pointer to active tail to add to frag_list
7406  *
7407  * This function adds an active tail to the end of the frag list.  This tail
7408  * will still be receiving data so we cannot yet ad it's stats to the main
7409  * skb.  That is done via igb_merge_active_tail.
7410  **/
7411 static inline void igb_add_active_tail(struct sk_buff *head, struct sk_buff *tail)
7412 {
7413         struct sk_buff *old_tail = IGB_CB(head)->tail;
7414
7415         if (old_tail) {
7416                 igb_merge_active_tail(old_tail);
7417                 old_tail->next = tail;
7418         } else {
7419                 skb_shinfo(head)->frag_list = tail;
7420         }
7421
7422         IGB_CB(tail)->head = head;
7423         IGB_CB(head)->tail = tail;
7424
7425         IGB_CB(head)->append_cnt++;
7426 }
7427
7428 /**
7429  * igb_close_active_frag_list - cleanup pointers on a frag_list skb
7430  * @head: pointer to head of an active frag list
7431  *
7432  * This function will clear the frag_tail_tracker pointer on an active
7433  * frag_list and returns true if the pointer was actually set
7434  **/
7435 static inline bool igb_close_active_frag_list(struct sk_buff *head)
7436 {
7437         struct sk_buff *tail = IGB_CB(head)->tail;
7438
7439         if (!tail)
7440                 return false;
7441
7442         igb_merge_active_tail(tail);
7443
7444         IGB_CB(head)->tail = NULL;
7445
7446         return true;
7447 }
7448
7449 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
7450 /**
7451  * igb_can_lro - returns true if packet is TCP/IPV4 and LRO is enabled
7452  * @adapter: board private structure
7453  * @rx_desc: pointer to the rx descriptor
7454  * @skb: pointer to the skb to be merged
7455  *
7456  **/
7457 static inline bool igb_can_lro(struct igb_ring *rx_ring,
7458                                union e1000_adv_rx_desc *rx_desc,
7459                                struct sk_buff *skb)
7460 {
7461         struct iphdr *iph = (struct iphdr *)skb->data;
7462         __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
7463
7464         /* verify hardware indicates this is IPv4/TCP */
7465         if((!(pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_TCP)) ||
7466             !(pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_IPV4))))
7467                 return false;
7468
7469         /* .. and LRO is enabled */
7470         if (!(netdev_ring(rx_ring)->features & NETIF_F_LRO))
7471                 return false;
7472
7473         /* .. and we are not in promiscuous mode */
7474         if (netdev_ring(rx_ring)->flags & IFF_PROMISC)
7475                 return false;
7476
7477         /* .. and the header is large enough for us to read IP/TCP fields */
7478         if (!pskb_may_pull(skb, sizeof(struct igb_lrohdr)))
7479                 return false;
7480
7481         /* .. and there are no VLANs on packet */
7482         if (skb->protocol != __constant_htons(ETH_P_IP))
7483                 return false;
7484
7485         /* .. and we are version 4 with no options */
7486         if (*(u8 *)iph != 0x45)
7487                 return false;
7488
7489         /* .. and the packet is not fragmented */
7490         if (iph->frag_off & htons(IP_MF | IP_OFFSET))
7491                 return false;
7492
7493         /* .. and that next header is TCP */
7494         if (iph->protocol != IPPROTO_TCP)
7495                 return false;
7496
7497         return true;
7498 }
7499
7500 static inline struct igb_lrohdr *igb_lro_hdr(struct sk_buff *skb)
7501 {
7502         return (struct igb_lrohdr *)skb->data;
7503 }
7504
7505 /**
7506  * igb_lro_flush - Indicate packets to upper layer.
7507  *
7508  * Update IP and TCP header part of head skb if more than one
7509  * skb's chained and indicate packets to upper layer.
7510  **/
7511 static void igb_lro_flush(struct igb_q_vector *q_vector,
7512                           struct sk_buff *skb)
7513 {
7514         struct igb_lro_list *lrolist = &q_vector->lrolist;
7515
7516         __skb_unlink(skb, &lrolist->active);
7517
7518         if (IGB_CB(skb)->append_cnt) {
7519                 struct igb_lrohdr *lroh = igb_lro_hdr(skb);
7520
7521 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
7522                 /* close any active lro contexts */
7523                 igb_close_active_frag_list(skb);
7524
7525 #endif
7526                 /* incorporate ip header and re-calculate checksum */
7527                 lroh->iph.tot_len = ntohs(skb->len);
7528                 lroh->iph.check = 0;
7529
7530                 /* header length is 5 since we know no options exist */
7531                 lroh->iph.check = ip_fast_csum((u8 *)lroh, 5);
7532
7533                 /* clear TCP checksum to indicate we are an LRO frame */
7534                 lroh->th.check = 0;
7535
7536                 /* incorporate latest timestamp into the tcp header */
7537                 if (IGB_CB(skb)->tsecr) {
7538                         lroh->ts[2] = IGB_CB(skb)->tsecr;
7539                         lroh->ts[1] = htonl(IGB_CB(skb)->tsval);
7540                 }
7541 #ifdef NETIF_F_GSO
7542
7543                 skb_shinfo(skb)->gso_size = IGB_CB(skb)->mss;
7544                 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
7545 #endif
7546         }
7547
7548 #ifdef HAVE_VLAN_RX_REGISTER
7549         igb_receive_skb(q_vector, skb);
7550 #else
7551         napi_gro_receive(&q_vector->napi, skb);
7552 #endif
7553         lrolist->stats.flushed++;
7554 }
7555
7556 static void igb_lro_flush_all(struct igb_q_vector *q_vector)
7557 {
7558         struct igb_lro_list *lrolist = &q_vector->lrolist;
7559         struct sk_buff *skb, *tmp;
7560
7561         skb_queue_reverse_walk_safe(&lrolist->active, skb, tmp)
7562                 igb_lro_flush(q_vector, skb);
7563 }
7564
7565 /*
7566  * igb_lro_header_ok - Main LRO function.
7567  **/
7568 static void igb_lro_header_ok(struct sk_buff *skb)
7569 {
7570         struct igb_lrohdr *lroh = igb_lro_hdr(skb);
7571         u16 opt_bytes, data_len;
7572
7573 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
7574         IGB_CB(skb)->tail = NULL;
7575 #endif
7576         IGB_CB(skb)->tsecr = 0;
7577         IGB_CB(skb)->append_cnt = 0;
7578         IGB_CB(skb)->mss = 0;
7579
7580         /* ensure that the checksum is valid */
7581         if (skb->ip_summed != CHECKSUM_UNNECESSARY)
7582                 return;
7583
7584         /* If we see CE codepoint in IP header, packet is not mergeable */
7585         if (INET_ECN_is_ce(ipv4_get_dsfield(&lroh->iph)))
7586                 return;
7587
7588         /* ensure no bits set besides ack or psh */
7589         if (lroh->th.fin || lroh->th.syn || lroh->th.rst ||
7590             lroh->th.urg || lroh->th.ece || lroh->th.cwr ||
7591             !lroh->th.ack)
7592                 return;
7593
7594         /* store the total packet length */
7595         data_len = ntohs(lroh->iph.tot_len);
7596
7597         /* remove any padding from the end of the skb */
7598         __pskb_trim(skb, data_len);
7599
7600         /* remove header length from data length */
7601         data_len -= sizeof(struct igb_lrohdr);
7602
7603         /*
7604          * check for timestamps. Since the only option we handle are timestamps,
7605          * we only have to handle the simple case of aligned timestamps
7606          */
7607         opt_bytes = (lroh->th.doff << 2) - sizeof(struct tcphdr);
7608         if (opt_bytes != 0) {
7609                 if ((opt_bytes != TCPOLEN_TSTAMP_ALIGNED) ||
7610                     !pskb_may_pull(skb, sizeof(struct igb_lrohdr) +
7611                                         TCPOLEN_TSTAMP_ALIGNED) ||
7612                     (lroh->ts[0] != htonl((TCPOPT_NOP << 24) |
7613                                              (TCPOPT_NOP << 16) |
7614                                              (TCPOPT_TIMESTAMP << 8) |
7615                                               TCPOLEN_TIMESTAMP)) ||
7616                     (lroh->ts[2] == 0)) {
7617                         return;
7618                 }
7619
7620                 IGB_CB(skb)->tsval = ntohl(lroh->ts[1]);
7621                 IGB_CB(skb)->tsecr = lroh->ts[2];
7622
7623                 data_len -= TCPOLEN_TSTAMP_ALIGNED;
7624         }
7625
7626         /* record data_len as mss for the packet */
7627         IGB_CB(skb)->mss = data_len;
7628         IGB_CB(skb)->next_seq = ntohl(lroh->th.seq);
7629 }
7630
7631 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
7632 static void igb_merge_frags(struct sk_buff *lro_skb, struct sk_buff *new_skb)
7633 {
7634         struct skb_shared_info *sh_info;
7635         struct skb_shared_info *new_skb_info;
7636         unsigned int data_len;
7637
7638         sh_info = skb_shinfo(lro_skb);
7639         new_skb_info = skb_shinfo(new_skb);
7640
7641         /* copy frags into the last skb */
7642         memcpy(sh_info->frags + sh_info->nr_frags,
7643                new_skb_info->frags,
7644                new_skb_info->nr_frags * sizeof(skb_frag_t));
7645
7646         /* copy size data over */
7647         sh_info->nr_frags += new_skb_info->nr_frags;
7648         data_len = IGB_CB(new_skb)->mss;
7649         lro_skb->len += data_len;
7650         lro_skb->data_len += data_len;
7651         lro_skb->truesize += data_len;
7652
7653         /* wipe record of data from new_skb */
7654         new_skb_info->nr_frags = 0;
7655         new_skb->len = new_skb->data_len = 0;
7656         dev_kfree_skb_any(new_skb);
7657 }
7658
7659 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
7660 /**
7661  * igb_lro_receive - if able, queue skb into lro chain
7662  * @q_vector: structure containing interrupt and ring information
7663  * @new_skb: pointer to current skb being checked
7664  *
7665  * Checks whether the skb given is eligible for LRO and if that's
7666  * fine chains it to the existing lro_skb based on flowid. If an LRO for
7667  * the flow doesn't exist create one.
7668  **/
7669 static void igb_lro_receive(struct igb_q_vector *q_vector,
7670                             struct sk_buff *new_skb)
7671 {
7672         struct sk_buff *lro_skb;
7673         struct igb_lro_list *lrolist = &q_vector->lrolist;
7674         struct igb_lrohdr *lroh = igb_lro_hdr(new_skb);
7675         __be32 saddr = lroh->iph.saddr;
7676         __be32 daddr = lroh->iph.daddr;
7677         __be32 tcp_ports = *(__be32 *)&lroh->th;
7678         u16 data_len;
7679 #ifdef HAVE_VLAN_RX_REGISTER
7680         u16 vid = IGB_CB(new_skb)->vid;
7681 #else
7682         u16 vid = new_skb->vlan_tci;
7683 #endif
7684
7685         igb_lro_header_ok(new_skb);
7686
7687         /*
7688          * we have a packet that might be eligible for LRO,
7689          * so see if it matches anything we might expect
7690          */
7691         skb_queue_walk(&lrolist->active, lro_skb) {
7692                 if (*(__be32 *)&igb_lro_hdr(lro_skb)->th != tcp_ports ||
7693                     igb_lro_hdr(lro_skb)->iph.saddr != saddr ||
7694                     igb_lro_hdr(lro_skb)->iph.daddr != daddr)
7695                         continue;
7696
7697 #ifdef HAVE_VLAN_RX_REGISTER
7698                 if (IGB_CB(lro_skb)->vid != vid)
7699 #else
7700                 if (lro_skb->vlan_tci != vid)
7701 #endif
7702                         continue;
7703
7704                 /* out of order packet */
7705                 if (IGB_CB(lro_skb)->next_seq != IGB_CB(new_skb)->next_seq) {
7706                         igb_lro_flush(q_vector, lro_skb);
7707                         IGB_CB(new_skb)->mss = 0;
7708                         break;
7709                 }
7710
7711                 /* TCP timestamp options have changed */
7712                 if (!IGB_CB(lro_skb)->tsecr != !IGB_CB(new_skb)->tsecr) {
7713                         igb_lro_flush(q_vector, lro_skb);
7714                         break;
7715                 }
7716
7717                 /* make sure timestamp values are increasing */
7718                 if (IGB_CB(lro_skb)->tsecr &&
7719                     IGB_CB(lro_skb)->tsval > IGB_CB(new_skb)->tsval) {
7720                         igb_lro_flush(q_vector, lro_skb);
7721                         IGB_CB(new_skb)->mss = 0;
7722                         break;
7723                 }
7724
7725                 data_len = IGB_CB(new_skb)->mss;
7726
7727                 /* Check for all of the above below
7728                  *   malformed header
7729                  *   no tcp data
7730                  *   resultant packet would be too large
7731                  *   new skb is larger than our current mss
7732                  *   data would remain in header
7733                  *   we would consume more frags then the sk_buff contains
7734                  *   ack sequence numbers changed
7735                  *   window size has changed
7736                  */
7737                 if (data_len == 0 ||
7738                     data_len > IGB_CB(lro_skb)->mss ||
7739                     data_len > IGB_CB(lro_skb)->free ||
7740 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
7741                     data_len != new_skb->data_len ||
7742                     skb_shinfo(new_skb)->nr_frags >=
7743                     (MAX_SKB_FRAGS - skb_shinfo(lro_skb)->nr_frags) ||
7744 #endif
7745                     igb_lro_hdr(lro_skb)->th.ack_seq != lroh->th.ack_seq ||
7746                     igb_lro_hdr(lro_skb)->th.window != lroh->th.window) {
7747                         igb_lro_flush(q_vector, lro_skb);
7748                         break;
7749                 }
7750
7751                 /* Remove IP and TCP header*/
7752                 skb_pull(new_skb, new_skb->len - data_len);
7753
7754                 /* update timestamp and timestamp echo response */
7755                 IGB_CB(lro_skb)->tsval = IGB_CB(new_skb)->tsval;
7756                 IGB_CB(lro_skb)->tsecr = IGB_CB(new_skb)->tsecr;
7757
7758                 /* update sequence and free space */
7759                 IGB_CB(lro_skb)->next_seq += data_len;
7760                 IGB_CB(lro_skb)->free -= data_len;
7761
7762                 /* update append_cnt */
7763                 IGB_CB(lro_skb)->append_cnt++;
7764
7765 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
7766                 /* if header is empty pull pages into current skb */
7767                 igb_merge_frags(lro_skb, new_skb);
7768 #else
7769                 /* chain this new skb in frag_list */
7770                 igb_add_active_tail(lro_skb, new_skb);
7771 #endif
7772
7773                 if ((data_len < IGB_CB(lro_skb)->mss) || lroh->th.psh ||
7774                     skb_shinfo(lro_skb)->nr_frags == MAX_SKB_FRAGS) {
7775                         igb_lro_hdr(lro_skb)->th.psh |= lroh->th.psh;
7776                         igb_lro_flush(q_vector, lro_skb);
7777                 }
7778
7779                 lrolist->stats.coal++;
7780                 return;
7781         }
7782
7783         if (IGB_CB(new_skb)->mss && !lroh->th.psh) {
7784                 /* if we are at capacity flush the tail */
7785                 if (skb_queue_len(&lrolist->active) >= IGB_LRO_MAX) {
7786                         lro_skb = skb_peek_tail(&lrolist->active);
7787                         if (lro_skb)
7788                                 igb_lro_flush(q_vector, lro_skb);
7789                 }
7790
7791                 /* update sequence and free space */
7792                 IGB_CB(new_skb)->next_seq += IGB_CB(new_skb)->mss;
7793                 IGB_CB(new_skb)->free = 65521 - new_skb->len;
7794
7795                 /* .. and insert at the front of the active list */
7796                 __skb_queue_head(&lrolist->active, new_skb);
7797
7798                 lrolist->stats.coal++;
7799                 return;
7800         }
7801
7802         /* packet not handled by any of the above, pass it to the stack */
7803 #ifdef HAVE_VLAN_RX_REGISTER
7804         igb_receive_skb(q_vector, new_skb);
7805 #else
7806         napi_gro_receive(&q_vector->napi, new_skb);
7807 #endif
7808 }
7809
7810 #endif /* IGB_NO_LRO */
7811 /**
7812  * igb_process_skb_fields - Populate skb header fields from Rx descriptor
7813  * @rx_ring: rx descriptor ring packet is being transacted on
7814  * @rx_desc: pointer to the EOP Rx descriptor
7815  * @skb: pointer to current skb being populated
7816  *
7817  * This function checks the ring, descriptor, and packet information in
7818  * order to populate the hash, checksum, VLAN, timestamp, protocol, and
7819  * other fields within the skb.
7820  **/
7821 static void igb_process_skb_fields(struct igb_ring *rx_ring,
7822                                    union e1000_adv_rx_desc *rx_desc,
7823                                    struct sk_buff *skb)
7824 {
7825         struct net_device *dev = rx_ring->netdev;
7826         __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
7827
7828 #ifdef NETIF_F_RXHASH
7829         igb_rx_hash(rx_ring, rx_desc, skb);
7830
7831 #endif
7832         igb_rx_checksum(rx_ring, rx_desc, skb);
7833
7834     /* update packet type stats */
7835         if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_IPV4))
7836                 rx_ring->rx_stats.ipv4_packets++;
7837         else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_IPV4_EX))
7838                 rx_ring->rx_stats.ipv4e_packets++;
7839         else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_IPV6))
7840                 rx_ring->rx_stats.ipv6_packets++;
7841         else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_IPV6_EX))
7842                 rx_ring->rx_stats.ipv6e_packets++;
7843         else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_TCP))
7844                 rx_ring->rx_stats.tcp_packets++;
7845         else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_UDP))
7846                 rx_ring->rx_stats.udp_packets++;
7847         else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_SCTP))
7848                 rx_ring->rx_stats.sctp_packets++;
7849         else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_NFS))
7850                 rx_ring->rx_stats.nfs_packets++;
7851
7852 #ifdef HAVE_PTP_1588_CLOCK
7853         igb_ptp_rx_hwtstamp(rx_ring, rx_desc, skb);
7854 #endif /* HAVE_PTP_1588_CLOCK */
7855
7856 #ifdef NETIF_F_HW_VLAN_CTAG_RX
7857         if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
7858 #else
7859         if ((dev->features & NETIF_F_HW_VLAN_RX) &&
7860 #endif
7861             igb_test_staterr(rx_desc, E1000_RXD_STAT_VP)) {
7862                 u16 vid = 0;
7863                 if (igb_test_staterr(rx_desc, E1000_RXDEXT_STATERR_LB) &&
7864                     test_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &rx_ring->flags))
7865                         vid = be16_to_cpu(rx_desc->wb.upper.vlan);
7866                 else
7867                         vid = le16_to_cpu(rx_desc->wb.upper.vlan);
7868 #ifdef HAVE_VLAN_RX_REGISTER
7869                 IGB_CB(skb)->vid = vid;
7870         } else {
7871                 IGB_CB(skb)->vid = 0;
7872 #else
7873
7874 #ifdef HAVE_VLAN_PROTOCOL
7875                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
7876 #else
7877                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
7878 #endif
7879
7880
7881 #endif
7882         }
7883
7884         skb_record_rx_queue(skb, rx_ring->queue_index);
7885
7886         skb->protocol = eth_type_trans(skb, dev);
7887 }
7888
7889 /**
7890  * igb_is_non_eop - process handling of non-EOP buffers
7891  * @rx_ring: Rx ring being processed
7892  * @rx_desc: Rx descriptor for current buffer
7893  *
7894  * This function updates next to clean.  If the buffer is an EOP buffer
7895  * this function exits returning false, otherwise it will place the
7896  * sk_buff in the next buffer to be chained and return true indicating
7897  * that this is in fact a non-EOP buffer.
7898  **/
7899 static bool igb_is_non_eop(struct igb_ring *rx_ring,
7900                            union e1000_adv_rx_desc *rx_desc)
7901 {
7902         u32 ntc = rx_ring->next_to_clean + 1;
7903
7904         /* fetch, update, and store next to clean */
7905         ntc = (ntc < rx_ring->count) ? ntc : 0;
7906         rx_ring->next_to_clean = ntc;
7907
7908         prefetch(IGB_RX_DESC(rx_ring, ntc));
7909
7910         if (likely(igb_test_staterr(rx_desc, E1000_RXD_STAT_EOP)))
7911                 return false;
7912
7913         return true;
7914 }
7915
7916 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
7917 /* igb_clean_rx_irq -- * legacy */
7918 static bool igb_clean_rx_irq(struct igb_q_vector *q_vector, int budget)
7919 {
7920         struct igb_ring *rx_ring = q_vector->rx.ring;
7921         unsigned int total_bytes = 0, total_packets = 0;
7922         u16 cleaned_count = igb_desc_unused(rx_ring);
7923
7924         do {
7925                 struct igb_rx_buffer *rx_buffer;
7926                 union e1000_adv_rx_desc *rx_desc;
7927                 struct sk_buff *skb;
7928                 u16 ntc;
7929
7930                 /* return some buffers to hardware, one at a time is too slow */
7931                 if (cleaned_count >= IGB_RX_BUFFER_WRITE) {
7932                         igb_alloc_rx_buffers(rx_ring, cleaned_count);
7933                         cleaned_count = 0;
7934                 }
7935
7936                 ntc = rx_ring->next_to_clean;
7937                 rx_desc = IGB_RX_DESC(rx_ring, ntc);
7938                 rx_buffer = &rx_ring->rx_buffer_info[ntc];
7939
7940                 if (!igb_test_staterr(rx_desc, E1000_RXD_STAT_DD))
7941                         break;
7942
7943                 /*
7944                  * This memory barrier is needed to keep us from reading
7945                  * any other fields out of the rx_desc until we know the
7946                  * RXD_STAT_DD bit is set
7947                  */
7948                 rmb();
7949
7950                 skb = rx_buffer->skb;
7951
7952                 prefetch(skb->data);
7953
7954                 /* pull the header of the skb in */
7955                 __skb_put(skb, le16_to_cpu(rx_desc->wb.upper.length));
7956
7957                 /* clear skb reference in buffer info structure */
7958                 rx_buffer->skb = NULL;
7959
7960                 cleaned_count++;
7961
7962                 BUG_ON(igb_is_non_eop(rx_ring, rx_desc));
7963
7964                 dma_unmap_single(rx_ring->dev, rx_buffer->dma,
7965                                  rx_ring->rx_buffer_len,
7966                                  DMA_FROM_DEVICE);
7967                 rx_buffer->dma = 0;
7968
7969                 if (igb_test_staterr(rx_desc,
7970                                      E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
7971                         dev_kfree_skb_any(skb);
7972                         continue;
7973                 }
7974
7975                 total_bytes += skb->len;
7976
7977                 /* populate checksum, timestamp, VLAN, and protocol */
7978                 igb_process_skb_fields(rx_ring, rx_desc, skb);
7979
7980 #ifndef IGB_NO_LRO
7981                 if (igb_can_lro(rx_ring, rx_desc, skb))
7982                         igb_lro_receive(q_vector, skb);
7983                 else
7984 #endif
7985 #ifdef HAVE_VLAN_RX_REGISTER
7986                         igb_receive_skb(q_vector, skb);
7987 #else
7988                         napi_gro_receive(&q_vector->napi, skb);
7989 #endif
7990
7991 #ifndef NETIF_F_GRO
7992                 netdev_ring(rx_ring)->last_rx = jiffies;
7993
7994 #endif
7995                 /* update budget accounting */
7996                 total_packets++;
7997         } while (likely(total_packets < budget));
7998
7999         rx_ring->rx_stats.packets += total_packets;
8000         rx_ring->rx_stats.bytes += total_bytes;
8001         q_vector->rx.total_packets += total_packets;
8002         q_vector->rx.total_bytes += total_bytes;
8003
8004         if (cleaned_count)
8005                 igb_alloc_rx_buffers(rx_ring, cleaned_count);
8006
8007 #ifndef IGB_NO_LRO
8008         igb_lro_flush_all(q_vector);
8009
8010 #endif /* IGB_NO_LRO */
8011         return (total_packets < budget);
8012 }
8013 #else /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
8014 /**
8015  * igb_get_headlen - determine size of header for LRO/GRO
8016  * @data: pointer to the start of the headers
8017  * @max_len: total length of section to find headers in
8018  *
8019  * This function is meant to determine the length of headers that will
8020  * be recognized by hardware for LRO, and GRO offloads.  The main
8021  * motivation of doing this is to only perform one pull for IPv4 TCP
8022  * packets so that we can do basic things like calculating the gso_size
8023  * based on the average data per packet.
8024  **/
8025 static unsigned int igb_get_headlen(unsigned char *data,
8026                                     unsigned int max_len)
8027 {
8028         union {
8029                 unsigned char *network;
8030                 /* l2 headers */
8031                 struct ethhdr *eth;
8032                 struct vlan_hdr *vlan;
8033                 /* l3 headers */
8034                 struct iphdr *ipv4;
8035                 struct ipv6hdr *ipv6;
8036         } hdr;
8037         __be16 protocol;
8038         u8 nexthdr = 0; /* default to not TCP */
8039         u8 hlen;
8040
8041         /* this should never happen, but better safe than sorry */
8042         if (max_len < ETH_HLEN)
8043                 return max_len;
8044
8045         /* initialize network frame pointer */
8046         hdr.network = data;
8047
8048         /* set first protocol and move network header forward */
8049         protocol = hdr.eth->h_proto;
8050         hdr.network += ETH_HLEN;
8051
8052         /* handle any vlan tag if present */
8053         if (protocol == __constant_htons(ETH_P_8021Q)) {
8054                 if ((hdr.network - data) > (max_len - VLAN_HLEN))
8055                         return max_len;
8056
8057                 protocol = hdr.vlan->h_vlan_encapsulated_proto;
8058                 hdr.network += VLAN_HLEN;
8059         }
8060
8061         /* handle L3 protocols */
8062         if (protocol == __constant_htons(ETH_P_IP)) {
8063                 if ((hdr.network - data) > (max_len - sizeof(struct iphdr)))
8064                         return max_len;
8065
8066                 /* access ihl as a u8 to avoid unaligned access on ia64 */
8067                 hlen = (hdr.network[0] & 0x0F) << 2;
8068
8069                 /* verify hlen meets minimum size requirements */
8070                 if (hlen < sizeof(struct iphdr))
8071                         return hdr.network - data;
8072
8073                 /* record next protocol if header is present */
8074                 if (!(hdr.ipv4->frag_off & htons(IP_OFFSET)))
8075                         nexthdr = hdr.ipv4->protocol;
8076 #ifdef NETIF_F_TSO6
8077         } else if (protocol == __constant_htons(ETH_P_IPV6)) {
8078                 if ((hdr.network - data) > (max_len - sizeof(struct ipv6hdr)))
8079                         return max_len;
8080
8081                 /* record next protocol */
8082                 nexthdr = hdr.ipv6->nexthdr;
8083                 hlen = sizeof(struct ipv6hdr);
8084 #endif /* NETIF_F_TSO6 */
8085         } else {
8086                 return hdr.network - data;
8087         }
8088
8089         /* relocate pointer to start of L4 header */
8090         hdr.network += hlen;
8091
8092         /* finally sort out TCP */
8093         if (nexthdr == IPPROTO_TCP) {
8094                 if ((hdr.network - data) > (max_len - sizeof(struct tcphdr)))
8095                         return max_len;
8096
8097                 /* access doff as a u8 to avoid unaligned access on ia64 */
8098                 hlen = (hdr.network[12] & 0xF0) >> 2;
8099
8100                 /* verify hlen meets minimum size requirements */
8101                 if (hlen < sizeof(struct tcphdr))
8102                         return hdr.network - data;
8103
8104                 hdr.network += hlen;
8105         } else if (nexthdr == IPPROTO_UDP) {
8106                 if ((hdr.network - data) > (max_len - sizeof(struct udphdr)))
8107                         return max_len;
8108
8109                 hdr.network += sizeof(struct udphdr);
8110         }
8111
8112         /*
8113          * If everything has gone correctly hdr.network should be the
8114          * data section of the packet and will be the end of the header.
8115          * If not then it probably represents the end of the last recognized
8116          * header.
8117          */
8118         if ((hdr.network - data) < max_len)
8119                 return hdr.network - data;
8120         else
8121                 return max_len;
8122 }
8123
8124 /**
8125  * igb_pull_tail - igb specific version of skb_pull_tail
8126  * @rx_ring: rx descriptor ring packet is being transacted on
8127  * @rx_desc: pointer to the EOP Rx descriptor
8128  * @skb: pointer to current skb being adjusted
8129  *
8130  * This function is an igb specific version of __pskb_pull_tail.  The
8131  * main difference between this version and the original function is that
8132  * this function can make several assumptions about the state of things
8133  * that allow for significant optimizations versus the standard function.
8134  * As a result we can do things like drop a frag and maintain an accurate
8135  * truesize for the skb.
8136  */
8137 static void igb_pull_tail(struct igb_ring *rx_ring,
8138                           union e1000_adv_rx_desc *rx_desc,
8139                           struct sk_buff *skb)
8140 {
8141         struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
8142         unsigned char *va;
8143         unsigned int pull_len;
8144
8145         /*
8146          * it is valid to use page_address instead of kmap since we are
8147          * working with pages allocated out of the lomem pool per
8148          * alloc_page(GFP_ATOMIC)
8149          */
8150         va = skb_frag_address(frag);
8151
8152 #ifdef HAVE_PTP_1588_CLOCK
8153         if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP)) {
8154                 /* retrieve timestamp from buffer */
8155                 igb_ptp_rx_pktstamp(rx_ring->q_vector, va, skb);
8156
8157                 /* update pointers to remove timestamp header */
8158                 skb_frag_size_sub(frag, IGB_TS_HDR_LEN);
8159                 frag->page_offset += IGB_TS_HDR_LEN;
8160                 skb->data_len -= IGB_TS_HDR_LEN;
8161                 skb->len -= IGB_TS_HDR_LEN;
8162
8163                 /* move va to start of packet data */
8164                 va += IGB_TS_HDR_LEN;
8165         }
8166 #endif /* HAVE_PTP_1588_CLOCK */
8167
8168         /*
8169          * we need the header to contain the greater of either ETH_HLEN or
8170          * 60 bytes if the skb->len is less than 60 for skb_pad.
8171          */
8172         pull_len = igb_get_headlen(va, IGB_RX_HDR_LEN);
8173
8174         /* align pull length to size of long to optimize memcpy performance */
8175         skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long)));
8176
8177         /* update all of the pointers */
8178         skb_frag_size_sub(frag, pull_len);
8179         frag->page_offset += pull_len;
8180         skb->data_len -= pull_len;
8181         skb->tail += pull_len;
8182 }
8183
8184 /**
8185  * igb_cleanup_headers - Correct corrupted or empty headers
8186  * @rx_ring: rx descriptor ring packet is being transacted on
8187  * @rx_desc: pointer to the EOP Rx descriptor
8188  * @skb: pointer to current skb being fixed
8189  *
8190  * Address the case where we are pulling data in on pages only
8191  * and as such no data is present in the skb header.
8192  *
8193  * In addition if skb is not at least 60 bytes we need to pad it so that
8194  * it is large enough to qualify as a valid Ethernet frame.
8195  *
8196  * Returns true if an error was encountered and skb was freed.
8197  **/
8198 static bool igb_cleanup_headers(struct igb_ring *rx_ring,
8199                                 union e1000_adv_rx_desc *rx_desc,
8200                                 struct sk_buff *skb)
8201 {
8202
8203         if (unlikely((igb_test_staterr(rx_desc,
8204                                        E1000_RXDEXT_ERR_FRAME_ERR_MASK)))) {
8205                 struct net_device *netdev = rx_ring->netdev;
8206                 if (!(netdev->features & NETIF_F_RXALL)) {
8207                         dev_kfree_skb_any(skb);
8208                         return true;
8209                 }
8210         }
8211
8212         /* place header in linear portion of buffer */
8213         if (skb_is_nonlinear(skb))
8214                 igb_pull_tail(rx_ring, rx_desc, skb);
8215
8216         /* if skb_pad returns an error the skb was freed */
8217         if (unlikely(skb->len < 60)) {
8218                 int pad_len = 60 - skb->len;
8219
8220                 if (skb_pad(skb, pad_len))
8221                         return true;
8222                 __skb_put(skb, pad_len);
8223         }
8224
8225         return false;
8226 }
8227
8228 /* igb_clean_rx_irq -- * packet split */
8229 static bool igb_clean_rx_irq(struct igb_q_vector *q_vector, int budget)
8230 {
8231         struct igb_ring *rx_ring = q_vector->rx.ring;
8232         struct sk_buff *skb = rx_ring->skb;
8233         unsigned int total_bytes = 0, total_packets = 0;
8234         u16 cleaned_count = igb_desc_unused(rx_ring);
8235
8236         do {
8237                 union e1000_adv_rx_desc *rx_desc;
8238
8239                 /* return some buffers to hardware, one at a time is too slow */
8240                 if (cleaned_count >= IGB_RX_BUFFER_WRITE) {
8241                         igb_alloc_rx_buffers(rx_ring, cleaned_count);
8242                         cleaned_count = 0;
8243                 }
8244
8245                 rx_desc = IGB_RX_DESC(rx_ring, rx_ring->next_to_clean);
8246
8247                 if (!igb_test_staterr(rx_desc, E1000_RXD_STAT_DD))
8248                         break;
8249
8250                 /*
8251                  * This memory barrier is needed to keep us from reading
8252                  * any other fields out of the rx_desc until we know the
8253                  * RXD_STAT_DD bit is set
8254                  */
8255                 rmb();
8256
8257                 /* retrieve a buffer from the ring */
8258                 skb = igb_fetch_rx_buffer(rx_ring, rx_desc, skb);
8259
8260                 /* exit if we failed to retrieve a buffer */
8261                 if (!skb)
8262                         break;
8263
8264                 cleaned_count++;
8265
8266                 /* fetch next buffer in frame if non-eop */
8267                 if (igb_is_non_eop(rx_ring, rx_desc))
8268                         continue;
8269
8270                 /* verify the packet layout is correct */
8271                 if (igb_cleanup_headers(rx_ring, rx_desc, skb)) {
8272                         skb = NULL;
8273                         continue;
8274                 }
8275
8276                 /* probably a little skewed due to removing CRC */
8277                 total_bytes += skb->len;
8278
8279                 /* populate checksum, timestamp, VLAN, and protocol */
8280                 igb_process_skb_fields(rx_ring, rx_desc, skb);
8281
8282 #ifndef IGB_NO_LRO
8283                 if (igb_can_lro(rx_ring, rx_desc, skb))
8284                         igb_lro_receive(q_vector, skb);
8285                 else
8286 #endif
8287 #ifdef HAVE_VLAN_RX_REGISTER
8288                         igb_receive_skb(q_vector, skb);
8289 #else
8290                         napi_gro_receive(&q_vector->napi, skb);
8291 #endif
8292 #ifndef NETIF_F_GRO
8293
8294                 netdev_ring(rx_ring)->last_rx = jiffies;
8295 #endif
8296
8297                 /* reset skb pointer */
8298                 skb = NULL;
8299
8300                 /* update budget accounting */
8301                 total_packets++;
8302         } while (likely(total_packets < budget));
8303
8304         /* place incomplete frames back on ring for completion */
8305         rx_ring->skb = skb;
8306
8307         rx_ring->rx_stats.packets += total_packets;
8308         rx_ring->rx_stats.bytes += total_bytes;
8309         q_vector->rx.total_packets += total_packets;
8310         q_vector->rx.total_bytes += total_bytes;
8311
8312         if (cleaned_count)
8313                 igb_alloc_rx_buffers(rx_ring, cleaned_count);
8314
8315 #ifndef IGB_NO_LRO
8316         igb_lro_flush_all(q_vector);
8317
8318 #endif /* IGB_NO_LRO */
8319         return (total_packets < budget);
8320 }
8321 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
8322
8323 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
8324 static bool igb_alloc_mapped_skb(struct igb_ring *rx_ring,
8325                                  struct igb_rx_buffer *bi)
8326 {
8327         struct sk_buff *skb = bi->skb;
8328         dma_addr_t dma = bi->dma;
8329
8330         if (dma)
8331                 return true;
8332
8333         if (likely(!skb)) {
8334                 skb = netdev_alloc_skb_ip_align(netdev_ring(rx_ring),
8335                                                 rx_ring->rx_buffer_len);
8336                 bi->skb = skb;
8337                 if (!skb) {
8338                         rx_ring->rx_stats.alloc_failed++;
8339                         return false;
8340                 }
8341
8342                 /* initialize skb for ring */
8343                 skb_record_rx_queue(skb, ring_queue_index(rx_ring));
8344         }
8345
8346         dma = dma_map_single(rx_ring->dev, skb->data,
8347                              rx_ring->rx_buffer_len, DMA_FROM_DEVICE);
8348
8349         /* if mapping failed free memory back to system since
8350          * there isn't much point in holding memory we can't use
8351          */
8352         if (dma_mapping_error(rx_ring->dev, dma)) {
8353                 dev_kfree_skb_any(skb);
8354                 bi->skb = NULL;
8355
8356                 rx_ring->rx_stats.alloc_failed++;
8357                 return false;
8358         }
8359
8360         bi->dma = dma;
8361         return true;
8362 }
8363
8364 #else /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
8365 static bool igb_alloc_mapped_page(struct igb_ring *rx_ring,
8366                                   struct igb_rx_buffer *bi)
8367 {
8368         struct page *page = bi->page;
8369         dma_addr_t dma;
8370
8371         /* since we are recycling buffers we should seldom need to alloc */
8372         if (likely(page))
8373                 return true;
8374
8375         /* alloc new page for storage */
8376         page = alloc_page(GFP_ATOMIC | __GFP_COLD);
8377         if (unlikely(!page)) {
8378                 rx_ring->rx_stats.alloc_failed++;
8379                 return false;
8380         }
8381
8382         /* map page for use */
8383         dma = dma_map_page(rx_ring->dev, page, 0, PAGE_SIZE, DMA_FROM_DEVICE);
8384
8385         /*
8386          * if mapping failed free memory back to system since
8387          * there isn't much point in holding memory we can't use
8388          */
8389         if (dma_mapping_error(rx_ring->dev, dma)) {
8390                 __free_page(page);
8391
8392                 rx_ring->rx_stats.alloc_failed++;
8393                 return false;
8394         }
8395
8396         bi->dma = dma;
8397         bi->page = page;
8398         bi->page_offset = 0;
8399
8400         return true;
8401 }
8402
8403 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
8404 /**
8405  * igb_alloc_rx_buffers - Replace used receive buffers; packet split
8406  * @adapter: address of board private structure
8407  **/
8408 void igb_alloc_rx_buffers(struct igb_ring *rx_ring, u16 cleaned_count)
8409 {
8410         union e1000_adv_rx_desc *rx_desc;
8411         struct igb_rx_buffer *bi;
8412         u16 i = rx_ring->next_to_use;
8413
8414         /* nothing to do */
8415         if (!cleaned_count)
8416                 return;
8417
8418         rx_desc = IGB_RX_DESC(rx_ring, i);
8419         bi = &rx_ring->rx_buffer_info[i];
8420         i -= rx_ring->count;
8421
8422         do {
8423 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
8424                 if (!igb_alloc_mapped_skb(rx_ring, bi))
8425 #else
8426                 if (!igb_alloc_mapped_page(rx_ring, bi))
8427 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
8428                         break;
8429
8430                 /*
8431                  * Refresh the desc even if buffer_addrs didn't change
8432                  * because each write-back erases this info.
8433                  */
8434 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
8435                 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma);
8436 #else
8437                 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
8438 #endif
8439
8440                 rx_desc++;
8441                 bi++;
8442                 i++;
8443                 if (unlikely(!i)) {
8444                         rx_desc = IGB_RX_DESC(rx_ring, 0);
8445                         bi = rx_ring->rx_buffer_info;
8446                         i -= rx_ring->count;
8447                 }
8448
8449                 /* clear the hdr_addr for the next_to_use descriptor */
8450                 rx_desc->read.hdr_addr = 0;
8451
8452                 cleaned_count--;
8453         } while (cleaned_count);
8454
8455         i += rx_ring->count;
8456
8457         if (rx_ring->next_to_use != i) {
8458                 /* record the next descriptor to use */
8459                 rx_ring->next_to_use = i;
8460
8461 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
8462                 /* update next to alloc since we have filled the ring */
8463                 rx_ring->next_to_alloc = i;
8464
8465 #endif
8466                 /*
8467                  * Force memory writes to complete before letting h/w
8468                  * know there are new descriptors to fetch.  (Only
8469                  * applicable for weak-ordered memory model archs,
8470                  * such as IA-64).
8471                  */
8472                 wmb();
8473                 writel(i, rx_ring->tail);
8474         }
8475 }
8476
8477 #ifdef SIOCGMIIPHY
8478 /**
8479  * igb_mii_ioctl -
8480  * @netdev:
8481  * @ifreq:
8482  * @cmd:
8483  **/
8484 static int igb_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
8485 {
8486         struct igb_adapter *adapter = netdev_priv(netdev);
8487         struct mii_ioctl_data *data = if_mii(ifr);
8488
8489         if (adapter->hw.phy.media_type != e1000_media_type_copper)
8490                 return -EOPNOTSUPP;
8491
8492         switch (cmd) {
8493         case SIOCGMIIPHY:
8494                 data->phy_id = adapter->hw.phy.addr;
8495                 break;
8496         case SIOCGMIIREG:
8497                 if (!capable(CAP_NET_ADMIN))
8498                         return -EPERM;
8499                 if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
8500                                    &data->val_out))
8501                         return -EIO;
8502                 break;
8503         case SIOCSMIIREG:
8504         default:
8505                 return -EOPNOTSUPP;
8506         }
8507         return E1000_SUCCESS;
8508 }
8509
8510 #endif
8511 /**
8512  * igb_ioctl -
8513  * @netdev:
8514  * @ifreq:
8515  * @cmd:
8516  **/
8517 static int igb_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
8518 {
8519         switch (cmd) {
8520 #ifdef SIOCGMIIPHY
8521         case SIOCGMIIPHY:
8522         case SIOCGMIIREG:
8523         case SIOCSMIIREG:
8524                 return igb_mii_ioctl(netdev, ifr, cmd);
8525 #endif
8526 #ifdef HAVE_PTP_1588_CLOCK
8527         case SIOCSHWTSTAMP:
8528                 return igb_ptp_hwtstamp_ioctl(netdev, ifr, cmd);
8529 #endif /* HAVE_PTP_1588_CLOCK */
8530 #ifdef ETHTOOL_OPS_COMPAT
8531         case SIOCETHTOOL:
8532                 return ethtool_ioctl(ifr);
8533 #endif
8534         default:
8535                 return -EOPNOTSUPP;
8536         }
8537 }
8538
8539 s32 e1000_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
8540 {
8541         struct igb_adapter *adapter = hw->back;
8542         u16 cap_offset;
8543
8544         cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP);
8545         if (!cap_offset)
8546                 return -E1000_ERR_CONFIG;
8547
8548         pci_read_config_word(adapter->pdev, cap_offset + reg, value);
8549
8550         return E1000_SUCCESS;
8551 }
8552
8553 s32 e1000_write_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
8554 {
8555         struct igb_adapter *adapter = hw->back;
8556         u16 cap_offset;
8557
8558         cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP);
8559         if (!cap_offset)
8560                 return -E1000_ERR_CONFIG;
8561
8562         pci_write_config_word(adapter->pdev, cap_offset + reg, *value);
8563
8564         return E1000_SUCCESS;
8565 }
8566
8567 #ifdef HAVE_VLAN_RX_REGISTER
8568 static void igb_vlan_mode(struct net_device *netdev, struct vlan_group *vlgrp)
8569 #else
8570 void igb_vlan_mode(struct net_device *netdev, u32 features)
8571 #endif
8572 {
8573         struct igb_adapter *adapter = netdev_priv(netdev);
8574         struct e1000_hw *hw = &adapter->hw;
8575         u32 ctrl, rctl;
8576         int i;
8577 #ifdef HAVE_VLAN_RX_REGISTER
8578         bool enable = !!vlgrp;
8579
8580         igb_irq_disable(adapter);
8581
8582         adapter->vlgrp = vlgrp;
8583
8584         if (!test_bit(__IGB_DOWN, &adapter->state))
8585                 igb_irq_enable(adapter);
8586 #else
8587 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8588         bool enable = !!(features & NETIF_F_HW_VLAN_CTAG_RX);
8589 #else
8590         bool enable = !!(features & NETIF_F_HW_VLAN_RX);
8591 #endif
8592 #endif
8593
8594         if (enable) {
8595                 /* enable VLAN tag insert/strip */
8596                 ctrl = E1000_READ_REG(hw, E1000_CTRL);
8597                 ctrl |= E1000_CTRL_VME;
8598                 E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
8599
8600                 /* Disable CFI check */
8601                 rctl = E1000_READ_REG(hw, E1000_RCTL);
8602                 rctl &= ~E1000_RCTL_CFIEN;
8603                 E1000_WRITE_REG(hw, E1000_RCTL, rctl);
8604         } else {
8605                 /* disable VLAN tag insert/strip */
8606                 ctrl = E1000_READ_REG(hw, E1000_CTRL);
8607                 ctrl &= ~E1000_CTRL_VME;
8608                 E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
8609         }
8610
8611 #ifndef CONFIG_IGB_VMDQ_NETDEV
8612         for (i = 0; i < adapter->vmdq_pools; i++) {
8613                 igb_set_vf_vlan_strip(adapter,
8614                                       adapter->vfs_allocated_count + i,
8615                                       enable);
8616         }
8617
8618 #else
8619         igb_set_vf_vlan_strip(adapter,
8620                               adapter->vfs_allocated_count,
8621                               enable);
8622
8623         for (i = 1; i < adapter->vmdq_pools; i++) {
8624 #ifdef HAVE_VLAN_RX_REGISTER
8625                 struct igb_vmdq_adapter *vadapter;
8626                 vadapter = netdev_priv(adapter->vmdq_netdev[i-1]);
8627                 enable = !!vadapter->vlgrp;
8628 #else
8629                 struct net_device *vnetdev;
8630                 vnetdev = adapter->vmdq_netdev[i-1];
8631 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8632                 enable = !!(vnetdev->features & NETIF_F_HW_VLAN_CTAG_RX);
8633 #else
8634                 enable = !!(vnetdev->features & NETIF_F_HW_VLAN_RX);
8635 #endif
8636 #endif
8637                 igb_set_vf_vlan_strip(adapter,
8638                                       adapter->vfs_allocated_count + i,
8639                                       enable);
8640         }
8641
8642 #endif
8643         igb_rlpml_set(adapter);
8644 }
8645
8646 #ifdef HAVE_VLAN_PROTOCOL
8647 static int igb_vlan_rx_add_vid(struct net_device *netdev, __be16 proto, u16 vid)
8648 #elif defined HAVE_INT_NDO_VLAN_RX_ADD_VID
8649 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8650 static int igb_vlan_rx_add_vid(struct net_device *netdev,
8651                                __always_unused __be16 proto, u16 vid)
8652 #else
8653 static int igb_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
8654 #endif
8655 #else
8656 static void igb_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
8657 #endif
8658 {
8659         struct igb_adapter *adapter = netdev_priv(netdev);
8660         int pf_id = adapter->vfs_allocated_count;
8661
8662         /* attempt to add filter to vlvf array */
8663         igb_vlvf_set(adapter, vid, TRUE, pf_id);
8664
8665         /* add the filter since PF can receive vlans w/o entry in vlvf */
8666         igb_vfta_set(adapter, vid, TRUE);
8667 #ifndef HAVE_NETDEV_VLAN_FEATURES
8668
8669         /* Copy feature flags from netdev to the vlan netdev for this vid.
8670          * This allows things like TSO to bubble down to our vlan device.
8671          * There is no need to update netdev for vlan 0 (DCB), since it
8672          * wouldn't has v_netdev.
8673          */
8674         if (adapter->vlgrp) {
8675                 struct vlan_group *vlgrp = adapter->vlgrp;
8676                 struct net_device *v_netdev = vlan_group_get_device(vlgrp, vid);
8677                 if (v_netdev) {
8678                         v_netdev->features |= netdev->features;
8679                         vlan_group_set_device(vlgrp, vid, v_netdev);
8680                 }
8681         }
8682 #endif
8683 #ifndef HAVE_VLAN_RX_REGISTER
8684
8685         set_bit(vid, adapter->active_vlans);
8686 #endif
8687 #ifdef HAVE_INT_NDO_VLAN_RX_ADD_VID
8688         return 0;
8689 #endif
8690 }
8691
8692 #ifdef HAVE_VLAN_PROTOCOL
8693 static int igb_vlan_rx_kill_vid(struct net_device *netdev, __be16 proto, u16 vid)
8694 #elif defined HAVE_INT_NDO_VLAN_RX_ADD_VID
8695 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8696 static int igb_vlan_rx_kill_vid(struct net_device *netdev,
8697                                 __always_unused __be16 proto, u16 vid)
8698 #else
8699 static int igb_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
8700 #endif
8701 #else
8702 static void igb_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
8703 #endif
8704 {
8705         struct igb_adapter *adapter = netdev_priv(netdev);
8706         int pf_id = adapter->vfs_allocated_count;
8707         s32 err;
8708
8709 #ifdef HAVE_VLAN_RX_REGISTER
8710         igb_irq_disable(adapter);
8711
8712         vlan_group_set_device(adapter->vlgrp, vid, NULL);
8713
8714         if (!test_bit(__IGB_DOWN, &adapter->state))
8715                 igb_irq_enable(adapter);
8716
8717 #endif /* HAVE_VLAN_RX_REGISTER */
8718         /* remove vlan from VLVF table array */
8719         err = igb_vlvf_set(adapter, vid, FALSE, pf_id);
8720
8721         /* if vid was not present in VLVF just remove it from table */
8722         if (err)
8723                 igb_vfta_set(adapter, vid, FALSE);
8724 #ifndef HAVE_VLAN_RX_REGISTER
8725
8726         clear_bit(vid, adapter->active_vlans);
8727 #endif
8728 #ifdef HAVE_INT_NDO_VLAN_RX_ADD_VID
8729         return 0;
8730 #endif
8731 }
8732
8733 static void igb_restore_vlan(struct igb_adapter *adapter)
8734 {
8735 #ifdef HAVE_VLAN_RX_REGISTER
8736         igb_vlan_mode(adapter->netdev, adapter->vlgrp);
8737
8738         if (adapter->vlgrp) {
8739                 u16 vid;
8740                 for (vid = 0; vid < VLAN_N_VID; vid++) {
8741                         if (!vlan_group_get_device(adapter->vlgrp, vid))
8742                                 continue;
8743 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8744                         igb_vlan_rx_add_vid(adapter->netdev,
8745                                             htons(ETH_P_8021Q), vid);
8746 #else
8747                         igb_vlan_rx_add_vid(adapter->netdev, vid);
8748 #endif
8749                 }
8750         }
8751 #else
8752         u16 vid;
8753
8754         igb_vlan_mode(adapter->netdev, adapter->netdev->features);
8755
8756         for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
8757 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8758                 igb_vlan_rx_add_vid(adapter->netdev,
8759                                     htons(ETH_P_8021Q), vid);
8760 #else
8761                 igb_vlan_rx_add_vid(adapter->netdev, vid);
8762 #endif
8763 #endif
8764 }
8765
8766 int igb_set_spd_dplx(struct igb_adapter *adapter, u16 spddplx)
8767 {
8768         struct pci_dev *pdev = adapter->pdev;
8769         struct e1000_mac_info *mac = &adapter->hw.mac;
8770
8771         mac->autoneg = 0;
8772
8773         /* SerDes device's does not support 10Mbps Full/duplex
8774          * and 100Mbps Half duplex
8775          */
8776         if (adapter->hw.phy.media_type == e1000_media_type_internal_serdes) {
8777                 switch (spddplx) {
8778                 case SPEED_10 + DUPLEX_HALF:
8779                 case SPEED_10 + DUPLEX_FULL:
8780                 case SPEED_100 + DUPLEX_HALF:
8781                         dev_err(pci_dev_to_dev(pdev),
8782                                 "Unsupported Speed/Duplex configuration\n");
8783                         return -EINVAL;
8784                 default:
8785                         break;
8786                 }
8787         }
8788
8789         switch (spddplx) {
8790         case SPEED_10 + DUPLEX_HALF:
8791                 mac->forced_speed_duplex = ADVERTISE_10_HALF;
8792                 break;
8793         case SPEED_10 + DUPLEX_FULL:
8794                 mac->forced_speed_duplex = ADVERTISE_10_FULL;
8795                 break;
8796         case SPEED_100 + DUPLEX_HALF:
8797                 mac->forced_speed_duplex = ADVERTISE_100_HALF;
8798                 break;
8799         case SPEED_100 + DUPLEX_FULL:
8800                 mac->forced_speed_duplex = ADVERTISE_100_FULL;
8801                 break;
8802         case SPEED_1000 + DUPLEX_FULL:
8803                 mac->autoneg = 1;
8804                 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
8805                 break;
8806         case SPEED_1000 + DUPLEX_HALF: /* not supported */
8807         default:
8808                 dev_err(pci_dev_to_dev(pdev), "Unsupported Speed/Duplex configuration\n");
8809                 return -EINVAL;
8810         }
8811
8812         /* clear MDI, MDI(-X) override is only allowed when autoneg enabled */
8813         adapter->hw.phy.mdix = AUTO_ALL_MODES;
8814
8815         return 0;
8816 }
8817
8818 static int __igb_shutdown(struct pci_dev *pdev, bool *enable_wake,
8819                           bool runtime)
8820 {
8821         struct net_device *netdev = pci_get_drvdata(pdev);
8822         struct igb_adapter *adapter = netdev_priv(netdev);
8823         struct e1000_hw *hw = &adapter->hw;
8824         u32 ctrl, rctl, status;
8825         u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol;
8826 #ifdef CONFIG_PM
8827         int retval = 0;
8828 #endif
8829
8830         netif_device_detach(netdev);
8831
8832         status = E1000_READ_REG(hw, E1000_STATUS);
8833         if (status & E1000_STATUS_LU)
8834                 wufc &= ~E1000_WUFC_LNKC;
8835
8836         if (netif_running(netdev))
8837                 __igb_close(netdev, true);
8838
8839         igb_clear_interrupt_scheme(adapter);
8840
8841 #ifdef CONFIG_PM
8842         retval = pci_save_state(pdev);
8843         if (retval)
8844                 return retval;
8845 #endif
8846
8847         if (wufc) {
8848                 igb_setup_rctl(adapter);
8849                 igb_set_rx_mode(netdev);
8850
8851                 /* turn on all-multi mode if wake on multicast is enabled */
8852                 if (wufc & E1000_WUFC_MC) {
8853                         rctl = E1000_READ_REG(hw, E1000_RCTL);
8854                         rctl |= E1000_RCTL_MPE;
8855                         E1000_WRITE_REG(hw, E1000_RCTL, rctl);
8856                 }
8857
8858                 ctrl = E1000_READ_REG(hw, E1000_CTRL);
8859                 /* phy power management enable */
8860                 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
8861                 ctrl |= E1000_CTRL_ADVD3WUC;
8862                 E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
8863
8864                 /* Allow time for pending master requests to run */
8865                 e1000_disable_pcie_master(hw);
8866
8867                 E1000_WRITE_REG(hw, E1000_WUC, E1000_WUC_PME_EN);
8868                 E1000_WRITE_REG(hw, E1000_WUFC, wufc);
8869         } else {
8870                 E1000_WRITE_REG(hw, E1000_WUC, 0);
8871                 E1000_WRITE_REG(hw, E1000_WUFC, 0);
8872         }
8873
8874         *enable_wake = wufc || adapter->en_mng_pt;
8875         if (!*enable_wake)
8876                 igb_power_down_link(adapter);
8877         else
8878                 igb_power_up_link(adapter);
8879
8880         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
8881          * would have already happened in close and is redundant. */
8882         igb_release_hw_control(adapter);
8883
8884         pci_disable_device(pdev);
8885
8886         return 0;
8887 }
8888
8889 #ifdef CONFIG_PM
8890 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
8891 static int igb_suspend(struct device *dev)
8892 #else
8893 static int igb_suspend(struct pci_dev *pdev, pm_message_t state)
8894 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
8895 {
8896 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
8897         struct pci_dev *pdev = to_pci_dev(dev);
8898 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
8899         int retval;
8900         bool wake;
8901
8902         retval = __igb_shutdown(pdev, &wake, 0);
8903         if (retval)
8904                 return retval;
8905
8906         if (wake) {
8907                 pci_prepare_to_sleep(pdev);
8908         } else {
8909                 pci_wake_from_d3(pdev, false);
8910                 pci_set_power_state(pdev, PCI_D3hot);
8911         }
8912
8913         return 0;
8914 }
8915
8916 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
8917 static int igb_resume(struct device *dev)
8918 #else
8919 static int igb_resume(struct pci_dev *pdev)
8920 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
8921 {
8922 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
8923         struct pci_dev *pdev = to_pci_dev(dev);
8924 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
8925         struct net_device *netdev = pci_get_drvdata(pdev);
8926         struct igb_adapter *adapter = netdev_priv(netdev);
8927         struct e1000_hw *hw = &adapter->hw;
8928         u32 err;
8929
8930         pci_set_power_state(pdev, PCI_D0);
8931         pci_restore_state(pdev);
8932         pci_save_state(pdev);
8933
8934         err = pci_enable_device_mem(pdev);
8935         if (err) {
8936                 dev_err(pci_dev_to_dev(pdev),
8937                         "igb: Cannot enable PCI device from suspend\n");
8938                 return err;
8939         }
8940         pci_set_master(pdev);
8941
8942         pci_enable_wake(pdev, PCI_D3hot, 0);
8943         pci_enable_wake(pdev, PCI_D3cold, 0);
8944
8945         if (igb_init_interrupt_scheme(adapter, true)) {
8946                 dev_err(pci_dev_to_dev(pdev), "Unable to allocate memory for queues\n");
8947                 return -ENOMEM;
8948         }
8949
8950         igb_reset(adapter);
8951
8952         /* let the f/w know that the h/w is now under the control of the
8953          * driver. */
8954         igb_get_hw_control(adapter);
8955
8956         E1000_WRITE_REG(hw, E1000_WUS, ~0);
8957
8958         if (netdev->flags & IFF_UP) {
8959                 rtnl_lock();
8960                 err = __igb_open(netdev, true);
8961                 rtnl_unlock();
8962                 if (err)
8963                         return err;
8964         }
8965
8966         netif_device_attach(netdev);
8967
8968         return 0;
8969 }
8970
8971 #ifdef CONFIG_PM_RUNTIME
8972 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
8973 static int igb_runtime_idle(struct device *dev)
8974 {
8975         struct pci_dev *pdev = to_pci_dev(dev);
8976         struct net_device *netdev = pci_get_drvdata(pdev);
8977         struct igb_adapter *adapter = netdev_priv(netdev);
8978
8979         if (!igb_has_link(adapter))
8980                 pm_schedule_suspend(dev, MSEC_PER_SEC * 5);
8981
8982         return -EBUSY;
8983 }
8984
8985 static int igb_runtime_suspend(struct device *dev)
8986 {
8987         struct pci_dev *pdev = to_pci_dev(dev);
8988         int retval;
8989         bool wake;
8990
8991         retval = __igb_shutdown(pdev, &wake, 1);
8992         if (retval)
8993                 return retval;
8994
8995         if (wake) {
8996                 pci_prepare_to_sleep(pdev);
8997         } else {
8998                 pci_wake_from_d3(pdev, false);
8999                 pci_set_power_state(pdev, PCI_D3hot);
9000         }
9001
9002         return 0;
9003 }
9004
9005 static int igb_runtime_resume(struct device *dev)
9006 {
9007         return igb_resume(dev);
9008 }
9009 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
9010 #endif /* CONFIG_PM_RUNTIME */
9011 #endif /* CONFIG_PM */
9012
9013 #ifdef USE_REBOOT_NOTIFIER
9014 /* only want to do this for 2.4 kernels? */
9015 static int igb_notify_reboot(struct notifier_block *nb, unsigned long event,
9016                              void *p)
9017 {
9018         struct pci_dev *pdev = NULL;
9019         bool wake;
9020
9021         switch (event) {
9022         case SYS_DOWN:
9023         case SYS_HALT:
9024         case SYS_POWER_OFF:
9025                 while ((pdev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, pdev))) {
9026                         if (pci_dev_driver(pdev) == &igb_driver) {
9027                                 __igb_shutdown(pdev, &wake, 0);
9028                                 if (event == SYS_POWER_OFF) {
9029                                         pci_wake_from_d3(pdev, wake);
9030                                         pci_set_power_state(pdev, PCI_D3hot);
9031                                 }
9032                         }
9033                 }
9034         }
9035         return NOTIFY_DONE;
9036 }
9037 #else
9038 static void igb_shutdown(struct pci_dev *pdev)
9039 {
9040         bool wake = false;
9041
9042         __igb_shutdown(pdev, &wake, 0);
9043
9044         if (system_state == SYSTEM_POWER_OFF) {
9045                 pci_wake_from_d3(pdev, wake);
9046                 pci_set_power_state(pdev, PCI_D3hot);
9047         }
9048 }
9049 #endif /* USE_REBOOT_NOTIFIER */
9050
9051 #ifdef CONFIG_NET_POLL_CONTROLLER
9052 /*
9053  * Polling 'interrupt' - used by things like netconsole to send skbs
9054  * without having to re-enable interrupts. It's not called while
9055  * the interrupt routine is executing.
9056  */
9057 static void igb_netpoll(struct net_device *netdev)
9058 {
9059         struct igb_adapter *adapter = netdev_priv(netdev);
9060         struct e1000_hw *hw = &adapter->hw;
9061         struct igb_q_vector *q_vector;
9062         int i;
9063
9064         for (i = 0; i < adapter->num_q_vectors; i++) {
9065                 q_vector = adapter->q_vector[i];
9066                 if (adapter->msix_entries)
9067                         E1000_WRITE_REG(hw, E1000_EIMC, q_vector->eims_value);
9068                 else
9069                         igb_irq_disable(adapter);
9070                 napi_schedule(&q_vector->napi);
9071         }
9072 }
9073 #endif /* CONFIG_NET_POLL_CONTROLLER */
9074
9075 #ifdef HAVE_PCI_ERS
9076 #define E1000_DEV_ID_82576_VF 0x10CA
9077 /**
9078  * igb_io_error_detected - called when PCI error is detected
9079  * @pdev: Pointer to PCI device
9080  * @state: The current pci connection state
9081  *
9082  * This function is called after a PCI bus error affecting
9083  * this device has been detected.
9084  */
9085 static pci_ers_result_t igb_io_error_detected(struct pci_dev *pdev,
9086                                               pci_channel_state_t state)
9087 {
9088         struct net_device *netdev = pci_get_drvdata(pdev);
9089         struct igb_adapter *adapter = netdev_priv(netdev);
9090
9091 #ifdef CONFIG_PCI_IOV__UNUSED
9092         struct pci_dev *bdev, *vfdev;
9093         u32 dw0, dw1, dw2, dw3;
9094         int vf, pos;
9095         u16 req_id, pf_func;
9096
9097         if (!(adapter->flags & IGB_FLAG_DETECT_BAD_DMA))
9098                 goto skip_bad_vf_detection;
9099
9100         bdev = pdev->bus->self;
9101         while (bdev && (pci_pcie_type(bdev) != PCI_EXP_TYPE_ROOT_PORT))
9102                 bdev = bdev->bus->self;
9103
9104         if (!bdev)
9105                 goto skip_bad_vf_detection;
9106
9107         pos = pci_find_ext_capability(bdev, PCI_EXT_CAP_ID_ERR);
9108         if (!pos)
9109                 goto skip_bad_vf_detection;
9110
9111         pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG, &dw0);
9112         pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG + 4, &dw1);
9113         pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG + 8, &dw2);
9114         pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG + 12, &dw3);
9115
9116         req_id = dw1 >> 16;
9117         /* On the 82576 if bit 7 of the requestor ID is set then it's a VF */
9118         if (!(req_id & 0x0080))
9119                 goto skip_bad_vf_detection;
9120
9121         pf_func = req_id & 0x01;
9122         if ((pf_func & 1) == (pdev->devfn & 1)) {
9123
9124                 vf = (req_id & 0x7F) >> 1;
9125                 dev_err(pci_dev_to_dev(pdev),
9126                         "VF %d has caused a PCIe error\n", vf);
9127                 dev_err(pci_dev_to_dev(pdev),
9128                         "TLP: dw0: %8.8x\tdw1: %8.8x\tdw2: "
9129                         "%8.8x\tdw3: %8.8x\n",
9130                         dw0, dw1, dw2, dw3);
9131
9132                 /* Find the pci device of the offending VF */
9133                 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL,
9134                                        E1000_DEV_ID_82576_VF, NULL);
9135                 while (vfdev) {
9136                         if (vfdev->devfn == (req_id & 0xFF))
9137                                 break;
9138                         vfdev = pci_get_device(PCI_VENDOR_ID_INTEL,
9139                                                E1000_DEV_ID_82576_VF, vfdev);
9140                 }
9141                 /*
9142                  * There's a slim chance the VF could have been hot plugged,
9143                  * so if it is no longer present we don't need to issue the
9144                  * VFLR.  Just clean up the AER in that case.
9145                  */
9146                 if (vfdev) {
9147                         dev_err(pci_dev_to_dev(pdev),
9148                                 "Issuing VFLR to VF %d\n", vf);
9149                         pci_write_config_dword(vfdev, 0xA8, 0x00008000);
9150                 }
9151
9152                 pci_cleanup_aer_uncorrect_error_status(pdev);
9153         }
9154
9155         /*
9156          * Even though the error may have occurred on the other port
9157          * we still need to increment the vf error reference count for
9158          * both ports because the I/O resume function will be called
9159          * for both of them.
9160          */
9161         adapter->vferr_refcount++;
9162
9163         return PCI_ERS_RESULT_RECOVERED;
9164
9165 skip_bad_vf_detection:
9166 #endif /* CONFIG_PCI_IOV */
9167
9168         netif_device_detach(netdev);
9169
9170         if (state == pci_channel_io_perm_failure)
9171                 return PCI_ERS_RESULT_DISCONNECT;
9172
9173         if (netif_running(netdev))
9174                 igb_down(adapter);
9175         pci_disable_device(pdev);
9176
9177         /* Request a slot slot reset. */
9178         return PCI_ERS_RESULT_NEED_RESET;
9179 }
9180
9181 /**
9182  * igb_io_slot_reset - called after the pci bus has been reset.
9183  * @pdev: Pointer to PCI device
9184  *
9185  * Restart the card from scratch, as if from a cold-boot. Implementation
9186  * resembles the first-half of the igb_resume routine.
9187  */
9188 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *pdev)
9189 {
9190         struct net_device *netdev = pci_get_drvdata(pdev);
9191         struct igb_adapter *adapter = netdev_priv(netdev);
9192         struct e1000_hw *hw = &adapter->hw;
9193         pci_ers_result_t result;
9194
9195         if (pci_enable_device_mem(pdev)) {
9196                 dev_err(pci_dev_to_dev(pdev),
9197                         "Cannot re-enable PCI device after reset.\n");
9198                 result = PCI_ERS_RESULT_DISCONNECT;
9199         } else {
9200                 pci_set_master(pdev);
9201                 pci_restore_state(pdev);
9202                 pci_save_state(pdev);
9203
9204                 pci_enable_wake(pdev, PCI_D3hot, 0);
9205                 pci_enable_wake(pdev, PCI_D3cold, 0);
9206
9207                 schedule_work(&adapter->reset_task);
9208                 E1000_WRITE_REG(hw, E1000_WUS, ~0);
9209                 result = PCI_ERS_RESULT_RECOVERED;
9210         }
9211
9212         pci_cleanup_aer_uncorrect_error_status(pdev);
9213
9214         return result;
9215 }
9216
9217 /**
9218  * igb_io_resume - called when traffic can start flowing again.
9219  * @pdev: Pointer to PCI device
9220  *
9221  * This callback is called when the error recovery driver tells us that
9222  * its OK to resume normal operation. Implementation resembles the
9223  * second-half of the igb_resume routine.
9224  */
9225 static void igb_io_resume(struct pci_dev *pdev)
9226 {
9227         struct net_device *netdev = pci_get_drvdata(pdev);
9228         struct igb_adapter *adapter = netdev_priv(netdev);
9229
9230         if (adapter->vferr_refcount) {
9231                 dev_info(pci_dev_to_dev(pdev), "Resuming after VF err\n");
9232                 adapter->vferr_refcount--;
9233                 return;
9234         }
9235
9236         if (netif_running(netdev)) {
9237                 if (igb_up(adapter)) {
9238                         dev_err(pci_dev_to_dev(pdev), "igb_up failed after reset\n");
9239                         return;
9240                 }
9241         }
9242
9243         netif_device_attach(netdev);
9244
9245         /* let the f/w know that the h/w is now under the control of the
9246          * driver. */
9247         igb_get_hw_control(adapter);
9248 }
9249
9250 #endif /* HAVE_PCI_ERS */
9251
9252 int igb_add_mac_filter(struct igb_adapter *adapter, u8 *addr, u16 queue)
9253 {
9254         struct e1000_hw *hw = &adapter->hw;
9255         int i;
9256
9257         if (is_zero_ether_addr(addr))
9258                 return 0;
9259
9260         for (i = 0; i < hw->mac.rar_entry_count; i++) {
9261                 if (adapter->mac_table[i].state & IGB_MAC_STATE_IN_USE)
9262                         continue;
9263                 adapter->mac_table[i].state = (IGB_MAC_STATE_MODIFIED |
9264                                                    IGB_MAC_STATE_IN_USE);
9265                 memcpy(adapter->mac_table[i].addr, addr, ETH_ALEN);
9266                 adapter->mac_table[i].queue = queue;
9267                 igb_sync_mac_table(adapter);
9268                 return 0;
9269         }
9270         return -ENOMEM;
9271 }
9272 int igb_del_mac_filter(struct igb_adapter *adapter, u8* addr, u16 queue)
9273 {
9274         /* search table for addr, if found, set to 0 and sync */
9275         int i;
9276         struct e1000_hw *hw = &adapter->hw;
9277
9278         if (is_zero_ether_addr(addr))
9279                 return 0;
9280         for (i = 0; i < hw->mac.rar_entry_count; i++) {
9281                 if (ether_addr_equal(addr, adapter->mac_table[i].addr) &&
9282                     adapter->mac_table[i].queue == queue) {
9283                         adapter->mac_table[i].state = IGB_MAC_STATE_MODIFIED;
9284                         memset(adapter->mac_table[i].addr, 0, ETH_ALEN);
9285                         adapter->mac_table[i].queue = 0;
9286                         igb_sync_mac_table(adapter);
9287                         return 0;
9288                 }
9289         }
9290         return -ENOMEM;
9291 }
9292 static int igb_set_vf_mac(struct igb_adapter *adapter,
9293                           int vf, unsigned char *mac_addr)
9294 {
9295         igb_del_mac_filter(adapter, adapter->vf_data[vf].vf_mac_addresses, vf);
9296         memcpy(adapter->vf_data[vf].vf_mac_addresses, mac_addr, ETH_ALEN);
9297
9298         igb_add_mac_filter(adapter, mac_addr, vf);
9299
9300         return 0;
9301 }
9302
9303 #ifdef IFLA_VF_MAX
9304 static int igb_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
9305 {
9306         struct igb_adapter *adapter = netdev_priv(netdev);
9307         if (!is_valid_ether_addr(mac) || (vf >= adapter->vfs_allocated_count))
9308                 return -EINVAL;
9309         adapter->vf_data[vf].flags |= IGB_VF_FLAG_PF_SET_MAC;
9310         dev_info(&adapter->pdev->dev, "setting MAC %pM on VF %d\n", mac, vf);
9311         dev_info(&adapter->pdev->dev, "Reload the VF driver to make this"
9312                                       " change effective.\n");
9313         if (test_bit(__IGB_DOWN, &adapter->state)) {
9314                 dev_warn(&adapter->pdev->dev, "The VF MAC address has been set,"
9315                          " but the PF device is not up.\n");
9316                 dev_warn(&adapter->pdev->dev, "Bring the PF device up before"
9317                          " attempting to use the VF device.\n");
9318         }
9319         return igb_set_vf_mac(adapter, vf, mac);
9320 }
9321
9322 static int igb_link_mbps(int internal_link_speed)
9323 {
9324         switch (internal_link_speed) {
9325         case SPEED_100:
9326                 return 100;
9327         case SPEED_1000:
9328                 return 1000;
9329         case SPEED_2500:
9330                 return 2500;
9331         default:
9332                 return 0;
9333         }
9334 }
9335
9336 static void igb_set_vf_rate_limit(struct e1000_hw *hw, int vf, int tx_rate,
9337                         int link_speed)
9338 {
9339         int rf_dec, rf_int;
9340         u32 bcnrc_val;
9341
9342         if (tx_rate != 0) {
9343                 /* Calculate the rate factor values to set */
9344                 rf_int = link_speed / tx_rate;
9345                 rf_dec = (link_speed - (rf_int * tx_rate));
9346                 rf_dec = (rf_dec * (1<<E1000_RTTBCNRC_RF_INT_SHIFT)) / tx_rate;
9347
9348                 bcnrc_val = E1000_RTTBCNRC_RS_ENA;
9349                 bcnrc_val |= ((rf_int<<E1000_RTTBCNRC_RF_INT_SHIFT) &
9350                                 E1000_RTTBCNRC_RF_INT_MASK);
9351                 bcnrc_val |= (rf_dec & E1000_RTTBCNRC_RF_DEC_MASK);
9352         } else {
9353                 bcnrc_val = 0;
9354         }
9355
9356         E1000_WRITE_REG(hw, E1000_RTTDQSEL, vf); /* vf X uses queue X */
9357         /*
9358          * Set global transmit compensation time to the MMW_SIZE in RTTBCNRM
9359          * register. MMW_SIZE=0x014 if 9728-byte jumbo is supported.
9360          */
9361         E1000_WRITE_REG(hw, E1000_RTTBCNRM(0), 0x14);
9362         E1000_WRITE_REG(hw, E1000_RTTBCNRC, bcnrc_val);
9363 }
9364
9365 static void igb_check_vf_rate_limit(struct igb_adapter *adapter)
9366 {
9367         int actual_link_speed, i;
9368         bool reset_rate = false;
9369
9370         /* VF TX rate limit was not set */
9371         if ((adapter->vf_rate_link_speed == 0) ||
9372                 (adapter->hw.mac.type != e1000_82576))
9373                 return;
9374
9375         actual_link_speed = igb_link_mbps(adapter->link_speed);
9376         if (actual_link_speed != adapter->vf_rate_link_speed) {
9377                 reset_rate = true;
9378                 adapter->vf_rate_link_speed = 0;
9379                 dev_info(&adapter->pdev->dev,
9380                 "Link speed has been changed. VF Transmit rate is disabled\n");
9381         }
9382
9383         for (i = 0; i < adapter->vfs_allocated_count; i++) {
9384                 if (reset_rate)
9385                         adapter->vf_data[i].tx_rate = 0;
9386
9387                 igb_set_vf_rate_limit(&adapter->hw, i,
9388                         adapter->vf_data[i].tx_rate, actual_link_speed);
9389         }
9390 }
9391
9392 static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf, int tx_rate)
9393 {
9394         struct igb_adapter *adapter = netdev_priv(netdev);
9395         struct e1000_hw *hw = &adapter->hw;
9396         int actual_link_speed;
9397
9398         if (hw->mac.type != e1000_82576)
9399                 return -EOPNOTSUPP;
9400
9401         actual_link_speed = igb_link_mbps(adapter->link_speed);
9402         if ((vf >= adapter->vfs_allocated_count) ||
9403                 (!(E1000_READ_REG(hw, E1000_STATUS) & E1000_STATUS_LU)) ||
9404                 (tx_rate < 0) || (tx_rate > actual_link_speed))
9405                 return -EINVAL;
9406
9407         adapter->vf_rate_link_speed = actual_link_speed;
9408         adapter->vf_data[vf].tx_rate = (u16)tx_rate;
9409         igb_set_vf_rate_limit(hw, vf, tx_rate, actual_link_speed);
9410
9411         return 0;
9412 }
9413
9414 static int igb_ndo_get_vf_config(struct net_device *netdev,
9415                                  int vf, struct ifla_vf_info *ivi)
9416 {
9417         struct igb_adapter *adapter = netdev_priv(netdev);
9418         if (vf >= adapter->vfs_allocated_count)
9419                 return -EINVAL;
9420         ivi->vf = vf;
9421         memcpy(&ivi->mac, adapter->vf_data[vf].vf_mac_addresses, ETH_ALEN);
9422         ivi->tx_rate = adapter->vf_data[vf].tx_rate;
9423         ivi->vlan = adapter->vf_data[vf].pf_vlan;
9424         ivi->qos = adapter->vf_data[vf].pf_qos;
9425 #ifdef HAVE_VF_SPOOFCHK_CONFIGURE
9426         ivi->spoofchk = adapter->vf_data[vf].spoofchk_enabled;
9427 #endif
9428         return 0;
9429 }
9430 #endif
9431 static void igb_vmm_control(struct igb_adapter *adapter)
9432 {
9433         struct e1000_hw *hw = &adapter->hw;
9434         int count;
9435         u32 reg;
9436
9437         switch (hw->mac.type) {
9438         case e1000_82575:
9439         default:
9440                 /* replication is not supported for 82575 */
9441                 return;
9442         case e1000_82576:
9443                 /* notify HW that the MAC is adding vlan tags */
9444                 reg = E1000_READ_REG(hw, E1000_DTXCTL);
9445                 reg |= (E1000_DTXCTL_VLAN_ADDED |
9446                         E1000_DTXCTL_SPOOF_INT);
9447                 E1000_WRITE_REG(hw, E1000_DTXCTL, reg);
9448         case e1000_82580:
9449                 /* enable replication vlan tag stripping */
9450                 reg = E1000_READ_REG(hw, E1000_RPLOLR);
9451                 reg |= E1000_RPLOLR_STRVLAN;
9452                 E1000_WRITE_REG(hw, E1000_RPLOLR, reg);
9453         case e1000_i350:
9454         case e1000_i354:
9455                 /* none of the above registers are supported by i350 */
9456                 break;
9457         }
9458
9459         /* Enable Malicious Driver Detection */
9460         if ((adapter->vfs_allocated_count) &&
9461             (adapter->mdd)) {
9462                 if (hw->mac.type == e1000_i350)
9463                         igb_enable_mdd(adapter);
9464         }
9465
9466                 /* enable replication and loopback support */
9467                 count = adapter->vfs_allocated_count || adapter->vmdq_pools;
9468                 if (adapter->flags & IGB_FLAG_LOOPBACK_ENABLE && count)
9469                         e1000_vmdq_set_loopback_pf(hw, 1);
9470                 e1000_vmdq_set_anti_spoofing_pf(hw,
9471                         adapter->vfs_allocated_count || adapter->vmdq_pools,
9472                         adapter->vfs_allocated_count);
9473         e1000_vmdq_set_replication_pf(hw, adapter->vfs_allocated_count ||
9474                                       adapter->vmdq_pools);
9475 }
9476
9477 static void igb_init_fw(struct igb_adapter *adapter)
9478 {
9479         struct e1000_fw_drv_info fw_cmd;
9480         struct e1000_hw *hw = &adapter->hw;
9481         int i;
9482         u16 mask;
9483
9484         if (hw->mac.type == e1000_i210)
9485                 mask = E1000_SWFW_EEP_SM;
9486         else
9487                 mask = E1000_SWFW_PHY0_SM;
9488         /* i211 parts do not support this feature */
9489         if (hw->mac.type == e1000_i211)
9490                 hw->mac.arc_subsystem_valid = false;
9491
9492         if (!hw->mac.ops.acquire_swfw_sync(hw, mask)) {
9493                 for (i = 0; i <= FW_MAX_RETRIES; i++) {
9494                         E1000_WRITE_REG(hw, E1000_FWSTS, E1000_FWSTS_FWRI);
9495                         fw_cmd.hdr.cmd = FW_CMD_DRV_INFO;
9496                         fw_cmd.hdr.buf_len = FW_CMD_DRV_INFO_LEN;
9497                         fw_cmd.hdr.cmd_or_resp.cmd_resv = FW_CMD_RESERVED;
9498                         fw_cmd.port_num = hw->bus.func;
9499                         fw_cmd.drv_version = FW_FAMILY_DRV_VER;
9500                         fw_cmd.hdr.checksum = 0;
9501                         fw_cmd.hdr.checksum = e1000_calculate_checksum((u8 *)&fw_cmd,
9502                                                                    (FW_HDR_LEN +
9503                                                                     fw_cmd.hdr.buf_len));
9504                          e1000_host_interface_command(hw, (u8*)&fw_cmd,
9505                                                      sizeof(fw_cmd));
9506                         if (fw_cmd.hdr.cmd_or_resp.ret_status == FW_STATUS_SUCCESS)
9507                                 break;
9508                 }
9509         } else
9510                 dev_warn(pci_dev_to_dev(adapter->pdev),
9511                          "Unable to get semaphore, firmware init failed.\n");
9512         hw->mac.ops.release_swfw_sync(hw, mask);
9513 }
9514
9515 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba)
9516 {
9517         struct e1000_hw *hw = &adapter->hw;
9518         u32 dmac_thr;
9519         u16 hwm;
9520         u32 status;
9521
9522         if (hw->mac.type == e1000_i211)
9523                 return;
9524
9525         if (hw->mac.type > e1000_82580) {
9526                 if (adapter->dmac != IGB_DMAC_DISABLE) {
9527                         u32 reg;
9528
9529                         /* force threshold to 0.  */
9530                         E1000_WRITE_REG(hw, E1000_DMCTXTH, 0);
9531
9532                         /*
9533                          * DMA Coalescing high water mark needs to be greater
9534                          * than the Rx threshold. Set hwm to PBA - max frame
9535                          * size in 16B units, capping it at PBA - 6KB.
9536                          */
9537                         hwm = 64 * pba - adapter->max_frame_size / 16;
9538                         if (hwm < 64 * (pba - 6))
9539                                 hwm = 64 * (pba - 6);
9540                         reg = E1000_READ_REG(hw, E1000_FCRTC);
9541                         reg &= ~E1000_FCRTC_RTH_COAL_MASK;
9542                         reg |= ((hwm << E1000_FCRTC_RTH_COAL_SHIFT)
9543                                 & E1000_FCRTC_RTH_COAL_MASK);
9544                         E1000_WRITE_REG(hw, E1000_FCRTC, reg);
9545
9546                         /*
9547                          * Set the DMA Coalescing Rx threshold to PBA - 2 * max
9548                          * frame size, capping it at PBA - 10KB.
9549                          */
9550                         dmac_thr = pba - adapter->max_frame_size / 512;
9551                         if (dmac_thr < pba - 10)
9552                                 dmac_thr = pba - 10;
9553                         reg = E1000_READ_REG(hw, E1000_DMACR);
9554                         reg &= ~E1000_DMACR_DMACTHR_MASK;
9555                         reg |= ((dmac_thr << E1000_DMACR_DMACTHR_SHIFT)
9556                                 & E1000_DMACR_DMACTHR_MASK);
9557
9558                         /* transition to L0x or L1 if available..*/
9559                         reg |= (E1000_DMACR_DMAC_EN | E1000_DMACR_DMAC_LX_MASK);
9560
9561                         /* Check if status is 2.5Gb backplane connection
9562                          * before configuration of watchdog timer, which is
9563                          * in msec values in 12.8usec intervals
9564                          * watchdog timer= msec values in 32usec intervals
9565                          * for non 2.5Gb connection
9566                          */
9567                         if (hw->mac.type == e1000_i354) {
9568                                 status = E1000_READ_REG(hw, E1000_STATUS);
9569                                 if ((status & E1000_STATUS_2P5_SKU) &&
9570                                     (!(status & E1000_STATUS_2P5_SKU_OVER)))
9571                                         reg |= ((adapter->dmac * 5) >> 6);
9572                                 else
9573                                         reg |= ((adapter->dmac) >> 5);
9574                         } else {
9575                                 reg |= ((adapter->dmac) >> 5);
9576                         }
9577
9578                         /*
9579                          * Disable BMC-to-OS Watchdog enable
9580                          * on devices that support OS-to-BMC
9581                          */
9582                         if (hw->mac.type != e1000_i354)
9583                                 reg &= ~E1000_DMACR_DC_BMC2OSW_EN;
9584                         E1000_WRITE_REG(hw, E1000_DMACR, reg);
9585
9586                         /* no lower threshold to disable coalescing(smart fifb)-UTRESH=0*/
9587                         E1000_WRITE_REG(hw, E1000_DMCRTRH, 0);
9588
9589                         /* This sets the time to wait before requesting
9590                          * transition to low power state to number of usecs
9591                          * needed to receive 1 512 byte frame at gigabit
9592                          * line rate. On i350 device, time to make transition
9593                          * to Lx state is delayed by 4 usec with flush disable
9594                          * bit set to avoid losing mailbox interrupts
9595                          */
9596                         reg = E1000_READ_REG(hw, E1000_DMCTLX);
9597                         if (hw->mac.type == e1000_i350)
9598                                 reg |= IGB_DMCTLX_DCFLUSH_DIS;
9599
9600                         /* in 2.5Gb connection, TTLX unit is 0.4 usec
9601                          * which is 0x4*2 = 0xA. But delay is still 4 usec
9602                          */
9603                         if (hw->mac.type == e1000_i354) {
9604                                 status = E1000_READ_REG(hw, E1000_STATUS);
9605                                 if ((status & E1000_STATUS_2P5_SKU) &&
9606                                     (!(status & E1000_STATUS_2P5_SKU_OVER)))
9607                                         reg |= 0xA;
9608                                 else
9609                                         reg |= 0x4;
9610                         } else {
9611                                 reg |= 0x4;
9612                         }
9613                         E1000_WRITE_REG(hw, E1000_DMCTLX, reg);
9614
9615                         /* free space in tx packet buffer to wake from DMA coal */
9616                         E1000_WRITE_REG(hw, E1000_DMCTXTH, (IGB_MIN_TXPBSIZE -
9617                                 (IGB_TX_BUF_4096 + adapter->max_frame_size)) >> 6);
9618
9619                         /* make low power state decision controlled by DMA coal */
9620                         reg = E1000_READ_REG(hw, E1000_PCIEMISC);
9621                         reg &= ~E1000_PCIEMISC_LX_DECISION;
9622                         E1000_WRITE_REG(hw, E1000_PCIEMISC, reg);
9623                 } /* endif adapter->dmac is not disabled */
9624         } else if (hw->mac.type == e1000_82580) {
9625                 u32 reg = E1000_READ_REG(hw, E1000_PCIEMISC);
9626                 E1000_WRITE_REG(hw, E1000_PCIEMISC,
9627                                 reg & ~E1000_PCIEMISC_LX_DECISION);
9628                 E1000_WRITE_REG(hw, E1000_DMACR, 0);
9629         }
9630 }
9631
9632 #ifdef HAVE_I2C_SUPPORT
9633 /*  igb_read_i2c_byte - Reads 8 bit word over I2C
9634  *  @hw: pointer to hardware structure
9635  *  @byte_offset: byte offset to read
9636  *  @dev_addr: device address
9637  *  @data: value read
9638  *
9639  *  Performs byte read operation over I2C interface at
9640  *  a specified device address.
9641  */
9642 s32 igb_read_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
9643                                 u8 dev_addr, u8 *data)
9644 {
9645         struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
9646         struct i2c_client *this_client = adapter->i2c_client;
9647         s32 status;
9648         u16 swfw_mask = 0;
9649
9650         if (!this_client)
9651                 return E1000_ERR_I2C;
9652
9653         swfw_mask = E1000_SWFW_PHY0_SM;
9654
9655         if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask)
9656             != E1000_SUCCESS)
9657                 return E1000_ERR_SWFW_SYNC;
9658
9659         status = i2c_smbus_read_byte_data(this_client, byte_offset);
9660         hw->mac.ops.release_swfw_sync(hw, swfw_mask);
9661
9662         if (status < 0)
9663                 return E1000_ERR_I2C;
9664         else {
9665                 *data = status;
9666                 return E1000_SUCCESS;
9667         }
9668 }
9669
9670 /*  igb_write_i2c_byte - Writes 8 bit word over I2C
9671  *  @hw: pointer to hardware structure
9672  *  @byte_offset: byte offset to write
9673  *  @dev_addr: device address
9674  *  @data: value to write
9675  *
9676  *  Performs byte write operation over I2C interface at
9677  *  a specified device address.
9678  */
9679 s32 igb_write_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
9680                                  u8 dev_addr, u8 data)
9681 {
9682         struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
9683         struct i2c_client *this_client = adapter->i2c_client;
9684         s32 status;
9685         u16 swfw_mask = E1000_SWFW_PHY0_SM;
9686
9687         if (!this_client)
9688                 return E1000_ERR_I2C;
9689
9690         if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask) != E1000_SUCCESS)
9691                 return E1000_ERR_SWFW_SYNC;
9692         status = i2c_smbus_write_byte_data(this_client, byte_offset, data);
9693         hw->mac.ops.release_swfw_sync(hw, swfw_mask);
9694
9695         if (status)
9696                 return E1000_ERR_I2C;
9697         else
9698                 return E1000_SUCCESS;
9699 }
9700 #endif /*  HAVE_I2C_SUPPORT */
9701 /* igb_main.c */
9702
9703
9704 /**
9705  * igb_probe - Device Initialization Routine
9706  * @pdev: PCI device information struct
9707  * @ent: entry in igb_pci_tbl
9708  *
9709  * Returns 0 on success, negative on failure
9710  *
9711  * igb_probe initializes an adapter identified by a pci_dev structure.
9712  * The OS initialization, configuring of the adapter private structure,
9713  * and a hardware reset occur.
9714  **/
9715 int igb_kni_probe(struct pci_dev *pdev,
9716                                struct net_device **lad_dev)
9717 {
9718         struct net_device *netdev;
9719         struct igb_adapter *adapter;
9720         struct e1000_hw *hw;
9721         u16 eeprom_data = 0;
9722         u8 pba_str[E1000_PBANUM_LENGTH];
9723         s32 ret_val;
9724         static int global_quad_port_a; /* global quad port a indication */
9725         int i, err, pci_using_dac = 0;
9726         static int cards_found;
9727
9728         err = pci_enable_device_mem(pdev);
9729         if (err)
9730                 return err;
9731
9732 #ifdef NO_KNI
9733         pci_using_dac = 0;
9734         err = dma_set_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(64));
9735         if (!err) {
9736                 err = dma_set_coherent_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(64));
9737                 if (!err)
9738                         pci_using_dac = 1;
9739         } else {
9740                 err = dma_set_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(32));
9741                 if (err) {
9742                         err = dma_set_coherent_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(32));
9743                         if (err) {
9744                                 IGB_ERR("No usable DMA configuration, "
9745                                         "aborting\n");
9746                                 goto err_dma;
9747                         }
9748                 }
9749         }
9750
9751 #ifndef HAVE_ASPM_QUIRKS
9752         /* 82575 requires that the pci-e link partner disable the L0s state */
9753         switch (pdev->device) {
9754         case E1000_DEV_ID_82575EB_COPPER:
9755         case E1000_DEV_ID_82575EB_FIBER_SERDES:
9756         case E1000_DEV_ID_82575GB_QUAD_COPPER:
9757                 pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S);
9758         default:
9759                 break;
9760         }
9761
9762 #endif /* HAVE_ASPM_QUIRKS */
9763         err = pci_request_selected_regions(pdev,
9764                                            pci_select_bars(pdev,
9765                                                            IORESOURCE_MEM),
9766                                            igb_driver_name);
9767         if (err)
9768                 goto err_pci_reg;
9769
9770         pci_enable_pcie_error_reporting(pdev);
9771
9772         pci_set_master(pdev);
9773
9774         err = -ENOMEM;
9775 #endif /* NO_KNI */
9776 #ifdef HAVE_TX_MQ
9777         netdev = alloc_etherdev_mq(sizeof(struct igb_adapter),
9778                                    IGB_MAX_TX_QUEUES);
9779 #else
9780         netdev = alloc_etherdev(sizeof(struct igb_adapter));
9781 #endif /* HAVE_TX_MQ */
9782         if (!netdev)
9783                 goto err_alloc_etherdev;
9784
9785         SET_MODULE_OWNER(netdev);
9786         SET_NETDEV_DEV(netdev, &pdev->dev);
9787
9788         //pci_set_drvdata(pdev, netdev);
9789         adapter = netdev_priv(netdev);
9790         adapter->netdev = netdev;
9791         adapter->pdev = pdev;
9792         hw = &adapter->hw;
9793         hw->back = adapter;
9794         adapter->port_num = hw->bus.func;
9795         adapter->msg_enable = (1 << debug) - 1;
9796
9797 #ifdef HAVE_PCI_ERS
9798         err = pci_save_state(pdev);
9799         if (err)
9800                 goto err_ioremap;
9801 #endif
9802         err = -EIO;
9803         hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
9804                               pci_resource_len(pdev, 0));
9805         if (!hw->hw_addr)
9806                 goto err_ioremap;
9807
9808 #ifdef HAVE_NET_DEVICE_OPS
9809         netdev->netdev_ops = &igb_netdev_ops;
9810 #else /* HAVE_NET_DEVICE_OPS */
9811         netdev->open = &igb_open;
9812         netdev->stop = &igb_close;
9813         netdev->get_stats = &igb_get_stats;
9814 #ifdef HAVE_SET_RX_MODE
9815         netdev->set_rx_mode = &igb_set_rx_mode;
9816 #endif
9817         netdev->set_multicast_list = &igb_set_rx_mode;
9818         netdev->set_mac_address = &igb_set_mac;
9819         netdev->change_mtu = &igb_change_mtu;
9820         netdev->do_ioctl = &igb_ioctl;
9821 #ifdef HAVE_TX_TIMEOUT
9822         netdev->tx_timeout = &igb_tx_timeout;
9823 #endif
9824         netdev->vlan_rx_register = igb_vlan_mode;
9825         netdev->vlan_rx_add_vid = igb_vlan_rx_add_vid;
9826         netdev->vlan_rx_kill_vid = igb_vlan_rx_kill_vid;
9827 #ifdef CONFIG_NET_POLL_CONTROLLER
9828         netdev->poll_controller = igb_netpoll;
9829 #endif
9830         netdev->hard_start_xmit = &igb_xmit_frame;
9831 #endif /* HAVE_NET_DEVICE_OPS */
9832         igb_set_ethtool_ops(netdev);
9833 #ifdef HAVE_TX_TIMEOUT
9834         netdev->watchdog_timeo = 5 * HZ;
9835 #endif
9836
9837         strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
9838
9839         adapter->bd_number = cards_found;
9840
9841         /* setup the private structure */
9842         err = igb_sw_init(adapter);
9843         if (err)
9844                 goto err_sw_init;
9845
9846         e1000_get_bus_info(hw);
9847
9848         hw->phy.autoneg_wait_to_complete = FALSE;
9849         hw->mac.adaptive_ifs = FALSE;
9850
9851         /* Copper options */
9852         if (hw->phy.media_type == e1000_media_type_copper) {
9853                 hw->phy.mdix = AUTO_ALL_MODES;
9854                 hw->phy.disable_polarity_correction = FALSE;
9855                 hw->phy.ms_type = e1000_ms_hw_default;
9856         }
9857
9858         if (e1000_check_reset_block(hw))
9859                 dev_info(pci_dev_to_dev(pdev),
9860                         "PHY reset is blocked due to SOL/IDER session.\n");
9861
9862         /*
9863          * features is initialized to 0 in allocation, it might have bits
9864          * set by igb_sw_init so we should use an or instead of an
9865          * assignment.
9866          */
9867         netdev->features |= NETIF_F_SG |
9868                             NETIF_F_IP_CSUM |
9869 #ifdef NETIF_F_IPV6_CSUM
9870                             NETIF_F_IPV6_CSUM |
9871 #endif
9872 #ifdef NETIF_F_TSO
9873                             NETIF_F_TSO |
9874 #ifdef NETIF_F_TSO6
9875                             NETIF_F_TSO6 |
9876 #endif
9877 #endif /* NETIF_F_TSO */
9878 #ifdef NETIF_F_RXHASH
9879                             NETIF_F_RXHASH |
9880 #endif
9881                             NETIF_F_RXCSUM |
9882 #ifdef NETIF_F_HW_VLAN_CTAG_RX
9883                             NETIF_F_HW_VLAN_CTAG_RX |
9884                             NETIF_F_HW_VLAN_CTAG_TX;
9885 #else
9886                             NETIF_F_HW_VLAN_RX |
9887                             NETIF_F_HW_VLAN_TX;
9888 #endif
9889
9890         if (hw->mac.type >= e1000_82576)
9891                 netdev->features |= NETIF_F_SCTP_CSUM;
9892
9893 #ifdef HAVE_NDO_SET_FEATURES
9894         /* copy netdev features into list of user selectable features */
9895         netdev->hw_features |= netdev->features;
9896 #ifndef IGB_NO_LRO
9897
9898         /* give us the option of enabling LRO later */
9899         netdev->hw_features |= NETIF_F_LRO;
9900 #endif
9901 #else
9902 #ifdef NETIF_F_GRO
9903
9904         /* this is only needed on kernels prior to 2.6.39 */
9905         netdev->features |= NETIF_F_GRO;
9906 #endif
9907 #endif
9908
9909         /* set this bit last since it cannot be part of hw_features */
9910 #ifdef NETIF_F_HW_VLAN_CTAG_FILTER
9911         netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER;
9912 #else
9913         netdev->features |= NETIF_F_HW_VLAN_FILTER;
9914 #endif
9915
9916 #ifdef HAVE_NETDEV_VLAN_FEATURES
9917         netdev->vlan_features |= NETIF_F_TSO |
9918                                  NETIF_F_TSO6 |
9919                                  NETIF_F_IP_CSUM |
9920                                  NETIF_F_IPV6_CSUM |
9921                                  NETIF_F_SG;
9922
9923 #endif
9924         if (pci_using_dac)
9925                 netdev->features |= NETIF_F_HIGHDMA;
9926
9927 #ifdef NO_KNI
9928         adapter->en_mng_pt = e1000_enable_mng_pass_thru(hw);
9929 #ifdef DEBUG
9930         if (adapter->dmac != IGB_DMAC_DISABLE)
9931                 printk("%s: DMA Coalescing is enabled..\n", netdev->name);
9932 #endif
9933
9934         /* before reading the NVM, reset the controller to put the device in a
9935          * known good starting state */
9936         e1000_reset_hw(hw);
9937 #endif /* NO_KNI */
9938
9939         /* make sure the NVM is good */
9940         if (e1000_validate_nvm_checksum(hw) < 0) {
9941                 dev_err(pci_dev_to_dev(pdev), "The NVM Checksum Is Not"
9942                         " Valid\n");
9943                 err = -EIO;
9944                 goto err_eeprom;
9945         }
9946
9947         /* copy the MAC address out of the NVM */
9948         if (e1000_read_mac_addr(hw))
9949                 dev_err(pci_dev_to_dev(pdev), "NVM Read Error\n");
9950         memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
9951 #ifdef ETHTOOL_GPERMADDR
9952         memcpy(netdev->perm_addr, hw->mac.addr, netdev->addr_len);
9953
9954         if (!is_valid_ether_addr(netdev->perm_addr)) {
9955 #else
9956         if (!is_valid_ether_addr(netdev->dev_addr)) {
9957 #endif
9958                 dev_err(pci_dev_to_dev(pdev), "Invalid MAC Address\n");
9959                 err = -EIO;
9960                 goto err_eeprom;
9961         }
9962
9963         memcpy(&adapter->mac_table[0].addr, hw->mac.addr, netdev->addr_len);
9964         adapter->mac_table[0].queue = adapter->vfs_allocated_count;
9965         adapter->mac_table[0].state = (IGB_MAC_STATE_DEFAULT | IGB_MAC_STATE_IN_USE);
9966         igb_rar_set(adapter, 0);
9967
9968         /* get firmware version for ethtool -i */
9969         igb_set_fw_version(adapter);
9970
9971         /* Check if Media Autosense is enabled */
9972         if (hw->mac.type == e1000_82580)
9973                 igb_init_mas(adapter);
9974
9975 #ifdef NO_KNI
9976         setup_timer(&adapter->watchdog_timer, &igb_watchdog,
9977                     (unsigned long) adapter);
9978         if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
9979                 setup_timer(&adapter->dma_err_timer, &igb_dma_err_timer,
9980                             (unsigned long) adapter);
9981         setup_timer(&adapter->phy_info_timer, &igb_update_phy_info,
9982                     (unsigned long) adapter);
9983
9984         INIT_WORK(&adapter->reset_task, igb_reset_task);
9985         INIT_WORK(&adapter->watchdog_task, igb_watchdog_task);
9986         if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
9987                 INIT_WORK(&adapter->dma_err_task, igb_dma_err_task);
9988 #endif
9989
9990         /* Initialize link properties that are user-changeable */
9991         adapter->fc_autoneg = true;
9992         hw->mac.autoneg = true;
9993         hw->phy.autoneg_advertised = 0x2f;
9994
9995         hw->fc.requested_mode = e1000_fc_default;
9996         hw->fc.current_mode = e1000_fc_default;
9997
9998         e1000_validate_mdi_setting(hw);
9999
10000         /* By default, support wake on port A */
10001         if (hw->bus.func == 0)
10002                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
10003
10004         /* Check the NVM for wake support for non-port A ports */
10005         if (hw->mac.type >= e1000_82580)
10006                 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_A +
10007                                  NVM_82580_LAN_FUNC_OFFSET(hw->bus.func), 1,
10008                                  &eeprom_data);
10009         else if (hw->bus.func == 1)
10010                 e1000_read_nvm(hw, NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
10011
10012         if (eeprom_data & IGB_EEPROM_APME)
10013                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
10014
10015         /* now that we have the eeprom settings, apply the special cases where
10016          * the eeprom may be wrong or the board simply won't support wake on
10017          * lan on a particular port */
10018         switch (pdev->device) {
10019         case E1000_DEV_ID_82575GB_QUAD_COPPER:
10020                 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
10021                 break;
10022         case E1000_DEV_ID_82575EB_FIBER_SERDES:
10023         case E1000_DEV_ID_82576_FIBER:
10024         case E1000_DEV_ID_82576_SERDES:
10025                 /* Wake events only supported on port A for dual fiber
10026                  * regardless of eeprom setting */
10027                 if (E1000_READ_REG(hw, E1000_STATUS) & E1000_STATUS_FUNC_1)
10028                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
10029                 break;
10030         case E1000_DEV_ID_82576_QUAD_COPPER:
10031         case E1000_DEV_ID_82576_QUAD_COPPER_ET2:
10032                 /* if quad port adapter, disable WoL on all but port A */
10033                 if (global_quad_port_a != 0)
10034                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
10035                 else
10036                         adapter->flags |= IGB_FLAG_QUAD_PORT_A;
10037                 /* Reset for multiple quad port adapters */
10038                 if (++global_quad_port_a == 4)
10039                         global_quad_port_a = 0;
10040                 break;
10041         default:
10042                 /* If the device can't wake, don't set software support */
10043                 if (!device_can_wakeup(&adapter->pdev->dev))
10044                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
10045                 break;
10046         }
10047
10048         /* initialize the wol settings based on the eeprom settings */
10049         if (adapter->flags & IGB_FLAG_WOL_SUPPORTED)
10050                 adapter->wol |= E1000_WUFC_MAG;
10051
10052         /* Some vendors want WoL disabled by default, but still supported */
10053         if ((hw->mac.type == e1000_i350) &&
10054             (pdev->subsystem_vendor == PCI_VENDOR_ID_HP)) {
10055                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
10056                 adapter->wol = 0;
10057         }
10058
10059 #ifdef NO_KNI
10060         device_set_wakeup_enable(pci_dev_to_dev(adapter->pdev),
10061                                  adapter->flags & IGB_FLAG_WOL_SUPPORTED);
10062
10063         /* reset the hardware with the new settings */
10064         igb_reset(adapter);
10065         adapter->devrc = 0;
10066
10067 #ifdef HAVE_I2C_SUPPORT
10068         /* Init the I2C interface */
10069         err = igb_init_i2c(adapter);
10070         if (err) {
10071                 dev_err(&pdev->dev, "failed to init i2c interface\n");
10072                 goto err_eeprom;
10073         }
10074 #endif /* HAVE_I2C_SUPPORT */
10075
10076         /* let the f/w know that the h/w is now under the control of the
10077          * driver. */
10078         igb_get_hw_control(adapter);
10079
10080         strncpy(netdev->name, "eth%d", IFNAMSIZ);
10081         err = register_netdev(netdev);
10082         if (err)
10083                 goto err_register;
10084
10085 #ifdef CONFIG_IGB_VMDQ_NETDEV
10086         err = igb_init_vmdq_netdevs(adapter);
10087         if (err)
10088                 goto err_register;
10089 #endif
10090         /* carrier off reporting is important to ethtool even BEFORE open */
10091         netif_carrier_off(netdev);
10092
10093 #ifdef IGB_DCA
10094         if (dca_add_requester(&pdev->dev) == E1000_SUCCESS) {
10095                 adapter->flags |= IGB_FLAG_DCA_ENABLED;
10096                 dev_info(pci_dev_to_dev(pdev), "DCA enabled\n");
10097                 igb_setup_dca(adapter);
10098         }
10099
10100 #endif
10101 #ifdef HAVE_PTP_1588_CLOCK
10102         /* do hw tstamp init after resetting */
10103         igb_ptp_init(adapter);
10104 #endif /* HAVE_PTP_1588_CLOCK */
10105
10106 #endif /* NO_KNI */
10107         dev_info(pci_dev_to_dev(pdev), "Intel(R) Gigabit Ethernet Network Connection\n");
10108         /* print bus type/speed/width info */
10109         dev_info(pci_dev_to_dev(pdev), "%s: (PCIe:%s:%s) ",
10110                  netdev->name,
10111                  ((hw->bus.speed == e1000_bus_speed_2500) ? "2.5GT/s" :
10112                   (hw->bus.speed == e1000_bus_speed_5000) ? "5.0GT/s" :
10113                   (hw->mac.type == e1000_i354) ? "integrated" :
10114                                                             "unknown"),
10115                  ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
10116                   (hw->bus.width == e1000_bus_width_pcie_x2) ? "Width x2" :
10117                   (hw->bus.width == e1000_bus_width_pcie_x1) ? "Width x1" :
10118                   (hw->mac.type == e1000_i354) ? "integrated" :
10119                    "unknown"));
10120         dev_info(pci_dev_to_dev(pdev), "%s: MAC: ", netdev->name);
10121         for (i = 0; i < 6; i++)
10122                 printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
10123
10124         ret_val = e1000_read_pba_string(hw, pba_str, E1000_PBANUM_LENGTH);
10125         if (ret_val)
10126                 strncpy(pba_str, "Unknown", sizeof(pba_str) - 1);
10127         dev_info(pci_dev_to_dev(pdev), "%s: PBA No: %s\n", netdev->name,
10128                  pba_str);
10129
10130
10131         /* Initialize the thermal sensor on i350 devices. */
10132         if (hw->mac.type == e1000_i350) {
10133                 if (hw->bus.func == 0) {
10134                         u16 ets_word;
10135
10136                         /*
10137                          * Read the NVM to determine if this i350 device
10138                          * supports an external thermal sensor.
10139                          */
10140                         e1000_read_nvm(hw, NVM_ETS_CFG, 1, &ets_word);
10141                         if (ets_word != 0x0000 && ets_word != 0xFFFF)
10142                                 adapter->ets = true;
10143                         else
10144                                 adapter->ets = false;
10145                 }
10146 #ifdef NO_KNI
10147 #ifdef IGB_HWMON
10148
10149                 igb_sysfs_init(adapter);
10150 #else
10151 #ifdef IGB_PROCFS
10152
10153                 igb_procfs_init(adapter);
10154 #endif /* IGB_PROCFS */
10155 #endif /* IGB_HWMON */
10156 #endif /* NO_KNI */
10157         } else {
10158                 adapter->ets = false;
10159         }
10160
10161         if (hw->phy.media_type == e1000_media_type_copper) {
10162                 switch (hw->mac.type) {
10163                 case e1000_i350:
10164                 case e1000_i210:
10165                 case e1000_i211:
10166                         /* Enable EEE for internal copper PHY devices */
10167                         err = e1000_set_eee_i350(hw);
10168                         if ((!err) &&
10169                             (adapter->flags & IGB_FLAG_EEE))
10170                                 adapter->eee_advert =
10171                                         MDIO_EEE_100TX | MDIO_EEE_1000T;
10172                         break;
10173                 case e1000_i354:
10174                         if ((E1000_READ_REG(hw, E1000_CTRL_EXT)) &
10175                             (E1000_CTRL_EXT_LINK_MODE_SGMII)) {
10176                                 err = e1000_set_eee_i354(hw);
10177                                 if ((!err) &&
10178                                     (adapter->flags & IGB_FLAG_EEE))
10179                                         adapter->eee_advert =
10180                                            MDIO_EEE_100TX | MDIO_EEE_1000T;
10181                         }
10182                         break;
10183                 default:
10184                         break;
10185                 }
10186         }
10187
10188         /* send driver version info to firmware */
10189         if (hw->mac.type >= e1000_i350)
10190                 igb_init_fw(adapter);
10191
10192 #ifndef IGB_NO_LRO
10193         if (netdev->features & NETIF_F_LRO)
10194                 dev_info(pci_dev_to_dev(pdev), "Internal LRO is enabled \n");
10195         else
10196                 dev_info(pci_dev_to_dev(pdev), "LRO is disabled \n");
10197 #endif
10198         dev_info(pci_dev_to_dev(pdev),
10199                  "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
10200                  adapter->msix_entries ? "MSI-X" :
10201                  (adapter->flags & IGB_FLAG_HAS_MSI) ? "MSI" : "legacy",
10202                  adapter->num_rx_queues, adapter->num_tx_queues);
10203
10204         cards_found++;
10205         *lad_dev = netdev;
10206
10207         pm_runtime_put_noidle(&pdev->dev);
10208         return 0;
10209
10210 //err_register:
10211 //      igb_release_hw_control(adapter);
10212 #ifdef HAVE_I2C_SUPPORT
10213         memset(&adapter->i2c_adap, 0, sizeof(adapter->i2c_adap));
10214 #endif /* HAVE_I2C_SUPPORT */
10215 err_eeprom:
10216 //      if (!e1000_check_reset_block(hw))
10217 //              e1000_phy_hw_reset(hw);
10218
10219         if (hw->flash_address)
10220                 iounmap(hw->flash_address);
10221 err_sw_init:
10222 //      igb_clear_interrupt_scheme(adapter);
10223 //      igb_reset_sriov_capability(adapter);
10224         iounmap(hw->hw_addr);
10225 err_ioremap:
10226         free_netdev(netdev);
10227 err_alloc_etherdev:
10228 //      pci_release_selected_regions(pdev,
10229 //                                   pci_select_bars(pdev, IORESOURCE_MEM));
10230 //err_pci_reg:
10231 //err_dma:
10232         pci_disable_device(pdev);
10233         return err;
10234 }
10235
10236
10237 void igb_kni_remove(struct pci_dev *pdev)
10238 {
10239         pci_disable_device(pdev);
10240 }