4 * Copyright(c) 2010-2016 Intel Corporation. All rights reserved.
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8 * modification, are permitted provided that the following conditions
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14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
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31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 #include <sys/types.h>
35 #include <sys/queue.h>
44 #include <netinet/in.h>
46 #include <rte_byteorder.h>
48 #include <rte_debug.h>
49 #include <rte_interrupts.h>
51 #include <rte_memory.h>
52 #include <rte_memcpy.h>
53 #include <rte_memzone.h>
54 #include <rte_launch.h>
56 #include <rte_per_lcore.h>
57 #include <rte_lcore.h>
58 #include <rte_atomic.h>
59 #include <rte_branch_prediction.h>
60 #include <rte_common.h>
61 #include <rte_mempool.h>
62 #include <rte_malloc.h>
64 #include <rte_errno.h>
65 #include <rte_spinlock.h>
66 #include <rte_string_fns.h>
68 #include "rte_ether.h"
69 #include "rte_ethdev.h"
71 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
72 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
73 static struct rte_eth_dev_data *rte_eth_dev_data;
74 static uint8_t eth_dev_last_created_port;
75 static uint8_t nb_ports;
77 /* spinlock for eth device callbacks */
78 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
80 /* spinlock for add/remove rx callbacks */
81 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
83 /* spinlock for add/remove tx callbacks */
84 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
86 /* store statistics names and its offset in stats structure */
87 struct rte_eth_xstats_name_off {
88 char name[RTE_ETH_XSTATS_NAME_SIZE];
92 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
93 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
94 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
95 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
96 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
97 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
98 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
99 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
103 #define RTE_NB_STATS (sizeof(rte_stats_strings) / sizeof(rte_stats_strings[0]))
105 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
106 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
107 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
108 {"errors", offsetof(struct rte_eth_stats, q_errors)},
111 #define RTE_NB_RXQ_STATS (sizeof(rte_rxq_stats_strings) / \
112 sizeof(rte_rxq_stats_strings[0]))
114 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
115 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
116 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
118 #define RTE_NB_TXQ_STATS (sizeof(rte_txq_stats_strings) / \
119 sizeof(rte_txq_stats_strings[0]))
123 * The user application callback description.
125 * It contains callback address to be registered by user application,
126 * the pointer to the parameters for callback, and the event type.
128 struct rte_eth_dev_callback {
129 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
130 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
131 void *cb_arg; /**< Parameter for callback */
132 enum rte_eth_event_type event; /**< Interrupt event type */
133 uint32_t active; /**< Callback is executing */
147 rte_eth_dev_data_alloc(void)
149 const unsigned flags = 0;
150 const struct rte_memzone *mz;
152 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
153 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
154 RTE_MAX_ETHPORTS * sizeof(*rte_eth_dev_data),
155 rte_socket_id(), flags);
157 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
159 rte_panic("Cannot allocate memzone for ethernet port data\n");
161 rte_eth_dev_data = mz->addr;
162 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
163 memset(rte_eth_dev_data, 0,
164 RTE_MAX_ETHPORTS * sizeof(*rte_eth_dev_data));
168 rte_eth_dev_allocated(const char *name)
172 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
173 if ((rte_eth_devices[i].attached == DEV_ATTACHED) &&
174 strcmp(rte_eth_devices[i].data->name, name) == 0)
175 return &rte_eth_devices[i];
181 rte_eth_dev_find_free_port(void)
185 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
186 if (rte_eth_devices[i].attached == DEV_DETACHED)
189 return RTE_MAX_ETHPORTS;
193 rte_eth_dev_allocate(const char *name)
196 struct rte_eth_dev *eth_dev;
198 port_id = rte_eth_dev_find_free_port();
199 if (port_id == RTE_MAX_ETHPORTS) {
200 RTE_PMD_DEBUG_TRACE("Reached maximum number of Ethernet ports\n");
204 if (rte_eth_dev_data == NULL)
205 rte_eth_dev_data_alloc();
207 if (rte_eth_dev_allocated(name) != NULL) {
208 RTE_PMD_DEBUG_TRACE("Ethernet Device with name %s already allocated!\n",
213 eth_dev = &rte_eth_devices[port_id];
214 eth_dev->data = &rte_eth_dev_data[port_id];
215 snprintf(eth_dev->data->name, sizeof(eth_dev->data->name), "%s", name);
216 eth_dev->data->port_id = port_id;
217 eth_dev->attached = DEV_ATTACHED;
218 eth_dev_last_created_port = port_id;
224 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
229 eth_dev->attached = DEV_DETACHED;
235 rte_eth_dev_pci_probe(struct rte_pci_driver *pci_drv,
236 struct rte_pci_device *pci_dev)
238 struct eth_driver *eth_drv;
239 struct rte_eth_dev *eth_dev;
240 char ethdev_name[RTE_ETH_NAME_MAX_LEN];
244 eth_drv = (struct eth_driver *)pci_drv;
246 rte_eal_pci_device_name(&pci_dev->addr, ethdev_name,
247 sizeof(ethdev_name));
249 eth_dev = rte_eth_dev_allocate(ethdev_name);
253 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
254 eth_dev->data->dev_private = rte_zmalloc("ethdev private structure",
255 eth_drv->dev_private_size,
256 RTE_CACHE_LINE_SIZE);
257 if (eth_dev->data->dev_private == NULL)
258 rte_panic("Cannot allocate memzone for private port data\n");
260 eth_dev->pci_dev = pci_dev;
261 eth_dev->driver = eth_drv;
262 eth_dev->data->rx_mbuf_alloc_failed = 0;
264 /* init user callbacks */
265 TAILQ_INIT(&(eth_dev->link_intr_cbs));
268 * Set the default MTU.
270 eth_dev->data->mtu = ETHER_MTU;
272 /* Invoke PMD device initialization function */
273 diag = (*eth_drv->eth_dev_init)(eth_dev);
277 RTE_PMD_DEBUG_TRACE("driver %s: eth_dev_init(vendor_id=0x%x device_id=0x%x) failed\n",
278 pci_drv->driver.name,
279 (unsigned) pci_dev->id.vendor_id,
280 (unsigned) pci_dev->id.device_id);
281 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
282 rte_free(eth_dev->data->dev_private);
283 rte_eth_dev_release_port(eth_dev);
288 rte_eth_dev_pci_remove(struct rte_pci_device *pci_dev)
290 const struct eth_driver *eth_drv;
291 struct rte_eth_dev *eth_dev;
292 char ethdev_name[RTE_ETH_NAME_MAX_LEN];
298 rte_eal_pci_device_name(&pci_dev->addr, ethdev_name,
299 sizeof(ethdev_name));
301 eth_dev = rte_eth_dev_allocated(ethdev_name);
305 eth_drv = (const struct eth_driver *)pci_dev->driver;
307 /* Invoke PMD device uninit function */
308 if (*eth_drv->eth_dev_uninit) {
309 ret = (*eth_drv->eth_dev_uninit)(eth_dev);
314 /* free ether device */
315 rte_eth_dev_release_port(eth_dev);
317 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
318 rte_free(eth_dev->data->dev_private);
320 eth_dev->pci_dev = NULL;
321 eth_dev->driver = NULL;
322 eth_dev->data = NULL;
328 rte_eth_dev_is_valid_port(uint8_t port_id)
330 if (port_id >= RTE_MAX_ETHPORTS ||
331 rte_eth_devices[port_id].attached != DEV_ATTACHED)
338 rte_eth_dev_socket_id(uint8_t port_id)
340 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
341 return rte_eth_devices[port_id].data->numa_node;
345 rte_eth_dev_count(void)
351 rte_eth_dev_get_name_by_port(uint8_t port_id, char *name)
355 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
358 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
362 /* shouldn't check 'rte_eth_devices[i].data',
363 * because it might be overwritten by VDEV PMD */
364 tmp = rte_eth_dev_data[port_id].name;
370 rte_eth_dev_get_port_by_name(const char *name, uint8_t *port_id)
375 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
382 *port_id = RTE_MAX_ETHPORTS;
384 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
387 rte_eth_dev_data[i].name, strlen(name))) {
398 rte_eth_dev_is_detachable(uint8_t port_id)
402 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
404 switch (rte_eth_devices[port_id].data->kdrv) {
405 case RTE_KDRV_IGB_UIO:
406 case RTE_KDRV_UIO_GENERIC:
407 case RTE_KDRV_NIC_UIO:
414 dev_flags = rte_eth_devices[port_id].data->dev_flags;
415 if ((dev_flags & RTE_ETH_DEV_DETACHABLE) &&
416 (!(dev_flags & RTE_ETH_DEV_BONDED_SLAVE)))
422 /* attach the new device, then store port_id of the device */
424 rte_eth_dev_attach(const char *devargs, uint8_t *port_id)
427 int current = rte_eth_dev_count();
431 if ((devargs == NULL) || (port_id == NULL)) {
436 /* parse devargs, then retrieve device name and args */
437 if (rte_eal_parse_devargs_str(devargs, &name, &args))
440 ret = rte_eal_dev_attach(name, args);
444 /* no point looking at the port count if no port exists */
445 if (!rte_eth_dev_count()) {
446 RTE_LOG(ERR, EAL, "No port found for device (%s)\n", name);
451 /* if nothing happened, there is a bug here, since some driver told us
452 * it did attach a device, but did not create a port.
454 if (current == rte_eth_dev_count()) {
459 *port_id = eth_dev_last_created_port;
468 /* detach the device, then store the name of the device */
470 rte_eth_dev_detach(uint8_t port_id, char *name)
479 /* FIXME: move this to eal, once device flags are relocated there */
480 if (rte_eth_dev_is_detachable(port_id))
483 snprintf(name, sizeof(rte_eth_devices[port_id].data->name),
484 "%s", rte_eth_devices[port_id].data->name);
485 ret = rte_eal_dev_detach(name);
496 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
498 uint16_t old_nb_queues = dev->data->nb_rx_queues;
502 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
503 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
504 sizeof(dev->data->rx_queues[0]) * nb_queues,
505 RTE_CACHE_LINE_SIZE);
506 if (dev->data->rx_queues == NULL) {
507 dev->data->nb_rx_queues = 0;
510 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
511 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
513 rxq = dev->data->rx_queues;
515 for (i = nb_queues; i < old_nb_queues; i++)
516 (*dev->dev_ops->rx_queue_release)(rxq[i]);
517 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
518 RTE_CACHE_LINE_SIZE);
521 if (nb_queues > old_nb_queues) {
522 uint16_t new_qs = nb_queues - old_nb_queues;
524 memset(rxq + old_nb_queues, 0,
525 sizeof(rxq[0]) * new_qs);
528 dev->data->rx_queues = rxq;
530 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
531 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
533 rxq = dev->data->rx_queues;
535 for (i = nb_queues; i < old_nb_queues; i++)
536 (*dev->dev_ops->rx_queue_release)(rxq[i]);
538 dev->data->nb_rx_queues = nb_queues;
543 rte_eth_dev_rx_queue_start(uint8_t port_id, uint16_t rx_queue_id)
545 struct rte_eth_dev *dev;
547 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
549 dev = &rte_eth_devices[port_id];
550 if (rx_queue_id >= dev->data->nb_rx_queues) {
551 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
555 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
557 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
558 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
559 " already started\n",
560 rx_queue_id, port_id);
564 return dev->dev_ops->rx_queue_start(dev, rx_queue_id);
569 rte_eth_dev_rx_queue_stop(uint8_t port_id, uint16_t rx_queue_id)
571 struct rte_eth_dev *dev;
573 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
575 dev = &rte_eth_devices[port_id];
576 if (rx_queue_id >= dev->data->nb_rx_queues) {
577 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
581 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
583 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
584 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
585 " already stopped\n",
586 rx_queue_id, port_id);
590 return dev->dev_ops->rx_queue_stop(dev, rx_queue_id);
595 rte_eth_dev_tx_queue_start(uint8_t port_id, uint16_t tx_queue_id)
597 struct rte_eth_dev *dev;
599 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
601 dev = &rte_eth_devices[port_id];
602 if (tx_queue_id >= dev->data->nb_tx_queues) {
603 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
607 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
609 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
610 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
611 " already started\n",
612 tx_queue_id, port_id);
616 return dev->dev_ops->tx_queue_start(dev, tx_queue_id);
621 rte_eth_dev_tx_queue_stop(uint8_t port_id, uint16_t tx_queue_id)
623 struct rte_eth_dev *dev;
625 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
627 dev = &rte_eth_devices[port_id];
628 if (tx_queue_id >= dev->data->nb_tx_queues) {
629 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
633 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
635 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
636 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
637 " already stopped\n",
638 tx_queue_id, port_id);
642 return dev->dev_ops->tx_queue_stop(dev, tx_queue_id);
647 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
649 uint16_t old_nb_queues = dev->data->nb_tx_queues;
653 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
654 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
655 sizeof(dev->data->tx_queues[0]) * nb_queues,
656 RTE_CACHE_LINE_SIZE);
657 if (dev->data->tx_queues == NULL) {
658 dev->data->nb_tx_queues = 0;
661 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
662 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
664 txq = dev->data->tx_queues;
666 for (i = nb_queues; i < old_nb_queues; i++)
667 (*dev->dev_ops->tx_queue_release)(txq[i]);
668 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
669 RTE_CACHE_LINE_SIZE);
672 if (nb_queues > old_nb_queues) {
673 uint16_t new_qs = nb_queues - old_nb_queues;
675 memset(txq + old_nb_queues, 0,
676 sizeof(txq[0]) * new_qs);
679 dev->data->tx_queues = txq;
681 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
682 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
684 txq = dev->data->tx_queues;
686 for (i = nb_queues; i < old_nb_queues; i++)
687 (*dev->dev_ops->tx_queue_release)(txq[i]);
689 dev->data->nb_tx_queues = nb_queues;
694 rte_eth_speed_bitflag(uint32_t speed, int duplex)
697 case ETH_SPEED_NUM_10M:
698 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
699 case ETH_SPEED_NUM_100M:
700 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
701 case ETH_SPEED_NUM_1G:
702 return ETH_LINK_SPEED_1G;
703 case ETH_SPEED_NUM_2_5G:
704 return ETH_LINK_SPEED_2_5G;
705 case ETH_SPEED_NUM_5G:
706 return ETH_LINK_SPEED_5G;
707 case ETH_SPEED_NUM_10G:
708 return ETH_LINK_SPEED_10G;
709 case ETH_SPEED_NUM_20G:
710 return ETH_LINK_SPEED_20G;
711 case ETH_SPEED_NUM_25G:
712 return ETH_LINK_SPEED_25G;
713 case ETH_SPEED_NUM_40G:
714 return ETH_LINK_SPEED_40G;
715 case ETH_SPEED_NUM_50G:
716 return ETH_LINK_SPEED_50G;
717 case ETH_SPEED_NUM_56G:
718 return ETH_LINK_SPEED_56G;
719 case ETH_SPEED_NUM_100G:
720 return ETH_LINK_SPEED_100G;
727 rte_eth_dev_configure(uint8_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
728 const struct rte_eth_conf *dev_conf)
730 struct rte_eth_dev *dev;
731 struct rte_eth_dev_info dev_info;
734 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
736 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
738 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
739 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
743 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
745 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
746 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
750 dev = &rte_eth_devices[port_id];
752 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
753 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
755 if (dev->data->dev_started) {
757 "port %d must be stopped to allow configuration\n", port_id);
761 /* Copy the dev_conf parameter into the dev structure */
762 memcpy(&dev->data->dev_conf, dev_conf, sizeof(dev->data->dev_conf));
765 * Check that the numbers of RX and TX queues are not greater
766 * than the maximum number of RX and TX queues supported by the
769 (*dev->dev_ops->dev_infos_get)(dev, &dev_info);
771 if (nb_rx_q == 0 && nb_tx_q == 0) {
772 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d both rx and tx queue cannot be 0\n", port_id);
776 if (nb_rx_q > dev_info.max_rx_queues) {
777 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_rx_queues=%d > %d\n",
778 port_id, nb_rx_q, dev_info.max_rx_queues);
782 if (nb_tx_q > dev_info.max_tx_queues) {
783 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_tx_queues=%d > %d\n",
784 port_id, nb_tx_q, dev_info.max_tx_queues);
789 * If link state interrupt is enabled, check that the
790 * device supports it.
792 if ((dev_conf->intr_conf.lsc == 1) &&
793 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
794 RTE_PMD_DEBUG_TRACE("driver %s does not support lsc\n",
795 dev->data->drv_name);
800 * If jumbo frames are enabled, check that the maximum RX packet
801 * length is supported by the configured device.
803 if (dev_conf->rxmode.jumbo_frame == 1) {
804 if (dev_conf->rxmode.max_rx_pkt_len >
805 dev_info.max_rx_pktlen) {
806 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
807 " > max valid value %u\n",
809 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
810 (unsigned)dev_info.max_rx_pktlen);
812 } else if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN) {
813 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
814 " < min valid value %u\n",
816 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
817 (unsigned)ETHER_MIN_LEN);
821 if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN ||
822 dev_conf->rxmode.max_rx_pkt_len > ETHER_MAX_LEN)
823 /* Use default value */
824 dev->data->dev_conf.rxmode.max_rx_pkt_len =
829 * Setup new number of RX/TX queues and reconfigure device.
831 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
833 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_rx_queue_config = %d\n",
838 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
840 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_tx_queue_config = %d\n",
842 rte_eth_dev_rx_queue_config(dev, 0);
846 diag = (*dev->dev_ops->dev_configure)(dev);
848 RTE_PMD_DEBUG_TRACE("port%d dev_configure = %d\n",
850 rte_eth_dev_rx_queue_config(dev, 0);
851 rte_eth_dev_tx_queue_config(dev, 0);
859 rte_eth_dev_config_restore(uint8_t port_id)
861 struct rte_eth_dev *dev;
862 struct rte_eth_dev_info dev_info;
863 struct ether_addr addr;
867 dev = &rte_eth_devices[port_id];
869 rte_eth_dev_info_get(port_id, &dev_info);
871 if (RTE_ETH_DEV_SRIOV(dev).active)
872 pool = RTE_ETH_DEV_SRIOV(dev).def_vmdq_idx;
874 /* replay MAC address configuration */
875 for (i = 0; i < dev_info.max_mac_addrs; i++) {
876 addr = dev->data->mac_addrs[i];
878 /* skip zero address */
879 if (is_zero_ether_addr(&addr))
882 /* add address to the hardware */
883 if (*dev->dev_ops->mac_addr_add &&
884 (dev->data->mac_pool_sel[i] & (1ULL << pool)))
885 (*dev->dev_ops->mac_addr_add)(dev, &addr, i, pool);
887 RTE_PMD_DEBUG_TRACE("port %d: MAC address array not supported\n",
889 /* exit the loop but not return an error */
894 /* replay promiscuous configuration */
895 if (rte_eth_promiscuous_get(port_id) == 1)
896 rte_eth_promiscuous_enable(port_id);
897 else if (rte_eth_promiscuous_get(port_id) == 0)
898 rte_eth_promiscuous_disable(port_id);
900 /* replay all multicast configuration */
901 if (rte_eth_allmulticast_get(port_id) == 1)
902 rte_eth_allmulticast_enable(port_id);
903 else if (rte_eth_allmulticast_get(port_id) == 0)
904 rte_eth_allmulticast_disable(port_id);
908 rte_eth_dev_start(uint8_t port_id)
910 struct rte_eth_dev *dev;
913 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
915 dev = &rte_eth_devices[port_id];
917 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
919 if (dev->data->dev_started != 0) {
920 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu8
921 " already started\n",
926 diag = (*dev->dev_ops->dev_start)(dev);
928 dev->data->dev_started = 1;
932 rte_eth_dev_config_restore(port_id);
934 if (dev->data->dev_conf.intr_conf.lsc == 0) {
935 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
936 (*dev->dev_ops->link_update)(dev, 0);
942 rte_eth_dev_stop(uint8_t port_id)
944 struct rte_eth_dev *dev;
946 RTE_ETH_VALID_PORTID_OR_RET(port_id);
947 dev = &rte_eth_devices[port_id];
949 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
951 if (dev->data->dev_started == 0) {
952 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu8
953 " already stopped\n",
958 dev->data->dev_started = 0;
959 (*dev->dev_ops->dev_stop)(dev);
963 rte_eth_dev_set_link_up(uint8_t port_id)
965 struct rte_eth_dev *dev;
967 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
969 dev = &rte_eth_devices[port_id];
971 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
972 return (*dev->dev_ops->dev_set_link_up)(dev);
976 rte_eth_dev_set_link_down(uint8_t port_id)
978 struct rte_eth_dev *dev;
980 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
982 dev = &rte_eth_devices[port_id];
984 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
985 return (*dev->dev_ops->dev_set_link_down)(dev);
989 rte_eth_dev_close(uint8_t port_id)
991 struct rte_eth_dev *dev;
993 RTE_ETH_VALID_PORTID_OR_RET(port_id);
994 dev = &rte_eth_devices[port_id];
996 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
997 dev->data->dev_started = 0;
998 (*dev->dev_ops->dev_close)(dev);
1000 rte_free(dev->data->rx_queues);
1001 dev->data->rx_queues = NULL;
1002 rte_free(dev->data->tx_queues);
1003 dev->data->tx_queues = NULL;
1007 rte_eth_rx_queue_setup(uint8_t port_id, uint16_t rx_queue_id,
1008 uint16_t nb_rx_desc, unsigned int socket_id,
1009 const struct rte_eth_rxconf *rx_conf,
1010 struct rte_mempool *mp)
1013 uint32_t mbp_buf_size;
1014 struct rte_eth_dev *dev;
1015 struct rte_eth_dev_info dev_info;
1017 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1019 dev = &rte_eth_devices[port_id];
1020 if (rx_queue_id >= dev->data->nb_rx_queues) {
1021 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
1025 if (dev->data->dev_started) {
1026 RTE_PMD_DEBUG_TRACE(
1027 "port %d must be stopped to allow configuration\n", port_id);
1031 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1032 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1035 * Check the size of the mbuf data buffer.
1036 * This value must be provided in the private data of the memory pool.
1037 * First check that the memory pool has a valid private data.
1039 rte_eth_dev_info_get(port_id, &dev_info);
1040 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1041 RTE_PMD_DEBUG_TRACE("%s private_data_size %d < %d\n",
1042 mp->name, (int) mp->private_data_size,
1043 (int) sizeof(struct rte_pktmbuf_pool_private));
1046 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1048 if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1049 RTE_PMD_DEBUG_TRACE("%s mbuf_data_room_size %d < %d "
1050 "(RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)"
1054 (int)(RTE_PKTMBUF_HEADROOM +
1055 dev_info.min_rx_bufsize),
1056 (int)RTE_PKTMBUF_HEADROOM,
1057 (int)dev_info.min_rx_bufsize);
1061 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1062 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1063 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1065 RTE_PMD_DEBUG_TRACE("Invalid value for nb_rx_desc(=%hu), "
1066 "should be: <= %hu, = %hu, and a product of %hu\n",
1068 dev_info.rx_desc_lim.nb_max,
1069 dev_info.rx_desc_lim.nb_min,
1070 dev_info.rx_desc_lim.nb_align);
1074 if (rx_conf == NULL)
1075 rx_conf = &dev_info.default_rxconf;
1077 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1078 socket_id, rx_conf, mp);
1080 if (!dev->data->min_rx_buf_size ||
1081 dev->data->min_rx_buf_size > mbp_buf_size)
1082 dev->data->min_rx_buf_size = mbp_buf_size;
1089 rte_eth_tx_queue_setup(uint8_t port_id, uint16_t tx_queue_id,
1090 uint16_t nb_tx_desc, unsigned int socket_id,
1091 const struct rte_eth_txconf *tx_conf)
1093 struct rte_eth_dev *dev;
1094 struct rte_eth_dev_info dev_info;
1096 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1098 dev = &rte_eth_devices[port_id];
1099 if (tx_queue_id >= dev->data->nb_tx_queues) {
1100 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
1104 if (dev->data->dev_started) {
1105 RTE_PMD_DEBUG_TRACE(
1106 "port %d must be stopped to allow configuration\n", port_id);
1110 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1111 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
1113 rte_eth_dev_info_get(port_id, &dev_info);
1115 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
1116 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
1117 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
1118 RTE_PMD_DEBUG_TRACE("Invalid value for nb_tx_desc(=%hu), "
1119 "should be: <= %hu, = %hu, and a product of %hu\n",
1121 dev_info.tx_desc_lim.nb_max,
1122 dev_info.tx_desc_lim.nb_min,
1123 dev_info.tx_desc_lim.nb_align);
1127 if (tx_conf == NULL)
1128 tx_conf = &dev_info.default_txconf;
1130 return (*dev->dev_ops->tx_queue_setup)(dev, tx_queue_id, nb_tx_desc,
1131 socket_id, tx_conf);
1135 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
1136 void *userdata __rte_unused)
1140 for (i = 0; i < unsent; i++)
1141 rte_pktmbuf_free(pkts[i]);
1145 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
1148 uint64_t *count = userdata;
1151 for (i = 0; i < unsent; i++)
1152 rte_pktmbuf_free(pkts[i]);
1158 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
1159 buffer_tx_error_fn cbfn, void *userdata)
1161 buffer->error_callback = cbfn;
1162 buffer->error_userdata = userdata;
1167 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
1174 buffer->size = size;
1175 if (buffer->error_callback == NULL) {
1176 ret = rte_eth_tx_buffer_set_err_callback(
1177 buffer, rte_eth_tx_buffer_drop_callback, NULL);
1184 rte_eth_promiscuous_enable(uint8_t port_id)
1186 struct rte_eth_dev *dev;
1188 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1189 dev = &rte_eth_devices[port_id];
1191 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_enable);
1192 (*dev->dev_ops->promiscuous_enable)(dev);
1193 dev->data->promiscuous = 1;
1197 rte_eth_promiscuous_disable(uint8_t port_id)
1199 struct rte_eth_dev *dev;
1201 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1202 dev = &rte_eth_devices[port_id];
1204 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_disable);
1205 dev->data->promiscuous = 0;
1206 (*dev->dev_ops->promiscuous_disable)(dev);
1210 rte_eth_promiscuous_get(uint8_t port_id)
1212 struct rte_eth_dev *dev;
1214 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1216 dev = &rte_eth_devices[port_id];
1217 return dev->data->promiscuous;
1221 rte_eth_allmulticast_enable(uint8_t port_id)
1223 struct rte_eth_dev *dev;
1225 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1226 dev = &rte_eth_devices[port_id];
1228 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_enable);
1229 (*dev->dev_ops->allmulticast_enable)(dev);
1230 dev->data->all_multicast = 1;
1234 rte_eth_allmulticast_disable(uint8_t port_id)
1236 struct rte_eth_dev *dev;
1238 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1239 dev = &rte_eth_devices[port_id];
1241 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_disable);
1242 dev->data->all_multicast = 0;
1243 (*dev->dev_ops->allmulticast_disable)(dev);
1247 rte_eth_allmulticast_get(uint8_t port_id)
1249 struct rte_eth_dev *dev;
1251 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1253 dev = &rte_eth_devices[port_id];
1254 return dev->data->all_multicast;
1258 rte_eth_dev_atomic_read_link_status(struct rte_eth_dev *dev,
1259 struct rte_eth_link *link)
1261 struct rte_eth_link *dst = link;
1262 struct rte_eth_link *src = &(dev->data->dev_link);
1264 if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
1265 *(uint64_t *)src) == 0)
1272 rte_eth_link_get(uint8_t port_id, struct rte_eth_link *eth_link)
1274 struct rte_eth_dev *dev;
1276 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1277 dev = &rte_eth_devices[port_id];
1279 if (dev->data->dev_conf.intr_conf.lsc != 0)
1280 rte_eth_dev_atomic_read_link_status(dev, eth_link);
1282 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1283 (*dev->dev_ops->link_update)(dev, 1);
1284 *eth_link = dev->data->dev_link;
1289 rte_eth_link_get_nowait(uint8_t port_id, struct rte_eth_link *eth_link)
1291 struct rte_eth_dev *dev;
1293 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1294 dev = &rte_eth_devices[port_id];
1296 if (dev->data->dev_conf.intr_conf.lsc != 0)
1297 rte_eth_dev_atomic_read_link_status(dev, eth_link);
1299 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1300 (*dev->dev_ops->link_update)(dev, 0);
1301 *eth_link = dev->data->dev_link;
1306 rte_eth_stats_get(uint8_t port_id, struct rte_eth_stats *stats)
1308 struct rte_eth_dev *dev;
1310 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1312 dev = &rte_eth_devices[port_id];
1313 memset(stats, 0, sizeof(*stats));
1315 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
1316 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
1317 (*dev->dev_ops->stats_get)(dev, stats);
1322 rte_eth_stats_reset(uint8_t port_id)
1324 struct rte_eth_dev *dev;
1326 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1327 dev = &rte_eth_devices[port_id];
1329 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->stats_reset);
1330 (*dev->dev_ops->stats_reset)(dev);
1331 dev->data->rx_mbuf_alloc_failed = 0;
1335 get_xstats_count(uint8_t port_id)
1337 struct rte_eth_dev *dev;
1340 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1341 dev = &rte_eth_devices[port_id];
1342 if (dev->dev_ops->xstats_get_names != NULL) {
1343 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
1348 count += RTE_NB_STATS;
1349 count += RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS) *
1351 count += RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS) *
1357 rte_eth_xstats_get_names(uint8_t port_id,
1358 struct rte_eth_xstat_name *xstats_names,
1361 struct rte_eth_dev *dev;
1362 int cnt_used_entries;
1363 int cnt_expected_entries;
1364 int cnt_driver_entries;
1365 uint32_t idx, id_queue;
1368 cnt_expected_entries = get_xstats_count(port_id);
1369 if (xstats_names == NULL || cnt_expected_entries < 0 ||
1370 (int)size < cnt_expected_entries)
1371 return cnt_expected_entries;
1373 /* port_id checked in get_xstats_count() */
1374 dev = &rte_eth_devices[port_id];
1375 cnt_used_entries = 0;
1377 for (idx = 0; idx < RTE_NB_STATS; idx++) {
1378 snprintf(xstats_names[cnt_used_entries].name,
1379 sizeof(xstats_names[0].name),
1380 "%s", rte_stats_strings[idx].name);
1383 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1384 for (id_queue = 0; id_queue < num_q; id_queue++) {
1385 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
1386 snprintf(xstats_names[cnt_used_entries].name,
1387 sizeof(xstats_names[0].name),
1389 id_queue, rte_rxq_stats_strings[idx].name);
1394 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1395 for (id_queue = 0; id_queue < num_q; id_queue++) {
1396 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
1397 snprintf(xstats_names[cnt_used_entries].name,
1398 sizeof(xstats_names[0].name),
1400 id_queue, rte_txq_stats_strings[idx].name);
1405 if (dev->dev_ops->xstats_get_names != NULL) {
1406 /* If there are any driver-specific xstats, append them
1409 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
1411 xstats_names + cnt_used_entries,
1412 size - cnt_used_entries);
1413 if (cnt_driver_entries < 0)
1414 return cnt_driver_entries;
1415 cnt_used_entries += cnt_driver_entries;
1418 return cnt_used_entries;
1421 /* retrieve ethdev extended statistics */
1423 rte_eth_xstats_get(uint8_t port_id, struct rte_eth_xstat *xstats,
1426 struct rte_eth_stats eth_stats;
1427 struct rte_eth_dev *dev;
1428 unsigned count = 0, i, q;
1430 uint64_t val, *stats_ptr;
1431 uint16_t nb_rxqs, nb_txqs;
1433 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1435 dev = &rte_eth_devices[port_id];
1437 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1438 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1440 /* Return generic statistics */
1441 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
1442 (nb_txqs * RTE_NB_TXQ_STATS);
1444 /* implemented by the driver */
1445 if (dev->dev_ops->xstats_get != NULL) {
1446 /* Retrieve the xstats from the driver at the end of the
1449 xcount = (*dev->dev_ops->xstats_get)(dev,
1450 xstats ? xstats + count : NULL,
1451 (n > count) ? n - count : 0);
1457 if (n < count + xcount || xstats == NULL)
1458 return count + xcount;
1460 /* now fill the xstats structure */
1462 rte_eth_stats_get(port_id, ð_stats);
1465 for (i = 0; i < RTE_NB_STATS; i++) {
1466 stats_ptr = RTE_PTR_ADD(ð_stats,
1467 rte_stats_strings[i].offset);
1469 xstats[count++].value = val;
1473 for (q = 0; q < nb_rxqs; q++) {
1474 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
1475 stats_ptr = RTE_PTR_ADD(ð_stats,
1476 rte_rxq_stats_strings[i].offset +
1477 q * sizeof(uint64_t));
1479 xstats[count++].value = val;
1484 for (q = 0; q < nb_txqs; q++) {
1485 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
1486 stats_ptr = RTE_PTR_ADD(ð_stats,
1487 rte_txq_stats_strings[i].offset +
1488 q * sizeof(uint64_t));
1490 xstats[count++].value = val;
1494 for (i = 0; i < count + xcount; i++)
1497 return count + xcount;
1500 /* reset ethdev extended statistics */
1502 rte_eth_xstats_reset(uint8_t port_id)
1504 struct rte_eth_dev *dev;
1506 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1507 dev = &rte_eth_devices[port_id];
1509 /* implemented by the driver */
1510 if (dev->dev_ops->xstats_reset != NULL) {
1511 (*dev->dev_ops->xstats_reset)(dev);
1515 /* fallback to default */
1516 rte_eth_stats_reset(port_id);
1520 set_queue_stats_mapping(uint8_t port_id, uint16_t queue_id, uint8_t stat_idx,
1523 struct rte_eth_dev *dev;
1525 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1527 dev = &rte_eth_devices[port_id];
1529 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
1530 return (*dev->dev_ops->queue_stats_mapping_set)
1531 (dev, queue_id, stat_idx, is_rx);
1536 rte_eth_dev_set_tx_queue_stats_mapping(uint8_t port_id, uint16_t tx_queue_id,
1539 return set_queue_stats_mapping(port_id, tx_queue_id, stat_idx,
1545 rte_eth_dev_set_rx_queue_stats_mapping(uint8_t port_id, uint16_t rx_queue_id,
1548 return set_queue_stats_mapping(port_id, rx_queue_id, stat_idx,
1553 rte_eth_dev_info_get(uint8_t port_id, struct rte_eth_dev_info *dev_info)
1555 struct rte_eth_dev *dev;
1556 const struct rte_eth_desc_lim lim = {
1557 .nb_max = UINT16_MAX,
1562 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1563 dev = &rte_eth_devices[port_id];
1565 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
1566 dev_info->rx_desc_lim = lim;
1567 dev_info->tx_desc_lim = lim;
1569 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_infos_get);
1570 (*dev->dev_ops->dev_infos_get)(dev, dev_info);
1571 dev_info->pci_dev = dev->pci_dev;
1572 dev_info->driver_name = dev->data->drv_name;
1573 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
1574 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
1578 rte_eth_dev_get_supported_ptypes(uint8_t port_id, uint32_t ptype_mask,
1579 uint32_t *ptypes, int num)
1582 struct rte_eth_dev *dev;
1583 const uint32_t *all_ptypes;
1585 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1586 dev = &rte_eth_devices[port_id];
1587 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
1588 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
1593 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
1594 if (all_ptypes[i] & ptype_mask) {
1596 ptypes[j] = all_ptypes[i];
1604 rte_eth_macaddr_get(uint8_t port_id, struct ether_addr *mac_addr)
1606 struct rte_eth_dev *dev;
1608 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1609 dev = &rte_eth_devices[port_id];
1610 ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
1615 rte_eth_dev_get_mtu(uint8_t port_id, uint16_t *mtu)
1617 struct rte_eth_dev *dev;
1619 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1621 dev = &rte_eth_devices[port_id];
1622 *mtu = dev->data->mtu;
1627 rte_eth_dev_set_mtu(uint8_t port_id, uint16_t mtu)
1630 struct rte_eth_dev *dev;
1632 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1633 dev = &rte_eth_devices[port_id];
1634 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
1636 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
1638 dev->data->mtu = mtu;
1644 rte_eth_dev_vlan_filter(uint8_t port_id, uint16_t vlan_id, int on)
1646 struct rte_eth_dev *dev;
1648 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1649 dev = &rte_eth_devices[port_id];
1650 if (!(dev->data->dev_conf.rxmode.hw_vlan_filter)) {
1651 RTE_PMD_DEBUG_TRACE("port %d: vlan-filtering disabled\n", port_id);
1655 if (vlan_id > 4095) {
1656 RTE_PMD_DEBUG_TRACE("(port_id=%d) invalid vlan_id=%u > 4095\n",
1657 port_id, (unsigned) vlan_id);
1660 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
1662 return (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
1666 rte_eth_dev_set_vlan_strip_on_queue(uint8_t port_id, uint16_t rx_queue_id, int on)
1668 struct rte_eth_dev *dev;
1670 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1671 dev = &rte_eth_devices[port_id];
1672 if (rx_queue_id >= dev->data->nb_rx_queues) {
1673 RTE_PMD_DEBUG_TRACE("Invalid rx_queue_id=%d\n", port_id);
1677 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
1678 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
1684 rte_eth_dev_set_vlan_ether_type(uint8_t port_id,
1685 enum rte_vlan_type vlan_type,
1688 struct rte_eth_dev *dev;
1690 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1691 dev = &rte_eth_devices[port_id];
1692 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
1694 return (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type, tpid);
1698 rte_eth_dev_set_vlan_offload(uint8_t port_id, int offload_mask)
1700 struct rte_eth_dev *dev;
1705 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1706 dev = &rte_eth_devices[port_id];
1708 /*check which option changed by application*/
1709 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
1710 org = !!(dev->data->dev_conf.rxmode.hw_vlan_strip);
1712 dev->data->dev_conf.rxmode.hw_vlan_strip = (uint8_t)cur;
1713 mask |= ETH_VLAN_STRIP_MASK;
1716 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
1717 org = !!(dev->data->dev_conf.rxmode.hw_vlan_filter);
1719 dev->data->dev_conf.rxmode.hw_vlan_filter = (uint8_t)cur;
1720 mask |= ETH_VLAN_FILTER_MASK;
1723 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
1724 org = !!(dev->data->dev_conf.rxmode.hw_vlan_extend);
1726 dev->data->dev_conf.rxmode.hw_vlan_extend = (uint8_t)cur;
1727 mask |= ETH_VLAN_EXTEND_MASK;
1734 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
1735 (*dev->dev_ops->vlan_offload_set)(dev, mask);
1741 rte_eth_dev_get_vlan_offload(uint8_t port_id)
1743 struct rte_eth_dev *dev;
1746 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1747 dev = &rte_eth_devices[port_id];
1749 if (dev->data->dev_conf.rxmode.hw_vlan_strip)
1750 ret |= ETH_VLAN_STRIP_OFFLOAD;
1752 if (dev->data->dev_conf.rxmode.hw_vlan_filter)
1753 ret |= ETH_VLAN_FILTER_OFFLOAD;
1755 if (dev->data->dev_conf.rxmode.hw_vlan_extend)
1756 ret |= ETH_VLAN_EXTEND_OFFLOAD;
1762 rte_eth_dev_set_vlan_pvid(uint8_t port_id, uint16_t pvid, int on)
1764 struct rte_eth_dev *dev;
1766 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1767 dev = &rte_eth_devices[port_id];
1768 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
1769 (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on);
1775 rte_eth_dev_flow_ctrl_get(uint8_t port_id, struct rte_eth_fc_conf *fc_conf)
1777 struct rte_eth_dev *dev;
1779 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1780 dev = &rte_eth_devices[port_id];
1781 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
1782 memset(fc_conf, 0, sizeof(*fc_conf));
1783 return (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf);
1787 rte_eth_dev_flow_ctrl_set(uint8_t port_id, struct rte_eth_fc_conf *fc_conf)
1789 struct rte_eth_dev *dev;
1791 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1792 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
1793 RTE_PMD_DEBUG_TRACE("Invalid send_xon, only 0/1 allowed\n");
1797 dev = &rte_eth_devices[port_id];
1798 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
1799 return (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf);
1803 rte_eth_dev_priority_flow_ctrl_set(uint8_t port_id, struct rte_eth_pfc_conf *pfc_conf)
1805 struct rte_eth_dev *dev;
1807 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1808 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
1809 RTE_PMD_DEBUG_TRACE("Invalid priority, only 0-7 allowed\n");
1813 dev = &rte_eth_devices[port_id];
1814 /* High water, low water validation are device specific */
1815 if (*dev->dev_ops->priority_flow_ctrl_set)
1816 return (*dev->dev_ops->priority_flow_ctrl_set)(dev, pfc_conf);
1821 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
1829 if (reta_size != RTE_ALIGN(reta_size, RTE_RETA_GROUP_SIZE)) {
1830 RTE_PMD_DEBUG_TRACE("Invalid reta size, should be %u aligned\n",
1831 RTE_RETA_GROUP_SIZE);
1835 num = reta_size / RTE_RETA_GROUP_SIZE;
1836 for (i = 0; i < num; i++) {
1837 if (reta_conf[i].mask)
1845 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
1849 uint16_t i, idx, shift;
1855 RTE_PMD_DEBUG_TRACE("No receive queue is available\n");
1859 for (i = 0; i < reta_size; i++) {
1860 idx = i / RTE_RETA_GROUP_SIZE;
1861 shift = i % RTE_RETA_GROUP_SIZE;
1862 if ((reta_conf[idx].mask & (1ULL << shift)) &&
1863 (reta_conf[idx].reta[shift] >= max_rxq)) {
1864 RTE_PMD_DEBUG_TRACE("reta_conf[%u]->reta[%u]: %u exceeds "
1865 "the maximum rxq index: %u\n", idx, shift,
1866 reta_conf[idx].reta[shift], max_rxq);
1875 rte_eth_dev_rss_reta_update(uint8_t port_id,
1876 struct rte_eth_rss_reta_entry64 *reta_conf,
1879 struct rte_eth_dev *dev;
1882 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1883 /* Check mask bits */
1884 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
1888 dev = &rte_eth_devices[port_id];
1890 /* Check entry value */
1891 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
1892 dev->data->nb_rx_queues);
1896 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
1897 return (*dev->dev_ops->reta_update)(dev, reta_conf, reta_size);
1901 rte_eth_dev_rss_reta_query(uint8_t port_id,
1902 struct rte_eth_rss_reta_entry64 *reta_conf,
1905 struct rte_eth_dev *dev;
1908 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1910 /* Check mask bits */
1911 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
1915 dev = &rte_eth_devices[port_id];
1916 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
1917 return (*dev->dev_ops->reta_query)(dev, reta_conf, reta_size);
1921 rte_eth_dev_rss_hash_update(uint8_t port_id, struct rte_eth_rss_conf *rss_conf)
1923 struct rte_eth_dev *dev;
1924 uint16_t rss_hash_protos;
1926 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1927 rss_hash_protos = rss_conf->rss_hf;
1928 if ((rss_hash_protos != 0) &&
1929 ((rss_hash_protos & ETH_RSS_PROTO_MASK) == 0)) {
1930 RTE_PMD_DEBUG_TRACE("Invalid rss_hash_protos=0x%x\n",
1934 dev = &rte_eth_devices[port_id];
1935 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
1936 return (*dev->dev_ops->rss_hash_update)(dev, rss_conf);
1940 rte_eth_dev_rss_hash_conf_get(uint8_t port_id,
1941 struct rte_eth_rss_conf *rss_conf)
1943 struct rte_eth_dev *dev;
1945 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1946 dev = &rte_eth_devices[port_id];
1947 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
1948 return (*dev->dev_ops->rss_hash_conf_get)(dev, rss_conf);
1952 rte_eth_dev_udp_tunnel_port_add(uint8_t port_id,
1953 struct rte_eth_udp_tunnel *udp_tunnel)
1955 struct rte_eth_dev *dev;
1957 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1958 if (udp_tunnel == NULL) {
1959 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
1963 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
1964 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
1968 dev = &rte_eth_devices[port_id];
1969 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
1970 return (*dev->dev_ops->udp_tunnel_port_add)(dev, udp_tunnel);
1974 rte_eth_dev_udp_tunnel_port_delete(uint8_t port_id,
1975 struct rte_eth_udp_tunnel *udp_tunnel)
1977 struct rte_eth_dev *dev;
1979 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1980 dev = &rte_eth_devices[port_id];
1982 if (udp_tunnel == NULL) {
1983 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
1987 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
1988 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
1992 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
1993 return (*dev->dev_ops->udp_tunnel_port_del)(dev, udp_tunnel);
1997 rte_eth_led_on(uint8_t port_id)
1999 struct rte_eth_dev *dev;
2001 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2002 dev = &rte_eth_devices[port_id];
2003 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
2004 return (*dev->dev_ops->dev_led_on)(dev);
2008 rte_eth_led_off(uint8_t port_id)
2010 struct rte_eth_dev *dev;
2012 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2013 dev = &rte_eth_devices[port_id];
2014 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
2015 return (*dev->dev_ops->dev_led_off)(dev);
2019 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2023 get_mac_addr_index(uint8_t port_id, const struct ether_addr *addr)
2025 struct rte_eth_dev_info dev_info;
2026 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2029 rte_eth_dev_info_get(port_id, &dev_info);
2031 for (i = 0; i < dev_info.max_mac_addrs; i++)
2032 if (memcmp(addr, &dev->data->mac_addrs[i], ETHER_ADDR_LEN) == 0)
2038 static const struct ether_addr null_mac_addr;
2041 rte_eth_dev_mac_addr_add(uint8_t port_id, struct ether_addr *addr,
2044 struct rte_eth_dev *dev;
2048 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2049 dev = &rte_eth_devices[port_id];
2050 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
2052 if (is_zero_ether_addr(addr)) {
2053 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
2057 if (pool >= ETH_64_POOLS) {
2058 RTE_PMD_DEBUG_TRACE("pool id must be 0-%d\n", ETH_64_POOLS - 1);
2062 index = get_mac_addr_index(port_id, addr);
2064 index = get_mac_addr_index(port_id, &null_mac_addr);
2066 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
2071 pool_mask = dev->data->mac_pool_sel[index];
2073 /* Check if both MAC address and pool is already there, and do nothing */
2074 if (pool_mask & (1ULL << pool))
2079 (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
2081 /* Update address in NIC data structure */
2082 ether_addr_copy(addr, &dev->data->mac_addrs[index]);
2084 /* Update pool bitmap in NIC data structure */
2085 dev->data->mac_pool_sel[index] |= (1ULL << pool);
2091 rte_eth_dev_mac_addr_remove(uint8_t port_id, struct ether_addr *addr)
2093 struct rte_eth_dev *dev;
2096 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2097 dev = &rte_eth_devices[port_id];
2098 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
2100 index = get_mac_addr_index(port_id, addr);
2102 RTE_PMD_DEBUG_TRACE("port %d: Cannot remove default MAC address\n", port_id);
2104 } else if (index < 0)
2105 return 0; /* Do nothing if address wasn't found */
2108 (*dev->dev_ops->mac_addr_remove)(dev, index);
2110 /* Update address in NIC data structure */
2111 ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
2113 /* reset pool bitmap */
2114 dev->data->mac_pool_sel[index] = 0;
2120 rte_eth_dev_default_mac_addr_set(uint8_t port_id, struct ether_addr *addr)
2122 struct rte_eth_dev *dev;
2124 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2126 if (!is_valid_assigned_ether_addr(addr))
2129 dev = &rte_eth_devices[port_id];
2130 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
2132 /* Update default address in NIC data structure */
2133 ether_addr_copy(addr, &dev->data->mac_addrs[0]);
2135 (*dev->dev_ops->mac_addr_set)(dev, addr);
2141 rte_eth_dev_set_vf_rxmode(uint8_t port_id, uint16_t vf,
2142 uint16_t rx_mode, uint8_t on)
2145 struct rte_eth_dev *dev;
2146 struct rte_eth_dev_info dev_info;
2148 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2150 dev = &rte_eth_devices[port_id];
2151 rte_eth_dev_info_get(port_id, &dev_info);
2153 num_vfs = dev_info.max_vfs;
2155 RTE_PMD_DEBUG_TRACE("set VF RX mode:invalid VF id %d\n", vf);
2160 RTE_PMD_DEBUG_TRACE("set VF RX mode:mode mask ca not be zero\n");
2163 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_vf_rx_mode, -ENOTSUP);
2164 return (*dev->dev_ops->set_vf_rx_mode)(dev, vf, rx_mode, on);
2168 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2172 get_hash_mac_addr_index(uint8_t port_id, const struct ether_addr *addr)
2174 struct rte_eth_dev_info dev_info;
2175 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2178 rte_eth_dev_info_get(port_id, &dev_info);
2179 if (!dev->data->hash_mac_addrs)
2182 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
2183 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
2184 ETHER_ADDR_LEN) == 0)
2191 rte_eth_dev_uc_hash_table_set(uint8_t port_id, struct ether_addr *addr,
2196 struct rte_eth_dev *dev;
2198 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2200 dev = &rte_eth_devices[port_id];
2201 if (is_zero_ether_addr(addr)) {
2202 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
2207 index = get_hash_mac_addr_index(port_id, addr);
2208 /* Check if it's already there, and do nothing */
2209 if ((index >= 0) && (on))
2214 RTE_PMD_DEBUG_TRACE("port %d: the MAC address was not "
2215 "set in UTA\n", port_id);
2219 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
2221 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
2227 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
2228 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
2230 /* Update address in NIC data structure */
2232 ether_addr_copy(addr,
2233 &dev->data->hash_mac_addrs[index]);
2235 ether_addr_copy(&null_mac_addr,
2236 &dev->data->hash_mac_addrs[index]);
2243 rte_eth_dev_uc_all_hash_table_set(uint8_t port_id, uint8_t on)
2245 struct rte_eth_dev *dev;
2247 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2249 dev = &rte_eth_devices[port_id];
2251 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
2252 return (*dev->dev_ops->uc_all_hash_table_set)(dev, on);
2256 rte_eth_dev_set_vf_rx(uint8_t port_id, uint16_t vf, uint8_t on)
2259 struct rte_eth_dev *dev;
2260 struct rte_eth_dev_info dev_info;
2262 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2264 dev = &rte_eth_devices[port_id];
2265 rte_eth_dev_info_get(port_id, &dev_info);
2267 num_vfs = dev_info.max_vfs;
2269 RTE_PMD_DEBUG_TRACE("port %d: invalid vf id\n", port_id);
2273 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_vf_rx, -ENOTSUP);
2274 return (*dev->dev_ops->set_vf_rx)(dev, vf, on);
2278 rte_eth_dev_set_vf_tx(uint8_t port_id, uint16_t vf, uint8_t on)
2281 struct rte_eth_dev *dev;
2282 struct rte_eth_dev_info dev_info;
2284 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2286 dev = &rte_eth_devices[port_id];
2287 rte_eth_dev_info_get(port_id, &dev_info);
2289 num_vfs = dev_info.max_vfs;
2291 RTE_PMD_DEBUG_TRACE("set pool tx:invalid pool id=%d\n", vf);
2295 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_vf_tx, -ENOTSUP);
2296 return (*dev->dev_ops->set_vf_tx)(dev, vf, on);
2300 rte_eth_dev_set_vf_vlan_filter(uint8_t port_id, uint16_t vlan_id,
2301 uint64_t vf_mask, uint8_t vlan_on)
2303 struct rte_eth_dev *dev;
2305 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2307 dev = &rte_eth_devices[port_id];
2309 if (vlan_id > ETHER_MAX_VLAN_ID) {
2310 RTE_PMD_DEBUG_TRACE("VF VLAN filter:invalid VLAN id=%d\n",
2316 RTE_PMD_DEBUG_TRACE("VF VLAN filter:pool_mask can not be 0\n");
2320 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_vf_vlan_filter, -ENOTSUP);
2321 return (*dev->dev_ops->set_vf_vlan_filter)(dev, vlan_id,
2325 int rte_eth_set_queue_rate_limit(uint8_t port_id, uint16_t queue_idx,
2328 struct rte_eth_dev *dev;
2329 struct rte_eth_dev_info dev_info;
2330 struct rte_eth_link link;
2332 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2334 dev = &rte_eth_devices[port_id];
2335 rte_eth_dev_info_get(port_id, &dev_info);
2336 link = dev->data->dev_link;
2338 if (queue_idx > dev_info.max_tx_queues) {
2339 RTE_PMD_DEBUG_TRACE("set queue rate limit:port %d: "
2340 "invalid queue id=%d\n", port_id, queue_idx);
2344 if (tx_rate > link.link_speed) {
2345 RTE_PMD_DEBUG_TRACE("set queue rate limit:invalid tx_rate=%d, "
2346 "bigger than link speed= %d\n",
2347 tx_rate, link.link_speed);
2351 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
2352 return (*dev->dev_ops->set_queue_rate_limit)(dev, queue_idx, tx_rate);
2355 int rte_eth_set_vf_rate_limit(uint8_t port_id, uint16_t vf, uint16_t tx_rate,
2358 struct rte_eth_dev *dev;
2359 struct rte_eth_dev_info dev_info;
2360 struct rte_eth_link link;
2365 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2367 dev = &rte_eth_devices[port_id];
2368 rte_eth_dev_info_get(port_id, &dev_info);
2369 link = dev->data->dev_link;
2371 if (vf > dev_info.max_vfs) {
2372 RTE_PMD_DEBUG_TRACE("set VF rate limit:port %d: "
2373 "invalid vf id=%d\n", port_id, vf);
2377 if (tx_rate > link.link_speed) {
2378 RTE_PMD_DEBUG_TRACE("set VF rate limit:invalid tx_rate=%d, "
2379 "bigger than link speed= %d\n",
2380 tx_rate, link.link_speed);
2384 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_vf_rate_limit, -ENOTSUP);
2385 return (*dev->dev_ops->set_vf_rate_limit)(dev, vf, tx_rate, q_msk);
2389 rte_eth_mirror_rule_set(uint8_t port_id,
2390 struct rte_eth_mirror_conf *mirror_conf,
2391 uint8_t rule_id, uint8_t on)
2393 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2395 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2396 if (mirror_conf->rule_type == 0) {
2397 RTE_PMD_DEBUG_TRACE("mirror rule type can not be 0.\n");
2401 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
2402 RTE_PMD_DEBUG_TRACE("Invalid dst pool, pool id must be 0-%d\n",
2407 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
2408 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
2409 (mirror_conf->pool_mask == 0)) {
2410 RTE_PMD_DEBUG_TRACE("Invalid mirror pool, pool mask can not be 0.\n");
2414 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
2415 mirror_conf->vlan.vlan_mask == 0) {
2416 RTE_PMD_DEBUG_TRACE("Invalid vlan mask, vlan mask can not be 0.\n");
2420 dev = &rte_eth_devices[port_id];
2421 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
2423 return (*dev->dev_ops->mirror_rule_set)(dev, mirror_conf, rule_id, on);
2427 rte_eth_mirror_rule_reset(uint8_t port_id, uint8_t rule_id)
2429 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2431 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2433 dev = &rte_eth_devices[port_id];
2434 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
2436 return (*dev->dev_ops->mirror_rule_reset)(dev, rule_id);
2440 rte_eth_dev_callback_register(uint8_t port_id,
2441 enum rte_eth_event_type event,
2442 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
2444 struct rte_eth_dev *dev;
2445 struct rte_eth_dev_callback *user_cb;
2450 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2452 dev = &rte_eth_devices[port_id];
2453 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2455 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
2456 if (user_cb->cb_fn == cb_fn &&
2457 user_cb->cb_arg == cb_arg &&
2458 user_cb->event == event) {
2463 /* create a new callback. */
2464 if (user_cb == NULL) {
2465 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
2466 sizeof(struct rte_eth_dev_callback), 0);
2467 if (user_cb != NULL) {
2468 user_cb->cb_fn = cb_fn;
2469 user_cb->cb_arg = cb_arg;
2470 user_cb->event = event;
2471 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs), user_cb, next);
2475 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2476 return (user_cb == NULL) ? -ENOMEM : 0;
2480 rte_eth_dev_callback_unregister(uint8_t port_id,
2481 enum rte_eth_event_type event,
2482 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
2485 struct rte_eth_dev *dev;
2486 struct rte_eth_dev_callback *cb, *next;
2491 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2493 dev = &rte_eth_devices[port_id];
2494 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2497 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL; cb = next) {
2499 next = TAILQ_NEXT(cb, next);
2501 if (cb->cb_fn != cb_fn || cb->event != event ||
2502 (cb->cb_arg != (void *)-1 &&
2503 cb->cb_arg != cb_arg))
2507 * if this callback is not executing right now,
2510 if (cb->active == 0) {
2511 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
2518 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2523 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
2524 enum rte_eth_event_type event, void *cb_arg)
2526 struct rte_eth_dev_callback *cb_lst;
2527 struct rte_eth_dev_callback dev_cb;
2529 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2530 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
2531 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
2536 dev_cb.cb_arg = (void *) cb_arg;
2538 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2539 dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
2541 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2544 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2548 rte_eth_dev_rx_intr_ctl(uint8_t port_id, int epfd, int op, void *data)
2551 struct rte_eth_dev *dev;
2552 struct rte_intr_handle *intr_handle;
2556 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2558 dev = &rte_eth_devices[port_id];
2559 intr_handle = &dev->pci_dev->intr_handle;
2560 if (!intr_handle->intr_vec) {
2561 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
2565 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
2566 vec = intr_handle->intr_vec[qid];
2567 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
2568 if (rc && rc != -EEXIST) {
2569 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
2570 " op %d epfd %d vec %u\n",
2571 port_id, qid, op, epfd, vec);
2578 const struct rte_memzone *
2579 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
2580 uint16_t queue_id, size_t size, unsigned align,
2583 char z_name[RTE_MEMZONE_NAMESIZE];
2584 const struct rte_memzone *mz;
2586 snprintf(z_name, sizeof(z_name), "%s_%s_%d_%d",
2587 dev->driver->pci_drv.driver.name, ring_name,
2588 dev->data->port_id, queue_id);
2590 mz = rte_memzone_lookup(z_name);
2594 if (rte_xen_dom0_supported())
2595 return rte_memzone_reserve_bounded(z_name, size, socket_id,
2596 0, align, RTE_PGSIZE_2M);
2598 return rte_memzone_reserve_aligned(z_name, size, socket_id,
2603 rte_eth_dev_rx_intr_ctl_q(uint8_t port_id, uint16_t queue_id,
2604 int epfd, int op, void *data)
2607 struct rte_eth_dev *dev;
2608 struct rte_intr_handle *intr_handle;
2611 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2613 dev = &rte_eth_devices[port_id];
2614 if (queue_id >= dev->data->nb_rx_queues) {
2615 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%u\n", queue_id);
2619 intr_handle = &dev->pci_dev->intr_handle;
2620 if (!intr_handle->intr_vec) {
2621 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
2625 vec = intr_handle->intr_vec[queue_id];
2626 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
2627 if (rc && rc != -EEXIST) {
2628 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
2629 " op %d epfd %d vec %u\n",
2630 port_id, queue_id, op, epfd, vec);
2638 rte_eth_dev_rx_intr_enable(uint8_t port_id,
2641 struct rte_eth_dev *dev;
2643 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2645 dev = &rte_eth_devices[port_id];
2647 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
2648 return (*dev->dev_ops->rx_queue_intr_enable)(dev, queue_id);
2652 rte_eth_dev_rx_intr_disable(uint8_t port_id,
2655 struct rte_eth_dev *dev;
2657 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2659 dev = &rte_eth_devices[port_id];
2661 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
2662 return (*dev->dev_ops->rx_queue_intr_disable)(dev, queue_id);
2665 #ifdef RTE_NIC_BYPASS
2666 int rte_eth_dev_bypass_init(uint8_t port_id)
2668 struct rte_eth_dev *dev;
2670 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2672 dev = &rte_eth_devices[port_id];
2673 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_init, -ENOTSUP);
2674 (*dev->dev_ops->bypass_init)(dev);
2679 rte_eth_dev_bypass_state_show(uint8_t port_id, uint32_t *state)
2681 struct rte_eth_dev *dev;
2683 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2685 dev = &rte_eth_devices[port_id];
2686 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_state_show, -ENOTSUP);
2687 (*dev->dev_ops->bypass_state_show)(dev, state);
2692 rte_eth_dev_bypass_state_set(uint8_t port_id, uint32_t *new_state)
2694 struct rte_eth_dev *dev;
2696 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2698 dev = &rte_eth_devices[port_id];
2699 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_state_set, -ENOTSUP);
2700 (*dev->dev_ops->bypass_state_set)(dev, new_state);
2705 rte_eth_dev_bypass_event_show(uint8_t port_id, uint32_t event, uint32_t *state)
2707 struct rte_eth_dev *dev;
2709 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2711 dev = &rte_eth_devices[port_id];
2712 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_state_show, -ENOTSUP);
2713 (*dev->dev_ops->bypass_event_show)(dev, event, state);
2718 rte_eth_dev_bypass_event_store(uint8_t port_id, uint32_t event, uint32_t state)
2720 struct rte_eth_dev *dev;
2722 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2724 dev = &rte_eth_devices[port_id];
2726 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_event_set, -ENOTSUP);
2727 (*dev->dev_ops->bypass_event_set)(dev, event, state);
2732 rte_eth_dev_wd_timeout_store(uint8_t port_id, uint32_t timeout)
2734 struct rte_eth_dev *dev;
2736 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2738 dev = &rte_eth_devices[port_id];
2740 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_wd_timeout_set, -ENOTSUP);
2741 (*dev->dev_ops->bypass_wd_timeout_set)(dev, timeout);
2746 rte_eth_dev_bypass_ver_show(uint8_t port_id, uint32_t *ver)
2748 struct rte_eth_dev *dev;
2750 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2752 dev = &rte_eth_devices[port_id];
2754 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_ver_show, -ENOTSUP);
2755 (*dev->dev_ops->bypass_ver_show)(dev, ver);
2760 rte_eth_dev_bypass_wd_timeout_show(uint8_t port_id, uint32_t *wd_timeout)
2762 struct rte_eth_dev *dev;
2764 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2766 dev = &rte_eth_devices[port_id];
2768 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_wd_timeout_show, -ENOTSUP);
2769 (*dev->dev_ops->bypass_wd_timeout_show)(dev, wd_timeout);
2774 rte_eth_dev_bypass_wd_reset(uint8_t port_id)
2776 struct rte_eth_dev *dev;
2778 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2780 dev = &rte_eth_devices[port_id];
2782 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_wd_reset, -ENOTSUP);
2783 (*dev->dev_ops->bypass_wd_reset)(dev);
2789 rte_eth_dev_filter_supported(uint8_t port_id, enum rte_filter_type filter_type)
2791 struct rte_eth_dev *dev;
2793 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2795 dev = &rte_eth_devices[port_id];
2796 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
2797 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
2798 RTE_ETH_FILTER_NOP, NULL);
2802 rte_eth_dev_filter_ctrl(uint8_t port_id, enum rte_filter_type filter_type,
2803 enum rte_filter_op filter_op, void *arg)
2805 struct rte_eth_dev *dev;
2807 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2809 dev = &rte_eth_devices[port_id];
2810 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
2811 return (*dev->dev_ops->filter_ctrl)(dev, filter_type, filter_op, arg);
2815 rte_eth_add_rx_callback(uint8_t port_id, uint16_t queue_id,
2816 rte_rx_callback_fn fn, void *user_param)
2818 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
2819 rte_errno = ENOTSUP;
2822 /* check input parameters */
2823 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
2824 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
2828 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
2836 cb->param = user_param;
2838 rte_spinlock_lock(&rte_eth_rx_cb_lock);
2839 /* Add the callbacks in fifo order. */
2840 struct rte_eth_rxtx_callback *tail =
2841 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
2844 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
2851 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
2857 rte_eth_add_first_rx_callback(uint8_t port_id, uint16_t queue_id,
2858 rte_rx_callback_fn fn, void *user_param)
2860 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
2861 rte_errno = ENOTSUP;
2864 /* check input parameters */
2865 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
2866 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
2871 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
2879 cb->param = user_param;
2881 rte_spinlock_lock(&rte_eth_rx_cb_lock);
2882 /* Add the callbacks at fisrt position*/
2883 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
2885 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
2886 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
2892 rte_eth_add_tx_callback(uint8_t port_id, uint16_t queue_id,
2893 rte_tx_callback_fn fn, void *user_param)
2895 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
2896 rte_errno = ENOTSUP;
2899 /* check input parameters */
2900 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
2901 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
2906 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
2914 cb->param = user_param;
2916 rte_spinlock_lock(&rte_eth_tx_cb_lock);
2917 /* Add the callbacks in fifo order. */
2918 struct rte_eth_rxtx_callback *tail =
2919 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
2922 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
2929 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
2935 rte_eth_remove_rx_callback(uint8_t port_id, uint16_t queue_id,
2936 struct rte_eth_rxtx_callback *user_cb)
2938 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
2941 /* Check input parameters. */
2942 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2943 if (user_cb == NULL ||
2944 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
2947 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2948 struct rte_eth_rxtx_callback *cb;
2949 struct rte_eth_rxtx_callback **prev_cb;
2952 rte_spinlock_lock(&rte_eth_rx_cb_lock);
2953 prev_cb = &dev->post_rx_burst_cbs[queue_id];
2954 for (; *prev_cb != NULL; prev_cb = &cb->next) {
2956 if (cb == user_cb) {
2957 /* Remove the user cb from the callback list. */
2958 *prev_cb = cb->next;
2963 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
2969 rte_eth_remove_tx_callback(uint8_t port_id, uint16_t queue_id,
2970 struct rte_eth_rxtx_callback *user_cb)
2972 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
2975 /* Check input parameters. */
2976 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2977 if (user_cb == NULL ||
2978 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
2981 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2983 struct rte_eth_rxtx_callback *cb;
2984 struct rte_eth_rxtx_callback **prev_cb;
2986 rte_spinlock_lock(&rte_eth_tx_cb_lock);
2987 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
2988 for (; *prev_cb != NULL; prev_cb = &cb->next) {
2990 if (cb == user_cb) {
2991 /* Remove the user cb from the callback list. */
2992 *prev_cb = cb->next;
2997 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3003 rte_eth_rx_queue_info_get(uint8_t port_id, uint16_t queue_id,
3004 struct rte_eth_rxq_info *qinfo)
3006 struct rte_eth_dev *dev;
3008 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3013 dev = &rte_eth_devices[port_id];
3014 if (queue_id >= dev->data->nb_rx_queues) {
3015 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", queue_id);
3019 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
3021 memset(qinfo, 0, sizeof(*qinfo));
3022 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
3027 rte_eth_tx_queue_info_get(uint8_t port_id, uint16_t queue_id,
3028 struct rte_eth_txq_info *qinfo)
3030 struct rte_eth_dev *dev;
3032 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3037 dev = &rte_eth_devices[port_id];
3038 if (queue_id >= dev->data->nb_tx_queues) {
3039 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", queue_id);
3043 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
3045 memset(qinfo, 0, sizeof(*qinfo));
3046 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
3051 rte_eth_dev_set_mc_addr_list(uint8_t port_id,
3052 struct ether_addr *mc_addr_set,
3053 uint32_t nb_mc_addr)
3055 struct rte_eth_dev *dev;
3057 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3059 dev = &rte_eth_devices[port_id];
3060 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
3061 return dev->dev_ops->set_mc_addr_list(dev, mc_addr_set, nb_mc_addr);
3065 rte_eth_timesync_enable(uint8_t port_id)
3067 struct rte_eth_dev *dev;
3069 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3070 dev = &rte_eth_devices[port_id];
3072 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
3073 return (*dev->dev_ops->timesync_enable)(dev);
3077 rte_eth_timesync_disable(uint8_t port_id)
3079 struct rte_eth_dev *dev;
3081 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3082 dev = &rte_eth_devices[port_id];
3084 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
3085 return (*dev->dev_ops->timesync_disable)(dev);
3089 rte_eth_timesync_read_rx_timestamp(uint8_t port_id, struct timespec *timestamp,
3092 struct rte_eth_dev *dev;
3094 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3095 dev = &rte_eth_devices[port_id];
3097 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
3098 return (*dev->dev_ops->timesync_read_rx_timestamp)(dev, timestamp, flags);
3102 rte_eth_timesync_read_tx_timestamp(uint8_t port_id, struct timespec *timestamp)
3104 struct rte_eth_dev *dev;
3106 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3107 dev = &rte_eth_devices[port_id];
3109 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
3110 return (*dev->dev_ops->timesync_read_tx_timestamp)(dev, timestamp);
3114 rte_eth_timesync_adjust_time(uint8_t port_id, int64_t delta)
3116 struct rte_eth_dev *dev;
3118 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3119 dev = &rte_eth_devices[port_id];
3121 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
3122 return (*dev->dev_ops->timesync_adjust_time)(dev, delta);
3126 rte_eth_timesync_read_time(uint8_t port_id, struct timespec *timestamp)
3128 struct rte_eth_dev *dev;
3130 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3131 dev = &rte_eth_devices[port_id];
3133 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
3134 return (*dev->dev_ops->timesync_read_time)(dev, timestamp);
3138 rte_eth_timesync_write_time(uint8_t port_id, const struct timespec *timestamp)
3140 struct rte_eth_dev *dev;
3142 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3143 dev = &rte_eth_devices[port_id];
3145 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
3146 return (*dev->dev_ops->timesync_write_time)(dev, timestamp);
3150 rte_eth_dev_get_reg_info(uint8_t port_id, struct rte_dev_reg_info *info)
3152 struct rte_eth_dev *dev;
3154 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3156 dev = &rte_eth_devices[port_id];
3157 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
3158 return (*dev->dev_ops->get_reg)(dev, info);
3162 rte_eth_dev_get_eeprom_length(uint8_t port_id)
3164 struct rte_eth_dev *dev;
3166 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3168 dev = &rte_eth_devices[port_id];
3169 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
3170 return (*dev->dev_ops->get_eeprom_length)(dev);
3174 rte_eth_dev_get_eeprom(uint8_t port_id, struct rte_dev_eeprom_info *info)
3176 struct rte_eth_dev *dev;
3178 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3180 dev = &rte_eth_devices[port_id];
3181 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
3182 return (*dev->dev_ops->get_eeprom)(dev, info);
3186 rte_eth_dev_set_eeprom(uint8_t port_id, struct rte_dev_eeprom_info *info)
3188 struct rte_eth_dev *dev;
3190 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3192 dev = &rte_eth_devices[port_id];
3193 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
3194 return (*dev->dev_ops->set_eeprom)(dev, info);
3198 rte_eth_dev_get_dcb_info(uint8_t port_id,
3199 struct rte_eth_dcb_info *dcb_info)
3201 struct rte_eth_dev *dev;
3203 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3205 dev = &rte_eth_devices[port_id];
3206 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
3208 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
3209 return (*dev->dev_ops->get_dcb_info)(dev, dcb_info);
3213 rte_eth_copy_pci_info(struct rte_eth_dev *eth_dev, struct rte_pci_device *pci_dev)
3215 if ((eth_dev == NULL) || (pci_dev == NULL)) {
3216 RTE_PMD_DEBUG_TRACE("NULL pointer eth_dev=%p pci_dev=%p\n",
3221 eth_dev->data->dev_flags = 0;
3222 if (pci_dev->driver->drv_flags & RTE_PCI_DRV_INTR_LSC)
3223 eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_LSC;
3224 if (pci_dev->driver->drv_flags & RTE_PCI_DRV_DETACHABLE)
3225 eth_dev->data->dev_flags |= RTE_ETH_DEV_DETACHABLE;
3227 eth_dev->data->kdrv = pci_dev->kdrv;
3228 eth_dev->data->numa_node = pci_dev->device.numa_node;
3229 eth_dev->data->drv_name = pci_dev->driver->driver.name;
3233 rte_eth_dev_l2_tunnel_eth_type_conf(uint8_t port_id,
3234 struct rte_eth_l2_tunnel_conf *l2_tunnel)
3236 struct rte_eth_dev *dev;
3238 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3239 if (l2_tunnel == NULL) {
3240 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
3244 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
3245 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
3249 dev = &rte_eth_devices[port_id];
3250 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
3252 return (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev, l2_tunnel);
3256 rte_eth_dev_l2_tunnel_offload_set(uint8_t port_id,
3257 struct rte_eth_l2_tunnel_conf *l2_tunnel,
3261 struct rte_eth_dev *dev;
3263 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3265 if (l2_tunnel == NULL) {
3266 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
3270 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
3271 RTE_PMD_DEBUG_TRACE("Invalid tunnel type.\n");
3276 RTE_PMD_DEBUG_TRACE("Mask should have a value.\n");
3280 dev = &rte_eth_devices[port_id];
3281 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
3283 return (*dev->dev_ops->l2_tunnel_offload_set)(dev, l2_tunnel, mask, en);