4 * Copyright(c) 2010-2016 Intel Corporation. All rights reserved.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
11 * * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
17 * * Neither the name of Intel Corporation nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific prior written permission.
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22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 #include <sys/types.h>
35 #include <sys/queue.h>
44 #include <netinet/in.h>
46 #include <rte_byteorder.h>
48 #include <rte_debug.h>
49 #include <rte_interrupts.h>
51 #include <rte_memory.h>
52 #include <rte_memcpy.h>
53 #include <rte_memzone.h>
54 #include <rte_launch.h>
56 #include <rte_per_lcore.h>
57 #include <rte_lcore.h>
58 #include <rte_atomic.h>
59 #include <rte_branch_prediction.h>
60 #include <rte_common.h>
61 #include <rte_mempool.h>
62 #include <rte_malloc.h>
64 #include <rte_errno.h>
65 #include <rte_spinlock.h>
66 #include <rte_string_fns.h>
68 #include "rte_ether.h"
69 #include "rte_ethdev.h"
71 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
72 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
73 static struct rte_eth_dev_data *rte_eth_dev_data;
74 static uint8_t nb_ports;
76 /* spinlock for eth device callbacks */
77 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
79 /* spinlock for add/remove rx callbacks */
80 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
82 /* spinlock for add/remove tx callbacks */
83 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
85 /* store statistics names and its offset in stats structure */
86 struct rte_eth_xstats_name_off {
87 char name[RTE_ETH_XSTATS_NAME_SIZE];
91 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
92 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
93 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
94 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
95 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
96 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
97 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
98 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
102 #define RTE_NB_STATS (sizeof(rte_stats_strings) / sizeof(rte_stats_strings[0]))
104 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
105 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
106 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
107 {"errors", offsetof(struct rte_eth_stats, q_errors)},
110 #define RTE_NB_RXQ_STATS (sizeof(rte_rxq_stats_strings) / \
111 sizeof(rte_rxq_stats_strings[0]))
113 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
114 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
115 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
117 #define RTE_NB_TXQ_STATS (sizeof(rte_txq_stats_strings) / \
118 sizeof(rte_txq_stats_strings[0]))
122 * The user application callback description.
124 * It contains callback address to be registered by user application,
125 * the pointer to the parameters for callback, and the event type.
127 struct rte_eth_dev_callback {
128 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
129 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
130 void *cb_arg; /**< Parameter for callback */
131 enum rte_eth_event_type event; /**< Interrupt event type */
132 uint32_t active; /**< Callback is executing */
146 rte_eth_dev_data_alloc(void)
148 const unsigned flags = 0;
149 const struct rte_memzone *mz;
151 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
152 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
153 RTE_MAX_ETHPORTS * sizeof(*rte_eth_dev_data),
154 rte_socket_id(), flags);
156 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
158 rte_panic("Cannot allocate memzone for ethernet port data\n");
160 rte_eth_dev_data = mz->addr;
161 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
162 memset(rte_eth_dev_data, 0,
163 RTE_MAX_ETHPORTS * sizeof(*rte_eth_dev_data));
167 rte_eth_dev_allocated(const char *name)
171 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
172 if ((rte_eth_devices[i].attached == DEV_ATTACHED) &&
173 strcmp(rte_eth_devices[i].data->name, name) == 0)
174 return &rte_eth_devices[i];
180 rte_eth_dev_find_free_port(void)
184 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
185 if (rte_eth_devices[i].attached == DEV_DETACHED)
188 return RTE_MAX_ETHPORTS;
192 rte_eth_dev_allocate(const char *name, enum rte_eth_dev_type type)
195 struct rte_eth_dev *eth_dev;
197 port_id = rte_eth_dev_find_free_port();
198 if (port_id == RTE_MAX_ETHPORTS) {
199 RTE_PMD_DEBUG_TRACE("Reached maximum number of Ethernet ports\n");
203 if (rte_eth_dev_data == NULL)
204 rte_eth_dev_data_alloc();
206 if (rte_eth_dev_allocated(name) != NULL) {
207 RTE_PMD_DEBUG_TRACE("Ethernet Device with name %s already allocated!\n",
212 eth_dev = &rte_eth_devices[port_id];
213 eth_dev->data = &rte_eth_dev_data[port_id];
214 snprintf(eth_dev->data->name, sizeof(eth_dev->data->name), "%s", name);
215 eth_dev->data->port_id = port_id;
216 eth_dev->attached = DEV_ATTACHED;
217 eth_dev->dev_type = type;
223 rte_eth_dev_create_unique_device_name(char *name, size_t size,
224 struct rte_pci_device *pci_dev)
228 ret = snprintf(name, size, "%d:%d.%d",
229 pci_dev->addr.bus, pci_dev->addr.devid,
230 pci_dev->addr.function);
237 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
242 eth_dev->attached = DEV_DETACHED;
248 rte_eth_dev_init(struct rte_pci_driver *pci_drv,
249 struct rte_pci_device *pci_dev)
251 struct eth_driver *eth_drv;
252 struct rte_eth_dev *eth_dev;
253 char ethdev_name[RTE_ETH_NAME_MAX_LEN];
257 eth_drv = (struct eth_driver *)pci_drv;
259 /* Create unique Ethernet device name using PCI address */
260 rte_eth_dev_create_unique_device_name(ethdev_name,
261 sizeof(ethdev_name), pci_dev);
263 eth_dev = rte_eth_dev_allocate(ethdev_name, RTE_ETH_DEV_PCI);
267 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
268 eth_dev->data->dev_private = rte_zmalloc("ethdev private structure",
269 eth_drv->dev_private_size,
270 RTE_CACHE_LINE_SIZE);
271 if (eth_dev->data->dev_private == NULL)
272 rte_panic("Cannot allocate memzone for private port data\n");
274 eth_dev->pci_dev = pci_dev;
275 eth_dev->driver = eth_drv;
276 eth_dev->data->rx_mbuf_alloc_failed = 0;
278 /* init user callbacks */
279 TAILQ_INIT(&(eth_dev->link_intr_cbs));
282 * Set the default MTU.
284 eth_dev->data->mtu = ETHER_MTU;
286 /* Invoke PMD device initialization function */
287 diag = (*eth_drv->eth_dev_init)(eth_dev);
291 RTE_PMD_DEBUG_TRACE("driver %s: eth_dev_init(vendor_id=0x%u device_id=0x%x) failed\n",
293 (unsigned) pci_dev->id.vendor_id,
294 (unsigned) pci_dev->id.device_id);
295 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
296 rte_free(eth_dev->data->dev_private);
297 rte_eth_dev_release_port(eth_dev);
302 rte_eth_dev_uninit(struct rte_pci_device *pci_dev)
304 const struct eth_driver *eth_drv;
305 struct rte_eth_dev *eth_dev;
306 char ethdev_name[RTE_ETH_NAME_MAX_LEN];
312 /* Create unique Ethernet device name using PCI address */
313 rte_eth_dev_create_unique_device_name(ethdev_name,
314 sizeof(ethdev_name), pci_dev);
316 eth_dev = rte_eth_dev_allocated(ethdev_name);
320 eth_drv = (const struct eth_driver *)pci_dev->driver;
322 /* Invoke PMD device uninit function */
323 if (*eth_drv->eth_dev_uninit) {
324 ret = (*eth_drv->eth_dev_uninit)(eth_dev);
329 /* free ether device */
330 rte_eth_dev_release_port(eth_dev);
332 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
333 rte_free(eth_dev->data->dev_private);
335 eth_dev->pci_dev = NULL;
336 eth_dev->driver = NULL;
337 eth_dev->data = NULL;
343 * Register an Ethernet [Poll Mode] driver.
345 * Function invoked by the initialization function of an Ethernet driver
346 * to simultaneously register itself as a PCI driver and as an Ethernet
348 * Invokes the rte_eal_pci_register() function to register the *pci_drv*
349 * structure embedded in the *eth_drv* structure, after having stored the
350 * address of the rte_eth_dev_init() function in the *devinit* field of
351 * the *pci_drv* structure.
352 * During the PCI probing phase, the rte_eth_dev_init() function is
353 * invoked for each PCI [Ethernet device] matching the embedded PCI
354 * identifiers provided by the driver.
357 rte_eth_driver_register(struct eth_driver *eth_drv)
359 eth_drv->pci_drv.devinit = rte_eth_dev_init;
360 eth_drv->pci_drv.devuninit = rte_eth_dev_uninit;
361 rte_eal_pci_register(ð_drv->pci_drv);
365 rte_eth_dev_is_valid_port(uint8_t port_id)
367 if (port_id >= RTE_MAX_ETHPORTS ||
368 rte_eth_devices[port_id].attached != DEV_ATTACHED)
375 rte_eth_dev_socket_id(uint8_t port_id)
377 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
378 return rte_eth_devices[port_id].data->numa_node;
382 rte_eth_dev_count(void)
387 static enum rte_eth_dev_type
388 rte_eth_dev_get_device_type(uint8_t port_id)
390 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, RTE_ETH_DEV_UNKNOWN);
391 return rte_eth_devices[port_id].dev_type;
395 rte_eth_dev_get_addr_by_port(uint8_t port_id, struct rte_pci_addr *addr)
397 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
400 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
404 *addr = rte_eth_devices[port_id].pci_dev->addr;
409 rte_eth_dev_get_name_by_port(uint8_t port_id, char *name)
413 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
416 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
420 /* shouldn't check 'rte_eth_devices[i].data',
421 * because it might be overwritten by VDEV PMD */
422 tmp = rte_eth_dev_data[port_id].name;
428 rte_eth_dev_get_port_by_name(const char *name, uint8_t *port_id)
433 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
437 *port_id = RTE_MAX_ETHPORTS;
439 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
442 rte_eth_dev_data[i].name, strlen(name))) {
453 rte_eth_dev_get_port_by_addr(const struct rte_pci_addr *addr, uint8_t *port_id)
456 struct rte_pci_device *pci_dev = NULL;
459 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
463 *port_id = RTE_MAX_ETHPORTS;
465 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
467 pci_dev = rte_eth_devices[i].pci_dev;
470 !rte_eal_compare_pci_addr(&pci_dev->addr, addr)) {
481 rte_eth_dev_is_detachable(uint8_t port_id)
485 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
487 switch (rte_eth_devices[port_id].data->kdrv) {
488 case RTE_KDRV_IGB_UIO:
489 case RTE_KDRV_UIO_GENERIC:
490 case RTE_KDRV_NIC_UIO:
497 dev_flags = rte_eth_devices[port_id].data->dev_flags;
498 if ((dev_flags & RTE_ETH_DEV_DETACHABLE) &&
499 (!(dev_flags & RTE_ETH_DEV_BONDED_SLAVE)))
505 /* attach the new physical device, then store port_id of the device */
507 rte_eth_dev_attach_pdev(struct rte_pci_addr *addr, uint8_t *port_id)
509 /* re-construct pci_device_list */
510 if (rte_eal_pci_scan())
512 /* Invoke probe func of the driver can handle the new device. */
513 if (rte_eal_pci_probe_one(addr))
516 if (rte_eth_dev_get_port_by_addr(addr, port_id))
524 /* detach the new physical device, then store pci_addr of the device */
526 rte_eth_dev_detach_pdev(uint8_t port_id, struct rte_pci_addr *addr)
528 struct rte_pci_addr freed_addr;
529 struct rte_pci_addr vp;
531 /* get pci address by port id */
532 if (rte_eth_dev_get_addr_by_port(port_id, &freed_addr))
535 /* Zeroed pci addr means the port comes from virtual device */
536 vp.domain = vp.bus = vp.devid = vp.function = 0;
537 if (rte_eal_compare_pci_addr(&vp, &freed_addr) == 0)
540 /* invoke devuninit func of the pci driver,
541 * also remove the device from pci_device_list */
542 if (rte_eal_pci_detach(&freed_addr))
551 /* attach the new virtual device, then store port_id of the device */
553 rte_eth_dev_attach_vdev(const char *vdevargs, uint8_t *port_id)
555 char *name = NULL, *args = NULL;
558 /* parse vdevargs, then retrieve device name and args */
559 if (rte_eal_parse_devargs_str(vdevargs, &name, &args))
562 /* walk around dev_driver_list to find the driver of the device,
563 * then invoke probe function of the driver.
564 * rte_eal_vdev_init() updates port_id allocated after
567 if (rte_eal_vdev_init(name, args))
570 if (rte_eth_dev_get_port_by_name(name, port_id))
581 /* detach the new virtual device, then store the name of the device */
583 rte_eth_dev_detach_vdev(uint8_t port_id, char *vdevname)
585 char name[RTE_ETH_NAME_MAX_LEN];
587 /* get device name by port id */
588 if (rte_eth_dev_get_name_by_port(port_id, name))
590 /* walk around dev_driver_list to find the driver of the device,
591 * then invoke uninit function of the driver */
592 if (rte_eal_vdev_uninit(name))
595 strncpy(vdevname, name, sizeof(name));
601 /* attach the new device, then store port_id of the device */
603 rte_eth_dev_attach(const char *devargs, uint8_t *port_id)
605 struct rte_pci_addr addr;
608 if ((devargs == NULL) || (port_id == NULL)) {
613 if (eal_parse_pci_DomBDF(devargs, &addr) == 0) {
614 ret = rte_eth_dev_attach_pdev(&addr, port_id);
618 ret = rte_eth_dev_attach_vdev(devargs, port_id);
625 RTE_LOG(ERR, EAL, "Driver, cannot attach the device\n");
629 /* detach the device, then store the name of the device */
631 rte_eth_dev_detach(uint8_t port_id, char *name)
633 struct rte_pci_addr addr;
641 /* check whether the driver supports detach feature, or not */
642 if (rte_eth_dev_is_detachable(port_id))
645 if (rte_eth_dev_get_device_type(port_id) == RTE_ETH_DEV_PCI) {
646 ret = rte_eth_dev_get_addr_by_port(port_id, &addr);
650 ret = rte_eth_dev_detach_pdev(port_id, &addr);
654 snprintf(name, RTE_ETH_NAME_MAX_LEN,
656 addr.domain, addr.bus,
657 addr.devid, addr.function);
659 ret = rte_eth_dev_detach_vdev(port_id, name);
667 RTE_LOG(ERR, EAL, "Driver, cannot detach the device\n");
672 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
674 uint16_t old_nb_queues = dev->data->nb_rx_queues;
678 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
679 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
680 sizeof(dev->data->rx_queues[0]) * nb_queues,
681 RTE_CACHE_LINE_SIZE);
682 if (dev->data->rx_queues == NULL) {
683 dev->data->nb_rx_queues = 0;
686 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
687 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
689 rxq = dev->data->rx_queues;
691 for (i = nb_queues; i < old_nb_queues; i++)
692 (*dev->dev_ops->rx_queue_release)(rxq[i]);
693 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
694 RTE_CACHE_LINE_SIZE);
697 if (nb_queues > old_nb_queues) {
698 uint16_t new_qs = nb_queues - old_nb_queues;
700 memset(rxq + old_nb_queues, 0,
701 sizeof(rxq[0]) * new_qs);
704 dev->data->rx_queues = rxq;
706 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
707 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
709 rxq = dev->data->rx_queues;
711 for (i = nb_queues; i < old_nb_queues; i++)
712 (*dev->dev_ops->rx_queue_release)(rxq[i]);
714 dev->data->nb_rx_queues = nb_queues;
719 rte_eth_dev_rx_queue_start(uint8_t port_id, uint16_t rx_queue_id)
721 struct rte_eth_dev *dev;
723 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
725 dev = &rte_eth_devices[port_id];
726 if (rx_queue_id >= dev->data->nb_rx_queues) {
727 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
731 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
733 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
734 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
735 " already started\n",
736 rx_queue_id, port_id);
740 return dev->dev_ops->rx_queue_start(dev, rx_queue_id);
745 rte_eth_dev_rx_queue_stop(uint8_t port_id, uint16_t rx_queue_id)
747 struct rte_eth_dev *dev;
749 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
751 dev = &rte_eth_devices[port_id];
752 if (rx_queue_id >= dev->data->nb_rx_queues) {
753 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
757 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
759 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
760 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
761 " already stopped\n",
762 rx_queue_id, port_id);
766 return dev->dev_ops->rx_queue_stop(dev, rx_queue_id);
771 rte_eth_dev_tx_queue_start(uint8_t port_id, uint16_t tx_queue_id)
773 struct rte_eth_dev *dev;
775 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
777 dev = &rte_eth_devices[port_id];
778 if (tx_queue_id >= dev->data->nb_tx_queues) {
779 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
783 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
785 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
786 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
787 " already started\n",
788 tx_queue_id, port_id);
792 return dev->dev_ops->tx_queue_start(dev, tx_queue_id);
797 rte_eth_dev_tx_queue_stop(uint8_t port_id, uint16_t tx_queue_id)
799 struct rte_eth_dev *dev;
801 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
803 dev = &rte_eth_devices[port_id];
804 if (tx_queue_id >= dev->data->nb_tx_queues) {
805 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
809 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
811 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
812 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
813 " already stopped\n",
814 tx_queue_id, port_id);
818 return dev->dev_ops->tx_queue_stop(dev, tx_queue_id);
823 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
825 uint16_t old_nb_queues = dev->data->nb_tx_queues;
829 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
830 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
831 sizeof(dev->data->tx_queues[0]) * nb_queues,
832 RTE_CACHE_LINE_SIZE);
833 if (dev->data->tx_queues == NULL) {
834 dev->data->nb_tx_queues = 0;
837 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
838 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
840 txq = dev->data->tx_queues;
842 for (i = nb_queues; i < old_nb_queues; i++)
843 (*dev->dev_ops->tx_queue_release)(txq[i]);
844 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
845 RTE_CACHE_LINE_SIZE);
848 if (nb_queues > old_nb_queues) {
849 uint16_t new_qs = nb_queues - old_nb_queues;
851 memset(txq + old_nb_queues, 0,
852 sizeof(txq[0]) * new_qs);
855 dev->data->tx_queues = txq;
857 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
858 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
860 txq = dev->data->tx_queues;
862 for (i = nb_queues; i < old_nb_queues; i++)
863 (*dev->dev_ops->tx_queue_release)(txq[i]);
865 dev->data->nb_tx_queues = nb_queues;
870 rte_eth_speed_bitflag(uint32_t speed, int duplex)
873 case ETH_SPEED_NUM_10M:
874 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
875 case ETH_SPEED_NUM_100M:
876 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
877 case ETH_SPEED_NUM_1G:
878 return ETH_LINK_SPEED_1G;
879 case ETH_SPEED_NUM_2_5G:
880 return ETH_LINK_SPEED_2_5G;
881 case ETH_SPEED_NUM_5G:
882 return ETH_LINK_SPEED_5G;
883 case ETH_SPEED_NUM_10G:
884 return ETH_LINK_SPEED_10G;
885 case ETH_SPEED_NUM_20G:
886 return ETH_LINK_SPEED_20G;
887 case ETH_SPEED_NUM_25G:
888 return ETH_LINK_SPEED_25G;
889 case ETH_SPEED_NUM_40G:
890 return ETH_LINK_SPEED_40G;
891 case ETH_SPEED_NUM_50G:
892 return ETH_LINK_SPEED_50G;
893 case ETH_SPEED_NUM_56G:
894 return ETH_LINK_SPEED_56G;
895 case ETH_SPEED_NUM_100G:
896 return ETH_LINK_SPEED_100G;
903 rte_eth_dev_configure(uint8_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
904 const struct rte_eth_conf *dev_conf)
906 struct rte_eth_dev *dev;
907 struct rte_eth_dev_info dev_info;
910 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
912 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
914 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
915 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
919 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
921 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
922 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
926 dev = &rte_eth_devices[port_id];
928 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
929 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
931 if (dev->data->dev_started) {
933 "port %d must be stopped to allow configuration\n", port_id);
937 /* Copy the dev_conf parameter into the dev structure */
938 memcpy(&dev->data->dev_conf, dev_conf, sizeof(dev->data->dev_conf));
941 * Check that the numbers of RX and TX queues are not greater
942 * than the maximum number of RX and TX queues supported by the
945 (*dev->dev_ops->dev_infos_get)(dev, &dev_info);
947 if (nb_rx_q == 0 && nb_tx_q == 0) {
948 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d both rx and tx queue cannot be 0\n", port_id);
952 if (nb_rx_q > dev_info.max_rx_queues) {
953 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_rx_queues=%d > %d\n",
954 port_id, nb_rx_q, dev_info.max_rx_queues);
958 if (nb_tx_q > dev_info.max_tx_queues) {
959 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_tx_queues=%d > %d\n",
960 port_id, nb_tx_q, dev_info.max_tx_queues);
965 * If link state interrupt is enabled, check that the
966 * device supports it.
968 if ((dev_conf->intr_conf.lsc == 1) &&
969 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
970 RTE_PMD_DEBUG_TRACE("driver %s does not support lsc\n",
971 dev->data->drv_name);
976 * If jumbo frames are enabled, check that the maximum RX packet
977 * length is supported by the configured device.
979 if (dev_conf->rxmode.jumbo_frame == 1) {
980 if (dev_conf->rxmode.max_rx_pkt_len >
981 dev_info.max_rx_pktlen) {
982 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
983 " > max valid value %u\n",
985 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
986 (unsigned)dev_info.max_rx_pktlen);
988 } else if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN) {
989 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
990 " < min valid value %u\n",
992 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
993 (unsigned)ETHER_MIN_LEN);
997 if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN ||
998 dev_conf->rxmode.max_rx_pkt_len > ETHER_MAX_LEN)
999 /* Use default value */
1000 dev->data->dev_conf.rxmode.max_rx_pkt_len =
1005 * Setup new number of RX/TX queues and reconfigure device.
1007 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
1009 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_rx_queue_config = %d\n",
1014 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
1016 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_tx_queue_config = %d\n",
1018 rte_eth_dev_rx_queue_config(dev, 0);
1022 diag = (*dev->dev_ops->dev_configure)(dev);
1024 RTE_PMD_DEBUG_TRACE("port%d dev_configure = %d\n",
1026 rte_eth_dev_rx_queue_config(dev, 0);
1027 rte_eth_dev_tx_queue_config(dev, 0);
1035 rte_eth_dev_config_restore(uint8_t port_id)
1037 struct rte_eth_dev *dev;
1038 struct rte_eth_dev_info dev_info;
1039 struct ether_addr addr;
1043 dev = &rte_eth_devices[port_id];
1045 rte_eth_dev_info_get(port_id, &dev_info);
1047 if (RTE_ETH_DEV_SRIOV(dev).active)
1048 pool = RTE_ETH_DEV_SRIOV(dev).def_vmdq_idx;
1050 /* replay MAC address configuration */
1051 for (i = 0; i < dev_info.max_mac_addrs; i++) {
1052 addr = dev->data->mac_addrs[i];
1054 /* skip zero address */
1055 if (is_zero_ether_addr(&addr))
1058 /* add address to the hardware */
1059 if (*dev->dev_ops->mac_addr_add &&
1060 (dev->data->mac_pool_sel[i] & (1ULL << pool)))
1061 (*dev->dev_ops->mac_addr_add)(dev, &addr, i, pool);
1063 RTE_PMD_DEBUG_TRACE("port %d: MAC address array not supported\n",
1065 /* exit the loop but not return an error */
1070 /* replay promiscuous configuration */
1071 if (rte_eth_promiscuous_get(port_id) == 1)
1072 rte_eth_promiscuous_enable(port_id);
1073 else if (rte_eth_promiscuous_get(port_id) == 0)
1074 rte_eth_promiscuous_disable(port_id);
1076 /* replay all multicast configuration */
1077 if (rte_eth_allmulticast_get(port_id) == 1)
1078 rte_eth_allmulticast_enable(port_id);
1079 else if (rte_eth_allmulticast_get(port_id) == 0)
1080 rte_eth_allmulticast_disable(port_id);
1084 rte_eth_dev_start(uint8_t port_id)
1086 struct rte_eth_dev *dev;
1089 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1091 dev = &rte_eth_devices[port_id];
1093 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
1095 if (dev->data->dev_started != 0) {
1096 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu8
1097 " already started\n",
1102 diag = (*dev->dev_ops->dev_start)(dev);
1104 dev->data->dev_started = 1;
1108 rte_eth_dev_config_restore(port_id);
1110 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1111 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1112 (*dev->dev_ops->link_update)(dev, 0);
1118 rte_eth_dev_stop(uint8_t port_id)
1120 struct rte_eth_dev *dev;
1122 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1123 dev = &rte_eth_devices[port_id];
1125 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
1127 if (dev->data->dev_started == 0) {
1128 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu8
1129 " already stopped\n",
1134 dev->data->dev_started = 0;
1135 (*dev->dev_ops->dev_stop)(dev);
1139 rte_eth_dev_set_link_up(uint8_t port_id)
1141 struct rte_eth_dev *dev;
1143 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1145 dev = &rte_eth_devices[port_id];
1147 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1148 return (*dev->dev_ops->dev_set_link_up)(dev);
1152 rte_eth_dev_set_link_down(uint8_t port_id)
1154 struct rte_eth_dev *dev;
1156 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1158 dev = &rte_eth_devices[port_id];
1160 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1161 return (*dev->dev_ops->dev_set_link_down)(dev);
1165 rte_eth_dev_close(uint8_t port_id)
1167 struct rte_eth_dev *dev;
1169 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1170 dev = &rte_eth_devices[port_id];
1172 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1173 dev->data->dev_started = 0;
1174 (*dev->dev_ops->dev_close)(dev);
1176 rte_free(dev->data->rx_queues);
1177 dev->data->rx_queues = NULL;
1178 rte_free(dev->data->tx_queues);
1179 dev->data->tx_queues = NULL;
1183 rte_eth_rx_queue_setup(uint8_t port_id, uint16_t rx_queue_id,
1184 uint16_t nb_rx_desc, unsigned int socket_id,
1185 const struct rte_eth_rxconf *rx_conf,
1186 struct rte_mempool *mp)
1189 uint32_t mbp_buf_size;
1190 struct rte_eth_dev *dev;
1191 struct rte_eth_dev_info dev_info;
1193 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1195 dev = &rte_eth_devices[port_id];
1196 if (rx_queue_id >= dev->data->nb_rx_queues) {
1197 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
1201 if (dev->data->dev_started) {
1202 RTE_PMD_DEBUG_TRACE(
1203 "port %d must be stopped to allow configuration\n", port_id);
1207 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1208 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1211 * Check the size of the mbuf data buffer.
1212 * This value must be provided in the private data of the memory pool.
1213 * First check that the memory pool has a valid private data.
1215 rte_eth_dev_info_get(port_id, &dev_info);
1216 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1217 RTE_PMD_DEBUG_TRACE("%s private_data_size %d < %d\n",
1218 mp->name, (int) mp->private_data_size,
1219 (int) sizeof(struct rte_pktmbuf_pool_private));
1222 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1224 if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1225 RTE_PMD_DEBUG_TRACE("%s mbuf_data_room_size %d < %d "
1226 "(RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)"
1230 (int)(RTE_PKTMBUF_HEADROOM +
1231 dev_info.min_rx_bufsize),
1232 (int)RTE_PKTMBUF_HEADROOM,
1233 (int)dev_info.min_rx_bufsize);
1237 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1238 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1239 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1241 RTE_PMD_DEBUG_TRACE("Invalid value for nb_rx_desc(=%hu), "
1242 "should be: <= %hu, = %hu, and a product of %hu\n",
1244 dev_info.rx_desc_lim.nb_max,
1245 dev_info.rx_desc_lim.nb_min,
1246 dev_info.rx_desc_lim.nb_align);
1250 if (rx_conf == NULL)
1251 rx_conf = &dev_info.default_rxconf;
1253 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1254 socket_id, rx_conf, mp);
1256 if (!dev->data->min_rx_buf_size ||
1257 dev->data->min_rx_buf_size > mbp_buf_size)
1258 dev->data->min_rx_buf_size = mbp_buf_size;
1265 rte_eth_tx_queue_setup(uint8_t port_id, uint16_t tx_queue_id,
1266 uint16_t nb_tx_desc, unsigned int socket_id,
1267 const struct rte_eth_txconf *tx_conf)
1269 struct rte_eth_dev *dev;
1270 struct rte_eth_dev_info dev_info;
1272 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1274 dev = &rte_eth_devices[port_id];
1275 if (tx_queue_id >= dev->data->nb_tx_queues) {
1276 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
1280 if (dev->data->dev_started) {
1281 RTE_PMD_DEBUG_TRACE(
1282 "port %d must be stopped to allow configuration\n", port_id);
1286 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1287 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
1289 rte_eth_dev_info_get(port_id, &dev_info);
1291 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
1292 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
1293 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
1294 RTE_PMD_DEBUG_TRACE("Invalid value for nb_tx_desc(=%hu), "
1295 "should be: <= %hu, = %hu, and a product of %hu\n",
1297 dev_info.tx_desc_lim.nb_max,
1298 dev_info.tx_desc_lim.nb_min,
1299 dev_info.tx_desc_lim.nb_align);
1303 if (tx_conf == NULL)
1304 tx_conf = &dev_info.default_txconf;
1306 return (*dev->dev_ops->tx_queue_setup)(dev, tx_queue_id, nb_tx_desc,
1307 socket_id, tx_conf);
1311 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
1312 void *userdata __rte_unused)
1316 for (i = 0; i < unsent; i++)
1317 rte_pktmbuf_free(pkts[i]);
1321 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
1324 uint64_t *count = userdata;
1327 for (i = 0; i < unsent; i++)
1328 rte_pktmbuf_free(pkts[i]);
1334 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
1335 buffer_tx_error_fn cbfn, void *userdata)
1337 buffer->error_callback = cbfn;
1338 buffer->error_userdata = userdata;
1343 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
1350 buffer->size = size;
1351 if (buffer->error_callback == NULL) {
1352 ret = rte_eth_tx_buffer_set_err_callback(
1353 buffer, rte_eth_tx_buffer_drop_callback, NULL);
1360 rte_eth_promiscuous_enable(uint8_t port_id)
1362 struct rte_eth_dev *dev;
1364 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1365 dev = &rte_eth_devices[port_id];
1367 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_enable);
1368 (*dev->dev_ops->promiscuous_enable)(dev);
1369 dev->data->promiscuous = 1;
1373 rte_eth_promiscuous_disable(uint8_t port_id)
1375 struct rte_eth_dev *dev;
1377 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1378 dev = &rte_eth_devices[port_id];
1380 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_disable);
1381 dev->data->promiscuous = 0;
1382 (*dev->dev_ops->promiscuous_disable)(dev);
1386 rte_eth_promiscuous_get(uint8_t port_id)
1388 struct rte_eth_dev *dev;
1390 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1392 dev = &rte_eth_devices[port_id];
1393 return dev->data->promiscuous;
1397 rte_eth_allmulticast_enable(uint8_t port_id)
1399 struct rte_eth_dev *dev;
1401 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1402 dev = &rte_eth_devices[port_id];
1404 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_enable);
1405 (*dev->dev_ops->allmulticast_enable)(dev);
1406 dev->data->all_multicast = 1;
1410 rte_eth_allmulticast_disable(uint8_t port_id)
1412 struct rte_eth_dev *dev;
1414 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1415 dev = &rte_eth_devices[port_id];
1417 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_disable);
1418 dev->data->all_multicast = 0;
1419 (*dev->dev_ops->allmulticast_disable)(dev);
1423 rte_eth_allmulticast_get(uint8_t port_id)
1425 struct rte_eth_dev *dev;
1427 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1429 dev = &rte_eth_devices[port_id];
1430 return dev->data->all_multicast;
1434 rte_eth_dev_atomic_read_link_status(struct rte_eth_dev *dev,
1435 struct rte_eth_link *link)
1437 struct rte_eth_link *dst = link;
1438 struct rte_eth_link *src = &(dev->data->dev_link);
1440 if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
1441 *(uint64_t *)src) == 0)
1448 rte_eth_link_get(uint8_t port_id, struct rte_eth_link *eth_link)
1450 struct rte_eth_dev *dev;
1452 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1453 dev = &rte_eth_devices[port_id];
1455 if (dev->data->dev_conf.intr_conf.lsc != 0)
1456 rte_eth_dev_atomic_read_link_status(dev, eth_link);
1458 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1459 (*dev->dev_ops->link_update)(dev, 1);
1460 *eth_link = dev->data->dev_link;
1465 rte_eth_link_get_nowait(uint8_t port_id, struct rte_eth_link *eth_link)
1467 struct rte_eth_dev *dev;
1469 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1470 dev = &rte_eth_devices[port_id];
1472 if (dev->data->dev_conf.intr_conf.lsc != 0)
1473 rte_eth_dev_atomic_read_link_status(dev, eth_link);
1475 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1476 (*dev->dev_ops->link_update)(dev, 0);
1477 *eth_link = dev->data->dev_link;
1482 rte_eth_stats_get(uint8_t port_id, struct rte_eth_stats *stats)
1484 struct rte_eth_dev *dev;
1486 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1488 dev = &rte_eth_devices[port_id];
1489 memset(stats, 0, sizeof(*stats));
1491 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
1492 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
1493 (*dev->dev_ops->stats_get)(dev, stats);
1498 rte_eth_stats_reset(uint8_t port_id)
1500 struct rte_eth_dev *dev;
1502 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1503 dev = &rte_eth_devices[port_id];
1505 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->stats_reset);
1506 (*dev->dev_ops->stats_reset)(dev);
1507 dev->data->rx_mbuf_alloc_failed = 0;
1511 get_xstats_count(uint8_t port_id)
1513 struct rte_eth_dev *dev;
1516 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1517 dev = &rte_eth_devices[port_id];
1518 if (dev->dev_ops->xstats_get_names != NULL) {
1519 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
1524 count += RTE_NB_STATS;
1525 count += dev->data->nb_rx_queues * RTE_NB_RXQ_STATS;
1526 count += dev->data->nb_tx_queues * RTE_NB_TXQ_STATS;
1531 rte_eth_xstats_get_names(uint8_t port_id,
1532 struct rte_eth_xstat_name *xstats_names,
1535 struct rte_eth_dev *dev;
1536 int cnt_used_entries;
1537 int cnt_expected_entries;
1538 int cnt_driver_entries;
1539 uint32_t idx, id_queue;
1541 cnt_expected_entries = get_xstats_count(port_id);
1542 if (xstats_names == NULL || cnt_expected_entries < 0 ||
1543 (int)size < cnt_expected_entries)
1544 return cnt_expected_entries;
1546 /* port_id checked in get_xstats_count() */
1547 dev = &rte_eth_devices[port_id];
1548 cnt_used_entries = 0;
1550 for (idx = 0; idx < RTE_NB_STATS; idx++) {
1551 snprintf(xstats_names[cnt_used_entries].name,
1552 sizeof(xstats_names[0].name),
1553 "%s", rte_stats_strings[idx].name);
1556 for (id_queue = 0; id_queue < dev->data->nb_rx_queues; id_queue++) {
1557 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
1558 snprintf(xstats_names[cnt_used_entries].name,
1559 sizeof(xstats_names[0].name),
1561 id_queue, rte_rxq_stats_strings[idx].name);
1566 for (id_queue = 0; id_queue < dev->data->nb_tx_queues; id_queue++) {
1567 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
1568 snprintf(xstats_names[cnt_used_entries].name,
1569 sizeof(xstats_names[0].name),
1571 id_queue, rte_txq_stats_strings[idx].name);
1576 if (dev->dev_ops->xstats_get_names != NULL) {
1577 /* If there are any driver-specific xstats, append them
1580 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
1582 xstats_names + cnt_used_entries,
1583 size - cnt_used_entries);
1584 if (cnt_driver_entries < 0)
1585 return cnt_driver_entries;
1586 cnt_used_entries += cnt_driver_entries;
1589 return cnt_used_entries;
1592 /* retrieve ethdev extended statistics */
1594 rte_eth_xstats_get(uint8_t port_id, struct rte_eth_xstat *xstats,
1597 struct rte_eth_stats eth_stats;
1598 struct rte_eth_dev *dev;
1599 unsigned count = 0, i, q;
1601 uint64_t val, *stats_ptr;
1603 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1605 dev = &rte_eth_devices[port_id];
1607 /* Return generic statistics */
1608 count = RTE_NB_STATS + (dev->data->nb_rx_queues * RTE_NB_RXQ_STATS) +
1609 (dev->data->nb_tx_queues * RTE_NB_TXQ_STATS);
1611 /* implemented by the driver */
1612 if (dev->dev_ops->xstats_get != NULL) {
1613 /* Retrieve the xstats from the driver at the end of the
1616 xcount = (*dev->dev_ops->xstats_get)(dev,
1617 xstats ? xstats + count : NULL,
1618 (n > count) ? n - count : 0);
1624 if (n < count + xcount || xstats == NULL)
1625 return count + xcount;
1627 /* now fill the xstats structure */
1629 rte_eth_stats_get(port_id, ð_stats);
1632 for (i = 0; i < RTE_NB_STATS; i++) {
1633 stats_ptr = RTE_PTR_ADD(ð_stats,
1634 rte_stats_strings[i].offset);
1636 xstats[count++].value = val;
1640 for (q = 0; q < dev->data->nb_rx_queues; q++) {
1641 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
1642 stats_ptr = RTE_PTR_ADD(ð_stats,
1643 rte_rxq_stats_strings[i].offset +
1644 q * sizeof(uint64_t));
1646 xstats[count++].value = val;
1651 for (q = 0; q < dev->data->nb_tx_queues; q++) {
1652 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
1653 stats_ptr = RTE_PTR_ADD(ð_stats,
1654 rte_txq_stats_strings[i].offset +
1655 q * sizeof(uint64_t));
1657 xstats[count++].value = val;
1661 for (i = 0; i < count + xcount; i++)
1664 return count + xcount;
1667 /* reset ethdev extended statistics */
1669 rte_eth_xstats_reset(uint8_t port_id)
1671 struct rte_eth_dev *dev;
1673 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1674 dev = &rte_eth_devices[port_id];
1676 /* implemented by the driver */
1677 if (dev->dev_ops->xstats_reset != NULL) {
1678 (*dev->dev_ops->xstats_reset)(dev);
1682 /* fallback to default */
1683 rte_eth_stats_reset(port_id);
1687 set_queue_stats_mapping(uint8_t port_id, uint16_t queue_id, uint8_t stat_idx,
1690 struct rte_eth_dev *dev;
1692 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1694 dev = &rte_eth_devices[port_id];
1696 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
1697 return (*dev->dev_ops->queue_stats_mapping_set)
1698 (dev, queue_id, stat_idx, is_rx);
1703 rte_eth_dev_set_tx_queue_stats_mapping(uint8_t port_id, uint16_t tx_queue_id,
1706 return set_queue_stats_mapping(port_id, tx_queue_id, stat_idx,
1712 rte_eth_dev_set_rx_queue_stats_mapping(uint8_t port_id, uint16_t rx_queue_id,
1715 return set_queue_stats_mapping(port_id, rx_queue_id, stat_idx,
1720 rte_eth_dev_info_get(uint8_t port_id, struct rte_eth_dev_info *dev_info)
1722 struct rte_eth_dev *dev;
1723 const struct rte_eth_desc_lim lim = {
1724 .nb_max = UINT16_MAX,
1729 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1730 dev = &rte_eth_devices[port_id];
1732 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
1733 dev_info->rx_desc_lim = lim;
1734 dev_info->tx_desc_lim = lim;
1736 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_infos_get);
1737 (*dev->dev_ops->dev_infos_get)(dev, dev_info);
1738 dev_info->pci_dev = dev->pci_dev;
1739 dev_info->driver_name = dev->data->drv_name;
1740 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
1741 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
1745 rte_eth_dev_get_supported_ptypes(uint8_t port_id, uint32_t ptype_mask,
1746 uint32_t *ptypes, int num)
1749 struct rte_eth_dev *dev;
1750 const uint32_t *all_ptypes;
1752 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1753 dev = &rte_eth_devices[port_id];
1754 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
1755 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
1760 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
1761 if (all_ptypes[i] & ptype_mask) {
1763 ptypes[j] = all_ptypes[i];
1771 rte_eth_macaddr_get(uint8_t port_id, struct ether_addr *mac_addr)
1773 struct rte_eth_dev *dev;
1775 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1776 dev = &rte_eth_devices[port_id];
1777 ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
1782 rte_eth_dev_get_mtu(uint8_t port_id, uint16_t *mtu)
1784 struct rte_eth_dev *dev;
1786 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1788 dev = &rte_eth_devices[port_id];
1789 *mtu = dev->data->mtu;
1794 rte_eth_dev_set_mtu(uint8_t port_id, uint16_t mtu)
1797 struct rte_eth_dev *dev;
1799 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1800 dev = &rte_eth_devices[port_id];
1801 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
1803 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
1805 dev->data->mtu = mtu;
1811 rte_eth_dev_vlan_filter(uint8_t port_id, uint16_t vlan_id, int on)
1813 struct rte_eth_dev *dev;
1815 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1816 dev = &rte_eth_devices[port_id];
1817 if (!(dev->data->dev_conf.rxmode.hw_vlan_filter)) {
1818 RTE_PMD_DEBUG_TRACE("port %d: vlan-filtering disabled\n", port_id);
1822 if (vlan_id > 4095) {
1823 RTE_PMD_DEBUG_TRACE("(port_id=%d) invalid vlan_id=%u > 4095\n",
1824 port_id, (unsigned) vlan_id);
1827 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
1829 return (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
1833 rte_eth_dev_set_vlan_strip_on_queue(uint8_t port_id, uint16_t rx_queue_id, int on)
1835 struct rte_eth_dev *dev;
1837 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1838 dev = &rte_eth_devices[port_id];
1839 if (rx_queue_id >= dev->data->nb_rx_queues) {
1840 RTE_PMD_DEBUG_TRACE("Invalid rx_queue_id=%d\n", port_id);
1844 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
1845 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
1851 rte_eth_dev_set_vlan_ether_type(uint8_t port_id,
1852 enum rte_vlan_type vlan_type,
1855 struct rte_eth_dev *dev;
1857 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1858 dev = &rte_eth_devices[port_id];
1859 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
1861 return (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type, tpid);
1865 rte_eth_dev_set_vlan_offload(uint8_t port_id, int offload_mask)
1867 struct rte_eth_dev *dev;
1872 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1873 dev = &rte_eth_devices[port_id];
1875 /*check which option changed by application*/
1876 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
1877 org = !!(dev->data->dev_conf.rxmode.hw_vlan_strip);
1879 dev->data->dev_conf.rxmode.hw_vlan_strip = (uint8_t)cur;
1880 mask |= ETH_VLAN_STRIP_MASK;
1883 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
1884 org = !!(dev->data->dev_conf.rxmode.hw_vlan_filter);
1886 dev->data->dev_conf.rxmode.hw_vlan_filter = (uint8_t)cur;
1887 mask |= ETH_VLAN_FILTER_MASK;
1890 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
1891 org = !!(dev->data->dev_conf.rxmode.hw_vlan_extend);
1893 dev->data->dev_conf.rxmode.hw_vlan_extend = (uint8_t)cur;
1894 mask |= ETH_VLAN_EXTEND_MASK;
1901 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
1902 (*dev->dev_ops->vlan_offload_set)(dev, mask);
1908 rte_eth_dev_get_vlan_offload(uint8_t port_id)
1910 struct rte_eth_dev *dev;
1913 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1914 dev = &rte_eth_devices[port_id];
1916 if (dev->data->dev_conf.rxmode.hw_vlan_strip)
1917 ret |= ETH_VLAN_STRIP_OFFLOAD;
1919 if (dev->data->dev_conf.rxmode.hw_vlan_filter)
1920 ret |= ETH_VLAN_FILTER_OFFLOAD;
1922 if (dev->data->dev_conf.rxmode.hw_vlan_extend)
1923 ret |= ETH_VLAN_EXTEND_OFFLOAD;
1929 rte_eth_dev_set_vlan_pvid(uint8_t port_id, uint16_t pvid, int on)
1931 struct rte_eth_dev *dev;
1933 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1934 dev = &rte_eth_devices[port_id];
1935 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
1936 (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on);
1942 rte_eth_dev_flow_ctrl_get(uint8_t port_id, struct rte_eth_fc_conf *fc_conf)
1944 struct rte_eth_dev *dev;
1946 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1947 dev = &rte_eth_devices[port_id];
1948 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
1949 memset(fc_conf, 0, sizeof(*fc_conf));
1950 return (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf);
1954 rte_eth_dev_flow_ctrl_set(uint8_t port_id, struct rte_eth_fc_conf *fc_conf)
1956 struct rte_eth_dev *dev;
1958 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1959 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
1960 RTE_PMD_DEBUG_TRACE("Invalid send_xon, only 0/1 allowed\n");
1964 dev = &rte_eth_devices[port_id];
1965 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
1966 return (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf);
1970 rte_eth_dev_priority_flow_ctrl_set(uint8_t port_id, struct rte_eth_pfc_conf *pfc_conf)
1972 struct rte_eth_dev *dev;
1974 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1975 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
1976 RTE_PMD_DEBUG_TRACE("Invalid priority, only 0-7 allowed\n");
1980 dev = &rte_eth_devices[port_id];
1981 /* High water, low water validation are device specific */
1982 if (*dev->dev_ops->priority_flow_ctrl_set)
1983 return (*dev->dev_ops->priority_flow_ctrl_set)(dev, pfc_conf);
1988 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
1996 if (reta_size != RTE_ALIGN(reta_size, RTE_RETA_GROUP_SIZE)) {
1997 RTE_PMD_DEBUG_TRACE("Invalid reta size, should be %u aligned\n",
1998 RTE_RETA_GROUP_SIZE);
2002 num = reta_size / RTE_RETA_GROUP_SIZE;
2003 for (i = 0; i < num; i++) {
2004 if (reta_conf[i].mask)
2012 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
2016 uint16_t i, idx, shift;
2022 RTE_PMD_DEBUG_TRACE("No receive queue is available\n");
2026 for (i = 0; i < reta_size; i++) {
2027 idx = i / RTE_RETA_GROUP_SIZE;
2028 shift = i % RTE_RETA_GROUP_SIZE;
2029 if ((reta_conf[idx].mask & (1ULL << shift)) &&
2030 (reta_conf[idx].reta[shift] >= max_rxq)) {
2031 RTE_PMD_DEBUG_TRACE("reta_conf[%u]->reta[%u]: %u exceeds "
2032 "the maximum rxq index: %u\n", idx, shift,
2033 reta_conf[idx].reta[shift], max_rxq);
2042 rte_eth_dev_rss_reta_update(uint8_t port_id,
2043 struct rte_eth_rss_reta_entry64 *reta_conf,
2046 struct rte_eth_dev *dev;
2049 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2050 /* Check mask bits */
2051 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2055 dev = &rte_eth_devices[port_id];
2057 /* Check entry value */
2058 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
2059 dev->data->nb_rx_queues);
2063 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
2064 return (*dev->dev_ops->reta_update)(dev, reta_conf, reta_size);
2068 rte_eth_dev_rss_reta_query(uint8_t port_id,
2069 struct rte_eth_rss_reta_entry64 *reta_conf,
2072 struct rte_eth_dev *dev;
2075 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2077 /* Check mask bits */
2078 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2082 dev = &rte_eth_devices[port_id];
2083 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
2084 return (*dev->dev_ops->reta_query)(dev, reta_conf, reta_size);
2088 rte_eth_dev_rss_hash_update(uint8_t port_id, struct rte_eth_rss_conf *rss_conf)
2090 struct rte_eth_dev *dev;
2091 uint16_t rss_hash_protos;
2093 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2094 rss_hash_protos = rss_conf->rss_hf;
2095 if ((rss_hash_protos != 0) &&
2096 ((rss_hash_protos & ETH_RSS_PROTO_MASK) == 0)) {
2097 RTE_PMD_DEBUG_TRACE("Invalid rss_hash_protos=0x%x\n",
2101 dev = &rte_eth_devices[port_id];
2102 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
2103 return (*dev->dev_ops->rss_hash_update)(dev, rss_conf);
2107 rte_eth_dev_rss_hash_conf_get(uint8_t port_id,
2108 struct rte_eth_rss_conf *rss_conf)
2110 struct rte_eth_dev *dev;
2112 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2113 dev = &rte_eth_devices[port_id];
2114 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
2115 return (*dev->dev_ops->rss_hash_conf_get)(dev, rss_conf);
2119 rte_eth_dev_udp_tunnel_port_add(uint8_t port_id,
2120 struct rte_eth_udp_tunnel *udp_tunnel)
2122 struct rte_eth_dev *dev;
2124 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2125 if (udp_tunnel == NULL) {
2126 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2130 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2131 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2135 dev = &rte_eth_devices[port_id];
2136 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
2137 return (*dev->dev_ops->udp_tunnel_port_add)(dev, udp_tunnel);
2141 rte_eth_dev_udp_tunnel_port_delete(uint8_t port_id,
2142 struct rte_eth_udp_tunnel *udp_tunnel)
2144 struct rte_eth_dev *dev;
2146 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2147 dev = &rte_eth_devices[port_id];
2149 if (udp_tunnel == NULL) {
2150 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2154 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2155 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2159 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
2160 return (*dev->dev_ops->udp_tunnel_port_del)(dev, udp_tunnel);
2164 rte_eth_led_on(uint8_t port_id)
2166 struct rte_eth_dev *dev;
2168 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2169 dev = &rte_eth_devices[port_id];
2170 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
2171 return (*dev->dev_ops->dev_led_on)(dev);
2175 rte_eth_led_off(uint8_t port_id)
2177 struct rte_eth_dev *dev;
2179 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2180 dev = &rte_eth_devices[port_id];
2181 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
2182 return (*dev->dev_ops->dev_led_off)(dev);
2186 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2190 get_mac_addr_index(uint8_t port_id, const struct ether_addr *addr)
2192 struct rte_eth_dev_info dev_info;
2193 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2196 rte_eth_dev_info_get(port_id, &dev_info);
2198 for (i = 0; i < dev_info.max_mac_addrs; i++)
2199 if (memcmp(addr, &dev->data->mac_addrs[i], ETHER_ADDR_LEN) == 0)
2205 static const struct ether_addr null_mac_addr;
2208 rte_eth_dev_mac_addr_add(uint8_t port_id, struct ether_addr *addr,
2211 struct rte_eth_dev *dev;
2215 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2216 dev = &rte_eth_devices[port_id];
2217 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
2219 if (is_zero_ether_addr(addr)) {
2220 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
2224 if (pool >= ETH_64_POOLS) {
2225 RTE_PMD_DEBUG_TRACE("pool id must be 0-%d\n", ETH_64_POOLS - 1);
2229 index = get_mac_addr_index(port_id, addr);
2231 index = get_mac_addr_index(port_id, &null_mac_addr);
2233 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
2238 pool_mask = dev->data->mac_pool_sel[index];
2240 /* Check if both MAC address and pool is already there, and do nothing */
2241 if (pool_mask & (1ULL << pool))
2246 (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
2248 /* Update address in NIC data structure */
2249 ether_addr_copy(addr, &dev->data->mac_addrs[index]);
2251 /* Update pool bitmap in NIC data structure */
2252 dev->data->mac_pool_sel[index] |= (1ULL << pool);
2258 rte_eth_dev_mac_addr_remove(uint8_t port_id, struct ether_addr *addr)
2260 struct rte_eth_dev *dev;
2263 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2264 dev = &rte_eth_devices[port_id];
2265 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
2267 index = get_mac_addr_index(port_id, addr);
2269 RTE_PMD_DEBUG_TRACE("port %d: Cannot remove default MAC address\n", port_id);
2271 } else if (index < 0)
2272 return 0; /* Do nothing if address wasn't found */
2275 (*dev->dev_ops->mac_addr_remove)(dev, index);
2277 /* Update address in NIC data structure */
2278 ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
2280 /* reset pool bitmap */
2281 dev->data->mac_pool_sel[index] = 0;
2287 rte_eth_dev_default_mac_addr_set(uint8_t port_id, struct ether_addr *addr)
2289 struct rte_eth_dev *dev;
2291 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2293 if (!is_valid_assigned_ether_addr(addr))
2296 dev = &rte_eth_devices[port_id];
2297 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
2299 /* Update default address in NIC data structure */
2300 ether_addr_copy(addr, &dev->data->mac_addrs[0]);
2302 (*dev->dev_ops->mac_addr_set)(dev, addr);
2308 rte_eth_dev_set_vf_rxmode(uint8_t port_id, uint16_t vf,
2309 uint16_t rx_mode, uint8_t on)
2312 struct rte_eth_dev *dev;
2313 struct rte_eth_dev_info dev_info;
2315 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2317 dev = &rte_eth_devices[port_id];
2318 rte_eth_dev_info_get(port_id, &dev_info);
2320 num_vfs = dev_info.max_vfs;
2322 RTE_PMD_DEBUG_TRACE("set VF RX mode:invalid VF id %d\n", vf);
2327 RTE_PMD_DEBUG_TRACE("set VF RX mode:mode mask ca not be zero\n");
2330 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_vf_rx_mode, -ENOTSUP);
2331 return (*dev->dev_ops->set_vf_rx_mode)(dev, vf, rx_mode, on);
2335 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2339 get_hash_mac_addr_index(uint8_t port_id, const struct ether_addr *addr)
2341 struct rte_eth_dev_info dev_info;
2342 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2345 rte_eth_dev_info_get(port_id, &dev_info);
2346 if (!dev->data->hash_mac_addrs)
2349 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
2350 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
2351 ETHER_ADDR_LEN) == 0)
2358 rte_eth_dev_uc_hash_table_set(uint8_t port_id, struct ether_addr *addr,
2363 struct rte_eth_dev *dev;
2365 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2367 dev = &rte_eth_devices[port_id];
2368 if (is_zero_ether_addr(addr)) {
2369 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
2374 index = get_hash_mac_addr_index(port_id, addr);
2375 /* Check if it's already there, and do nothing */
2376 if ((index >= 0) && (on))
2381 RTE_PMD_DEBUG_TRACE("port %d: the MAC address was not "
2382 "set in UTA\n", port_id);
2386 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
2388 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
2394 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
2395 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
2397 /* Update address in NIC data structure */
2399 ether_addr_copy(addr,
2400 &dev->data->hash_mac_addrs[index]);
2402 ether_addr_copy(&null_mac_addr,
2403 &dev->data->hash_mac_addrs[index]);
2410 rte_eth_dev_uc_all_hash_table_set(uint8_t port_id, uint8_t on)
2412 struct rte_eth_dev *dev;
2414 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2416 dev = &rte_eth_devices[port_id];
2418 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
2419 return (*dev->dev_ops->uc_all_hash_table_set)(dev, on);
2423 rte_eth_dev_set_vf_rx(uint8_t port_id, uint16_t vf, uint8_t on)
2426 struct rte_eth_dev *dev;
2427 struct rte_eth_dev_info dev_info;
2429 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2431 dev = &rte_eth_devices[port_id];
2432 rte_eth_dev_info_get(port_id, &dev_info);
2434 num_vfs = dev_info.max_vfs;
2436 RTE_PMD_DEBUG_TRACE("port %d: invalid vf id\n", port_id);
2440 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_vf_rx, -ENOTSUP);
2441 return (*dev->dev_ops->set_vf_rx)(dev, vf, on);
2445 rte_eth_dev_set_vf_tx(uint8_t port_id, uint16_t vf, uint8_t on)
2448 struct rte_eth_dev *dev;
2449 struct rte_eth_dev_info dev_info;
2451 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2453 dev = &rte_eth_devices[port_id];
2454 rte_eth_dev_info_get(port_id, &dev_info);
2456 num_vfs = dev_info.max_vfs;
2458 RTE_PMD_DEBUG_TRACE("set pool tx:invalid pool id=%d\n", vf);
2462 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_vf_tx, -ENOTSUP);
2463 return (*dev->dev_ops->set_vf_tx)(dev, vf, on);
2467 rte_eth_dev_set_vf_vlan_filter(uint8_t port_id, uint16_t vlan_id,
2468 uint64_t vf_mask, uint8_t vlan_on)
2470 struct rte_eth_dev *dev;
2472 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2474 dev = &rte_eth_devices[port_id];
2476 if (vlan_id > ETHER_MAX_VLAN_ID) {
2477 RTE_PMD_DEBUG_TRACE("VF VLAN filter:invalid VLAN id=%d\n",
2483 RTE_PMD_DEBUG_TRACE("VF VLAN filter:pool_mask can not be 0\n");
2487 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_vf_vlan_filter, -ENOTSUP);
2488 return (*dev->dev_ops->set_vf_vlan_filter)(dev, vlan_id,
2492 int rte_eth_set_queue_rate_limit(uint8_t port_id, uint16_t queue_idx,
2495 struct rte_eth_dev *dev;
2496 struct rte_eth_dev_info dev_info;
2497 struct rte_eth_link link;
2499 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2501 dev = &rte_eth_devices[port_id];
2502 rte_eth_dev_info_get(port_id, &dev_info);
2503 link = dev->data->dev_link;
2505 if (queue_idx > dev_info.max_tx_queues) {
2506 RTE_PMD_DEBUG_TRACE("set queue rate limit:port %d: "
2507 "invalid queue id=%d\n", port_id, queue_idx);
2511 if (tx_rate > link.link_speed) {
2512 RTE_PMD_DEBUG_TRACE("set queue rate limit:invalid tx_rate=%d, "
2513 "bigger than link speed= %d\n",
2514 tx_rate, link.link_speed);
2518 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
2519 return (*dev->dev_ops->set_queue_rate_limit)(dev, queue_idx, tx_rate);
2522 int rte_eth_set_vf_rate_limit(uint8_t port_id, uint16_t vf, uint16_t tx_rate,
2525 struct rte_eth_dev *dev;
2526 struct rte_eth_dev_info dev_info;
2527 struct rte_eth_link link;
2532 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2534 dev = &rte_eth_devices[port_id];
2535 rte_eth_dev_info_get(port_id, &dev_info);
2536 link = dev->data->dev_link;
2538 if (vf > dev_info.max_vfs) {
2539 RTE_PMD_DEBUG_TRACE("set VF rate limit:port %d: "
2540 "invalid vf id=%d\n", port_id, vf);
2544 if (tx_rate > link.link_speed) {
2545 RTE_PMD_DEBUG_TRACE("set VF rate limit:invalid tx_rate=%d, "
2546 "bigger than link speed= %d\n",
2547 tx_rate, link.link_speed);
2551 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_vf_rate_limit, -ENOTSUP);
2552 return (*dev->dev_ops->set_vf_rate_limit)(dev, vf, tx_rate, q_msk);
2556 rte_eth_mirror_rule_set(uint8_t port_id,
2557 struct rte_eth_mirror_conf *mirror_conf,
2558 uint8_t rule_id, uint8_t on)
2560 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2562 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2563 if (mirror_conf->rule_type == 0) {
2564 RTE_PMD_DEBUG_TRACE("mirror rule type can not be 0.\n");
2568 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
2569 RTE_PMD_DEBUG_TRACE("Invalid dst pool, pool id must be 0-%d\n",
2574 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
2575 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
2576 (mirror_conf->pool_mask == 0)) {
2577 RTE_PMD_DEBUG_TRACE("Invalid mirror pool, pool mask can not be 0.\n");
2581 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
2582 mirror_conf->vlan.vlan_mask == 0) {
2583 RTE_PMD_DEBUG_TRACE("Invalid vlan mask, vlan mask can not be 0.\n");
2587 dev = &rte_eth_devices[port_id];
2588 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
2590 return (*dev->dev_ops->mirror_rule_set)(dev, mirror_conf, rule_id, on);
2594 rte_eth_mirror_rule_reset(uint8_t port_id, uint8_t rule_id)
2596 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2598 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2600 dev = &rte_eth_devices[port_id];
2601 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
2603 return (*dev->dev_ops->mirror_rule_reset)(dev, rule_id);
2607 rte_eth_dev_callback_register(uint8_t port_id,
2608 enum rte_eth_event_type event,
2609 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
2611 struct rte_eth_dev *dev;
2612 struct rte_eth_dev_callback *user_cb;
2617 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2619 dev = &rte_eth_devices[port_id];
2620 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2622 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
2623 if (user_cb->cb_fn == cb_fn &&
2624 user_cb->cb_arg == cb_arg &&
2625 user_cb->event == event) {
2630 /* create a new callback. */
2631 if (user_cb == NULL)
2632 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
2633 sizeof(struct rte_eth_dev_callback), 0);
2634 if (user_cb != NULL) {
2635 user_cb->cb_fn = cb_fn;
2636 user_cb->cb_arg = cb_arg;
2637 user_cb->event = event;
2638 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs), user_cb, next);
2641 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2642 return (user_cb == NULL) ? -ENOMEM : 0;
2646 rte_eth_dev_callback_unregister(uint8_t port_id,
2647 enum rte_eth_event_type event,
2648 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
2651 struct rte_eth_dev *dev;
2652 struct rte_eth_dev_callback *cb, *next;
2657 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2659 dev = &rte_eth_devices[port_id];
2660 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2663 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL; cb = next) {
2665 next = TAILQ_NEXT(cb, next);
2667 if (cb->cb_fn != cb_fn || cb->event != event ||
2668 (cb->cb_arg != (void *)-1 &&
2669 cb->cb_arg != cb_arg))
2673 * if this callback is not executing right now,
2676 if (cb->active == 0) {
2677 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
2684 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2689 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
2690 enum rte_eth_event_type event)
2692 struct rte_eth_dev_callback *cb_lst;
2693 struct rte_eth_dev_callback dev_cb;
2695 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2696 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
2697 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
2701 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2702 dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
2704 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2707 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2711 rte_eth_dev_rx_intr_ctl(uint8_t port_id, int epfd, int op, void *data)
2714 struct rte_eth_dev *dev;
2715 struct rte_intr_handle *intr_handle;
2719 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2721 dev = &rte_eth_devices[port_id];
2722 intr_handle = &dev->pci_dev->intr_handle;
2723 if (!intr_handle->intr_vec) {
2724 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
2728 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
2729 vec = intr_handle->intr_vec[qid];
2730 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
2731 if (rc && rc != -EEXIST) {
2732 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
2733 " op %d epfd %d vec %u\n",
2734 port_id, qid, op, epfd, vec);
2741 const struct rte_memzone *
2742 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
2743 uint16_t queue_id, size_t size, unsigned align,
2746 char z_name[RTE_MEMZONE_NAMESIZE];
2747 const struct rte_memzone *mz;
2749 snprintf(z_name, sizeof(z_name), "%s_%s_%d_%d",
2750 dev->driver->pci_drv.name, ring_name,
2751 dev->data->port_id, queue_id);
2753 mz = rte_memzone_lookup(z_name);
2757 if (rte_xen_dom0_supported())
2758 return rte_memzone_reserve_bounded(z_name, size, socket_id,
2759 0, align, RTE_PGSIZE_2M);
2761 return rte_memzone_reserve_aligned(z_name, size, socket_id,
2766 rte_eth_dev_rx_intr_ctl_q(uint8_t port_id, uint16_t queue_id,
2767 int epfd, int op, void *data)
2770 struct rte_eth_dev *dev;
2771 struct rte_intr_handle *intr_handle;
2774 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2776 dev = &rte_eth_devices[port_id];
2777 if (queue_id >= dev->data->nb_rx_queues) {
2778 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%u\n", queue_id);
2782 intr_handle = &dev->pci_dev->intr_handle;
2783 if (!intr_handle->intr_vec) {
2784 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
2788 vec = intr_handle->intr_vec[queue_id];
2789 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
2790 if (rc && rc != -EEXIST) {
2791 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
2792 " op %d epfd %d vec %u\n",
2793 port_id, queue_id, op, epfd, vec);
2801 rte_eth_dev_rx_intr_enable(uint8_t port_id,
2804 struct rte_eth_dev *dev;
2806 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2808 dev = &rte_eth_devices[port_id];
2810 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
2811 return (*dev->dev_ops->rx_queue_intr_enable)(dev, queue_id);
2815 rte_eth_dev_rx_intr_disable(uint8_t port_id,
2818 struct rte_eth_dev *dev;
2820 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2822 dev = &rte_eth_devices[port_id];
2824 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
2825 return (*dev->dev_ops->rx_queue_intr_disable)(dev, queue_id);
2828 #ifdef RTE_NIC_BYPASS
2829 int rte_eth_dev_bypass_init(uint8_t port_id)
2831 struct rte_eth_dev *dev;
2833 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2835 dev = &rte_eth_devices[port_id];
2836 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_init, -ENOTSUP);
2837 (*dev->dev_ops->bypass_init)(dev);
2842 rte_eth_dev_bypass_state_show(uint8_t port_id, uint32_t *state)
2844 struct rte_eth_dev *dev;
2846 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2848 dev = &rte_eth_devices[port_id];
2849 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_state_show, -ENOTSUP);
2850 (*dev->dev_ops->bypass_state_show)(dev, state);
2855 rte_eth_dev_bypass_state_set(uint8_t port_id, uint32_t *new_state)
2857 struct rte_eth_dev *dev;
2859 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2861 dev = &rte_eth_devices[port_id];
2862 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_state_set, -ENOTSUP);
2863 (*dev->dev_ops->bypass_state_set)(dev, new_state);
2868 rte_eth_dev_bypass_event_show(uint8_t port_id, uint32_t event, uint32_t *state)
2870 struct rte_eth_dev *dev;
2872 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2874 dev = &rte_eth_devices[port_id];
2875 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_state_show, -ENOTSUP);
2876 (*dev->dev_ops->bypass_event_show)(dev, event, state);
2881 rte_eth_dev_bypass_event_store(uint8_t port_id, uint32_t event, uint32_t state)
2883 struct rte_eth_dev *dev;
2885 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2887 dev = &rte_eth_devices[port_id];
2889 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_event_set, -ENOTSUP);
2890 (*dev->dev_ops->bypass_event_set)(dev, event, state);
2895 rte_eth_dev_wd_timeout_store(uint8_t port_id, uint32_t timeout)
2897 struct rte_eth_dev *dev;
2899 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2901 dev = &rte_eth_devices[port_id];
2903 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_wd_timeout_set, -ENOTSUP);
2904 (*dev->dev_ops->bypass_wd_timeout_set)(dev, timeout);
2909 rte_eth_dev_bypass_ver_show(uint8_t port_id, uint32_t *ver)
2911 struct rte_eth_dev *dev;
2913 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2915 dev = &rte_eth_devices[port_id];
2917 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_ver_show, -ENOTSUP);
2918 (*dev->dev_ops->bypass_ver_show)(dev, ver);
2923 rte_eth_dev_bypass_wd_timeout_show(uint8_t port_id, uint32_t *wd_timeout)
2925 struct rte_eth_dev *dev;
2927 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2929 dev = &rte_eth_devices[port_id];
2931 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_wd_timeout_show, -ENOTSUP);
2932 (*dev->dev_ops->bypass_wd_timeout_show)(dev, wd_timeout);
2937 rte_eth_dev_bypass_wd_reset(uint8_t port_id)
2939 struct rte_eth_dev *dev;
2941 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2943 dev = &rte_eth_devices[port_id];
2945 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_wd_reset, -ENOTSUP);
2946 (*dev->dev_ops->bypass_wd_reset)(dev);
2952 rte_eth_dev_filter_supported(uint8_t port_id, enum rte_filter_type filter_type)
2954 struct rte_eth_dev *dev;
2956 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2958 dev = &rte_eth_devices[port_id];
2959 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
2960 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
2961 RTE_ETH_FILTER_NOP, NULL);
2965 rte_eth_dev_filter_ctrl(uint8_t port_id, enum rte_filter_type filter_type,
2966 enum rte_filter_op filter_op, void *arg)
2968 struct rte_eth_dev *dev;
2970 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2972 dev = &rte_eth_devices[port_id];
2973 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
2974 return (*dev->dev_ops->filter_ctrl)(dev, filter_type, filter_op, arg);
2978 rte_eth_add_rx_callback(uint8_t port_id, uint16_t queue_id,
2979 rte_rx_callback_fn fn, void *user_param)
2981 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
2982 rte_errno = ENOTSUP;
2985 /* check input parameters */
2986 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
2987 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
2991 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
2999 cb->param = user_param;
3001 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3002 /* Add the callbacks in fifo order. */
3003 struct rte_eth_rxtx_callback *tail =
3004 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3007 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3014 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3020 rte_eth_add_first_rx_callback(uint8_t port_id, uint16_t queue_id,
3021 rte_rx_callback_fn fn, void *user_param)
3023 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3024 rte_errno = ENOTSUP;
3027 /* check input parameters */
3028 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3029 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3034 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3042 cb->param = user_param;
3044 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3045 /* Add the callbacks at fisrt position*/
3046 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3048 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3049 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3055 rte_eth_add_tx_callback(uint8_t port_id, uint16_t queue_id,
3056 rte_tx_callback_fn fn, void *user_param)
3058 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3059 rte_errno = ENOTSUP;
3062 /* check input parameters */
3063 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3064 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
3069 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3077 cb->param = user_param;
3079 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3080 /* Add the callbacks in fifo order. */
3081 struct rte_eth_rxtx_callback *tail =
3082 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
3085 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
3092 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3098 rte_eth_remove_rx_callback(uint8_t port_id, uint16_t queue_id,
3099 struct rte_eth_rxtx_callback *user_cb)
3101 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3104 /* Check input parameters. */
3105 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3106 if (user_cb == NULL ||
3107 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
3110 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3111 struct rte_eth_rxtx_callback *cb;
3112 struct rte_eth_rxtx_callback **prev_cb;
3115 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3116 prev_cb = &dev->post_rx_burst_cbs[queue_id];
3117 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3119 if (cb == user_cb) {
3120 /* Remove the user cb from the callback list. */
3121 *prev_cb = cb->next;
3126 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3132 rte_eth_remove_tx_callback(uint8_t port_id, uint16_t queue_id,
3133 struct rte_eth_rxtx_callback *user_cb)
3135 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3138 /* Check input parameters. */
3139 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3140 if (user_cb == NULL ||
3141 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
3144 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3146 struct rte_eth_rxtx_callback *cb;
3147 struct rte_eth_rxtx_callback **prev_cb;
3149 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3150 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
3151 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3153 if (cb == user_cb) {
3154 /* Remove the user cb from the callback list. */
3155 *prev_cb = cb->next;
3160 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3166 rte_eth_rx_queue_info_get(uint8_t port_id, uint16_t queue_id,
3167 struct rte_eth_rxq_info *qinfo)
3169 struct rte_eth_dev *dev;
3171 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3176 dev = &rte_eth_devices[port_id];
3177 if (queue_id >= dev->data->nb_rx_queues) {
3178 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", queue_id);
3182 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
3184 memset(qinfo, 0, sizeof(*qinfo));
3185 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
3190 rte_eth_tx_queue_info_get(uint8_t port_id, uint16_t queue_id,
3191 struct rte_eth_txq_info *qinfo)
3193 struct rte_eth_dev *dev;
3195 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3200 dev = &rte_eth_devices[port_id];
3201 if (queue_id >= dev->data->nb_tx_queues) {
3202 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", queue_id);
3206 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
3208 memset(qinfo, 0, sizeof(*qinfo));
3209 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
3214 rte_eth_dev_set_mc_addr_list(uint8_t port_id,
3215 struct ether_addr *mc_addr_set,
3216 uint32_t nb_mc_addr)
3218 struct rte_eth_dev *dev;
3220 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3222 dev = &rte_eth_devices[port_id];
3223 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
3224 return dev->dev_ops->set_mc_addr_list(dev, mc_addr_set, nb_mc_addr);
3228 rte_eth_timesync_enable(uint8_t port_id)
3230 struct rte_eth_dev *dev;
3232 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3233 dev = &rte_eth_devices[port_id];
3235 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
3236 return (*dev->dev_ops->timesync_enable)(dev);
3240 rte_eth_timesync_disable(uint8_t port_id)
3242 struct rte_eth_dev *dev;
3244 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3245 dev = &rte_eth_devices[port_id];
3247 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
3248 return (*dev->dev_ops->timesync_disable)(dev);
3252 rte_eth_timesync_read_rx_timestamp(uint8_t port_id, struct timespec *timestamp,
3255 struct rte_eth_dev *dev;
3257 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3258 dev = &rte_eth_devices[port_id];
3260 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
3261 return (*dev->dev_ops->timesync_read_rx_timestamp)(dev, timestamp, flags);
3265 rte_eth_timesync_read_tx_timestamp(uint8_t port_id, struct timespec *timestamp)
3267 struct rte_eth_dev *dev;
3269 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3270 dev = &rte_eth_devices[port_id];
3272 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
3273 return (*dev->dev_ops->timesync_read_tx_timestamp)(dev, timestamp);
3277 rte_eth_timesync_adjust_time(uint8_t port_id, int64_t delta)
3279 struct rte_eth_dev *dev;
3281 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3282 dev = &rte_eth_devices[port_id];
3284 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
3285 return (*dev->dev_ops->timesync_adjust_time)(dev, delta);
3289 rte_eth_timesync_read_time(uint8_t port_id, struct timespec *timestamp)
3291 struct rte_eth_dev *dev;
3293 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3294 dev = &rte_eth_devices[port_id];
3296 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
3297 return (*dev->dev_ops->timesync_read_time)(dev, timestamp);
3301 rte_eth_timesync_write_time(uint8_t port_id, const struct timespec *timestamp)
3303 struct rte_eth_dev *dev;
3305 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3306 dev = &rte_eth_devices[port_id];
3308 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
3309 return (*dev->dev_ops->timesync_write_time)(dev, timestamp);
3313 rte_eth_dev_get_reg_info(uint8_t port_id, struct rte_dev_reg_info *info)
3315 struct rte_eth_dev *dev;
3317 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3319 dev = &rte_eth_devices[port_id];
3320 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
3321 return (*dev->dev_ops->get_reg)(dev, info);
3325 rte_eth_dev_get_eeprom_length(uint8_t port_id)
3327 struct rte_eth_dev *dev;
3329 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3331 dev = &rte_eth_devices[port_id];
3332 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
3333 return (*dev->dev_ops->get_eeprom_length)(dev);
3337 rte_eth_dev_get_eeprom(uint8_t port_id, struct rte_dev_eeprom_info *info)
3339 struct rte_eth_dev *dev;
3341 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3343 dev = &rte_eth_devices[port_id];
3344 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
3345 return (*dev->dev_ops->get_eeprom)(dev, info);
3349 rte_eth_dev_set_eeprom(uint8_t port_id, struct rte_dev_eeprom_info *info)
3351 struct rte_eth_dev *dev;
3353 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3355 dev = &rte_eth_devices[port_id];
3356 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
3357 return (*dev->dev_ops->set_eeprom)(dev, info);
3361 rte_eth_dev_get_dcb_info(uint8_t port_id,
3362 struct rte_eth_dcb_info *dcb_info)
3364 struct rte_eth_dev *dev;
3366 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3368 dev = &rte_eth_devices[port_id];
3369 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
3371 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
3372 return (*dev->dev_ops->get_dcb_info)(dev, dcb_info);
3376 rte_eth_copy_pci_info(struct rte_eth_dev *eth_dev, struct rte_pci_device *pci_dev)
3378 if ((eth_dev == NULL) || (pci_dev == NULL)) {
3379 RTE_PMD_DEBUG_TRACE("NULL pointer eth_dev=%p pci_dev=%p\n",
3384 eth_dev->data->dev_flags = 0;
3385 if (pci_dev->driver->drv_flags & RTE_PCI_DRV_INTR_LSC)
3386 eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_LSC;
3387 if (pci_dev->driver->drv_flags & RTE_PCI_DRV_DETACHABLE)
3388 eth_dev->data->dev_flags |= RTE_ETH_DEV_DETACHABLE;
3390 eth_dev->data->kdrv = pci_dev->kdrv;
3391 eth_dev->data->numa_node = pci_dev->numa_node;
3392 eth_dev->data->drv_name = pci_dev->driver->name;
3396 rte_eth_dev_l2_tunnel_eth_type_conf(uint8_t port_id,
3397 struct rte_eth_l2_tunnel_conf *l2_tunnel)
3399 struct rte_eth_dev *dev;
3401 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3402 if (l2_tunnel == NULL) {
3403 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
3407 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
3408 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
3412 dev = &rte_eth_devices[port_id];
3413 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
3415 return (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev, l2_tunnel);
3419 rte_eth_dev_l2_tunnel_offload_set(uint8_t port_id,
3420 struct rte_eth_l2_tunnel_conf *l2_tunnel,
3424 struct rte_eth_dev *dev;
3426 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3428 if (l2_tunnel == NULL) {
3429 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
3433 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
3434 RTE_PMD_DEBUG_TRACE("Invalid tunnel type.\n");
3439 RTE_PMD_DEBUG_TRACE("Mask should have a value.\n");
3443 dev = &rte_eth_devices[port_id];
3444 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
3446 return (*dev->dev_ops->l2_tunnel_offload_set)(dev, l2_tunnel, mask, en);