4 * Copyright(c) 2010-2016 Intel Corporation. All rights reserved.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
11 * * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
17 * * Neither the name of Intel Corporation nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 #include <sys/types.h>
35 #include <sys/queue.h>
44 #include <netinet/in.h>
46 #include <rte_byteorder.h>
48 #include <rte_debug.h>
49 #include <rte_interrupts.h>
51 #include <rte_memory.h>
52 #include <rte_memcpy.h>
53 #include <rte_memzone.h>
54 #include <rte_launch.h>
56 #include <rte_per_lcore.h>
57 #include <rte_lcore.h>
58 #include <rte_atomic.h>
59 #include <rte_branch_prediction.h>
60 #include <rte_common.h>
62 #include <rte_mempool.h>
63 #include <rte_malloc.h>
65 #include <rte_errno.h>
66 #include <rte_spinlock.h>
67 #include <rte_string_fns.h>
69 #include "rte_ether.h"
70 #include "rte_ethdev.h"
72 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
73 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
74 static struct rte_eth_dev_data *rte_eth_dev_data;
75 static uint8_t nb_ports;
77 /* spinlock for eth device callbacks */
78 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
80 /* store statistics names and its offset in stats structure */
81 struct rte_eth_xstats_name_off {
82 char name[RTE_ETH_XSTATS_NAME_SIZE];
86 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
87 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
88 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
89 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
90 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
91 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
92 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
93 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
97 #define RTE_NB_STATS (sizeof(rte_stats_strings) / sizeof(rte_stats_strings[0]))
99 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
100 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
101 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
102 {"errors", offsetof(struct rte_eth_stats, q_errors)},
105 #define RTE_NB_RXQ_STATS (sizeof(rte_rxq_stats_strings) / \
106 sizeof(rte_rxq_stats_strings[0]))
108 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
109 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
110 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
112 #define RTE_NB_TXQ_STATS (sizeof(rte_txq_stats_strings) / \
113 sizeof(rte_txq_stats_strings[0]))
117 * The user application callback description.
119 * It contains callback address to be registered by user application,
120 * the pointer to the parameters for callback, and the event type.
122 struct rte_eth_dev_callback {
123 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
124 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
125 void *cb_arg; /**< Parameter for callback */
126 enum rte_eth_event_type event; /**< Interrupt event type */
127 uint32_t active; /**< Callback is executing */
141 rte_eth_dev_data_alloc(void)
143 const unsigned flags = 0;
144 const struct rte_memzone *mz;
146 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
147 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
148 RTE_MAX_ETHPORTS * sizeof(*rte_eth_dev_data),
149 rte_socket_id(), flags);
151 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
153 rte_panic("Cannot allocate memzone for ethernet port data\n");
155 rte_eth_dev_data = mz->addr;
156 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
157 memset(rte_eth_dev_data, 0,
158 RTE_MAX_ETHPORTS * sizeof(*rte_eth_dev_data));
162 rte_eth_dev_allocated(const char *name)
166 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
167 if ((rte_eth_devices[i].attached == DEV_ATTACHED) &&
168 strcmp(rte_eth_devices[i].data->name, name) == 0)
169 return &rte_eth_devices[i];
175 rte_eth_dev_find_free_port(void)
179 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
180 if (rte_eth_devices[i].attached == DEV_DETACHED)
183 return RTE_MAX_ETHPORTS;
187 rte_eth_dev_allocate(const char *name, enum rte_eth_dev_type type)
190 struct rte_eth_dev *eth_dev;
192 port_id = rte_eth_dev_find_free_port();
193 if (port_id == RTE_MAX_ETHPORTS) {
194 RTE_PMD_DEBUG_TRACE("Reached maximum number of Ethernet ports\n");
198 if (rte_eth_dev_data == NULL)
199 rte_eth_dev_data_alloc();
201 if (rte_eth_dev_allocated(name) != NULL) {
202 RTE_PMD_DEBUG_TRACE("Ethernet Device with name %s already allocated!\n",
207 eth_dev = &rte_eth_devices[port_id];
208 eth_dev->data = &rte_eth_dev_data[port_id];
209 snprintf(eth_dev->data->name, sizeof(eth_dev->data->name), "%s", name);
210 eth_dev->data->port_id = port_id;
211 eth_dev->attached = DEV_ATTACHED;
212 eth_dev->dev_type = type;
218 rte_eth_dev_create_unique_device_name(char *name, size_t size,
219 struct rte_pci_device *pci_dev)
223 ret = snprintf(name, size, "%d:%d.%d",
224 pci_dev->addr.bus, pci_dev->addr.devid,
225 pci_dev->addr.function);
232 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
237 eth_dev->attached = DEV_DETACHED;
243 rte_eth_dev_init(struct rte_pci_driver *pci_drv,
244 struct rte_pci_device *pci_dev)
246 struct eth_driver *eth_drv;
247 struct rte_eth_dev *eth_dev;
248 char ethdev_name[RTE_ETH_NAME_MAX_LEN];
252 eth_drv = (struct eth_driver *)pci_drv;
254 /* Create unique Ethernet device name using PCI address */
255 rte_eth_dev_create_unique_device_name(ethdev_name,
256 sizeof(ethdev_name), pci_dev);
258 eth_dev = rte_eth_dev_allocate(ethdev_name, RTE_ETH_DEV_PCI);
262 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
263 eth_dev->data->dev_private = rte_zmalloc("ethdev private structure",
264 eth_drv->dev_private_size,
265 RTE_CACHE_LINE_SIZE);
266 if (eth_dev->data->dev_private == NULL)
267 rte_panic("Cannot allocate memzone for private port data\n");
269 eth_dev->pci_dev = pci_dev;
270 eth_dev->driver = eth_drv;
271 eth_dev->data->rx_mbuf_alloc_failed = 0;
273 /* init user callbacks */
274 TAILQ_INIT(&(eth_dev->link_intr_cbs));
277 * Set the default MTU.
279 eth_dev->data->mtu = ETHER_MTU;
281 /* Invoke PMD device initialization function */
282 diag = (*eth_drv->eth_dev_init)(eth_dev);
286 RTE_PMD_DEBUG_TRACE("driver %s: eth_dev_init(vendor_id=0x%u device_id=0x%x) failed\n",
288 (unsigned) pci_dev->id.vendor_id,
289 (unsigned) pci_dev->id.device_id);
290 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
291 rte_free(eth_dev->data->dev_private);
292 rte_eth_dev_release_port(eth_dev);
297 rte_eth_dev_uninit(struct rte_pci_device *pci_dev)
299 const struct eth_driver *eth_drv;
300 struct rte_eth_dev *eth_dev;
301 char ethdev_name[RTE_ETH_NAME_MAX_LEN];
307 /* Create unique Ethernet device name using PCI address */
308 rte_eth_dev_create_unique_device_name(ethdev_name,
309 sizeof(ethdev_name), pci_dev);
311 eth_dev = rte_eth_dev_allocated(ethdev_name);
315 eth_drv = (const struct eth_driver *)pci_dev->driver;
317 /* Invoke PMD device uninit function */
318 if (*eth_drv->eth_dev_uninit) {
319 ret = (*eth_drv->eth_dev_uninit)(eth_dev);
324 /* free ether device */
325 rte_eth_dev_release_port(eth_dev);
327 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
328 rte_free(eth_dev->data->dev_private);
330 eth_dev->pci_dev = NULL;
331 eth_dev->driver = NULL;
332 eth_dev->data = NULL;
338 * Register an Ethernet [Poll Mode] driver.
340 * Function invoked by the initialization function of an Ethernet driver
341 * to simultaneously register itself as a PCI driver and as an Ethernet
343 * Invokes the rte_eal_pci_register() function to register the *pci_drv*
344 * structure embedded in the *eth_drv* structure, after having stored the
345 * address of the rte_eth_dev_init() function in the *devinit* field of
346 * the *pci_drv* structure.
347 * During the PCI probing phase, the rte_eth_dev_init() function is
348 * invoked for each PCI [Ethernet device] matching the embedded PCI
349 * identifiers provided by the driver.
352 rte_eth_driver_register(struct eth_driver *eth_drv)
354 eth_drv->pci_drv.devinit = rte_eth_dev_init;
355 eth_drv->pci_drv.devuninit = rte_eth_dev_uninit;
356 rte_eal_pci_register(ð_drv->pci_drv);
360 rte_eth_dev_is_valid_port(uint8_t port_id)
362 if (port_id >= RTE_MAX_ETHPORTS ||
363 rte_eth_devices[port_id].attached != DEV_ATTACHED)
370 rte_eth_dev_socket_id(uint8_t port_id)
372 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
373 return rte_eth_devices[port_id].data->numa_node;
377 rte_eth_dev_count(void)
382 static enum rte_eth_dev_type
383 rte_eth_dev_get_device_type(uint8_t port_id)
385 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, RTE_ETH_DEV_UNKNOWN);
386 return rte_eth_devices[port_id].dev_type;
390 rte_eth_dev_get_addr_by_port(uint8_t port_id, struct rte_pci_addr *addr)
392 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
395 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
399 *addr = rte_eth_devices[port_id].pci_dev->addr;
404 rte_eth_dev_get_name_by_port(uint8_t port_id, char *name)
408 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
411 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
415 /* shouldn't check 'rte_eth_devices[i].data',
416 * because it might be overwritten by VDEV PMD */
417 tmp = rte_eth_dev_data[port_id].name;
423 rte_eth_dev_get_port_by_name(const char *name, uint8_t *port_id)
428 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
432 *port_id = RTE_MAX_ETHPORTS;
434 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
437 rte_eth_dev_data[i].name, strlen(name))) {
448 rte_eth_dev_get_port_by_addr(const struct rte_pci_addr *addr, uint8_t *port_id)
451 struct rte_pci_device *pci_dev = NULL;
454 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
458 *port_id = RTE_MAX_ETHPORTS;
460 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
462 pci_dev = rte_eth_devices[i].pci_dev;
465 !rte_eal_compare_pci_addr(&pci_dev->addr, addr)) {
476 rte_eth_dev_is_detachable(uint8_t port_id)
480 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
482 switch (rte_eth_devices[port_id].data->kdrv) {
483 case RTE_KDRV_IGB_UIO:
484 case RTE_KDRV_UIO_GENERIC:
485 case RTE_KDRV_NIC_UIO:
492 dev_flags = rte_eth_devices[port_id].data->dev_flags;
493 if ((dev_flags & RTE_ETH_DEV_DETACHABLE) &&
494 (!(dev_flags & RTE_ETH_DEV_BONDED_SLAVE)))
500 /* attach the new physical device, then store port_id of the device */
502 rte_eth_dev_attach_pdev(struct rte_pci_addr *addr, uint8_t *port_id)
504 /* re-construct pci_device_list */
505 if (rte_eal_pci_scan())
507 /* Invoke probe func of the driver can handle the new device. */
508 if (rte_eal_pci_probe_one(addr))
511 if (rte_eth_dev_get_port_by_addr(addr, port_id))
519 /* detach the new physical device, then store pci_addr of the device */
521 rte_eth_dev_detach_pdev(uint8_t port_id, struct rte_pci_addr *addr)
523 struct rte_pci_addr freed_addr;
524 struct rte_pci_addr vp;
526 /* get pci address by port id */
527 if (rte_eth_dev_get_addr_by_port(port_id, &freed_addr))
530 /* Zeroed pci addr means the port comes from virtual device */
531 vp.domain = vp.bus = vp.devid = vp.function = 0;
532 if (rte_eal_compare_pci_addr(&vp, &freed_addr) == 0)
535 /* invoke devuninit func of the pci driver,
536 * also remove the device from pci_device_list */
537 if (rte_eal_pci_detach(&freed_addr))
546 /* attach the new virtual device, then store port_id of the device */
548 rte_eth_dev_attach_vdev(const char *vdevargs, uint8_t *port_id)
550 char *name = NULL, *args = NULL;
553 /* parse vdevargs, then retrieve device name and args */
554 if (rte_eal_parse_devargs_str(vdevargs, &name, &args))
557 /* walk around dev_driver_list to find the driver of the device,
558 * then invoke probe function of the driver.
559 * rte_eal_vdev_init() updates port_id allocated after
562 if (rte_eal_vdev_init(name, args))
565 if (rte_eth_dev_get_port_by_name(name, port_id))
576 /* detach the new virtual device, then store the name of the device */
578 rte_eth_dev_detach_vdev(uint8_t port_id, char *vdevname)
580 char name[RTE_ETH_NAME_MAX_LEN];
582 /* get device name by port id */
583 if (rte_eth_dev_get_name_by_port(port_id, name))
585 /* walk around dev_driver_list to find the driver of the device,
586 * then invoke uninit function of the driver */
587 if (rte_eal_vdev_uninit(name))
590 strncpy(vdevname, name, sizeof(name));
596 /* attach the new device, then store port_id of the device */
598 rte_eth_dev_attach(const char *devargs, uint8_t *port_id)
600 struct rte_pci_addr addr;
603 if ((devargs == NULL) || (port_id == NULL)) {
608 if (eal_parse_pci_DomBDF(devargs, &addr) == 0) {
609 ret = rte_eth_dev_attach_pdev(&addr, port_id);
613 ret = rte_eth_dev_attach_vdev(devargs, port_id);
620 RTE_LOG(ERR, EAL, "Driver, cannot attach the device\n");
624 /* detach the device, then store the name of the device */
626 rte_eth_dev_detach(uint8_t port_id, char *name)
628 struct rte_pci_addr addr;
636 /* check whether the driver supports detach feature, or not */
637 if (rte_eth_dev_is_detachable(port_id))
640 if (rte_eth_dev_get_device_type(port_id) == RTE_ETH_DEV_PCI) {
641 ret = rte_eth_dev_get_addr_by_port(port_id, &addr);
645 ret = rte_eth_dev_detach_pdev(port_id, &addr);
649 snprintf(name, RTE_ETH_NAME_MAX_LEN,
651 addr.domain, addr.bus,
652 addr.devid, addr.function);
654 ret = rte_eth_dev_detach_vdev(port_id, name);
662 RTE_LOG(ERR, EAL, "Driver, cannot detach the device\n");
667 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
669 uint16_t old_nb_queues = dev->data->nb_rx_queues;
673 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
674 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
675 sizeof(dev->data->rx_queues[0]) * nb_queues,
676 RTE_CACHE_LINE_SIZE);
677 if (dev->data->rx_queues == NULL) {
678 dev->data->nb_rx_queues = 0;
681 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
682 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
684 rxq = dev->data->rx_queues;
686 for (i = nb_queues; i < old_nb_queues; i++)
687 (*dev->dev_ops->rx_queue_release)(rxq[i]);
688 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
689 RTE_CACHE_LINE_SIZE);
692 if (nb_queues > old_nb_queues) {
693 uint16_t new_qs = nb_queues - old_nb_queues;
695 memset(rxq + old_nb_queues, 0,
696 sizeof(rxq[0]) * new_qs);
699 dev->data->rx_queues = rxq;
701 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
702 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
704 rxq = dev->data->rx_queues;
706 for (i = nb_queues; i < old_nb_queues; i++)
707 (*dev->dev_ops->rx_queue_release)(rxq[i]);
709 dev->data->nb_rx_queues = nb_queues;
714 rte_eth_dev_rx_queue_start(uint8_t port_id, uint16_t rx_queue_id)
716 struct rte_eth_dev *dev;
718 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
720 dev = &rte_eth_devices[port_id];
721 if (rx_queue_id >= dev->data->nb_rx_queues) {
722 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
726 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
728 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
729 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
730 " already started\n",
731 rx_queue_id, port_id);
735 return dev->dev_ops->rx_queue_start(dev, rx_queue_id);
740 rte_eth_dev_rx_queue_stop(uint8_t port_id, uint16_t rx_queue_id)
742 struct rte_eth_dev *dev;
744 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
746 dev = &rte_eth_devices[port_id];
747 if (rx_queue_id >= dev->data->nb_rx_queues) {
748 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
752 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
754 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
755 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
756 " already stopped\n",
757 rx_queue_id, port_id);
761 return dev->dev_ops->rx_queue_stop(dev, rx_queue_id);
766 rte_eth_dev_tx_queue_start(uint8_t port_id, uint16_t tx_queue_id)
768 struct rte_eth_dev *dev;
770 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
772 dev = &rte_eth_devices[port_id];
773 if (tx_queue_id >= dev->data->nb_tx_queues) {
774 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
778 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
780 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
781 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
782 " already started\n",
783 tx_queue_id, port_id);
787 return dev->dev_ops->tx_queue_start(dev, tx_queue_id);
792 rte_eth_dev_tx_queue_stop(uint8_t port_id, uint16_t tx_queue_id)
794 struct rte_eth_dev *dev;
796 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
798 dev = &rte_eth_devices[port_id];
799 if (tx_queue_id >= dev->data->nb_tx_queues) {
800 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
804 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
806 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
807 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
808 " already stopped\n",
809 tx_queue_id, port_id);
813 return dev->dev_ops->tx_queue_stop(dev, tx_queue_id);
818 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
820 uint16_t old_nb_queues = dev->data->nb_tx_queues;
824 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
825 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
826 sizeof(dev->data->tx_queues[0]) * nb_queues,
827 RTE_CACHE_LINE_SIZE);
828 if (dev->data->tx_queues == NULL) {
829 dev->data->nb_tx_queues = 0;
832 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
833 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
835 txq = dev->data->tx_queues;
837 for (i = nb_queues; i < old_nb_queues; i++)
838 (*dev->dev_ops->tx_queue_release)(txq[i]);
839 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
840 RTE_CACHE_LINE_SIZE);
843 if (nb_queues > old_nb_queues) {
844 uint16_t new_qs = nb_queues - old_nb_queues;
846 memset(txq + old_nb_queues, 0,
847 sizeof(txq[0]) * new_qs);
850 dev->data->tx_queues = txq;
852 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
853 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
855 txq = dev->data->tx_queues;
857 for (i = nb_queues; i < old_nb_queues; i++)
858 (*dev->dev_ops->tx_queue_release)(txq[i]);
860 dev->data->nb_tx_queues = nb_queues;
865 rte_eth_speed_bitflag(uint32_t speed, int duplex)
868 case ETH_SPEED_NUM_10M:
869 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
870 case ETH_SPEED_NUM_100M:
871 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
872 case ETH_SPEED_NUM_1G:
873 return ETH_LINK_SPEED_1G;
874 case ETH_SPEED_NUM_2_5G:
875 return ETH_LINK_SPEED_2_5G;
876 case ETH_SPEED_NUM_5G:
877 return ETH_LINK_SPEED_5G;
878 case ETH_SPEED_NUM_10G:
879 return ETH_LINK_SPEED_10G;
880 case ETH_SPEED_NUM_20G:
881 return ETH_LINK_SPEED_20G;
882 case ETH_SPEED_NUM_25G:
883 return ETH_LINK_SPEED_25G;
884 case ETH_SPEED_NUM_40G:
885 return ETH_LINK_SPEED_40G;
886 case ETH_SPEED_NUM_50G:
887 return ETH_LINK_SPEED_50G;
888 case ETH_SPEED_NUM_56G:
889 return ETH_LINK_SPEED_56G;
890 case ETH_SPEED_NUM_100G:
891 return ETH_LINK_SPEED_100G;
898 rte_eth_dev_configure(uint8_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
899 const struct rte_eth_conf *dev_conf)
901 struct rte_eth_dev *dev;
902 struct rte_eth_dev_info dev_info;
905 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
907 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
909 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
910 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
914 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
916 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
917 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
921 dev = &rte_eth_devices[port_id];
923 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
924 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
926 if (dev->data->dev_started) {
928 "port %d must be stopped to allow configuration\n", port_id);
932 /* Copy the dev_conf parameter into the dev structure */
933 memcpy(&dev->data->dev_conf, dev_conf, sizeof(dev->data->dev_conf));
936 * Check that the numbers of RX and TX queues are not greater
937 * than the maximum number of RX and TX queues supported by the
940 (*dev->dev_ops->dev_infos_get)(dev, &dev_info);
942 if (nb_rx_q == 0 && nb_tx_q == 0) {
943 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d both rx and tx queue cannot be 0\n", port_id);
947 if (nb_rx_q > dev_info.max_rx_queues) {
948 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_rx_queues=%d > %d\n",
949 port_id, nb_rx_q, dev_info.max_rx_queues);
953 if (nb_tx_q > dev_info.max_tx_queues) {
954 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_tx_queues=%d > %d\n",
955 port_id, nb_tx_q, dev_info.max_tx_queues);
960 * If link state interrupt is enabled, check that the
961 * device supports it.
963 if ((dev_conf->intr_conf.lsc == 1) &&
964 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
965 RTE_PMD_DEBUG_TRACE("driver %s does not support lsc\n",
966 dev->data->drv_name);
971 * If jumbo frames are enabled, check that the maximum RX packet
972 * length is supported by the configured device.
974 if (dev_conf->rxmode.jumbo_frame == 1) {
975 if (dev_conf->rxmode.max_rx_pkt_len >
976 dev_info.max_rx_pktlen) {
977 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
978 " > max valid value %u\n",
980 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
981 (unsigned)dev_info.max_rx_pktlen);
983 } else if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN) {
984 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
985 " < min valid value %u\n",
987 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
988 (unsigned)ETHER_MIN_LEN);
992 if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN ||
993 dev_conf->rxmode.max_rx_pkt_len > ETHER_MAX_LEN)
994 /* Use default value */
995 dev->data->dev_conf.rxmode.max_rx_pkt_len =
1000 * Setup new number of RX/TX queues and reconfigure device.
1002 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
1004 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_rx_queue_config = %d\n",
1009 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
1011 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_tx_queue_config = %d\n",
1013 rte_eth_dev_rx_queue_config(dev, 0);
1017 diag = (*dev->dev_ops->dev_configure)(dev);
1019 RTE_PMD_DEBUG_TRACE("port%d dev_configure = %d\n",
1021 rte_eth_dev_rx_queue_config(dev, 0);
1022 rte_eth_dev_tx_queue_config(dev, 0);
1030 rte_eth_dev_config_restore(uint8_t port_id)
1032 struct rte_eth_dev *dev;
1033 struct rte_eth_dev_info dev_info;
1034 struct ether_addr addr;
1038 dev = &rte_eth_devices[port_id];
1040 rte_eth_dev_info_get(port_id, &dev_info);
1042 if (RTE_ETH_DEV_SRIOV(dev).active)
1043 pool = RTE_ETH_DEV_SRIOV(dev).def_vmdq_idx;
1045 /* replay MAC address configuration */
1046 for (i = 0; i < dev_info.max_mac_addrs; i++) {
1047 addr = dev->data->mac_addrs[i];
1049 /* skip zero address */
1050 if (is_zero_ether_addr(&addr))
1053 /* add address to the hardware */
1054 if (*dev->dev_ops->mac_addr_add &&
1055 (dev->data->mac_pool_sel[i] & (1ULL << pool)))
1056 (*dev->dev_ops->mac_addr_add)(dev, &addr, i, pool);
1058 RTE_PMD_DEBUG_TRACE("port %d: MAC address array not supported\n",
1060 /* exit the loop but not return an error */
1065 /* replay promiscuous configuration */
1066 if (rte_eth_promiscuous_get(port_id) == 1)
1067 rte_eth_promiscuous_enable(port_id);
1068 else if (rte_eth_promiscuous_get(port_id) == 0)
1069 rte_eth_promiscuous_disable(port_id);
1071 /* replay all multicast configuration */
1072 if (rte_eth_allmulticast_get(port_id) == 1)
1073 rte_eth_allmulticast_enable(port_id);
1074 else if (rte_eth_allmulticast_get(port_id) == 0)
1075 rte_eth_allmulticast_disable(port_id);
1079 rte_eth_dev_start(uint8_t port_id)
1081 struct rte_eth_dev *dev;
1084 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1086 dev = &rte_eth_devices[port_id];
1088 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
1090 if (dev->data->dev_started != 0) {
1091 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu8
1092 " already started\n",
1097 diag = (*dev->dev_ops->dev_start)(dev);
1099 dev->data->dev_started = 1;
1103 rte_eth_dev_config_restore(port_id);
1105 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1106 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1107 (*dev->dev_ops->link_update)(dev, 0);
1113 rte_eth_dev_stop(uint8_t port_id)
1115 struct rte_eth_dev *dev;
1117 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1118 dev = &rte_eth_devices[port_id];
1120 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
1122 if (dev->data->dev_started == 0) {
1123 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu8
1124 " already stopped\n",
1129 dev->data->dev_started = 0;
1130 (*dev->dev_ops->dev_stop)(dev);
1134 rte_eth_dev_set_link_up(uint8_t port_id)
1136 struct rte_eth_dev *dev;
1138 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1140 dev = &rte_eth_devices[port_id];
1142 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1143 return (*dev->dev_ops->dev_set_link_up)(dev);
1147 rte_eth_dev_set_link_down(uint8_t port_id)
1149 struct rte_eth_dev *dev;
1151 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1153 dev = &rte_eth_devices[port_id];
1155 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1156 return (*dev->dev_ops->dev_set_link_down)(dev);
1160 rte_eth_dev_close(uint8_t port_id)
1162 struct rte_eth_dev *dev;
1164 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1165 dev = &rte_eth_devices[port_id];
1167 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1168 dev->data->dev_started = 0;
1169 (*dev->dev_ops->dev_close)(dev);
1171 rte_free(dev->data->rx_queues);
1172 dev->data->rx_queues = NULL;
1173 rte_free(dev->data->tx_queues);
1174 dev->data->tx_queues = NULL;
1178 rte_eth_rx_queue_setup(uint8_t port_id, uint16_t rx_queue_id,
1179 uint16_t nb_rx_desc, unsigned int socket_id,
1180 const struct rte_eth_rxconf *rx_conf,
1181 struct rte_mempool *mp)
1184 uint32_t mbp_buf_size;
1185 struct rte_eth_dev *dev;
1186 struct rte_eth_dev_info dev_info;
1188 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1190 dev = &rte_eth_devices[port_id];
1191 if (rx_queue_id >= dev->data->nb_rx_queues) {
1192 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
1196 if (dev->data->dev_started) {
1197 RTE_PMD_DEBUG_TRACE(
1198 "port %d must be stopped to allow configuration\n", port_id);
1202 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1203 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1206 * Check the size of the mbuf data buffer.
1207 * This value must be provided in the private data of the memory pool.
1208 * First check that the memory pool has a valid private data.
1210 rte_eth_dev_info_get(port_id, &dev_info);
1211 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1212 RTE_PMD_DEBUG_TRACE("%s private_data_size %d < %d\n",
1213 mp->name, (int) mp->private_data_size,
1214 (int) sizeof(struct rte_pktmbuf_pool_private));
1217 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1219 if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1220 RTE_PMD_DEBUG_TRACE("%s mbuf_data_room_size %d < %d "
1221 "(RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)"
1225 (int)(RTE_PKTMBUF_HEADROOM +
1226 dev_info.min_rx_bufsize),
1227 (int)RTE_PKTMBUF_HEADROOM,
1228 (int)dev_info.min_rx_bufsize);
1232 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1233 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1234 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1236 RTE_PMD_DEBUG_TRACE("Invalid value for nb_rx_desc(=%hu), "
1237 "should be: <= %hu, = %hu, and a product of %hu\n",
1239 dev_info.rx_desc_lim.nb_max,
1240 dev_info.rx_desc_lim.nb_min,
1241 dev_info.rx_desc_lim.nb_align);
1245 if (rx_conf == NULL)
1246 rx_conf = &dev_info.default_rxconf;
1248 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1249 socket_id, rx_conf, mp);
1251 if (!dev->data->min_rx_buf_size ||
1252 dev->data->min_rx_buf_size > mbp_buf_size)
1253 dev->data->min_rx_buf_size = mbp_buf_size;
1260 rte_eth_tx_queue_setup(uint8_t port_id, uint16_t tx_queue_id,
1261 uint16_t nb_tx_desc, unsigned int socket_id,
1262 const struct rte_eth_txconf *tx_conf)
1264 struct rte_eth_dev *dev;
1265 struct rte_eth_dev_info dev_info;
1267 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1269 dev = &rte_eth_devices[port_id];
1270 if (tx_queue_id >= dev->data->nb_tx_queues) {
1271 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
1275 if (dev->data->dev_started) {
1276 RTE_PMD_DEBUG_TRACE(
1277 "port %d must be stopped to allow configuration\n", port_id);
1281 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1282 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
1284 rte_eth_dev_info_get(port_id, &dev_info);
1286 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
1287 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
1288 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
1289 RTE_PMD_DEBUG_TRACE("Invalid value for nb_tx_desc(=%hu), "
1290 "should be: <= %hu, = %hu, and a product of %hu\n",
1292 dev_info.tx_desc_lim.nb_max,
1293 dev_info.tx_desc_lim.nb_min,
1294 dev_info.tx_desc_lim.nb_align);
1298 if (tx_conf == NULL)
1299 tx_conf = &dev_info.default_txconf;
1301 return (*dev->dev_ops->tx_queue_setup)(dev, tx_queue_id, nb_tx_desc,
1302 socket_id, tx_conf);
1306 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
1307 void *userdata __rte_unused)
1311 for (i = 0; i < unsent; i++)
1312 rte_pktmbuf_free(pkts[i]);
1316 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
1319 uint64_t *count = userdata;
1322 for (i = 0; i < unsent; i++)
1323 rte_pktmbuf_free(pkts[i]);
1329 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
1330 buffer_tx_error_fn cbfn, void *userdata)
1332 buffer->error_callback = cbfn;
1333 buffer->error_userdata = userdata;
1338 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
1345 buffer->size = size;
1346 if (buffer->error_callback == NULL) {
1347 ret = rte_eth_tx_buffer_set_err_callback(
1348 buffer, rte_eth_tx_buffer_drop_callback, NULL);
1355 rte_eth_promiscuous_enable(uint8_t port_id)
1357 struct rte_eth_dev *dev;
1359 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1360 dev = &rte_eth_devices[port_id];
1362 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_enable);
1363 (*dev->dev_ops->promiscuous_enable)(dev);
1364 dev->data->promiscuous = 1;
1368 rte_eth_promiscuous_disable(uint8_t port_id)
1370 struct rte_eth_dev *dev;
1372 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1373 dev = &rte_eth_devices[port_id];
1375 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_disable);
1376 dev->data->promiscuous = 0;
1377 (*dev->dev_ops->promiscuous_disable)(dev);
1381 rte_eth_promiscuous_get(uint8_t port_id)
1383 struct rte_eth_dev *dev;
1385 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1387 dev = &rte_eth_devices[port_id];
1388 return dev->data->promiscuous;
1392 rte_eth_allmulticast_enable(uint8_t port_id)
1394 struct rte_eth_dev *dev;
1396 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1397 dev = &rte_eth_devices[port_id];
1399 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_enable);
1400 (*dev->dev_ops->allmulticast_enable)(dev);
1401 dev->data->all_multicast = 1;
1405 rte_eth_allmulticast_disable(uint8_t port_id)
1407 struct rte_eth_dev *dev;
1409 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1410 dev = &rte_eth_devices[port_id];
1412 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_disable);
1413 dev->data->all_multicast = 0;
1414 (*dev->dev_ops->allmulticast_disable)(dev);
1418 rte_eth_allmulticast_get(uint8_t port_id)
1420 struct rte_eth_dev *dev;
1422 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1424 dev = &rte_eth_devices[port_id];
1425 return dev->data->all_multicast;
1429 rte_eth_dev_atomic_read_link_status(struct rte_eth_dev *dev,
1430 struct rte_eth_link *link)
1432 struct rte_eth_link *dst = link;
1433 struct rte_eth_link *src = &(dev->data->dev_link);
1435 if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
1436 *(uint64_t *)src) == 0)
1443 rte_eth_link_get(uint8_t port_id, struct rte_eth_link *eth_link)
1445 struct rte_eth_dev *dev;
1447 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1448 dev = &rte_eth_devices[port_id];
1450 if (dev->data->dev_conf.intr_conf.lsc != 0)
1451 rte_eth_dev_atomic_read_link_status(dev, eth_link);
1453 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1454 (*dev->dev_ops->link_update)(dev, 1);
1455 *eth_link = dev->data->dev_link;
1460 rte_eth_link_get_nowait(uint8_t port_id, struct rte_eth_link *eth_link)
1462 struct rte_eth_dev *dev;
1464 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1465 dev = &rte_eth_devices[port_id];
1467 if (dev->data->dev_conf.intr_conf.lsc != 0)
1468 rte_eth_dev_atomic_read_link_status(dev, eth_link);
1470 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1471 (*dev->dev_ops->link_update)(dev, 0);
1472 *eth_link = dev->data->dev_link;
1477 rte_eth_stats_get(uint8_t port_id, struct rte_eth_stats *stats)
1479 struct rte_eth_dev *dev;
1481 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1483 dev = &rte_eth_devices[port_id];
1484 memset(stats, 0, sizeof(*stats));
1486 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
1487 (*dev->dev_ops->stats_get)(dev, stats);
1488 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
1493 rte_eth_stats_reset(uint8_t port_id)
1495 struct rte_eth_dev *dev;
1497 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1498 dev = &rte_eth_devices[port_id];
1500 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->stats_reset);
1501 (*dev->dev_ops->stats_reset)(dev);
1502 dev->data->rx_mbuf_alloc_failed = 0;
1506 get_xstats_count(uint8_t port_id)
1508 struct rte_eth_dev *dev;
1511 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1512 dev = &rte_eth_devices[port_id];
1513 if (dev->dev_ops->xstats_get_names != NULL) {
1514 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
1519 count += RTE_NB_STATS;
1520 count += dev->data->nb_rx_queues * RTE_NB_RXQ_STATS;
1521 count += dev->data->nb_tx_queues * RTE_NB_TXQ_STATS;
1526 rte_eth_xstats_get_names(uint8_t port_id,
1527 struct rte_eth_xstat_name *xstats_names,
1530 struct rte_eth_dev *dev;
1531 int cnt_used_entries;
1532 int cnt_expected_entries;
1533 uint32_t idx, id_queue;
1535 cnt_expected_entries = get_xstats_count(port_id);
1536 if (xstats_names == NULL || cnt_expected_entries < 0 ||
1537 (int)size < cnt_expected_entries)
1538 return cnt_expected_entries;
1540 /* port_id checked in get_xstats_count() */
1541 dev = &rte_eth_devices[port_id];
1542 if (dev->dev_ops->xstats_get_names != NULL) {
1543 cnt_used_entries = (*dev->dev_ops->xstats_get_names)(
1544 dev, xstats_names, size);
1545 if (cnt_used_entries < 0)
1546 return cnt_used_entries;
1548 /* Driver itself does not support extended stats, but
1549 * still have basic stats.
1551 cnt_used_entries = 0;
1553 for (idx = 0; idx < RTE_NB_STATS; idx++) {
1554 xstats_names[cnt_used_entries].id = cnt_used_entries;
1555 snprintf(xstats_names[cnt_used_entries].name,
1556 sizeof(xstats_names[0].name),
1557 "%s", rte_stats_strings[idx].name);
1560 for (id_queue = 0; id_queue < dev->data->nb_rx_queues; id_queue++) {
1561 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
1562 xstats_names[cnt_used_entries].id = cnt_used_entries;
1563 snprintf(xstats_names[cnt_used_entries].name,
1564 sizeof(xstats_names[0].name),
1566 id_queue, rte_rxq_stats_strings[idx].name);
1571 for (id_queue = 0; id_queue < dev->data->nb_tx_queues; id_queue++) {
1572 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
1573 xstats_names[cnt_used_entries].id = cnt_used_entries;
1574 snprintf(xstats_names[cnt_used_entries].name,
1575 sizeof(xstats_names[0].name),
1577 id_queue, rte_txq_stats_strings[idx].name);
1581 return cnt_used_entries;
1584 /* retrieve ethdev extended statistics */
1586 rte_eth_xstats_get(uint8_t port_id, struct rte_eth_xstat *xstats,
1589 struct rte_eth_stats eth_stats;
1590 struct rte_eth_dev *dev;
1591 unsigned count = 0, i, q;
1593 uint64_t val, *stats_ptr;
1595 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1597 dev = &rte_eth_devices[port_id];
1599 /* Return generic statistics */
1600 count = RTE_NB_STATS + (dev->data->nb_rx_queues * RTE_NB_RXQ_STATS) +
1601 (dev->data->nb_tx_queues * RTE_NB_TXQ_STATS);
1603 /* implemented by the driver */
1604 if (dev->dev_ops->xstats_get != NULL) {
1605 /* Retrieve the xstats from the driver at the end of the
1608 xcount = (*dev->dev_ops->xstats_get)(dev,
1609 xstats ? xstats + count : NULL,
1610 (n > count) ? n - count : 0);
1616 if (n < count + xcount || xstats == NULL)
1617 return count + xcount;
1619 /* now fill the xstats structure */
1621 rte_eth_stats_get(port_id, ð_stats);
1624 for (i = 0; i < RTE_NB_STATS; i++) {
1625 stats_ptr = RTE_PTR_ADD(ð_stats,
1626 rte_stats_strings[i].offset);
1628 xstats[count].id = count + xcount;
1629 xstats[count++].value = val;
1633 for (q = 0; q < dev->data->nb_rx_queues; q++) {
1634 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
1635 stats_ptr = RTE_PTR_ADD(ð_stats,
1636 rte_rxq_stats_strings[i].offset +
1637 q * sizeof(uint64_t));
1639 xstats[count].id = count + xcount;
1640 xstats[count++].value = val;
1645 for (q = 0; q < dev->data->nb_tx_queues; q++) {
1646 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
1647 stats_ptr = RTE_PTR_ADD(ð_stats,
1648 rte_txq_stats_strings[i].offset +
1649 q * sizeof(uint64_t));
1651 xstats[count].id = count + xcount;
1652 xstats[count++].value = val;
1656 return count + xcount;
1659 /* reset ethdev extended statistics */
1661 rte_eth_xstats_reset(uint8_t port_id)
1663 struct rte_eth_dev *dev;
1665 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1666 dev = &rte_eth_devices[port_id];
1668 /* implemented by the driver */
1669 if (dev->dev_ops->xstats_reset != NULL) {
1670 (*dev->dev_ops->xstats_reset)(dev);
1674 /* fallback to default */
1675 rte_eth_stats_reset(port_id);
1679 set_queue_stats_mapping(uint8_t port_id, uint16_t queue_id, uint8_t stat_idx,
1682 struct rte_eth_dev *dev;
1684 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1686 dev = &rte_eth_devices[port_id];
1688 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
1689 return (*dev->dev_ops->queue_stats_mapping_set)
1690 (dev, queue_id, stat_idx, is_rx);
1695 rte_eth_dev_set_tx_queue_stats_mapping(uint8_t port_id, uint16_t tx_queue_id,
1698 return set_queue_stats_mapping(port_id, tx_queue_id, stat_idx,
1704 rte_eth_dev_set_rx_queue_stats_mapping(uint8_t port_id, uint16_t rx_queue_id,
1707 return set_queue_stats_mapping(port_id, rx_queue_id, stat_idx,
1713 rte_eth_dev_info_get(uint8_t port_id, struct rte_eth_dev_info *dev_info)
1715 struct rte_eth_dev *dev;
1716 const struct rte_eth_desc_lim lim = {
1717 .nb_max = UINT16_MAX,
1722 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1723 dev = &rte_eth_devices[port_id];
1725 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
1726 dev_info->rx_desc_lim = lim;
1727 dev_info->tx_desc_lim = lim;
1729 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_infos_get);
1730 (*dev->dev_ops->dev_infos_get)(dev, dev_info);
1731 dev_info->pci_dev = dev->pci_dev;
1732 dev_info->driver_name = dev->data->drv_name;
1736 rte_eth_dev_get_supported_ptypes(uint8_t port_id, uint32_t ptype_mask,
1737 uint32_t *ptypes, int num)
1740 struct rte_eth_dev *dev;
1741 const uint32_t *all_ptypes;
1743 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1744 dev = &rte_eth_devices[port_id];
1745 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
1746 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
1751 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
1752 if (all_ptypes[i] & ptype_mask) {
1754 ptypes[j] = all_ptypes[i];
1762 rte_eth_macaddr_get(uint8_t port_id, struct ether_addr *mac_addr)
1764 struct rte_eth_dev *dev;
1766 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1767 dev = &rte_eth_devices[port_id];
1768 ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
1773 rte_eth_dev_get_mtu(uint8_t port_id, uint16_t *mtu)
1775 struct rte_eth_dev *dev;
1777 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1779 dev = &rte_eth_devices[port_id];
1780 *mtu = dev->data->mtu;
1785 rte_eth_dev_set_mtu(uint8_t port_id, uint16_t mtu)
1788 struct rte_eth_dev *dev;
1790 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1791 dev = &rte_eth_devices[port_id];
1792 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
1794 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
1796 dev->data->mtu = mtu;
1802 rte_eth_dev_vlan_filter(uint8_t port_id, uint16_t vlan_id, int on)
1804 struct rte_eth_dev *dev;
1806 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1807 dev = &rte_eth_devices[port_id];
1808 if (!(dev->data->dev_conf.rxmode.hw_vlan_filter)) {
1809 RTE_PMD_DEBUG_TRACE("port %d: vlan-filtering disabled\n", port_id);
1813 if (vlan_id > 4095) {
1814 RTE_PMD_DEBUG_TRACE("(port_id=%d) invalid vlan_id=%u > 4095\n",
1815 port_id, (unsigned) vlan_id);
1818 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
1820 return (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
1824 rte_eth_dev_set_vlan_strip_on_queue(uint8_t port_id, uint16_t rx_queue_id, int on)
1826 struct rte_eth_dev *dev;
1828 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1829 dev = &rte_eth_devices[port_id];
1830 if (rx_queue_id >= dev->data->nb_rx_queues) {
1831 RTE_PMD_DEBUG_TRACE("Invalid rx_queue_id=%d\n", port_id);
1835 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
1836 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
1842 rte_eth_dev_set_vlan_ether_type(uint8_t port_id,
1843 enum rte_vlan_type vlan_type,
1846 struct rte_eth_dev *dev;
1848 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1849 dev = &rte_eth_devices[port_id];
1850 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
1852 return (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type, tpid);
1856 rte_eth_dev_set_vlan_offload(uint8_t port_id, int offload_mask)
1858 struct rte_eth_dev *dev;
1863 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1864 dev = &rte_eth_devices[port_id];
1866 /*check which option changed by application*/
1867 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
1868 org = !!(dev->data->dev_conf.rxmode.hw_vlan_strip);
1870 dev->data->dev_conf.rxmode.hw_vlan_strip = (uint8_t)cur;
1871 mask |= ETH_VLAN_STRIP_MASK;
1874 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
1875 org = !!(dev->data->dev_conf.rxmode.hw_vlan_filter);
1877 dev->data->dev_conf.rxmode.hw_vlan_filter = (uint8_t)cur;
1878 mask |= ETH_VLAN_FILTER_MASK;
1881 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
1882 org = !!(dev->data->dev_conf.rxmode.hw_vlan_extend);
1884 dev->data->dev_conf.rxmode.hw_vlan_extend = (uint8_t)cur;
1885 mask |= ETH_VLAN_EXTEND_MASK;
1892 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
1893 (*dev->dev_ops->vlan_offload_set)(dev, mask);
1899 rte_eth_dev_get_vlan_offload(uint8_t port_id)
1901 struct rte_eth_dev *dev;
1904 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1905 dev = &rte_eth_devices[port_id];
1907 if (dev->data->dev_conf.rxmode.hw_vlan_strip)
1908 ret |= ETH_VLAN_STRIP_OFFLOAD;
1910 if (dev->data->dev_conf.rxmode.hw_vlan_filter)
1911 ret |= ETH_VLAN_FILTER_OFFLOAD;
1913 if (dev->data->dev_conf.rxmode.hw_vlan_extend)
1914 ret |= ETH_VLAN_EXTEND_OFFLOAD;
1920 rte_eth_dev_set_vlan_pvid(uint8_t port_id, uint16_t pvid, int on)
1922 struct rte_eth_dev *dev;
1924 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1925 dev = &rte_eth_devices[port_id];
1926 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
1927 (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on);
1933 rte_eth_dev_flow_ctrl_get(uint8_t port_id, struct rte_eth_fc_conf *fc_conf)
1935 struct rte_eth_dev *dev;
1937 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1938 dev = &rte_eth_devices[port_id];
1939 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
1940 memset(fc_conf, 0, sizeof(*fc_conf));
1941 return (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf);
1945 rte_eth_dev_flow_ctrl_set(uint8_t port_id, struct rte_eth_fc_conf *fc_conf)
1947 struct rte_eth_dev *dev;
1949 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1950 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
1951 RTE_PMD_DEBUG_TRACE("Invalid send_xon, only 0/1 allowed\n");
1955 dev = &rte_eth_devices[port_id];
1956 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
1957 return (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf);
1961 rte_eth_dev_priority_flow_ctrl_set(uint8_t port_id, struct rte_eth_pfc_conf *pfc_conf)
1963 struct rte_eth_dev *dev;
1965 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1966 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
1967 RTE_PMD_DEBUG_TRACE("Invalid priority, only 0-7 allowed\n");
1971 dev = &rte_eth_devices[port_id];
1972 /* High water, low water validation are device specific */
1973 if (*dev->dev_ops->priority_flow_ctrl_set)
1974 return (*dev->dev_ops->priority_flow_ctrl_set)(dev, pfc_conf);
1979 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
1987 if (reta_size != RTE_ALIGN(reta_size, RTE_RETA_GROUP_SIZE)) {
1988 RTE_PMD_DEBUG_TRACE("Invalid reta size, should be %u aligned\n",
1989 RTE_RETA_GROUP_SIZE);
1993 num = reta_size / RTE_RETA_GROUP_SIZE;
1994 for (i = 0; i < num; i++) {
1995 if (reta_conf[i].mask)
2003 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
2007 uint16_t i, idx, shift;
2013 RTE_PMD_DEBUG_TRACE("No receive queue is available\n");
2017 for (i = 0; i < reta_size; i++) {
2018 idx = i / RTE_RETA_GROUP_SIZE;
2019 shift = i % RTE_RETA_GROUP_SIZE;
2020 if ((reta_conf[idx].mask & (1ULL << shift)) &&
2021 (reta_conf[idx].reta[shift] >= max_rxq)) {
2022 RTE_PMD_DEBUG_TRACE("reta_conf[%u]->reta[%u]: %u exceeds "
2023 "the maximum rxq index: %u\n", idx, shift,
2024 reta_conf[idx].reta[shift], max_rxq);
2033 rte_eth_dev_rss_reta_update(uint8_t port_id,
2034 struct rte_eth_rss_reta_entry64 *reta_conf,
2037 struct rte_eth_dev *dev;
2040 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2041 /* Check mask bits */
2042 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2046 dev = &rte_eth_devices[port_id];
2048 /* Check entry value */
2049 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
2050 dev->data->nb_rx_queues);
2054 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
2055 return (*dev->dev_ops->reta_update)(dev, reta_conf, reta_size);
2059 rte_eth_dev_rss_reta_query(uint8_t port_id,
2060 struct rte_eth_rss_reta_entry64 *reta_conf,
2063 struct rte_eth_dev *dev;
2066 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2068 /* Check mask bits */
2069 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2073 dev = &rte_eth_devices[port_id];
2074 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
2075 return (*dev->dev_ops->reta_query)(dev, reta_conf, reta_size);
2079 rte_eth_dev_rss_hash_update(uint8_t port_id, struct rte_eth_rss_conf *rss_conf)
2081 struct rte_eth_dev *dev;
2082 uint16_t rss_hash_protos;
2084 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2085 rss_hash_protos = rss_conf->rss_hf;
2086 if ((rss_hash_protos != 0) &&
2087 ((rss_hash_protos & ETH_RSS_PROTO_MASK) == 0)) {
2088 RTE_PMD_DEBUG_TRACE("Invalid rss_hash_protos=0x%x\n",
2092 dev = &rte_eth_devices[port_id];
2093 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
2094 return (*dev->dev_ops->rss_hash_update)(dev, rss_conf);
2098 rte_eth_dev_rss_hash_conf_get(uint8_t port_id,
2099 struct rte_eth_rss_conf *rss_conf)
2101 struct rte_eth_dev *dev;
2103 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2104 dev = &rte_eth_devices[port_id];
2105 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
2106 return (*dev->dev_ops->rss_hash_conf_get)(dev, rss_conf);
2110 rte_eth_dev_udp_tunnel_port_add(uint8_t port_id,
2111 struct rte_eth_udp_tunnel *udp_tunnel)
2113 struct rte_eth_dev *dev;
2115 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2116 if (udp_tunnel == NULL) {
2117 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2121 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2122 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2126 dev = &rte_eth_devices[port_id];
2127 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
2128 return (*dev->dev_ops->udp_tunnel_port_add)(dev, udp_tunnel);
2132 rte_eth_dev_udp_tunnel_port_delete(uint8_t port_id,
2133 struct rte_eth_udp_tunnel *udp_tunnel)
2135 struct rte_eth_dev *dev;
2137 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2138 dev = &rte_eth_devices[port_id];
2140 if (udp_tunnel == NULL) {
2141 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2145 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2146 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2150 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
2151 return (*dev->dev_ops->udp_tunnel_port_del)(dev, udp_tunnel);
2155 rte_eth_led_on(uint8_t port_id)
2157 struct rte_eth_dev *dev;
2159 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2160 dev = &rte_eth_devices[port_id];
2161 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
2162 return (*dev->dev_ops->dev_led_on)(dev);
2166 rte_eth_led_off(uint8_t port_id)
2168 struct rte_eth_dev *dev;
2170 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2171 dev = &rte_eth_devices[port_id];
2172 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
2173 return (*dev->dev_ops->dev_led_off)(dev);
2177 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2181 get_mac_addr_index(uint8_t port_id, const struct ether_addr *addr)
2183 struct rte_eth_dev_info dev_info;
2184 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2187 rte_eth_dev_info_get(port_id, &dev_info);
2189 for (i = 0; i < dev_info.max_mac_addrs; i++)
2190 if (memcmp(addr, &dev->data->mac_addrs[i], ETHER_ADDR_LEN) == 0)
2196 static const struct ether_addr null_mac_addr;
2199 rte_eth_dev_mac_addr_add(uint8_t port_id, struct ether_addr *addr,
2202 struct rte_eth_dev *dev;
2206 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2207 dev = &rte_eth_devices[port_id];
2208 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
2210 if (is_zero_ether_addr(addr)) {
2211 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
2215 if (pool >= ETH_64_POOLS) {
2216 RTE_PMD_DEBUG_TRACE("pool id must be 0-%d\n", ETH_64_POOLS - 1);
2220 index = get_mac_addr_index(port_id, addr);
2222 index = get_mac_addr_index(port_id, &null_mac_addr);
2224 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
2229 pool_mask = dev->data->mac_pool_sel[index];
2231 /* Check if both MAC address and pool is already there, and do nothing */
2232 if (pool_mask & (1ULL << pool))
2237 (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
2239 /* Update address in NIC data structure */
2240 ether_addr_copy(addr, &dev->data->mac_addrs[index]);
2242 /* Update pool bitmap in NIC data structure */
2243 dev->data->mac_pool_sel[index] |= (1ULL << pool);
2249 rte_eth_dev_mac_addr_remove(uint8_t port_id, struct ether_addr *addr)
2251 struct rte_eth_dev *dev;
2254 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2255 dev = &rte_eth_devices[port_id];
2256 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
2258 index = get_mac_addr_index(port_id, addr);
2260 RTE_PMD_DEBUG_TRACE("port %d: Cannot remove default MAC address\n", port_id);
2262 } else if (index < 0)
2263 return 0; /* Do nothing if address wasn't found */
2266 (*dev->dev_ops->mac_addr_remove)(dev, index);
2268 /* Update address in NIC data structure */
2269 ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
2271 /* reset pool bitmap */
2272 dev->data->mac_pool_sel[index] = 0;
2278 rte_eth_dev_default_mac_addr_set(uint8_t port_id, struct ether_addr *addr)
2280 struct rte_eth_dev *dev;
2282 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2284 if (!is_valid_assigned_ether_addr(addr))
2287 dev = &rte_eth_devices[port_id];
2288 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
2290 /* Update default address in NIC data structure */
2291 ether_addr_copy(addr, &dev->data->mac_addrs[0]);
2293 (*dev->dev_ops->mac_addr_set)(dev, addr);
2299 rte_eth_dev_set_vf_rxmode(uint8_t port_id, uint16_t vf,
2300 uint16_t rx_mode, uint8_t on)
2303 struct rte_eth_dev *dev;
2304 struct rte_eth_dev_info dev_info;
2306 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2308 dev = &rte_eth_devices[port_id];
2309 rte_eth_dev_info_get(port_id, &dev_info);
2311 num_vfs = dev_info.max_vfs;
2313 RTE_PMD_DEBUG_TRACE("set VF RX mode:invalid VF id %d\n", vf);
2318 RTE_PMD_DEBUG_TRACE("set VF RX mode:mode mask ca not be zero\n");
2321 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_vf_rx_mode, -ENOTSUP);
2322 return (*dev->dev_ops->set_vf_rx_mode)(dev, vf, rx_mode, on);
2326 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2330 get_hash_mac_addr_index(uint8_t port_id, const struct ether_addr *addr)
2332 struct rte_eth_dev_info dev_info;
2333 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2336 rte_eth_dev_info_get(port_id, &dev_info);
2337 if (!dev->data->hash_mac_addrs)
2340 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
2341 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
2342 ETHER_ADDR_LEN) == 0)
2349 rte_eth_dev_uc_hash_table_set(uint8_t port_id, struct ether_addr *addr,
2354 struct rte_eth_dev *dev;
2356 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2358 dev = &rte_eth_devices[port_id];
2359 if (is_zero_ether_addr(addr)) {
2360 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
2365 index = get_hash_mac_addr_index(port_id, addr);
2366 /* Check if it's already there, and do nothing */
2367 if ((index >= 0) && (on))
2372 RTE_PMD_DEBUG_TRACE("port %d: the MAC address was not "
2373 "set in UTA\n", port_id);
2377 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
2379 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
2385 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
2386 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
2388 /* Update address in NIC data structure */
2390 ether_addr_copy(addr,
2391 &dev->data->hash_mac_addrs[index]);
2393 ether_addr_copy(&null_mac_addr,
2394 &dev->data->hash_mac_addrs[index]);
2401 rte_eth_dev_uc_all_hash_table_set(uint8_t port_id, uint8_t on)
2403 struct rte_eth_dev *dev;
2405 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2407 dev = &rte_eth_devices[port_id];
2409 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
2410 return (*dev->dev_ops->uc_all_hash_table_set)(dev, on);
2414 rte_eth_dev_set_vf_rx(uint8_t port_id, uint16_t vf, uint8_t on)
2417 struct rte_eth_dev *dev;
2418 struct rte_eth_dev_info dev_info;
2420 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2422 dev = &rte_eth_devices[port_id];
2423 rte_eth_dev_info_get(port_id, &dev_info);
2425 num_vfs = dev_info.max_vfs;
2427 RTE_PMD_DEBUG_TRACE("port %d: invalid vf id\n", port_id);
2431 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_vf_rx, -ENOTSUP);
2432 return (*dev->dev_ops->set_vf_rx)(dev, vf, on);
2436 rte_eth_dev_set_vf_tx(uint8_t port_id, uint16_t vf, uint8_t on)
2439 struct rte_eth_dev *dev;
2440 struct rte_eth_dev_info dev_info;
2442 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2444 dev = &rte_eth_devices[port_id];
2445 rte_eth_dev_info_get(port_id, &dev_info);
2447 num_vfs = dev_info.max_vfs;
2449 RTE_PMD_DEBUG_TRACE("set pool tx:invalid pool id=%d\n", vf);
2453 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_vf_tx, -ENOTSUP);
2454 return (*dev->dev_ops->set_vf_tx)(dev, vf, on);
2458 rte_eth_dev_set_vf_vlan_filter(uint8_t port_id, uint16_t vlan_id,
2459 uint64_t vf_mask, uint8_t vlan_on)
2461 struct rte_eth_dev *dev;
2463 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2465 dev = &rte_eth_devices[port_id];
2467 if (vlan_id > ETHER_MAX_VLAN_ID) {
2468 RTE_PMD_DEBUG_TRACE("VF VLAN filter:invalid VLAN id=%d\n",
2474 RTE_PMD_DEBUG_TRACE("VF VLAN filter:pool_mask can not be 0\n");
2478 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_vf_vlan_filter, -ENOTSUP);
2479 return (*dev->dev_ops->set_vf_vlan_filter)(dev, vlan_id,
2483 int rte_eth_set_queue_rate_limit(uint8_t port_id, uint16_t queue_idx,
2486 struct rte_eth_dev *dev;
2487 struct rte_eth_dev_info dev_info;
2488 struct rte_eth_link link;
2490 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2492 dev = &rte_eth_devices[port_id];
2493 rte_eth_dev_info_get(port_id, &dev_info);
2494 link = dev->data->dev_link;
2496 if (queue_idx > dev_info.max_tx_queues) {
2497 RTE_PMD_DEBUG_TRACE("set queue rate limit:port %d: "
2498 "invalid queue id=%d\n", port_id, queue_idx);
2502 if (tx_rate > link.link_speed) {
2503 RTE_PMD_DEBUG_TRACE("set queue rate limit:invalid tx_rate=%d, "
2504 "bigger than link speed= %d\n",
2505 tx_rate, link.link_speed);
2509 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
2510 return (*dev->dev_ops->set_queue_rate_limit)(dev, queue_idx, tx_rate);
2513 int rte_eth_set_vf_rate_limit(uint8_t port_id, uint16_t vf, uint16_t tx_rate,
2516 struct rte_eth_dev *dev;
2517 struct rte_eth_dev_info dev_info;
2518 struct rte_eth_link link;
2523 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2525 dev = &rte_eth_devices[port_id];
2526 rte_eth_dev_info_get(port_id, &dev_info);
2527 link = dev->data->dev_link;
2529 if (vf > dev_info.max_vfs) {
2530 RTE_PMD_DEBUG_TRACE("set VF rate limit:port %d: "
2531 "invalid vf id=%d\n", port_id, vf);
2535 if (tx_rate > link.link_speed) {
2536 RTE_PMD_DEBUG_TRACE("set VF rate limit:invalid tx_rate=%d, "
2537 "bigger than link speed= %d\n",
2538 tx_rate, link.link_speed);
2542 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_vf_rate_limit, -ENOTSUP);
2543 return (*dev->dev_ops->set_vf_rate_limit)(dev, vf, tx_rate, q_msk);
2547 rte_eth_mirror_rule_set(uint8_t port_id,
2548 struct rte_eth_mirror_conf *mirror_conf,
2549 uint8_t rule_id, uint8_t on)
2551 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2553 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2554 if (mirror_conf->rule_type == 0) {
2555 RTE_PMD_DEBUG_TRACE("mirror rule type can not be 0.\n");
2559 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
2560 RTE_PMD_DEBUG_TRACE("Invalid dst pool, pool id must be 0-%d\n",
2565 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
2566 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
2567 (mirror_conf->pool_mask == 0)) {
2568 RTE_PMD_DEBUG_TRACE("Invalid mirror pool, pool mask can not be 0.\n");
2572 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
2573 mirror_conf->vlan.vlan_mask == 0) {
2574 RTE_PMD_DEBUG_TRACE("Invalid vlan mask, vlan mask can not be 0.\n");
2578 dev = &rte_eth_devices[port_id];
2579 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
2581 return (*dev->dev_ops->mirror_rule_set)(dev, mirror_conf, rule_id, on);
2585 rte_eth_mirror_rule_reset(uint8_t port_id, uint8_t rule_id)
2587 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2589 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2591 dev = &rte_eth_devices[port_id];
2592 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
2594 return (*dev->dev_ops->mirror_rule_reset)(dev, rule_id);
2598 rte_eth_dev_callback_register(uint8_t port_id,
2599 enum rte_eth_event_type event,
2600 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
2602 struct rte_eth_dev *dev;
2603 struct rte_eth_dev_callback *user_cb;
2608 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2610 dev = &rte_eth_devices[port_id];
2611 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2613 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
2614 if (user_cb->cb_fn == cb_fn &&
2615 user_cb->cb_arg == cb_arg &&
2616 user_cb->event == event) {
2621 /* create a new callback. */
2622 if (user_cb == NULL)
2623 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
2624 sizeof(struct rte_eth_dev_callback), 0);
2625 if (user_cb != NULL) {
2626 user_cb->cb_fn = cb_fn;
2627 user_cb->cb_arg = cb_arg;
2628 user_cb->event = event;
2629 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs), user_cb, next);
2632 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2633 return (user_cb == NULL) ? -ENOMEM : 0;
2637 rte_eth_dev_callback_unregister(uint8_t port_id,
2638 enum rte_eth_event_type event,
2639 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
2642 struct rte_eth_dev *dev;
2643 struct rte_eth_dev_callback *cb, *next;
2648 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2650 dev = &rte_eth_devices[port_id];
2651 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2654 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL; cb = next) {
2656 next = TAILQ_NEXT(cb, next);
2658 if (cb->cb_fn != cb_fn || cb->event != event ||
2659 (cb->cb_arg != (void *)-1 &&
2660 cb->cb_arg != cb_arg))
2664 * if this callback is not executing right now,
2667 if (cb->active == 0) {
2668 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
2675 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2680 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
2681 enum rte_eth_event_type event)
2683 struct rte_eth_dev_callback *cb_lst;
2684 struct rte_eth_dev_callback dev_cb;
2686 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2687 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
2688 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
2692 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2693 dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
2695 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2698 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2702 rte_eth_dev_rx_intr_ctl(uint8_t port_id, int epfd, int op, void *data)
2705 struct rte_eth_dev *dev;
2706 struct rte_intr_handle *intr_handle;
2710 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2712 dev = &rte_eth_devices[port_id];
2713 intr_handle = &dev->pci_dev->intr_handle;
2714 if (!intr_handle->intr_vec) {
2715 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
2719 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
2720 vec = intr_handle->intr_vec[qid];
2721 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
2722 if (rc && rc != -EEXIST) {
2723 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
2724 " op %d epfd %d vec %u\n",
2725 port_id, qid, op, epfd, vec);
2732 const struct rte_memzone *
2733 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
2734 uint16_t queue_id, size_t size, unsigned align,
2737 char z_name[RTE_MEMZONE_NAMESIZE];
2738 const struct rte_memzone *mz;
2740 snprintf(z_name, sizeof(z_name), "%s_%s_%d_%d",
2741 dev->driver->pci_drv.name, ring_name,
2742 dev->data->port_id, queue_id);
2744 mz = rte_memzone_lookup(z_name);
2748 if (rte_xen_dom0_supported())
2749 return rte_memzone_reserve_bounded(z_name, size, socket_id,
2750 0, align, RTE_PGSIZE_2M);
2752 return rte_memzone_reserve_aligned(z_name, size, socket_id,
2757 rte_eth_dev_rx_intr_ctl_q(uint8_t port_id, uint16_t queue_id,
2758 int epfd, int op, void *data)
2761 struct rte_eth_dev *dev;
2762 struct rte_intr_handle *intr_handle;
2765 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2767 dev = &rte_eth_devices[port_id];
2768 if (queue_id >= dev->data->nb_rx_queues) {
2769 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%u\n", queue_id);
2773 intr_handle = &dev->pci_dev->intr_handle;
2774 if (!intr_handle->intr_vec) {
2775 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
2779 vec = intr_handle->intr_vec[queue_id];
2780 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
2781 if (rc && rc != -EEXIST) {
2782 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
2783 " op %d epfd %d vec %u\n",
2784 port_id, queue_id, op, epfd, vec);
2792 rte_eth_dev_rx_intr_enable(uint8_t port_id,
2795 struct rte_eth_dev *dev;
2797 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2799 dev = &rte_eth_devices[port_id];
2801 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
2802 return (*dev->dev_ops->rx_queue_intr_enable)(dev, queue_id);
2806 rte_eth_dev_rx_intr_disable(uint8_t port_id,
2809 struct rte_eth_dev *dev;
2811 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2813 dev = &rte_eth_devices[port_id];
2815 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
2816 return (*dev->dev_ops->rx_queue_intr_disable)(dev, queue_id);
2819 #ifdef RTE_NIC_BYPASS
2820 int rte_eth_dev_bypass_init(uint8_t port_id)
2822 struct rte_eth_dev *dev;
2824 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2826 dev = &rte_eth_devices[port_id];
2827 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_init, -ENOTSUP);
2828 (*dev->dev_ops->bypass_init)(dev);
2833 rte_eth_dev_bypass_state_show(uint8_t port_id, uint32_t *state)
2835 struct rte_eth_dev *dev;
2837 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2839 dev = &rte_eth_devices[port_id];
2840 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_state_show, -ENOTSUP);
2841 (*dev->dev_ops->bypass_state_show)(dev, state);
2846 rte_eth_dev_bypass_state_set(uint8_t port_id, uint32_t *new_state)
2848 struct rte_eth_dev *dev;
2850 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2852 dev = &rte_eth_devices[port_id];
2853 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_state_set, -ENOTSUP);
2854 (*dev->dev_ops->bypass_state_set)(dev, new_state);
2859 rte_eth_dev_bypass_event_show(uint8_t port_id, uint32_t event, uint32_t *state)
2861 struct rte_eth_dev *dev;
2863 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2865 dev = &rte_eth_devices[port_id];
2866 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_state_show, -ENOTSUP);
2867 (*dev->dev_ops->bypass_event_show)(dev, event, state);
2872 rte_eth_dev_bypass_event_store(uint8_t port_id, uint32_t event, uint32_t state)
2874 struct rte_eth_dev *dev;
2876 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2878 dev = &rte_eth_devices[port_id];
2880 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_event_set, -ENOTSUP);
2881 (*dev->dev_ops->bypass_event_set)(dev, event, state);
2886 rte_eth_dev_wd_timeout_store(uint8_t port_id, uint32_t timeout)
2888 struct rte_eth_dev *dev;
2890 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2892 dev = &rte_eth_devices[port_id];
2894 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_wd_timeout_set, -ENOTSUP);
2895 (*dev->dev_ops->bypass_wd_timeout_set)(dev, timeout);
2900 rte_eth_dev_bypass_ver_show(uint8_t port_id, uint32_t *ver)
2902 struct rte_eth_dev *dev;
2904 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2906 dev = &rte_eth_devices[port_id];
2908 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_ver_show, -ENOTSUP);
2909 (*dev->dev_ops->bypass_ver_show)(dev, ver);
2914 rte_eth_dev_bypass_wd_timeout_show(uint8_t port_id, uint32_t *wd_timeout)
2916 struct rte_eth_dev *dev;
2918 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2920 dev = &rte_eth_devices[port_id];
2922 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_wd_timeout_show, -ENOTSUP);
2923 (*dev->dev_ops->bypass_wd_timeout_show)(dev, wd_timeout);
2928 rte_eth_dev_bypass_wd_reset(uint8_t port_id)
2930 struct rte_eth_dev *dev;
2932 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2934 dev = &rte_eth_devices[port_id];
2936 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_wd_reset, -ENOTSUP);
2937 (*dev->dev_ops->bypass_wd_reset)(dev);
2943 rte_eth_dev_filter_supported(uint8_t port_id, enum rte_filter_type filter_type)
2945 struct rte_eth_dev *dev;
2947 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2949 dev = &rte_eth_devices[port_id];
2950 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
2951 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
2952 RTE_ETH_FILTER_NOP, NULL);
2956 rte_eth_dev_filter_ctrl(uint8_t port_id, enum rte_filter_type filter_type,
2957 enum rte_filter_op filter_op, void *arg)
2959 struct rte_eth_dev *dev;
2961 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2963 dev = &rte_eth_devices[port_id];
2964 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
2965 return (*dev->dev_ops->filter_ctrl)(dev, filter_type, filter_op, arg);
2969 rte_eth_add_rx_callback(uint8_t port_id, uint16_t queue_id,
2970 rte_rx_callback_fn fn, void *user_param)
2972 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
2973 rte_errno = ENOTSUP;
2976 /* check input parameters */
2977 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
2978 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
2983 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
2991 cb->param = user_param;
2993 /* Add the callbacks in fifo order. */
2994 struct rte_eth_rxtx_callback *tail =
2995 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
2998 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3010 rte_eth_add_tx_callback(uint8_t port_id, uint16_t queue_id,
3011 rte_tx_callback_fn fn, void *user_param)
3013 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3014 rte_errno = ENOTSUP;
3017 /* check input parameters */
3018 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3019 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
3024 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3032 cb->param = user_param;
3034 /* Add the callbacks in fifo order. */
3035 struct rte_eth_rxtx_callback *tail =
3036 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
3039 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
3051 rte_eth_remove_rx_callback(uint8_t port_id, uint16_t queue_id,
3052 struct rte_eth_rxtx_callback *user_cb)
3054 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3057 /* Check input parameters. */
3058 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3059 if (user_cb == NULL ||
3060 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
3063 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3064 struct rte_eth_rxtx_callback *cb = dev->post_rx_burst_cbs[queue_id];
3065 struct rte_eth_rxtx_callback *prev_cb;
3067 /* Reset head pointer and remove user cb if first in the list. */
3068 if (cb == user_cb) {
3069 dev->post_rx_burst_cbs[queue_id] = user_cb->next;
3073 /* Remove the user cb from the callback list. */
3078 if (cb == user_cb) {
3079 prev_cb->next = user_cb->next;
3083 } while (cb != NULL);
3085 /* Callback wasn't found. */
3090 rte_eth_remove_tx_callback(uint8_t port_id, uint16_t queue_id,
3091 struct rte_eth_rxtx_callback *user_cb)
3093 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3096 /* Check input parameters. */
3097 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3098 if (user_cb == NULL ||
3099 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
3102 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3103 struct rte_eth_rxtx_callback *cb = dev->pre_tx_burst_cbs[queue_id];
3104 struct rte_eth_rxtx_callback *prev_cb;
3106 /* Reset head pointer and remove user cb if first in the list. */
3107 if (cb == user_cb) {
3108 dev->pre_tx_burst_cbs[queue_id] = user_cb->next;
3112 /* Remove the user cb from the callback list. */
3117 if (cb == user_cb) {
3118 prev_cb->next = user_cb->next;
3122 } while (cb != NULL);
3124 /* Callback wasn't found. */
3129 rte_eth_rx_queue_info_get(uint8_t port_id, uint16_t queue_id,
3130 struct rte_eth_rxq_info *qinfo)
3132 struct rte_eth_dev *dev;
3134 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3139 dev = &rte_eth_devices[port_id];
3140 if (queue_id >= dev->data->nb_rx_queues) {
3141 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", queue_id);
3145 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
3147 memset(qinfo, 0, sizeof(*qinfo));
3148 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
3153 rte_eth_tx_queue_info_get(uint8_t port_id, uint16_t queue_id,
3154 struct rte_eth_txq_info *qinfo)
3156 struct rte_eth_dev *dev;
3158 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3163 dev = &rte_eth_devices[port_id];
3164 if (queue_id >= dev->data->nb_tx_queues) {
3165 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", queue_id);
3169 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
3171 memset(qinfo, 0, sizeof(*qinfo));
3172 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
3177 rte_eth_dev_set_mc_addr_list(uint8_t port_id,
3178 struct ether_addr *mc_addr_set,
3179 uint32_t nb_mc_addr)
3181 struct rte_eth_dev *dev;
3183 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3185 dev = &rte_eth_devices[port_id];
3186 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
3187 return dev->dev_ops->set_mc_addr_list(dev, mc_addr_set, nb_mc_addr);
3191 rte_eth_timesync_enable(uint8_t port_id)
3193 struct rte_eth_dev *dev;
3195 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3196 dev = &rte_eth_devices[port_id];
3198 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
3199 return (*dev->dev_ops->timesync_enable)(dev);
3203 rte_eth_timesync_disable(uint8_t port_id)
3205 struct rte_eth_dev *dev;
3207 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3208 dev = &rte_eth_devices[port_id];
3210 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
3211 return (*dev->dev_ops->timesync_disable)(dev);
3215 rte_eth_timesync_read_rx_timestamp(uint8_t port_id, struct timespec *timestamp,
3218 struct rte_eth_dev *dev;
3220 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3221 dev = &rte_eth_devices[port_id];
3223 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
3224 return (*dev->dev_ops->timesync_read_rx_timestamp)(dev, timestamp, flags);
3228 rte_eth_timesync_read_tx_timestamp(uint8_t port_id, struct timespec *timestamp)
3230 struct rte_eth_dev *dev;
3232 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3233 dev = &rte_eth_devices[port_id];
3235 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
3236 return (*dev->dev_ops->timesync_read_tx_timestamp)(dev, timestamp);
3240 rte_eth_timesync_adjust_time(uint8_t port_id, int64_t delta)
3242 struct rte_eth_dev *dev;
3244 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3245 dev = &rte_eth_devices[port_id];
3247 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
3248 return (*dev->dev_ops->timesync_adjust_time)(dev, delta);
3252 rte_eth_timesync_read_time(uint8_t port_id, struct timespec *timestamp)
3254 struct rte_eth_dev *dev;
3256 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3257 dev = &rte_eth_devices[port_id];
3259 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
3260 return (*dev->dev_ops->timesync_read_time)(dev, timestamp);
3264 rte_eth_timesync_write_time(uint8_t port_id, const struct timespec *timestamp)
3266 struct rte_eth_dev *dev;
3268 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3269 dev = &rte_eth_devices[port_id];
3271 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
3272 return (*dev->dev_ops->timesync_write_time)(dev, timestamp);
3276 rte_eth_dev_get_reg_length(uint8_t port_id)
3278 struct rte_eth_dev *dev;
3280 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3282 dev = &rte_eth_devices[port_id];
3283 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg_length, -ENOTSUP);
3284 return (*dev->dev_ops->get_reg_length)(dev);
3288 rte_eth_dev_get_reg_info(uint8_t port_id, struct rte_dev_reg_info *info)
3290 struct rte_eth_dev *dev;
3292 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3294 dev = &rte_eth_devices[port_id];
3295 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
3296 return (*dev->dev_ops->get_reg)(dev, info);
3300 rte_eth_dev_get_eeprom_length(uint8_t port_id)
3302 struct rte_eth_dev *dev;
3304 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3306 dev = &rte_eth_devices[port_id];
3307 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
3308 return (*dev->dev_ops->get_eeprom_length)(dev);
3312 rte_eth_dev_get_eeprom(uint8_t port_id, struct rte_dev_eeprom_info *info)
3314 struct rte_eth_dev *dev;
3316 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3318 dev = &rte_eth_devices[port_id];
3319 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
3320 return (*dev->dev_ops->get_eeprom)(dev, info);
3324 rte_eth_dev_set_eeprom(uint8_t port_id, struct rte_dev_eeprom_info *info)
3326 struct rte_eth_dev *dev;
3328 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3330 dev = &rte_eth_devices[port_id];
3331 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
3332 return (*dev->dev_ops->set_eeprom)(dev, info);
3336 rte_eth_dev_get_dcb_info(uint8_t port_id,
3337 struct rte_eth_dcb_info *dcb_info)
3339 struct rte_eth_dev *dev;
3341 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3343 dev = &rte_eth_devices[port_id];
3344 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
3346 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
3347 return (*dev->dev_ops->get_dcb_info)(dev, dcb_info);
3351 rte_eth_copy_pci_info(struct rte_eth_dev *eth_dev, struct rte_pci_device *pci_dev)
3353 if ((eth_dev == NULL) || (pci_dev == NULL)) {
3354 RTE_PMD_DEBUG_TRACE("NULL pointer eth_dev=%p pci_dev=%p\n",
3359 eth_dev->data->dev_flags = 0;
3360 if (pci_dev->driver->drv_flags & RTE_PCI_DRV_INTR_LSC)
3361 eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_LSC;
3362 if (pci_dev->driver->drv_flags & RTE_PCI_DRV_DETACHABLE)
3363 eth_dev->data->dev_flags |= RTE_ETH_DEV_DETACHABLE;
3365 eth_dev->data->kdrv = pci_dev->kdrv;
3366 eth_dev->data->numa_node = pci_dev->numa_node;
3367 eth_dev->data->drv_name = pci_dev->driver->name;
3371 rte_eth_dev_l2_tunnel_eth_type_conf(uint8_t port_id,
3372 struct rte_eth_l2_tunnel_conf *l2_tunnel)
3374 struct rte_eth_dev *dev;
3376 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3377 if (l2_tunnel == NULL) {
3378 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
3382 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
3383 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
3387 dev = &rte_eth_devices[port_id];
3388 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
3390 return (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev, l2_tunnel);
3394 rte_eth_dev_l2_tunnel_offload_set(uint8_t port_id,
3395 struct rte_eth_l2_tunnel_conf *l2_tunnel,
3399 struct rte_eth_dev *dev;
3401 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3403 if (l2_tunnel == NULL) {
3404 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
3408 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
3409 RTE_PMD_DEBUG_TRACE("Invalid tunnel type.\n");
3414 RTE_PMD_DEBUG_TRACE("Mask should have a value.\n");
3418 dev = &rte_eth_devices[port_id];
3419 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
3421 return (*dev->dev_ops->l2_tunnel_offload_set)(dev, l2_tunnel, mask, en);