4 * Copyright(c) 2010-2017 Intel Corporation. All rights reserved.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
11 * * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
17 * * Neither the name of Intel Corporation nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 #include <sys/types.h>
35 #include <sys/queue.h>
44 #include <netinet/in.h>
46 #include <rte_byteorder.h>
48 #include <rte_debug.h>
49 #include <rte_interrupts.h>
51 #include <rte_memory.h>
52 #include <rte_memcpy.h>
53 #include <rte_memzone.h>
54 #include <rte_launch.h>
56 #include <rte_per_lcore.h>
57 #include <rte_lcore.h>
58 #include <rte_atomic.h>
59 #include <rte_branch_prediction.h>
60 #include <rte_common.h>
61 #include <rte_mempool.h>
62 #include <rte_malloc.h>
64 #include <rte_errno.h>
65 #include <rte_spinlock.h>
66 #include <rte_string_fns.h>
68 #include "rte_ether.h"
69 #include "rte_ethdev.h"
70 #include "ethdev_profile.h"
72 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
73 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
74 static struct rte_eth_dev_data *rte_eth_dev_data;
75 static uint8_t eth_dev_last_created_port;
77 /* spinlock for eth device callbacks */
78 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
80 /* spinlock for add/remove rx callbacks */
81 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
83 /* spinlock for add/remove tx callbacks */
84 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
86 /* store statistics names and its offset in stats structure */
87 struct rte_eth_xstats_name_off {
88 char name[RTE_ETH_XSTATS_NAME_SIZE];
92 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
93 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
94 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
95 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
96 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
97 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
98 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
99 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
103 #define RTE_NB_STATS (sizeof(rte_stats_strings) / sizeof(rte_stats_strings[0]))
105 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
106 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
107 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
108 {"errors", offsetof(struct rte_eth_stats, q_errors)},
111 #define RTE_NB_RXQ_STATS (sizeof(rte_rxq_stats_strings) / \
112 sizeof(rte_rxq_stats_strings[0]))
114 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
115 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
116 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
118 #define RTE_NB_TXQ_STATS (sizeof(rte_txq_stats_strings) / \
119 sizeof(rte_txq_stats_strings[0]))
123 * The user application callback description.
125 * It contains callback address to be registered by user application,
126 * the pointer to the parameters for callback, and the event type.
128 struct rte_eth_dev_callback {
129 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
130 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
131 void *cb_arg; /**< Parameter for callback */
132 void *ret_param; /**< Return parameter */
133 enum rte_eth_event_type event; /**< Interrupt event type */
134 uint32_t active; /**< Callback is executing */
143 rte_eth_find_next(uint8_t port_id)
145 while (port_id < RTE_MAX_ETHPORTS &&
146 rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED)
149 if (port_id >= RTE_MAX_ETHPORTS)
150 return RTE_MAX_ETHPORTS;
156 rte_eth_dev_data_alloc(void)
158 const unsigned flags = 0;
159 const struct rte_memzone *mz;
161 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
162 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
163 RTE_MAX_ETHPORTS * sizeof(*rte_eth_dev_data),
164 rte_socket_id(), flags);
166 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
168 rte_panic("Cannot allocate memzone for ethernet port data\n");
170 rte_eth_dev_data = mz->addr;
171 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
172 memset(rte_eth_dev_data, 0,
173 RTE_MAX_ETHPORTS * sizeof(*rte_eth_dev_data));
177 rte_eth_dev_allocated(const char *name)
181 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
182 if (rte_eth_devices[i].state == RTE_ETH_DEV_ATTACHED &&
183 rte_eth_devices[i].device) {
184 if (!strcmp(rte_eth_devices[i].device->name, name))
185 return &rte_eth_devices[i];
192 rte_eth_dev_find_free_port(void)
196 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
197 if (rte_eth_devices[i].state == RTE_ETH_DEV_UNUSED)
200 return RTE_MAX_ETHPORTS;
203 static struct rte_eth_dev *
204 eth_dev_get(uint8_t port_id)
206 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
208 eth_dev->data = &rte_eth_dev_data[port_id];
209 eth_dev->state = RTE_ETH_DEV_ATTACHED;
210 TAILQ_INIT(&(eth_dev->link_intr_cbs));
212 eth_dev_last_created_port = port_id;
218 rte_eth_dev_allocate(const char *name)
221 struct rte_eth_dev *eth_dev;
223 port_id = rte_eth_dev_find_free_port();
224 if (port_id == RTE_MAX_ETHPORTS) {
225 RTE_PMD_DEBUG_TRACE("Reached maximum number of Ethernet ports\n");
229 if (rte_eth_dev_data == NULL)
230 rte_eth_dev_data_alloc();
232 if (rte_eth_dev_allocated(name) != NULL) {
233 RTE_PMD_DEBUG_TRACE("Ethernet Device with name %s already allocated!\n",
238 memset(&rte_eth_dev_data[port_id], 0, sizeof(struct rte_eth_dev_data));
239 eth_dev = eth_dev_get(port_id);
240 snprintf(eth_dev->data->name, sizeof(eth_dev->data->name), "%s", name);
241 eth_dev->data->port_id = port_id;
242 eth_dev->data->mtu = ETHER_MTU;
248 * Attach to a port already registered by the primary process, which
249 * makes sure that the same device would have the same port id both
250 * in the primary and secondary process.
253 rte_eth_dev_attach_secondary(const char *name)
256 struct rte_eth_dev *eth_dev;
258 if (rte_eth_dev_data == NULL)
259 rte_eth_dev_data_alloc();
261 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
262 if (strcmp(rte_eth_dev_data[i].name, name) == 0)
265 if (i == RTE_MAX_ETHPORTS) {
267 "device %s is not driven by the primary process\n",
272 eth_dev = eth_dev_get(i);
273 RTE_ASSERT(eth_dev->data->port_id == i);
279 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
284 eth_dev->state = RTE_ETH_DEV_UNUSED;
289 rte_eth_dev_is_valid_port(uint8_t port_id)
291 if (port_id >= RTE_MAX_ETHPORTS ||
292 (rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
293 rte_eth_devices[port_id].state != RTE_ETH_DEV_DEFERRED))
300 rte_eth_dev_socket_id(uint8_t port_id)
302 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
303 return rte_eth_devices[port_id].data->numa_node;
307 rte_eth_dev_count(void)
314 RTE_ETH_FOREACH_DEV(p)
321 rte_eth_dev_get_name_by_port(uint8_t port_id, char *name)
325 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
328 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
332 /* shouldn't check 'rte_eth_devices[i].data',
333 * because it might be overwritten by VDEV PMD */
334 tmp = rte_eth_devices[port_id].device->name;
340 rte_eth_dev_get_port_by_name(const char *name, uint8_t *port_id)
346 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
350 RTE_ETH_FOREACH_DEV(i) {
351 if (!rte_eth_devices[i].device)
354 ret = strncmp(name, rte_eth_devices[i].device->name,
365 rte_eth_dev_is_detachable(uint8_t port_id)
369 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
371 dev_flags = rte_eth_devices[port_id].data->dev_flags;
372 if ((dev_flags & RTE_ETH_DEV_DETACHABLE) &&
373 (!(dev_flags & RTE_ETH_DEV_BONDED_SLAVE)))
379 /* attach the new device, then store port_id of the device */
381 rte_eth_dev_attach(const char *devargs, uint8_t *port_id)
384 int current = rte_eth_dev_count();
388 if ((devargs == NULL) || (port_id == NULL)) {
393 /* parse devargs, then retrieve device name and args */
394 if (rte_eal_parse_devargs_str(devargs, &name, &args))
397 ret = rte_eal_dev_attach(name, args);
401 /* no point looking at the port count if no port exists */
402 if (!rte_eth_dev_count()) {
403 RTE_LOG(ERR, EAL, "No port found for device (%s)\n", name);
408 /* if nothing happened, there is a bug here, since some driver told us
409 * it did attach a device, but did not create a port.
411 if (current == rte_eth_dev_count()) {
416 *port_id = eth_dev_last_created_port;
425 /* detach the device, then store the name of the device */
427 rte_eth_dev_detach(uint8_t port_id, char *name)
436 /* FIXME: move this to eal, once device flags are relocated there */
437 if (rte_eth_dev_is_detachable(port_id))
440 snprintf(name, RTE_DEV_NAME_MAX_LEN, "%s",
441 rte_eth_devices[port_id].device->name);
443 ret = rte_eal_dev_detach(rte_eth_devices[port_id].device);
447 rte_eth_devices[port_id].state = RTE_ETH_DEV_UNUSED;
455 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
457 uint16_t old_nb_queues = dev->data->nb_rx_queues;
461 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
462 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
463 sizeof(dev->data->rx_queues[0]) * nb_queues,
464 RTE_CACHE_LINE_SIZE);
465 if (dev->data->rx_queues == NULL) {
466 dev->data->nb_rx_queues = 0;
469 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
470 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
472 rxq = dev->data->rx_queues;
474 for (i = nb_queues; i < old_nb_queues; i++)
475 (*dev->dev_ops->rx_queue_release)(rxq[i]);
476 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
477 RTE_CACHE_LINE_SIZE);
480 if (nb_queues > old_nb_queues) {
481 uint16_t new_qs = nb_queues - old_nb_queues;
483 memset(rxq + old_nb_queues, 0,
484 sizeof(rxq[0]) * new_qs);
487 dev->data->rx_queues = rxq;
489 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
490 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
492 rxq = dev->data->rx_queues;
494 for (i = nb_queues; i < old_nb_queues; i++)
495 (*dev->dev_ops->rx_queue_release)(rxq[i]);
497 rte_free(dev->data->rx_queues);
498 dev->data->rx_queues = NULL;
500 dev->data->nb_rx_queues = nb_queues;
505 rte_eth_dev_rx_queue_start(uint8_t port_id, uint16_t rx_queue_id)
507 struct rte_eth_dev *dev;
509 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
511 dev = &rte_eth_devices[port_id];
512 if (rx_queue_id >= dev->data->nb_rx_queues) {
513 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
517 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
519 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
520 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
521 " already started\n",
522 rx_queue_id, port_id);
526 return dev->dev_ops->rx_queue_start(dev, rx_queue_id);
531 rte_eth_dev_rx_queue_stop(uint8_t port_id, uint16_t rx_queue_id)
533 struct rte_eth_dev *dev;
535 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
537 dev = &rte_eth_devices[port_id];
538 if (rx_queue_id >= dev->data->nb_rx_queues) {
539 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
543 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
545 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
546 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
547 " already stopped\n",
548 rx_queue_id, port_id);
552 return dev->dev_ops->rx_queue_stop(dev, rx_queue_id);
557 rte_eth_dev_tx_queue_start(uint8_t port_id, uint16_t tx_queue_id)
559 struct rte_eth_dev *dev;
561 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
563 dev = &rte_eth_devices[port_id];
564 if (tx_queue_id >= dev->data->nb_tx_queues) {
565 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
569 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
571 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
572 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
573 " already started\n",
574 tx_queue_id, port_id);
578 return dev->dev_ops->tx_queue_start(dev, tx_queue_id);
583 rte_eth_dev_tx_queue_stop(uint8_t port_id, uint16_t tx_queue_id)
585 struct rte_eth_dev *dev;
587 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
589 dev = &rte_eth_devices[port_id];
590 if (tx_queue_id >= dev->data->nb_tx_queues) {
591 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
595 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
597 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
598 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
599 " already stopped\n",
600 tx_queue_id, port_id);
604 return dev->dev_ops->tx_queue_stop(dev, tx_queue_id);
609 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
611 uint16_t old_nb_queues = dev->data->nb_tx_queues;
615 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
616 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
617 sizeof(dev->data->tx_queues[0]) * nb_queues,
618 RTE_CACHE_LINE_SIZE);
619 if (dev->data->tx_queues == NULL) {
620 dev->data->nb_tx_queues = 0;
623 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
624 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
626 txq = dev->data->tx_queues;
628 for (i = nb_queues; i < old_nb_queues; i++)
629 (*dev->dev_ops->tx_queue_release)(txq[i]);
630 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
631 RTE_CACHE_LINE_SIZE);
634 if (nb_queues > old_nb_queues) {
635 uint16_t new_qs = nb_queues - old_nb_queues;
637 memset(txq + old_nb_queues, 0,
638 sizeof(txq[0]) * new_qs);
641 dev->data->tx_queues = txq;
643 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
644 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
646 txq = dev->data->tx_queues;
648 for (i = nb_queues; i < old_nb_queues; i++)
649 (*dev->dev_ops->tx_queue_release)(txq[i]);
651 rte_free(dev->data->tx_queues);
652 dev->data->tx_queues = NULL;
654 dev->data->nb_tx_queues = nb_queues;
659 rte_eth_speed_bitflag(uint32_t speed, int duplex)
662 case ETH_SPEED_NUM_10M:
663 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
664 case ETH_SPEED_NUM_100M:
665 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
666 case ETH_SPEED_NUM_1G:
667 return ETH_LINK_SPEED_1G;
668 case ETH_SPEED_NUM_2_5G:
669 return ETH_LINK_SPEED_2_5G;
670 case ETH_SPEED_NUM_5G:
671 return ETH_LINK_SPEED_5G;
672 case ETH_SPEED_NUM_10G:
673 return ETH_LINK_SPEED_10G;
674 case ETH_SPEED_NUM_20G:
675 return ETH_LINK_SPEED_20G;
676 case ETH_SPEED_NUM_25G:
677 return ETH_LINK_SPEED_25G;
678 case ETH_SPEED_NUM_40G:
679 return ETH_LINK_SPEED_40G;
680 case ETH_SPEED_NUM_50G:
681 return ETH_LINK_SPEED_50G;
682 case ETH_SPEED_NUM_56G:
683 return ETH_LINK_SPEED_56G;
684 case ETH_SPEED_NUM_100G:
685 return ETH_LINK_SPEED_100G;
692 * A conversion function from rxmode bitfield API.
695 rte_eth_convert_rx_offload_bitfield(const struct rte_eth_rxmode *rxmode,
696 uint64_t *rx_offloads)
698 uint64_t offloads = 0;
700 if (rxmode->header_split == 1)
701 offloads |= DEV_RX_OFFLOAD_HEADER_SPLIT;
702 if (rxmode->hw_ip_checksum == 1)
703 offloads |= DEV_RX_OFFLOAD_CHECKSUM;
704 if (rxmode->hw_vlan_filter == 1)
705 offloads |= DEV_RX_OFFLOAD_VLAN_FILTER;
706 if (rxmode->hw_vlan_strip == 1)
707 offloads |= DEV_RX_OFFLOAD_VLAN_STRIP;
708 if (rxmode->hw_vlan_extend == 1)
709 offloads |= DEV_RX_OFFLOAD_VLAN_EXTEND;
710 if (rxmode->jumbo_frame == 1)
711 offloads |= DEV_RX_OFFLOAD_JUMBO_FRAME;
712 if (rxmode->hw_strip_crc == 1)
713 offloads |= DEV_RX_OFFLOAD_CRC_STRIP;
714 if (rxmode->enable_scatter == 1)
715 offloads |= DEV_RX_OFFLOAD_SCATTER;
716 if (rxmode->enable_lro == 1)
717 offloads |= DEV_RX_OFFLOAD_TCP_LRO;
719 *rx_offloads = offloads;
723 * A conversion function from rxmode offloads API.
726 rte_eth_convert_rx_offloads(const uint64_t rx_offloads,
727 struct rte_eth_rxmode *rxmode)
730 if (rx_offloads & DEV_RX_OFFLOAD_HEADER_SPLIT)
731 rxmode->header_split = 1;
733 rxmode->header_split = 0;
734 if (rx_offloads & DEV_RX_OFFLOAD_CHECKSUM)
735 rxmode->hw_ip_checksum = 1;
737 rxmode->hw_ip_checksum = 0;
738 if (rx_offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
739 rxmode->hw_vlan_filter = 1;
741 rxmode->hw_vlan_filter = 0;
742 if (rx_offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
743 rxmode->hw_vlan_strip = 1;
745 rxmode->hw_vlan_strip = 0;
746 if (rx_offloads & DEV_RX_OFFLOAD_VLAN_EXTEND)
747 rxmode->hw_vlan_extend = 1;
749 rxmode->hw_vlan_extend = 0;
750 if (rx_offloads & DEV_RX_OFFLOAD_JUMBO_FRAME)
751 rxmode->jumbo_frame = 1;
753 rxmode->jumbo_frame = 0;
754 if (rx_offloads & DEV_RX_OFFLOAD_CRC_STRIP)
755 rxmode->hw_strip_crc = 1;
757 rxmode->hw_strip_crc = 0;
758 if (rx_offloads & DEV_RX_OFFLOAD_SCATTER)
759 rxmode->enable_scatter = 1;
761 rxmode->enable_scatter = 0;
762 if (rx_offloads & DEV_RX_OFFLOAD_TCP_LRO)
763 rxmode->enable_lro = 1;
765 rxmode->enable_lro = 0;
769 rte_eth_dev_configure(uint8_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
770 const struct rte_eth_conf *dev_conf)
772 struct rte_eth_dev *dev;
773 struct rte_eth_dev_info dev_info;
774 struct rte_eth_conf local_conf = *dev_conf;
777 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
779 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
781 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
782 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
786 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
788 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
789 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
793 dev = &rte_eth_devices[port_id];
795 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
796 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
798 if (dev->data->dev_started) {
800 "port %d must be stopped to allow configuration\n", port_id);
805 * Convert between the offloads API to enable PMDs to support
808 if ((dev_conf->rxmode.ignore_offload_bitfield == 0)) {
809 rte_eth_convert_rx_offload_bitfield(
810 &dev_conf->rxmode, &local_conf.rxmode.offloads);
812 rte_eth_convert_rx_offloads(dev_conf->rxmode.offloads,
816 /* Copy the dev_conf parameter into the dev structure */
817 memcpy(&dev->data->dev_conf, &local_conf, sizeof(dev->data->dev_conf));
820 * Check that the numbers of RX and TX queues are not greater
821 * than the maximum number of RX and TX queues supported by the
824 (*dev->dev_ops->dev_infos_get)(dev, &dev_info);
826 if (nb_rx_q == 0 && nb_tx_q == 0) {
827 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d both rx and tx queue cannot be 0\n", port_id);
831 if (nb_rx_q > dev_info.max_rx_queues) {
832 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_rx_queues=%d > %d\n",
833 port_id, nb_rx_q, dev_info.max_rx_queues);
837 if (nb_tx_q > dev_info.max_tx_queues) {
838 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_tx_queues=%d > %d\n",
839 port_id, nb_tx_q, dev_info.max_tx_queues);
843 /* Check that the device supports requested interrupts */
844 if ((dev_conf->intr_conf.lsc == 1) &&
845 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
846 RTE_PMD_DEBUG_TRACE("driver %s does not support lsc\n",
847 dev->device->driver->name);
850 if ((dev_conf->intr_conf.rmv == 1) &&
851 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
852 RTE_PMD_DEBUG_TRACE("driver %s does not support rmv\n",
853 dev->device->driver->name);
858 * If jumbo frames are enabled, check that the maximum RX packet
859 * length is supported by the configured device.
861 if (local_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
862 if (dev_conf->rxmode.max_rx_pkt_len >
863 dev_info.max_rx_pktlen) {
864 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
865 " > max valid value %u\n",
867 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
868 (unsigned)dev_info.max_rx_pktlen);
870 } else if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN) {
871 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
872 " < min valid value %u\n",
874 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
875 (unsigned)ETHER_MIN_LEN);
879 if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN ||
880 dev_conf->rxmode.max_rx_pkt_len > ETHER_MAX_LEN)
881 /* Use default value */
882 dev->data->dev_conf.rxmode.max_rx_pkt_len =
887 * Setup new number of RX/TX queues and reconfigure device.
889 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
891 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_rx_queue_config = %d\n",
896 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
898 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_tx_queue_config = %d\n",
900 rte_eth_dev_rx_queue_config(dev, 0);
904 diag = (*dev->dev_ops->dev_configure)(dev);
906 RTE_PMD_DEBUG_TRACE("port%d dev_configure = %d\n",
908 rte_eth_dev_rx_queue_config(dev, 0);
909 rte_eth_dev_tx_queue_config(dev, 0);
913 /* Initialize Rx profiling if enabled at compilation time. */
914 diag = __rte_eth_profile_rx_init(port_id, dev);
916 RTE_PMD_DEBUG_TRACE("port%d __rte_eth_profile_rx_init = %d\n",
918 rte_eth_dev_rx_queue_config(dev, 0);
919 rte_eth_dev_tx_queue_config(dev, 0);
927 _rte_eth_dev_reset(struct rte_eth_dev *dev)
929 if (dev->data->dev_started) {
931 "port %d must be stopped to allow reset\n",
936 rte_eth_dev_rx_queue_config(dev, 0);
937 rte_eth_dev_tx_queue_config(dev, 0);
939 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
943 rte_eth_dev_config_restore(uint8_t port_id)
945 struct rte_eth_dev *dev;
946 struct rte_eth_dev_info dev_info;
947 struct ether_addr *addr;
952 dev = &rte_eth_devices[port_id];
954 rte_eth_dev_info_get(port_id, &dev_info);
956 /* replay MAC address configuration including default MAC */
957 addr = &dev->data->mac_addrs[0];
958 if (*dev->dev_ops->mac_addr_set != NULL)
959 (*dev->dev_ops->mac_addr_set)(dev, addr);
960 else if (*dev->dev_ops->mac_addr_add != NULL)
961 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
963 if (*dev->dev_ops->mac_addr_add != NULL) {
964 for (i = 1; i < dev_info.max_mac_addrs; i++) {
965 addr = &dev->data->mac_addrs[i];
967 /* skip zero address */
968 if (is_zero_ether_addr(addr))
972 pool_mask = dev->data->mac_pool_sel[i];
975 if (pool_mask & 1ULL)
976 (*dev->dev_ops->mac_addr_add)(dev,
984 /* replay promiscuous configuration */
985 if (rte_eth_promiscuous_get(port_id) == 1)
986 rte_eth_promiscuous_enable(port_id);
987 else if (rte_eth_promiscuous_get(port_id) == 0)
988 rte_eth_promiscuous_disable(port_id);
990 /* replay all multicast configuration */
991 if (rte_eth_allmulticast_get(port_id) == 1)
992 rte_eth_allmulticast_enable(port_id);
993 else if (rte_eth_allmulticast_get(port_id) == 0)
994 rte_eth_allmulticast_disable(port_id);
998 rte_eth_dev_start(uint8_t port_id)
1000 struct rte_eth_dev *dev;
1003 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1005 dev = &rte_eth_devices[port_id];
1007 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
1009 if (dev->data->dev_started != 0) {
1010 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu8
1011 " already started\n",
1016 diag = (*dev->dev_ops->dev_start)(dev);
1018 dev->data->dev_started = 1;
1022 rte_eth_dev_config_restore(port_id);
1024 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1025 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1026 (*dev->dev_ops->link_update)(dev, 0);
1032 rte_eth_dev_stop(uint8_t port_id)
1034 struct rte_eth_dev *dev;
1036 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1037 dev = &rte_eth_devices[port_id];
1039 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
1041 if (dev->data->dev_started == 0) {
1042 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu8
1043 " already stopped\n",
1048 dev->data->dev_started = 0;
1049 (*dev->dev_ops->dev_stop)(dev);
1053 rte_eth_dev_set_link_up(uint8_t port_id)
1055 struct rte_eth_dev *dev;
1057 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1059 dev = &rte_eth_devices[port_id];
1061 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1062 return (*dev->dev_ops->dev_set_link_up)(dev);
1066 rte_eth_dev_set_link_down(uint8_t port_id)
1068 struct rte_eth_dev *dev;
1070 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1072 dev = &rte_eth_devices[port_id];
1074 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1075 return (*dev->dev_ops->dev_set_link_down)(dev);
1079 rte_eth_dev_close(uint8_t port_id)
1081 struct rte_eth_dev *dev;
1083 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1084 dev = &rte_eth_devices[port_id];
1086 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1087 dev->data->dev_started = 0;
1088 (*dev->dev_ops->dev_close)(dev);
1090 dev->data->nb_rx_queues = 0;
1091 rte_free(dev->data->rx_queues);
1092 dev->data->rx_queues = NULL;
1093 dev->data->nb_tx_queues = 0;
1094 rte_free(dev->data->tx_queues);
1095 dev->data->tx_queues = NULL;
1099 rte_eth_dev_reset(uint8_t port_id)
1101 struct rte_eth_dev *dev;
1104 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1105 dev = &rte_eth_devices[port_id];
1107 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
1109 rte_eth_dev_stop(port_id);
1110 ret = dev->dev_ops->dev_reset(dev);
1116 rte_eth_rx_queue_setup(uint8_t port_id, uint16_t rx_queue_id,
1117 uint16_t nb_rx_desc, unsigned int socket_id,
1118 const struct rte_eth_rxconf *rx_conf,
1119 struct rte_mempool *mp)
1122 uint32_t mbp_buf_size;
1123 struct rte_eth_dev *dev;
1124 struct rte_eth_dev_info dev_info;
1125 struct rte_eth_rxconf local_conf;
1128 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1130 dev = &rte_eth_devices[port_id];
1131 if (rx_queue_id >= dev->data->nb_rx_queues) {
1132 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
1136 if (dev->data->dev_started) {
1137 RTE_PMD_DEBUG_TRACE(
1138 "port %d must be stopped to allow configuration\n", port_id);
1142 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1143 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1146 * Check the size of the mbuf data buffer.
1147 * This value must be provided in the private data of the memory pool.
1148 * First check that the memory pool has a valid private data.
1150 rte_eth_dev_info_get(port_id, &dev_info);
1151 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1152 RTE_PMD_DEBUG_TRACE("%s private_data_size %d < %d\n",
1153 mp->name, (int) mp->private_data_size,
1154 (int) sizeof(struct rte_pktmbuf_pool_private));
1157 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1159 if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1160 RTE_PMD_DEBUG_TRACE("%s mbuf_data_room_size %d < %d "
1161 "(RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)"
1165 (int)(RTE_PKTMBUF_HEADROOM +
1166 dev_info.min_rx_bufsize),
1167 (int)RTE_PKTMBUF_HEADROOM,
1168 (int)dev_info.min_rx_bufsize);
1172 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1173 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1174 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1176 RTE_PMD_DEBUG_TRACE("Invalid value for nb_rx_desc(=%hu), "
1177 "should be: <= %hu, = %hu, and a product of %hu\n",
1179 dev_info.rx_desc_lim.nb_max,
1180 dev_info.rx_desc_lim.nb_min,
1181 dev_info.rx_desc_lim.nb_align);
1185 rxq = dev->data->rx_queues;
1186 if (rxq[rx_queue_id]) {
1187 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1189 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1190 rxq[rx_queue_id] = NULL;
1193 if (rx_conf == NULL)
1194 rx_conf = &dev_info.default_rxconf;
1196 local_conf = *rx_conf;
1197 if (dev->data->dev_conf.rxmode.ignore_offload_bitfield == 0) {
1199 * Reflect port offloads to queue offloads in order for
1200 * offloads to not be discarded.
1202 rte_eth_convert_rx_offload_bitfield(&dev->data->dev_conf.rxmode,
1203 &local_conf.offloads);
1206 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1207 socket_id, &local_conf, mp);
1209 if (!dev->data->min_rx_buf_size ||
1210 dev->data->min_rx_buf_size > mbp_buf_size)
1211 dev->data->min_rx_buf_size = mbp_buf_size;
1218 rte_eth_tx_queue_setup(uint8_t port_id, uint16_t tx_queue_id,
1219 uint16_t nb_tx_desc, unsigned int socket_id,
1220 const struct rte_eth_txconf *tx_conf)
1222 struct rte_eth_dev *dev;
1223 struct rte_eth_dev_info dev_info;
1226 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1228 dev = &rte_eth_devices[port_id];
1229 if (tx_queue_id >= dev->data->nb_tx_queues) {
1230 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
1234 if (dev->data->dev_started) {
1235 RTE_PMD_DEBUG_TRACE(
1236 "port %d must be stopped to allow configuration\n", port_id);
1240 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1241 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
1243 rte_eth_dev_info_get(port_id, &dev_info);
1245 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
1246 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
1247 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
1248 RTE_PMD_DEBUG_TRACE("Invalid value for nb_tx_desc(=%hu), "
1249 "should be: <= %hu, = %hu, and a product of %hu\n",
1251 dev_info.tx_desc_lim.nb_max,
1252 dev_info.tx_desc_lim.nb_min,
1253 dev_info.tx_desc_lim.nb_align);
1257 txq = dev->data->tx_queues;
1258 if (txq[tx_queue_id]) {
1259 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
1261 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
1262 txq[tx_queue_id] = NULL;
1265 if (tx_conf == NULL)
1266 tx_conf = &dev_info.default_txconf;
1268 return (*dev->dev_ops->tx_queue_setup)(dev, tx_queue_id, nb_tx_desc,
1269 socket_id, tx_conf);
1273 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
1274 void *userdata __rte_unused)
1278 for (i = 0; i < unsent; i++)
1279 rte_pktmbuf_free(pkts[i]);
1283 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
1286 uint64_t *count = userdata;
1289 for (i = 0; i < unsent; i++)
1290 rte_pktmbuf_free(pkts[i]);
1296 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
1297 buffer_tx_error_fn cbfn, void *userdata)
1299 buffer->error_callback = cbfn;
1300 buffer->error_userdata = userdata;
1305 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
1312 buffer->size = size;
1313 if (buffer->error_callback == NULL) {
1314 ret = rte_eth_tx_buffer_set_err_callback(
1315 buffer, rte_eth_tx_buffer_drop_callback, NULL);
1322 rte_eth_tx_done_cleanup(uint8_t port_id, uint16_t queue_id, uint32_t free_cnt)
1324 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
1326 /* Validate Input Data. Bail if not valid or not supported. */
1327 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1328 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
1330 /* Call driver to free pending mbufs. */
1331 return (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
1336 rte_eth_promiscuous_enable(uint8_t port_id)
1338 struct rte_eth_dev *dev;
1340 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1341 dev = &rte_eth_devices[port_id];
1343 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_enable);
1344 (*dev->dev_ops->promiscuous_enable)(dev);
1345 dev->data->promiscuous = 1;
1349 rte_eth_promiscuous_disable(uint8_t port_id)
1351 struct rte_eth_dev *dev;
1353 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1354 dev = &rte_eth_devices[port_id];
1356 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_disable);
1357 dev->data->promiscuous = 0;
1358 (*dev->dev_ops->promiscuous_disable)(dev);
1362 rte_eth_promiscuous_get(uint8_t port_id)
1364 struct rte_eth_dev *dev;
1366 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1368 dev = &rte_eth_devices[port_id];
1369 return dev->data->promiscuous;
1373 rte_eth_allmulticast_enable(uint8_t port_id)
1375 struct rte_eth_dev *dev;
1377 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1378 dev = &rte_eth_devices[port_id];
1380 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_enable);
1381 (*dev->dev_ops->allmulticast_enable)(dev);
1382 dev->data->all_multicast = 1;
1386 rte_eth_allmulticast_disable(uint8_t port_id)
1388 struct rte_eth_dev *dev;
1390 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1391 dev = &rte_eth_devices[port_id];
1393 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_disable);
1394 dev->data->all_multicast = 0;
1395 (*dev->dev_ops->allmulticast_disable)(dev);
1399 rte_eth_allmulticast_get(uint8_t port_id)
1401 struct rte_eth_dev *dev;
1403 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1405 dev = &rte_eth_devices[port_id];
1406 return dev->data->all_multicast;
1410 rte_eth_dev_atomic_read_link_status(struct rte_eth_dev *dev,
1411 struct rte_eth_link *link)
1413 struct rte_eth_link *dst = link;
1414 struct rte_eth_link *src = &(dev->data->dev_link);
1416 if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
1417 *(uint64_t *)src) == 0)
1424 rte_eth_link_get(uint8_t port_id, struct rte_eth_link *eth_link)
1426 struct rte_eth_dev *dev;
1428 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1429 dev = &rte_eth_devices[port_id];
1431 if (dev->data->dev_conf.intr_conf.lsc != 0)
1432 rte_eth_dev_atomic_read_link_status(dev, eth_link);
1434 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1435 (*dev->dev_ops->link_update)(dev, 1);
1436 *eth_link = dev->data->dev_link;
1441 rte_eth_link_get_nowait(uint8_t port_id, struct rte_eth_link *eth_link)
1443 struct rte_eth_dev *dev;
1445 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1446 dev = &rte_eth_devices[port_id];
1448 if (dev->data->dev_conf.intr_conf.lsc != 0)
1449 rte_eth_dev_atomic_read_link_status(dev, eth_link);
1451 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1452 (*dev->dev_ops->link_update)(dev, 0);
1453 *eth_link = dev->data->dev_link;
1458 rte_eth_stats_get(uint8_t port_id, struct rte_eth_stats *stats)
1460 struct rte_eth_dev *dev;
1462 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1464 dev = &rte_eth_devices[port_id];
1465 memset(stats, 0, sizeof(*stats));
1467 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
1468 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
1469 (*dev->dev_ops->stats_get)(dev, stats);
1474 rte_eth_stats_reset(uint8_t port_id)
1476 struct rte_eth_dev *dev;
1478 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1479 dev = &rte_eth_devices[port_id];
1481 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->stats_reset);
1482 (*dev->dev_ops->stats_reset)(dev);
1483 dev->data->rx_mbuf_alloc_failed = 0;
1487 get_xstats_count(uint8_t port_id)
1489 struct rte_eth_dev *dev;
1492 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1493 dev = &rte_eth_devices[port_id];
1494 if (dev->dev_ops->xstats_get_names_by_id != NULL) {
1495 count = (*dev->dev_ops->xstats_get_names_by_id)(dev, NULL,
1500 if (dev->dev_ops->xstats_get_names != NULL) {
1501 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
1507 count += RTE_NB_STATS;
1508 count += RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS) *
1510 count += RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS) *
1516 rte_eth_xstats_get_id_by_name(uint8_t port_id, const char *xstat_name,
1519 int cnt_xstats, idx_xstat;
1521 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1524 RTE_PMD_DEBUG_TRACE("Error: id pointer is NULL\n");
1529 RTE_PMD_DEBUG_TRACE("Error: xstat_name pointer is NULL\n");
1534 cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
1535 if (cnt_xstats < 0) {
1536 RTE_PMD_DEBUG_TRACE("Error: Cannot get count of xstats\n");
1540 /* Get id-name lookup table */
1541 struct rte_eth_xstat_name xstats_names[cnt_xstats];
1543 if (cnt_xstats != rte_eth_xstats_get_names_by_id(
1544 port_id, xstats_names, cnt_xstats, NULL)) {
1545 RTE_PMD_DEBUG_TRACE("Error: Cannot get xstats lookup\n");
1549 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
1550 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
1560 rte_eth_xstats_get_names_by_id(uint8_t port_id,
1561 struct rte_eth_xstat_name *xstats_names, unsigned int size,
1564 /* Get all xstats */
1566 struct rte_eth_dev *dev;
1567 int cnt_used_entries;
1568 int cnt_expected_entries;
1569 int cnt_driver_entries;
1570 uint32_t idx, id_queue;
1573 cnt_expected_entries = get_xstats_count(port_id);
1574 if (xstats_names == NULL || cnt_expected_entries < 0 ||
1575 (int)size < cnt_expected_entries)
1576 return cnt_expected_entries;
1578 /* port_id checked in get_xstats_count() */
1579 dev = &rte_eth_devices[port_id];
1580 cnt_used_entries = 0;
1582 for (idx = 0; idx < RTE_NB_STATS; idx++) {
1583 snprintf(xstats_names[cnt_used_entries].name,
1584 sizeof(xstats_names[0].name),
1585 "%s", rte_stats_strings[idx].name);
1588 num_q = RTE_MIN(dev->data->nb_rx_queues,
1589 RTE_ETHDEV_QUEUE_STAT_CNTRS);
1590 for (id_queue = 0; id_queue < num_q; id_queue++) {
1591 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
1592 snprintf(xstats_names[cnt_used_entries].name,
1593 sizeof(xstats_names[0].name),
1596 rte_rxq_stats_strings[idx].name);
1601 num_q = RTE_MIN(dev->data->nb_tx_queues,
1602 RTE_ETHDEV_QUEUE_STAT_CNTRS);
1603 for (id_queue = 0; id_queue < num_q; id_queue++) {
1604 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
1605 snprintf(xstats_names[cnt_used_entries].name,
1606 sizeof(xstats_names[0].name),
1609 rte_txq_stats_strings[idx].name);
1614 if (dev->dev_ops->xstats_get_names_by_id != NULL) {
1615 /* If there are any driver-specific xstats, append them
1618 cnt_driver_entries =
1619 (*dev->dev_ops->xstats_get_names_by_id)(
1621 xstats_names + cnt_used_entries,
1623 size - cnt_used_entries);
1624 if (cnt_driver_entries < 0)
1625 return cnt_driver_entries;
1626 cnt_used_entries += cnt_driver_entries;
1628 } else if (dev->dev_ops->xstats_get_names != NULL) {
1629 /* If there are any driver-specific xstats, append them
1632 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
1634 xstats_names + cnt_used_entries,
1635 size - cnt_used_entries);
1636 if (cnt_driver_entries < 0)
1637 return cnt_driver_entries;
1638 cnt_used_entries += cnt_driver_entries;
1641 return cnt_used_entries;
1643 /* Get only xstats given by IDS */
1646 struct rte_eth_xstat_name *xstats_names_copy;
1648 len = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
1651 malloc(sizeof(struct rte_eth_xstat_name) * len);
1652 if (!xstats_names_copy) {
1653 RTE_PMD_DEBUG_TRACE(
1654 "ERROR: can't allocate memory for values_copy\n");
1655 free(xstats_names_copy);
1659 rte_eth_xstats_get_names_by_id(port_id, xstats_names_copy,
1662 for (i = 0; i < size; i++) {
1663 if (ids[i] >= len) {
1664 RTE_PMD_DEBUG_TRACE(
1665 "ERROR: id value isn't valid\n");
1668 strcpy(xstats_names[i].name,
1669 xstats_names_copy[ids[i]].name);
1671 free(xstats_names_copy);
1677 rte_eth_xstats_get_names(uint8_t port_id,
1678 struct rte_eth_xstat_name *xstats_names,
1681 struct rte_eth_dev *dev;
1682 int cnt_used_entries;
1683 int cnt_expected_entries;
1684 int cnt_driver_entries;
1685 uint32_t idx, id_queue;
1688 cnt_expected_entries = get_xstats_count(port_id);
1689 if (xstats_names == NULL || cnt_expected_entries < 0 ||
1690 (int)size < cnt_expected_entries)
1691 return cnt_expected_entries;
1693 /* port_id checked in get_xstats_count() */
1694 dev = &rte_eth_devices[port_id];
1695 cnt_used_entries = 0;
1697 for (idx = 0; idx < RTE_NB_STATS; idx++) {
1698 snprintf(xstats_names[cnt_used_entries].name,
1699 sizeof(xstats_names[0].name),
1700 "%s", rte_stats_strings[idx].name);
1703 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1704 for (id_queue = 0; id_queue < num_q; id_queue++) {
1705 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
1706 snprintf(xstats_names[cnt_used_entries].name,
1707 sizeof(xstats_names[0].name),
1709 id_queue, rte_rxq_stats_strings[idx].name);
1714 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1715 for (id_queue = 0; id_queue < num_q; id_queue++) {
1716 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
1717 snprintf(xstats_names[cnt_used_entries].name,
1718 sizeof(xstats_names[0].name),
1720 id_queue, rte_txq_stats_strings[idx].name);
1725 if (dev->dev_ops->xstats_get_names != NULL) {
1726 /* If there are any driver-specific xstats, append them
1729 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
1731 xstats_names + cnt_used_entries,
1732 size - cnt_used_entries);
1733 if (cnt_driver_entries < 0)
1734 return cnt_driver_entries;
1735 cnt_used_entries += cnt_driver_entries;
1738 return cnt_used_entries;
1741 /* retrieve ethdev extended statistics */
1743 rte_eth_xstats_get_by_id(uint8_t port_id, const uint64_t *ids, uint64_t *values,
1746 /* If need all xstats */
1748 struct rte_eth_stats eth_stats;
1749 struct rte_eth_dev *dev;
1750 unsigned int count = 0, i, q;
1751 signed int xcount = 0;
1752 uint64_t val, *stats_ptr;
1753 uint16_t nb_rxqs, nb_txqs;
1755 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1756 dev = &rte_eth_devices[port_id];
1758 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues,
1759 RTE_ETHDEV_QUEUE_STAT_CNTRS);
1760 nb_txqs = RTE_MIN(dev->data->nb_tx_queues,
1761 RTE_ETHDEV_QUEUE_STAT_CNTRS);
1763 /* Return generic statistics */
1764 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
1765 (nb_txqs * RTE_NB_TXQ_STATS);
1768 /* implemented by the driver */
1769 if (dev->dev_ops->xstats_get_by_id != NULL) {
1770 /* Retrieve the xstats from the driver at the end of the
1771 * xstats struct. Retrieve all xstats.
1773 xcount = (*dev->dev_ops->xstats_get_by_id)(dev,
1775 values ? values + count : NULL,
1776 (n > count) ? n - count : 0);
1780 /* implemented by the driver */
1781 } else if (dev->dev_ops->xstats_get != NULL) {
1782 /* Retrieve the xstats from the driver at the end of the
1783 * xstats struct. Retrieve all xstats.
1784 * Compatibility for PMD without xstats_get_by_ids
1786 unsigned int size = (n > count) ? n - count : 1;
1787 struct rte_eth_xstat xstats[size];
1789 xcount = (*dev->dev_ops->xstats_get)(dev,
1790 values ? xstats : NULL, size);
1796 for (i = 0 ; i < (unsigned int)xcount; i++)
1797 values[i + count] = xstats[i].value;
1800 if (n < count + xcount || values == NULL)
1801 return count + xcount;
1803 /* now fill the xstats structure */
1805 rte_eth_stats_get(port_id, ð_stats);
1808 for (i = 0; i < RTE_NB_STATS; i++) {
1809 stats_ptr = RTE_PTR_ADD(ð_stats,
1810 rte_stats_strings[i].offset);
1812 values[count++] = val;
1816 for (q = 0; q < nb_rxqs; q++) {
1817 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
1818 stats_ptr = RTE_PTR_ADD(ð_stats,
1819 rte_rxq_stats_strings[i].offset +
1820 q * sizeof(uint64_t));
1822 values[count++] = val;
1827 for (q = 0; q < nb_txqs; q++) {
1828 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
1829 stats_ptr = RTE_PTR_ADD(ð_stats,
1830 rte_txq_stats_strings[i].offset +
1831 q * sizeof(uint64_t));
1833 values[count++] = val;
1837 return count + xcount;
1839 /* Need only xstats given by IDS array */
1842 uint64_t *values_copy;
1844 size = rte_eth_xstats_get_by_id(port_id, NULL, NULL, 0);
1846 values_copy = malloc(sizeof(*values_copy) * size);
1848 RTE_PMD_DEBUG_TRACE(
1849 "ERROR: can't allocate memory for values_copy\n");
1853 rte_eth_xstats_get_by_id(port_id, NULL, values_copy, size);
1855 for (i = 0; i < n; i++) {
1856 if (ids[i] >= size) {
1857 RTE_PMD_DEBUG_TRACE(
1858 "ERROR: id value isn't valid\n");
1861 values[i] = values_copy[ids[i]];
1869 rte_eth_xstats_get(uint8_t port_id, struct rte_eth_xstat *xstats,
1872 struct rte_eth_stats eth_stats;
1873 struct rte_eth_dev *dev;
1874 unsigned int count = 0, i, q;
1875 signed int xcount = 0;
1876 uint64_t val, *stats_ptr;
1877 uint16_t nb_rxqs, nb_txqs;
1879 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1881 dev = &rte_eth_devices[port_id];
1883 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1884 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1886 /* Return generic statistics */
1887 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
1888 (nb_txqs * RTE_NB_TXQ_STATS);
1890 /* implemented by the driver */
1891 if (dev->dev_ops->xstats_get != NULL) {
1892 /* Retrieve the xstats from the driver at the end of the
1895 xcount = (*dev->dev_ops->xstats_get)(dev,
1896 xstats ? xstats + count : NULL,
1897 (n > count) ? n - count : 0);
1903 if (n < count + xcount || xstats == NULL)
1904 return count + xcount;
1906 /* now fill the xstats structure */
1908 rte_eth_stats_get(port_id, ð_stats);
1911 for (i = 0; i < RTE_NB_STATS; i++) {
1912 stats_ptr = RTE_PTR_ADD(ð_stats,
1913 rte_stats_strings[i].offset);
1915 xstats[count++].value = val;
1919 for (q = 0; q < nb_rxqs; q++) {
1920 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
1921 stats_ptr = RTE_PTR_ADD(ð_stats,
1922 rte_rxq_stats_strings[i].offset +
1923 q * sizeof(uint64_t));
1925 xstats[count++].value = val;
1930 for (q = 0; q < nb_txqs; q++) {
1931 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
1932 stats_ptr = RTE_PTR_ADD(ð_stats,
1933 rte_txq_stats_strings[i].offset +
1934 q * sizeof(uint64_t));
1936 xstats[count++].value = val;
1940 for (i = 0; i < count; i++)
1942 /* add an offset to driver-specific stats */
1943 for ( ; i < count + xcount; i++)
1944 xstats[i].id += count;
1946 return count + xcount;
1949 /* reset ethdev extended statistics */
1951 rte_eth_xstats_reset(uint8_t port_id)
1953 struct rte_eth_dev *dev;
1955 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1956 dev = &rte_eth_devices[port_id];
1958 /* implemented by the driver */
1959 if (dev->dev_ops->xstats_reset != NULL) {
1960 (*dev->dev_ops->xstats_reset)(dev);
1964 /* fallback to default */
1965 rte_eth_stats_reset(port_id);
1969 set_queue_stats_mapping(uint8_t port_id, uint16_t queue_id, uint8_t stat_idx,
1972 struct rte_eth_dev *dev;
1974 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1976 dev = &rte_eth_devices[port_id];
1978 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
1979 return (*dev->dev_ops->queue_stats_mapping_set)
1980 (dev, queue_id, stat_idx, is_rx);
1985 rte_eth_dev_set_tx_queue_stats_mapping(uint8_t port_id, uint16_t tx_queue_id,
1988 return set_queue_stats_mapping(port_id, tx_queue_id, stat_idx,
1994 rte_eth_dev_set_rx_queue_stats_mapping(uint8_t port_id, uint16_t rx_queue_id,
1997 return set_queue_stats_mapping(port_id, rx_queue_id, stat_idx,
2002 rte_eth_dev_fw_version_get(uint8_t port_id, char *fw_version, size_t fw_size)
2004 struct rte_eth_dev *dev;
2006 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2007 dev = &rte_eth_devices[port_id];
2009 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
2010 return (*dev->dev_ops->fw_version_get)(dev, fw_version, fw_size);
2014 rte_eth_dev_info_get(uint8_t port_id, struct rte_eth_dev_info *dev_info)
2016 struct rte_eth_dev *dev;
2017 const struct rte_eth_desc_lim lim = {
2018 .nb_max = UINT16_MAX,
2023 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2024 dev = &rte_eth_devices[port_id];
2026 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
2027 dev_info->rx_desc_lim = lim;
2028 dev_info->tx_desc_lim = lim;
2030 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_infos_get);
2031 (*dev->dev_ops->dev_infos_get)(dev, dev_info);
2032 dev_info->driver_name = dev->device->driver->name;
2033 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
2034 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
2038 rte_eth_dev_get_supported_ptypes(uint8_t port_id, uint32_t ptype_mask,
2039 uint32_t *ptypes, int num)
2042 struct rte_eth_dev *dev;
2043 const uint32_t *all_ptypes;
2045 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2046 dev = &rte_eth_devices[port_id];
2047 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
2048 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
2053 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
2054 if (all_ptypes[i] & ptype_mask) {
2056 ptypes[j] = all_ptypes[i];
2064 rte_eth_macaddr_get(uint8_t port_id, struct ether_addr *mac_addr)
2066 struct rte_eth_dev *dev;
2068 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2069 dev = &rte_eth_devices[port_id];
2070 ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
2075 rte_eth_dev_get_mtu(uint8_t port_id, uint16_t *mtu)
2077 struct rte_eth_dev *dev;
2079 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2081 dev = &rte_eth_devices[port_id];
2082 *mtu = dev->data->mtu;
2087 rte_eth_dev_set_mtu(uint8_t port_id, uint16_t mtu)
2090 struct rte_eth_dev *dev;
2092 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2093 dev = &rte_eth_devices[port_id];
2094 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
2096 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
2098 dev->data->mtu = mtu;
2104 rte_eth_dev_vlan_filter(uint8_t port_id, uint16_t vlan_id, int on)
2106 struct rte_eth_dev *dev;
2109 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2110 dev = &rte_eth_devices[port_id];
2111 if (!(dev->data->dev_conf.rxmode.offloads &
2112 DEV_RX_OFFLOAD_VLAN_FILTER)) {
2113 RTE_PMD_DEBUG_TRACE("port %d: vlan-filtering disabled\n", port_id);
2117 if (vlan_id > 4095) {
2118 RTE_PMD_DEBUG_TRACE("(port_id=%d) invalid vlan_id=%u > 4095\n",
2119 port_id, (unsigned) vlan_id);
2122 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
2124 ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
2126 struct rte_vlan_filter_conf *vfc;
2130 vfc = &dev->data->vlan_filter_conf;
2131 vidx = vlan_id / 64;
2132 vbit = vlan_id % 64;
2135 vfc->ids[vidx] |= UINT64_C(1) << vbit;
2137 vfc->ids[vidx] &= ~(UINT64_C(1) << vbit);
2144 rte_eth_dev_set_vlan_strip_on_queue(uint8_t port_id, uint16_t rx_queue_id, int on)
2146 struct rte_eth_dev *dev;
2148 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2149 dev = &rte_eth_devices[port_id];
2150 if (rx_queue_id >= dev->data->nb_rx_queues) {
2151 RTE_PMD_DEBUG_TRACE("Invalid rx_queue_id=%d\n", port_id);
2155 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
2156 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
2162 rte_eth_dev_set_vlan_ether_type(uint8_t port_id,
2163 enum rte_vlan_type vlan_type,
2166 struct rte_eth_dev *dev;
2168 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2169 dev = &rte_eth_devices[port_id];
2170 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
2172 return (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type, tpid);
2176 rte_eth_dev_set_vlan_offload(uint8_t port_id, int offload_mask)
2178 struct rte_eth_dev *dev;
2183 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2184 dev = &rte_eth_devices[port_id];
2186 /*check which option changed by application*/
2187 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
2188 org = !!(dev->data->dev_conf.rxmode.offloads &
2189 DEV_RX_OFFLOAD_VLAN_STRIP);
2192 dev->data->dev_conf.rxmode.offloads |=
2193 DEV_RX_OFFLOAD_VLAN_STRIP;
2195 dev->data->dev_conf.rxmode.offloads &=
2196 ~DEV_RX_OFFLOAD_VLAN_STRIP;
2197 mask |= ETH_VLAN_STRIP_MASK;
2200 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
2201 org = !!(dev->data->dev_conf.rxmode.offloads &
2202 DEV_RX_OFFLOAD_VLAN_FILTER);
2205 dev->data->dev_conf.rxmode.offloads |=
2206 DEV_RX_OFFLOAD_VLAN_FILTER;
2208 dev->data->dev_conf.rxmode.offloads &=
2209 ~DEV_RX_OFFLOAD_VLAN_FILTER;
2210 mask |= ETH_VLAN_FILTER_MASK;
2213 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
2214 org = !!(dev->data->dev_conf.rxmode.offloads &
2215 DEV_RX_OFFLOAD_VLAN_EXTEND);
2218 dev->data->dev_conf.rxmode.offloads |=
2219 DEV_RX_OFFLOAD_VLAN_EXTEND;
2221 dev->data->dev_conf.rxmode.offloads &=
2222 ~DEV_RX_OFFLOAD_VLAN_EXTEND;
2223 mask |= ETH_VLAN_EXTEND_MASK;
2230 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
2233 * Convert to the offload bitfield API just in case the underlying PMD
2234 * still supporting it.
2236 rte_eth_convert_rx_offloads(dev->data->dev_conf.rxmode.offloads,
2237 &dev->data->dev_conf.rxmode);
2238 (*dev->dev_ops->vlan_offload_set)(dev, mask);
2244 rte_eth_dev_get_vlan_offload(uint8_t port_id)
2246 struct rte_eth_dev *dev;
2249 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2250 dev = &rte_eth_devices[port_id];
2252 if (dev->data->dev_conf.rxmode.offloads &
2253 DEV_RX_OFFLOAD_VLAN_STRIP)
2254 ret |= ETH_VLAN_STRIP_OFFLOAD;
2256 if (dev->data->dev_conf.rxmode.offloads &
2257 DEV_RX_OFFLOAD_VLAN_FILTER)
2258 ret |= ETH_VLAN_FILTER_OFFLOAD;
2260 if (dev->data->dev_conf.rxmode.offloads &
2261 DEV_RX_OFFLOAD_VLAN_EXTEND)
2262 ret |= ETH_VLAN_EXTEND_OFFLOAD;
2268 rte_eth_dev_set_vlan_pvid(uint8_t port_id, uint16_t pvid, int on)
2270 struct rte_eth_dev *dev;
2272 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2273 dev = &rte_eth_devices[port_id];
2274 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
2275 (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on);
2281 rte_eth_dev_flow_ctrl_get(uint8_t port_id, struct rte_eth_fc_conf *fc_conf)
2283 struct rte_eth_dev *dev;
2285 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2286 dev = &rte_eth_devices[port_id];
2287 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
2288 memset(fc_conf, 0, sizeof(*fc_conf));
2289 return (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf);
2293 rte_eth_dev_flow_ctrl_set(uint8_t port_id, struct rte_eth_fc_conf *fc_conf)
2295 struct rte_eth_dev *dev;
2297 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2298 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
2299 RTE_PMD_DEBUG_TRACE("Invalid send_xon, only 0/1 allowed\n");
2303 dev = &rte_eth_devices[port_id];
2304 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
2305 return (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf);
2309 rte_eth_dev_priority_flow_ctrl_set(uint8_t port_id, struct rte_eth_pfc_conf *pfc_conf)
2311 struct rte_eth_dev *dev;
2313 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2314 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
2315 RTE_PMD_DEBUG_TRACE("Invalid priority, only 0-7 allowed\n");
2319 dev = &rte_eth_devices[port_id];
2320 /* High water, low water validation are device specific */
2321 if (*dev->dev_ops->priority_flow_ctrl_set)
2322 return (*dev->dev_ops->priority_flow_ctrl_set)(dev, pfc_conf);
2327 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
2335 num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
2336 for (i = 0; i < num; i++) {
2337 if (reta_conf[i].mask)
2345 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
2349 uint16_t i, idx, shift;
2355 RTE_PMD_DEBUG_TRACE("No receive queue is available\n");
2359 for (i = 0; i < reta_size; i++) {
2360 idx = i / RTE_RETA_GROUP_SIZE;
2361 shift = i % RTE_RETA_GROUP_SIZE;
2362 if ((reta_conf[idx].mask & (1ULL << shift)) &&
2363 (reta_conf[idx].reta[shift] >= max_rxq)) {
2364 RTE_PMD_DEBUG_TRACE("reta_conf[%u]->reta[%u]: %u exceeds "
2365 "the maximum rxq index: %u\n", idx, shift,
2366 reta_conf[idx].reta[shift], max_rxq);
2375 rte_eth_dev_rss_reta_update(uint8_t port_id,
2376 struct rte_eth_rss_reta_entry64 *reta_conf,
2379 struct rte_eth_dev *dev;
2382 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2383 /* Check mask bits */
2384 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2388 dev = &rte_eth_devices[port_id];
2390 /* Check entry value */
2391 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
2392 dev->data->nb_rx_queues);
2396 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
2397 return (*dev->dev_ops->reta_update)(dev, reta_conf, reta_size);
2401 rte_eth_dev_rss_reta_query(uint8_t port_id,
2402 struct rte_eth_rss_reta_entry64 *reta_conf,
2405 struct rte_eth_dev *dev;
2408 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2410 /* Check mask bits */
2411 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2415 dev = &rte_eth_devices[port_id];
2416 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
2417 return (*dev->dev_ops->reta_query)(dev, reta_conf, reta_size);
2421 rte_eth_dev_rss_hash_update(uint8_t port_id, struct rte_eth_rss_conf *rss_conf)
2423 struct rte_eth_dev *dev;
2424 uint16_t rss_hash_protos;
2426 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2427 rss_hash_protos = rss_conf->rss_hf;
2428 if ((rss_hash_protos != 0) &&
2429 ((rss_hash_protos & ETH_RSS_PROTO_MASK) == 0)) {
2430 RTE_PMD_DEBUG_TRACE("Invalid rss_hash_protos=0x%x\n",
2434 dev = &rte_eth_devices[port_id];
2435 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
2436 return (*dev->dev_ops->rss_hash_update)(dev, rss_conf);
2440 rte_eth_dev_rss_hash_conf_get(uint8_t port_id,
2441 struct rte_eth_rss_conf *rss_conf)
2443 struct rte_eth_dev *dev;
2445 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2446 dev = &rte_eth_devices[port_id];
2447 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
2448 return (*dev->dev_ops->rss_hash_conf_get)(dev, rss_conf);
2452 rte_eth_dev_udp_tunnel_port_add(uint8_t port_id,
2453 struct rte_eth_udp_tunnel *udp_tunnel)
2455 struct rte_eth_dev *dev;
2457 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2458 if (udp_tunnel == NULL) {
2459 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2463 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2464 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2468 dev = &rte_eth_devices[port_id];
2469 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
2470 return (*dev->dev_ops->udp_tunnel_port_add)(dev, udp_tunnel);
2474 rte_eth_dev_udp_tunnel_port_delete(uint8_t port_id,
2475 struct rte_eth_udp_tunnel *udp_tunnel)
2477 struct rte_eth_dev *dev;
2479 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2480 dev = &rte_eth_devices[port_id];
2482 if (udp_tunnel == NULL) {
2483 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2487 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2488 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2492 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
2493 return (*dev->dev_ops->udp_tunnel_port_del)(dev, udp_tunnel);
2497 rte_eth_led_on(uint8_t port_id)
2499 struct rte_eth_dev *dev;
2501 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2502 dev = &rte_eth_devices[port_id];
2503 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
2504 return (*dev->dev_ops->dev_led_on)(dev);
2508 rte_eth_led_off(uint8_t port_id)
2510 struct rte_eth_dev *dev;
2512 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2513 dev = &rte_eth_devices[port_id];
2514 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
2515 return (*dev->dev_ops->dev_led_off)(dev);
2519 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2523 get_mac_addr_index(uint8_t port_id, const struct ether_addr *addr)
2525 struct rte_eth_dev_info dev_info;
2526 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2529 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2530 rte_eth_dev_info_get(port_id, &dev_info);
2532 for (i = 0; i < dev_info.max_mac_addrs; i++)
2533 if (memcmp(addr, &dev->data->mac_addrs[i], ETHER_ADDR_LEN) == 0)
2539 static const struct ether_addr null_mac_addr;
2542 rte_eth_dev_mac_addr_add(uint8_t port_id, struct ether_addr *addr,
2545 struct rte_eth_dev *dev;
2550 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2551 dev = &rte_eth_devices[port_id];
2552 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
2554 if (is_zero_ether_addr(addr)) {
2555 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
2559 if (pool >= ETH_64_POOLS) {
2560 RTE_PMD_DEBUG_TRACE("pool id must be 0-%d\n", ETH_64_POOLS - 1);
2564 index = get_mac_addr_index(port_id, addr);
2566 index = get_mac_addr_index(port_id, &null_mac_addr);
2568 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
2573 pool_mask = dev->data->mac_pool_sel[index];
2575 /* Check if both MAC address and pool is already there, and do nothing */
2576 if (pool_mask & (1ULL << pool))
2581 ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
2584 /* Update address in NIC data structure */
2585 ether_addr_copy(addr, &dev->data->mac_addrs[index]);
2587 /* Update pool bitmap in NIC data structure */
2588 dev->data->mac_pool_sel[index] |= (1ULL << pool);
2595 rte_eth_dev_mac_addr_remove(uint8_t port_id, struct ether_addr *addr)
2597 struct rte_eth_dev *dev;
2600 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2601 dev = &rte_eth_devices[port_id];
2602 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
2604 index = get_mac_addr_index(port_id, addr);
2606 RTE_PMD_DEBUG_TRACE("port %d: Cannot remove default MAC address\n", port_id);
2608 } else if (index < 0)
2609 return 0; /* Do nothing if address wasn't found */
2612 (*dev->dev_ops->mac_addr_remove)(dev, index);
2614 /* Update address in NIC data structure */
2615 ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
2617 /* reset pool bitmap */
2618 dev->data->mac_pool_sel[index] = 0;
2624 rte_eth_dev_default_mac_addr_set(uint8_t port_id, struct ether_addr *addr)
2626 struct rte_eth_dev *dev;
2628 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2630 if (!is_valid_assigned_ether_addr(addr))
2633 dev = &rte_eth_devices[port_id];
2634 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
2636 /* Update default address in NIC data structure */
2637 ether_addr_copy(addr, &dev->data->mac_addrs[0]);
2639 (*dev->dev_ops->mac_addr_set)(dev, addr);
2646 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2650 get_hash_mac_addr_index(uint8_t port_id, const struct ether_addr *addr)
2652 struct rte_eth_dev_info dev_info;
2653 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2656 rte_eth_dev_info_get(port_id, &dev_info);
2657 if (!dev->data->hash_mac_addrs)
2660 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
2661 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
2662 ETHER_ADDR_LEN) == 0)
2669 rte_eth_dev_uc_hash_table_set(uint8_t port_id, struct ether_addr *addr,
2674 struct rte_eth_dev *dev;
2676 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2678 dev = &rte_eth_devices[port_id];
2679 if (is_zero_ether_addr(addr)) {
2680 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
2685 index = get_hash_mac_addr_index(port_id, addr);
2686 /* Check if it's already there, and do nothing */
2687 if ((index >= 0) && (on))
2692 RTE_PMD_DEBUG_TRACE("port %d: the MAC address was not "
2693 "set in UTA\n", port_id);
2697 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
2699 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
2705 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
2706 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
2708 /* Update address in NIC data structure */
2710 ether_addr_copy(addr,
2711 &dev->data->hash_mac_addrs[index]);
2713 ether_addr_copy(&null_mac_addr,
2714 &dev->data->hash_mac_addrs[index]);
2721 rte_eth_dev_uc_all_hash_table_set(uint8_t port_id, uint8_t on)
2723 struct rte_eth_dev *dev;
2725 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2727 dev = &rte_eth_devices[port_id];
2729 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
2730 return (*dev->dev_ops->uc_all_hash_table_set)(dev, on);
2733 int rte_eth_set_queue_rate_limit(uint8_t port_id, uint16_t queue_idx,
2736 struct rte_eth_dev *dev;
2737 struct rte_eth_dev_info dev_info;
2738 struct rte_eth_link link;
2740 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2742 dev = &rte_eth_devices[port_id];
2743 rte_eth_dev_info_get(port_id, &dev_info);
2744 link = dev->data->dev_link;
2746 if (queue_idx > dev_info.max_tx_queues) {
2747 RTE_PMD_DEBUG_TRACE("set queue rate limit:port %d: "
2748 "invalid queue id=%d\n", port_id, queue_idx);
2752 if (tx_rate > link.link_speed) {
2753 RTE_PMD_DEBUG_TRACE("set queue rate limit:invalid tx_rate=%d, "
2754 "bigger than link speed= %d\n",
2755 tx_rate, link.link_speed);
2759 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
2760 return (*dev->dev_ops->set_queue_rate_limit)(dev, queue_idx, tx_rate);
2764 rte_eth_mirror_rule_set(uint8_t port_id,
2765 struct rte_eth_mirror_conf *mirror_conf,
2766 uint8_t rule_id, uint8_t on)
2768 struct rte_eth_dev *dev;
2770 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2771 if (mirror_conf->rule_type == 0) {
2772 RTE_PMD_DEBUG_TRACE("mirror rule type can not be 0.\n");
2776 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
2777 RTE_PMD_DEBUG_TRACE("Invalid dst pool, pool id must be 0-%d\n",
2782 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
2783 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
2784 (mirror_conf->pool_mask == 0)) {
2785 RTE_PMD_DEBUG_TRACE("Invalid mirror pool, pool mask can not be 0.\n");
2789 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
2790 mirror_conf->vlan.vlan_mask == 0) {
2791 RTE_PMD_DEBUG_TRACE("Invalid vlan mask, vlan mask can not be 0.\n");
2795 dev = &rte_eth_devices[port_id];
2796 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
2798 return (*dev->dev_ops->mirror_rule_set)(dev, mirror_conf, rule_id, on);
2802 rte_eth_mirror_rule_reset(uint8_t port_id, uint8_t rule_id)
2804 struct rte_eth_dev *dev;
2806 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2808 dev = &rte_eth_devices[port_id];
2809 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
2811 return (*dev->dev_ops->mirror_rule_reset)(dev, rule_id);
2815 rte_eth_dev_callback_register(uint8_t port_id,
2816 enum rte_eth_event_type event,
2817 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
2819 struct rte_eth_dev *dev;
2820 struct rte_eth_dev_callback *user_cb;
2825 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2827 dev = &rte_eth_devices[port_id];
2828 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2830 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
2831 if (user_cb->cb_fn == cb_fn &&
2832 user_cb->cb_arg == cb_arg &&
2833 user_cb->event == event) {
2838 /* create a new callback. */
2839 if (user_cb == NULL) {
2840 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
2841 sizeof(struct rte_eth_dev_callback), 0);
2842 if (user_cb != NULL) {
2843 user_cb->cb_fn = cb_fn;
2844 user_cb->cb_arg = cb_arg;
2845 user_cb->event = event;
2846 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs), user_cb, next);
2850 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2851 return (user_cb == NULL) ? -ENOMEM : 0;
2855 rte_eth_dev_callback_unregister(uint8_t port_id,
2856 enum rte_eth_event_type event,
2857 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
2860 struct rte_eth_dev *dev;
2861 struct rte_eth_dev_callback *cb, *next;
2866 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2868 dev = &rte_eth_devices[port_id];
2869 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2872 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL; cb = next) {
2874 next = TAILQ_NEXT(cb, next);
2876 if (cb->cb_fn != cb_fn || cb->event != event ||
2877 (cb->cb_arg != (void *)-1 &&
2878 cb->cb_arg != cb_arg))
2882 * if this callback is not executing right now,
2885 if (cb->active == 0) {
2886 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
2893 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2898 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
2899 enum rte_eth_event_type event, void *cb_arg, void *ret_param)
2901 struct rte_eth_dev_callback *cb_lst;
2902 struct rte_eth_dev_callback dev_cb;
2905 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2906 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
2907 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
2912 dev_cb.cb_arg = cb_arg;
2913 if (ret_param != NULL)
2914 dev_cb.ret_param = ret_param;
2916 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2917 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
2918 dev_cb.cb_arg, dev_cb.ret_param);
2919 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2922 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2927 rte_eth_dev_rx_intr_ctl(uint8_t port_id, int epfd, int op, void *data)
2930 struct rte_eth_dev *dev;
2931 struct rte_intr_handle *intr_handle;
2935 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2937 dev = &rte_eth_devices[port_id];
2939 if (!dev->intr_handle) {
2940 RTE_PMD_DEBUG_TRACE("RX Intr handle unset\n");
2944 intr_handle = dev->intr_handle;
2945 if (!intr_handle->intr_vec) {
2946 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
2950 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
2951 vec = intr_handle->intr_vec[qid];
2952 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
2953 if (rc && rc != -EEXIST) {
2954 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
2955 " op %d epfd %d vec %u\n",
2956 port_id, qid, op, epfd, vec);
2963 const struct rte_memzone *
2964 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
2965 uint16_t queue_id, size_t size, unsigned align,
2968 char z_name[RTE_MEMZONE_NAMESIZE];
2969 const struct rte_memzone *mz;
2971 snprintf(z_name, sizeof(z_name), "%s_%s_%d_%d",
2972 dev->device->driver->name, ring_name,
2973 dev->data->port_id, queue_id);
2975 mz = rte_memzone_lookup(z_name);
2979 if (rte_xen_dom0_supported())
2980 return rte_memzone_reserve_bounded(z_name, size, socket_id,
2981 0, align, RTE_PGSIZE_2M);
2983 return rte_memzone_reserve_aligned(z_name, size, socket_id,
2988 rte_eth_dev_rx_intr_ctl_q(uint8_t port_id, uint16_t queue_id,
2989 int epfd, int op, void *data)
2992 struct rte_eth_dev *dev;
2993 struct rte_intr_handle *intr_handle;
2996 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2998 dev = &rte_eth_devices[port_id];
2999 if (queue_id >= dev->data->nb_rx_queues) {
3000 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%u\n", queue_id);
3004 if (!dev->intr_handle) {
3005 RTE_PMD_DEBUG_TRACE("RX Intr handle unset\n");
3009 intr_handle = dev->intr_handle;
3010 if (!intr_handle->intr_vec) {
3011 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
3015 vec = intr_handle->intr_vec[queue_id];
3016 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3017 if (rc && rc != -EEXIST) {
3018 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
3019 " op %d epfd %d vec %u\n",
3020 port_id, queue_id, op, epfd, vec);
3028 rte_eth_dev_rx_intr_enable(uint8_t port_id,
3031 struct rte_eth_dev *dev;
3033 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3035 dev = &rte_eth_devices[port_id];
3037 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
3038 return (*dev->dev_ops->rx_queue_intr_enable)(dev, queue_id);
3042 rte_eth_dev_rx_intr_disable(uint8_t port_id,
3045 struct rte_eth_dev *dev;
3047 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3049 dev = &rte_eth_devices[port_id];
3051 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
3052 return (*dev->dev_ops->rx_queue_intr_disable)(dev, queue_id);
3057 rte_eth_dev_filter_supported(uint8_t port_id, enum rte_filter_type filter_type)
3059 struct rte_eth_dev *dev;
3061 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3063 dev = &rte_eth_devices[port_id];
3064 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3065 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3066 RTE_ETH_FILTER_NOP, NULL);
3070 rte_eth_dev_filter_ctrl(uint8_t port_id, enum rte_filter_type filter_type,
3071 enum rte_filter_op filter_op, void *arg)
3073 struct rte_eth_dev *dev;
3075 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3077 dev = &rte_eth_devices[port_id];
3078 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3079 return (*dev->dev_ops->filter_ctrl)(dev, filter_type, filter_op, arg);
3083 rte_eth_add_rx_callback(uint8_t port_id, uint16_t queue_id,
3084 rte_rx_callback_fn fn, void *user_param)
3086 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3087 rte_errno = ENOTSUP;
3090 /* check input parameters */
3091 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3092 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3096 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3104 cb->param = user_param;
3106 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3107 /* Add the callbacks in fifo order. */
3108 struct rte_eth_rxtx_callback *tail =
3109 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3112 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3119 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3125 rte_eth_add_first_rx_callback(uint8_t port_id, uint16_t queue_id,
3126 rte_rx_callback_fn fn, void *user_param)
3128 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3129 rte_errno = ENOTSUP;
3132 /* check input parameters */
3133 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3134 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3139 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3147 cb->param = user_param;
3149 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3150 /* Add the callbacks at fisrt position*/
3151 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3153 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3154 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3160 rte_eth_add_tx_callback(uint8_t port_id, uint16_t queue_id,
3161 rte_tx_callback_fn fn, void *user_param)
3163 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3164 rte_errno = ENOTSUP;
3167 /* check input parameters */
3168 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3169 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
3174 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3182 cb->param = user_param;
3184 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3185 /* Add the callbacks in fifo order. */
3186 struct rte_eth_rxtx_callback *tail =
3187 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
3190 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
3197 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3203 rte_eth_remove_rx_callback(uint8_t port_id, uint16_t queue_id,
3204 struct rte_eth_rxtx_callback *user_cb)
3206 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3209 /* Check input parameters. */
3210 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3211 if (user_cb == NULL ||
3212 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
3215 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3216 struct rte_eth_rxtx_callback *cb;
3217 struct rte_eth_rxtx_callback **prev_cb;
3220 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3221 prev_cb = &dev->post_rx_burst_cbs[queue_id];
3222 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3224 if (cb == user_cb) {
3225 /* Remove the user cb from the callback list. */
3226 *prev_cb = cb->next;
3231 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3237 rte_eth_remove_tx_callback(uint8_t port_id, uint16_t queue_id,
3238 struct rte_eth_rxtx_callback *user_cb)
3240 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3243 /* Check input parameters. */
3244 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3245 if (user_cb == NULL ||
3246 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
3249 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3251 struct rte_eth_rxtx_callback *cb;
3252 struct rte_eth_rxtx_callback **prev_cb;
3254 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3255 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
3256 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3258 if (cb == user_cb) {
3259 /* Remove the user cb from the callback list. */
3260 *prev_cb = cb->next;
3265 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3271 rte_eth_rx_queue_info_get(uint8_t port_id, uint16_t queue_id,
3272 struct rte_eth_rxq_info *qinfo)
3274 struct rte_eth_dev *dev;
3276 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3281 dev = &rte_eth_devices[port_id];
3282 if (queue_id >= dev->data->nb_rx_queues) {
3283 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", queue_id);
3287 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
3289 memset(qinfo, 0, sizeof(*qinfo));
3290 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
3295 rte_eth_tx_queue_info_get(uint8_t port_id, uint16_t queue_id,
3296 struct rte_eth_txq_info *qinfo)
3298 struct rte_eth_dev *dev;
3300 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3305 dev = &rte_eth_devices[port_id];
3306 if (queue_id >= dev->data->nb_tx_queues) {
3307 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", queue_id);
3311 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
3313 memset(qinfo, 0, sizeof(*qinfo));
3314 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
3319 rte_eth_dev_set_mc_addr_list(uint8_t port_id,
3320 struct ether_addr *mc_addr_set,
3321 uint32_t nb_mc_addr)
3323 struct rte_eth_dev *dev;
3325 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3327 dev = &rte_eth_devices[port_id];
3328 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
3329 return dev->dev_ops->set_mc_addr_list(dev, mc_addr_set, nb_mc_addr);
3333 rte_eth_timesync_enable(uint8_t port_id)
3335 struct rte_eth_dev *dev;
3337 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3338 dev = &rte_eth_devices[port_id];
3340 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
3341 return (*dev->dev_ops->timesync_enable)(dev);
3345 rte_eth_timesync_disable(uint8_t port_id)
3347 struct rte_eth_dev *dev;
3349 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3350 dev = &rte_eth_devices[port_id];
3352 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
3353 return (*dev->dev_ops->timesync_disable)(dev);
3357 rte_eth_timesync_read_rx_timestamp(uint8_t port_id, struct timespec *timestamp,
3360 struct rte_eth_dev *dev;
3362 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3363 dev = &rte_eth_devices[port_id];
3365 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
3366 return (*dev->dev_ops->timesync_read_rx_timestamp)(dev, timestamp, flags);
3370 rte_eth_timesync_read_tx_timestamp(uint8_t port_id, struct timespec *timestamp)
3372 struct rte_eth_dev *dev;
3374 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3375 dev = &rte_eth_devices[port_id];
3377 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
3378 return (*dev->dev_ops->timesync_read_tx_timestamp)(dev, timestamp);
3382 rte_eth_timesync_adjust_time(uint8_t port_id, int64_t delta)
3384 struct rte_eth_dev *dev;
3386 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3387 dev = &rte_eth_devices[port_id];
3389 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
3390 return (*dev->dev_ops->timesync_adjust_time)(dev, delta);
3394 rte_eth_timesync_read_time(uint8_t port_id, struct timespec *timestamp)
3396 struct rte_eth_dev *dev;
3398 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3399 dev = &rte_eth_devices[port_id];
3401 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
3402 return (*dev->dev_ops->timesync_read_time)(dev, timestamp);
3406 rte_eth_timesync_write_time(uint8_t port_id, const struct timespec *timestamp)
3408 struct rte_eth_dev *dev;
3410 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3411 dev = &rte_eth_devices[port_id];
3413 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
3414 return (*dev->dev_ops->timesync_write_time)(dev, timestamp);
3418 rte_eth_dev_get_reg_info(uint8_t port_id, struct rte_dev_reg_info *info)
3420 struct rte_eth_dev *dev;
3422 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3424 dev = &rte_eth_devices[port_id];
3425 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
3426 return (*dev->dev_ops->get_reg)(dev, info);
3430 rte_eth_dev_get_eeprom_length(uint8_t port_id)
3432 struct rte_eth_dev *dev;
3434 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3436 dev = &rte_eth_devices[port_id];
3437 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
3438 return (*dev->dev_ops->get_eeprom_length)(dev);
3442 rte_eth_dev_get_eeprom(uint8_t port_id, struct rte_dev_eeprom_info *info)
3444 struct rte_eth_dev *dev;
3446 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3448 dev = &rte_eth_devices[port_id];
3449 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
3450 return (*dev->dev_ops->get_eeprom)(dev, info);
3454 rte_eth_dev_set_eeprom(uint8_t port_id, struct rte_dev_eeprom_info *info)
3456 struct rte_eth_dev *dev;
3458 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3460 dev = &rte_eth_devices[port_id];
3461 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
3462 return (*dev->dev_ops->set_eeprom)(dev, info);
3466 rte_eth_dev_get_dcb_info(uint8_t port_id,
3467 struct rte_eth_dcb_info *dcb_info)
3469 struct rte_eth_dev *dev;
3471 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3473 dev = &rte_eth_devices[port_id];
3474 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
3476 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
3477 return (*dev->dev_ops->get_dcb_info)(dev, dcb_info);
3481 rte_eth_dev_l2_tunnel_eth_type_conf(uint8_t port_id,
3482 struct rte_eth_l2_tunnel_conf *l2_tunnel)
3484 struct rte_eth_dev *dev;
3486 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3487 if (l2_tunnel == NULL) {
3488 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
3492 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
3493 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
3497 dev = &rte_eth_devices[port_id];
3498 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
3500 return (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev, l2_tunnel);
3504 rte_eth_dev_l2_tunnel_offload_set(uint8_t port_id,
3505 struct rte_eth_l2_tunnel_conf *l2_tunnel,
3509 struct rte_eth_dev *dev;
3511 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3513 if (l2_tunnel == NULL) {
3514 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
3518 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
3519 RTE_PMD_DEBUG_TRACE("Invalid tunnel type.\n");
3524 RTE_PMD_DEBUG_TRACE("Mask should have a value.\n");
3528 dev = &rte_eth_devices[port_id];
3529 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
3531 return (*dev->dev_ops->l2_tunnel_offload_set)(dev, l2_tunnel, mask, en);
3535 rte_eth_dev_adjust_nb_desc(uint16_t *nb_desc,
3536 const struct rte_eth_desc_lim *desc_lim)
3538 if (desc_lim->nb_align != 0)
3539 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
3541 if (desc_lim->nb_max != 0)
3542 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
3544 *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
3548 rte_eth_dev_adjust_nb_rx_tx_desc(uint8_t port_id,
3549 uint16_t *nb_rx_desc,
3550 uint16_t *nb_tx_desc)
3552 struct rte_eth_dev *dev;
3553 struct rte_eth_dev_info dev_info;
3555 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3557 dev = &rte_eth_devices[port_id];
3558 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
3560 rte_eth_dev_info_get(port_id, &dev_info);
3562 if (nb_rx_desc != NULL)
3563 rte_eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
3565 if (nb_tx_desc != NULL)
3566 rte_eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);