4 * Copyright(c) 2010-2016 Intel Corporation. All rights reserved.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
11 * * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
17 * * Neither the name of Intel Corporation nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 #include <sys/types.h>
35 #include <sys/queue.h>
44 #include <netinet/in.h>
46 #include <rte_byteorder.h>
48 #include <rte_debug.h>
49 #include <rte_interrupts.h>
51 #include <rte_memory.h>
52 #include <rte_memcpy.h>
53 #include <rte_memzone.h>
54 #include <rte_launch.h>
56 #include <rte_per_lcore.h>
57 #include <rte_lcore.h>
58 #include <rte_atomic.h>
59 #include <rte_branch_prediction.h>
60 #include <rte_common.h>
61 #include <rte_mempool.h>
62 #include <rte_malloc.h>
64 #include <rte_errno.h>
65 #include <rte_spinlock.h>
66 #include <rte_string_fns.h>
68 #include "rte_ether.h"
69 #include "rte_ethdev.h"
71 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
72 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
73 static struct rte_eth_dev_data *rte_eth_dev_data;
74 static uint8_t eth_dev_last_created_port;
75 static uint8_t nb_ports;
77 /* spinlock for eth device callbacks */
78 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
80 /* spinlock for add/remove rx callbacks */
81 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
83 /* spinlock for add/remove tx callbacks */
84 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
86 /* store statistics names and its offset in stats structure */
87 struct rte_eth_xstats_name_off {
88 char name[RTE_ETH_XSTATS_NAME_SIZE];
92 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
93 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
94 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
95 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
96 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
97 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
98 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
99 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
103 #define RTE_NB_STATS (sizeof(rte_stats_strings) / sizeof(rte_stats_strings[0]))
105 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
106 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
107 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
108 {"errors", offsetof(struct rte_eth_stats, q_errors)},
111 #define RTE_NB_RXQ_STATS (sizeof(rte_rxq_stats_strings) / \
112 sizeof(rte_rxq_stats_strings[0]))
114 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
115 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
116 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
118 #define RTE_NB_TXQ_STATS (sizeof(rte_txq_stats_strings) / \
119 sizeof(rte_txq_stats_strings[0]))
123 * The user application callback description.
125 * It contains callback address to be registered by user application,
126 * the pointer to the parameters for callback, and the event type.
128 struct rte_eth_dev_callback {
129 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
130 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
131 void *cb_arg; /**< Parameter for callback */
132 enum rte_eth_event_type event; /**< Interrupt event type */
133 uint32_t active; /**< Callback is executing */
147 rte_eth_dev_data_alloc(void)
149 const unsigned flags = 0;
150 const struct rte_memzone *mz;
152 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
153 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
154 RTE_MAX_ETHPORTS * sizeof(*rte_eth_dev_data),
155 rte_socket_id(), flags);
157 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
159 rte_panic("Cannot allocate memzone for ethernet port data\n");
161 rte_eth_dev_data = mz->addr;
162 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
163 memset(rte_eth_dev_data, 0,
164 RTE_MAX_ETHPORTS * sizeof(*rte_eth_dev_data));
168 rte_eth_dev_allocated(const char *name)
172 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
173 if ((rte_eth_devices[i].attached == DEV_ATTACHED) &&
174 strcmp(rte_eth_devices[i].data->name, name) == 0)
175 return &rte_eth_devices[i];
181 rte_eth_dev_find_free_port(void)
185 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
186 if (rte_eth_devices[i].attached == DEV_DETACHED)
189 return RTE_MAX_ETHPORTS;
193 rte_eth_dev_allocate(const char *name)
196 struct rte_eth_dev *eth_dev;
198 port_id = rte_eth_dev_find_free_port();
199 if (port_id == RTE_MAX_ETHPORTS) {
200 RTE_PMD_DEBUG_TRACE("Reached maximum number of Ethernet ports\n");
204 if (rte_eth_dev_data == NULL)
205 rte_eth_dev_data_alloc();
207 if (rte_eth_dev_allocated(name) != NULL) {
208 RTE_PMD_DEBUG_TRACE("Ethernet Device with name %s already allocated!\n",
213 eth_dev = &rte_eth_devices[port_id];
214 eth_dev->data = &rte_eth_dev_data[port_id];
215 memset(eth_dev->data, 0, sizeof(*eth_dev->data));
216 snprintf(eth_dev->data->name, sizeof(eth_dev->data->name), "%s", name);
217 eth_dev->data->port_id = port_id;
218 eth_dev->data->mtu = ETHER_MTU;
219 TAILQ_INIT(&(eth_dev->link_intr_cbs));
221 eth_dev->attached = DEV_ATTACHED;
222 eth_dev_last_created_port = port_id;
228 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
233 eth_dev->attached = DEV_DETACHED;
239 rte_eth_dev_pci_probe(struct rte_pci_driver *pci_drv,
240 struct rte_pci_device *pci_dev)
242 struct eth_driver *eth_drv;
243 struct rte_eth_dev *eth_dev;
244 char ethdev_name[RTE_ETH_NAME_MAX_LEN];
248 eth_drv = (struct eth_driver *)pci_drv;
250 rte_eal_pci_device_name(&pci_dev->addr, ethdev_name,
251 sizeof(ethdev_name));
253 eth_dev = rte_eth_dev_allocate(ethdev_name);
257 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
258 eth_dev->data->dev_private = rte_zmalloc("ethdev private structure",
259 eth_drv->dev_private_size,
260 RTE_CACHE_LINE_SIZE);
261 if (eth_dev->data->dev_private == NULL)
262 rte_panic("Cannot allocate memzone for private port data\n");
264 eth_dev->device = &pci_dev->device;
265 eth_dev->intr_handle = &pci_dev->intr_handle;
266 eth_dev->driver = eth_drv;
268 /* Invoke PMD device initialization function */
269 diag = (*eth_drv->eth_dev_init)(eth_dev);
273 RTE_PMD_DEBUG_TRACE("driver %s: eth_dev_init(vendor_id=0x%x device_id=0x%x) failed\n",
274 pci_drv->driver.name,
275 (unsigned) pci_dev->id.vendor_id,
276 (unsigned) pci_dev->id.device_id);
277 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
278 rte_free(eth_dev->data->dev_private);
279 rte_eth_dev_release_port(eth_dev);
284 rte_eth_dev_pci_remove(struct rte_pci_device *pci_dev)
286 const struct eth_driver *eth_drv;
287 struct rte_eth_dev *eth_dev;
288 char ethdev_name[RTE_ETH_NAME_MAX_LEN];
294 rte_eal_pci_device_name(&pci_dev->addr, ethdev_name,
295 sizeof(ethdev_name));
297 eth_dev = rte_eth_dev_allocated(ethdev_name);
301 eth_drv = (const struct eth_driver *)pci_dev->driver;
303 /* Invoke PMD device uninit function */
304 if (*eth_drv->eth_dev_uninit) {
305 ret = (*eth_drv->eth_dev_uninit)(eth_dev);
310 /* free ether device */
311 rte_eth_dev_release_port(eth_dev);
313 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
314 rte_free(eth_dev->data->dev_private);
316 eth_dev->device = NULL;
317 eth_dev->driver = NULL;
318 eth_dev->data = NULL;
324 rte_eth_dev_is_valid_port(uint8_t port_id)
326 if (port_id >= RTE_MAX_ETHPORTS ||
327 rte_eth_devices[port_id].attached != DEV_ATTACHED)
334 rte_eth_dev_socket_id(uint8_t port_id)
336 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
337 return rte_eth_devices[port_id].data->numa_node;
341 rte_eth_dev_count(void)
347 rte_eth_dev_get_name_by_port(uint8_t port_id, char *name)
351 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
354 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
358 /* shouldn't check 'rte_eth_devices[i].data',
359 * because it might be overwritten by VDEV PMD */
360 tmp = rte_eth_dev_data[port_id].name;
366 rte_eth_dev_get_port_by_name(const char *name, uint8_t *port_id)
371 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
378 *port_id = RTE_MAX_ETHPORTS;
380 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
383 rte_eth_dev_data[i].name, strlen(name))) {
394 rte_eth_dev_is_detachable(uint8_t port_id)
398 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
400 switch (rte_eth_devices[port_id].data->kdrv) {
401 case RTE_KDRV_IGB_UIO:
402 case RTE_KDRV_UIO_GENERIC:
403 case RTE_KDRV_NIC_UIO:
410 dev_flags = rte_eth_devices[port_id].data->dev_flags;
411 if ((dev_flags & RTE_ETH_DEV_DETACHABLE) &&
412 (!(dev_flags & RTE_ETH_DEV_BONDED_SLAVE)))
418 /* attach the new device, then store port_id of the device */
420 rte_eth_dev_attach(const char *devargs, uint8_t *port_id)
423 int current = rte_eth_dev_count();
427 if ((devargs == NULL) || (port_id == NULL)) {
432 /* parse devargs, then retrieve device name and args */
433 if (rte_eal_parse_devargs_str(devargs, &name, &args))
436 ret = rte_eal_dev_attach(name, args);
440 /* no point looking at the port count if no port exists */
441 if (!rte_eth_dev_count()) {
442 RTE_LOG(ERR, EAL, "No port found for device (%s)\n", name);
447 /* if nothing happened, there is a bug here, since some driver told us
448 * it did attach a device, but did not create a port.
450 if (current == rte_eth_dev_count()) {
455 *port_id = eth_dev_last_created_port;
464 /* detach the device, then store the name of the device */
466 rte_eth_dev_detach(uint8_t port_id, char *name)
475 /* FIXME: move this to eal, once device flags are relocated there */
476 if (rte_eth_dev_is_detachable(port_id))
479 snprintf(name, sizeof(rte_eth_devices[port_id].data->name),
480 "%s", rte_eth_devices[port_id].data->name);
481 ret = rte_eal_dev_detach(name);
492 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
494 uint16_t old_nb_queues = dev->data->nb_rx_queues;
498 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
499 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
500 sizeof(dev->data->rx_queues[0]) * nb_queues,
501 RTE_CACHE_LINE_SIZE);
502 if (dev->data->rx_queues == NULL) {
503 dev->data->nb_rx_queues = 0;
506 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
507 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
509 rxq = dev->data->rx_queues;
511 for (i = nb_queues; i < old_nb_queues; i++)
512 (*dev->dev_ops->rx_queue_release)(rxq[i]);
513 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
514 RTE_CACHE_LINE_SIZE);
517 if (nb_queues > old_nb_queues) {
518 uint16_t new_qs = nb_queues - old_nb_queues;
520 memset(rxq + old_nb_queues, 0,
521 sizeof(rxq[0]) * new_qs);
524 dev->data->rx_queues = rxq;
526 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
527 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
529 rxq = dev->data->rx_queues;
531 for (i = nb_queues; i < old_nb_queues; i++)
532 (*dev->dev_ops->rx_queue_release)(rxq[i]);
534 rte_free(dev->data->rx_queues);
535 dev->data->rx_queues = NULL;
537 dev->data->nb_rx_queues = nb_queues;
542 rte_eth_dev_rx_queue_start(uint8_t port_id, uint16_t rx_queue_id)
544 struct rte_eth_dev *dev;
546 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
548 dev = &rte_eth_devices[port_id];
549 if (rx_queue_id >= dev->data->nb_rx_queues) {
550 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
554 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
556 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
557 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
558 " already started\n",
559 rx_queue_id, port_id);
563 return dev->dev_ops->rx_queue_start(dev, rx_queue_id);
568 rte_eth_dev_rx_queue_stop(uint8_t port_id, uint16_t rx_queue_id)
570 struct rte_eth_dev *dev;
572 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
574 dev = &rte_eth_devices[port_id];
575 if (rx_queue_id >= dev->data->nb_rx_queues) {
576 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
580 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
582 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
583 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
584 " already stopped\n",
585 rx_queue_id, port_id);
589 return dev->dev_ops->rx_queue_stop(dev, rx_queue_id);
594 rte_eth_dev_tx_queue_start(uint8_t port_id, uint16_t tx_queue_id)
596 struct rte_eth_dev *dev;
598 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
600 dev = &rte_eth_devices[port_id];
601 if (tx_queue_id >= dev->data->nb_tx_queues) {
602 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
606 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
608 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
609 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
610 " already started\n",
611 tx_queue_id, port_id);
615 return dev->dev_ops->tx_queue_start(dev, tx_queue_id);
620 rte_eth_dev_tx_queue_stop(uint8_t port_id, uint16_t tx_queue_id)
622 struct rte_eth_dev *dev;
624 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
626 dev = &rte_eth_devices[port_id];
627 if (tx_queue_id >= dev->data->nb_tx_queues) {
628 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
632 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
634 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
635 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
636 " already stopped\n",
637 tx_queue_id, port_id);
641 return dev->dev_ops->tx_queue_stop(dev, tx_queue_id);
646 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
648 uint16_t old_nb_queues = dev->data->nb_tx_queues;
652 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
653 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
654 sizeof(dev->data->tx_queues[0]) * nb_queues,
655 RTE_CACHE_LINE_SIZE);
656 if (dev->data->tx_queues == NULL) {
657 dev->data->nb_tx_queues = 0;
660 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
661 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
663 txq = dev->data->tx_queues;
665 for (i = nb_queues; i < old_nb_queues; i++)
666 (*dev->dev_ops->tx_queue_release)(txq[i]);
667 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
668 RTE_CACHE_LINE_SIZE);
671 if (nb_queues > old_nb_queues) {
672 uint16_t new_qs = nb_queues - old_nb_queues;
674 memset(txq + old_nb_queues, 0,
675 sizeof(txq[0]) * new_qs);
678 dev->data->tx_queues = txq;
680 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
681 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
683 txq = dev->data->tx_queues;
685 for (i = nb_queues; i < old_nb_queues; i++)
686 (*dev->dev_ops->tx_queue_release)(txq[i]);
688 rte_free(dev->data->tx_queues);
689 dev->data->tx_queues = NULL;
691 dev->data->nb_tx_queues = nb_queues;
696 rte_eth_speed_bitflag(uint32_t speed, int duplex)
699 case ETH_SPEED_NUM_10M:
700 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
701 case ETH_SPEED_NUM_100M:
702 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
703 case ETH_SPEED_NUM_1G:
704 return ETH_LINK_SPEED_1G;
705 case ETH_SPEED_NUM_2_5G:
706 return ETH_LINK_SPEED_2_5G;
707 case ETH_SPEED_NUM_5G:
708 return ETH_LINK_SPEED_5G;
709 case ETH_SPEED_NUM_10G:
710 return ETH_LINK_SPEED_10G;
711 case ETH_SPEED_NUM_20G:
712 return ETH_LINK_SPEED_20G;
713 case ETH_SPEED_NUM_25G:
714 return ETH_LINK_SPEED_25G;
715 case ETH_SPEED_NUM_40G:
716 return ETH_LINK_SPEED_40G;
717 case ETH_SPEED_NUM_50G:
718 return ETH_LINK_SPEED_50G;
719 case ETH_SPEED_NUM_56G:
720 return ETH_LINK_SPEED_56G;
721 case ETH_SPEED_NUM_100G:
722 return ETH_LINK_SPEED_100G;
729 rte_eth_dev_configure(uint8_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
730 const struct rte_eth_conf *dev_conf)
732 struct rte_eth_dev *dev;
733 struct rte_eth_dev_info dev_info;
736 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
738 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
740 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
741 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
745 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
747 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
748 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
752 dev = &rte_eth_devices[port_id];
754 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
755 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
757 if (dev->data->dev_started) {
759 "port %d must be stopped to allow configuration\n", port_id);
763 /* Copy the dev_conf parameter into the dev structure */
764 memcpy(&dev->data->dev_conf, dev_conf, sizeof(dev->data->dev_conf));
767 * Check that the numbers of RX and TX queues are not greater
768 * than the maximum number of RX and TX queues supported by the
771 (*dev->dev_ops->dev_infos_get)(dev, &dev_info);
773 if (nb_rx_q == 0 && nb_tx_q == 0) {
774 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d both rx and tx queue cannot be 0\n", port_id);
778 if (nb_rx_q > dev_info.max_rx_queues) {
779 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_rx_queues=%d > %d\n",
780 port_id, nb_rx_q, dev_info.max_rx_queues);
784 if (nb_tx_q > dev_info.max_tx_queues) {
785 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_tx_queues=%d > %d\n",
786 port_id, nb_tx_q, dev_info.max_tx_queues);
791 * If link state interrupt is enabled, check that the
792 * device supports it.
794 if ((dev_conf->intr_conf.lsc == 1) &&
795 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
796 RTE_PMD_DEBUG_TRACE("driver %s does not support lsc\n",
797 dev->data->drv_name);
802 * If jumbo frames are enabled, check that the maximum RX packet
803 * length is supported by the configured device.
805 if (dev_conf->rxmode.jumbo_frame == 1) {
806 if (dev_conf->rxmode.max_rx_pkt_len >
807 dev_info.max_rx_pktlen) {
808 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
809 " > max valid value %u\n",
811 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
812 (unsigned)dev_info.max_rx_pktlen);
814 } else if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN) {
815 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
816 " < min valid value %u\n",
818 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
819 (unsigned)ETHER_MIN_LEN);
823 if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN ||
824 dev_conf->rxmode.max_rx_pkt_len > ETHER_MAX_LEN)
825 /* Use default value */
826 dev->data->dev_conf.rxmode.max_rx_pkt_len =
831 * Setup new number of RX/TX queues and reconfigure device.
833 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
835 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_rx_queue_config = %d\n",
840 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
842 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_tx_queue_config = %d\n",
844 rte_eth_dev_rx_queue_config(dev, 0);
848 diag = (*dev->dev_ops->dev_configure)(dev);
850 RTE_PMD_DEBUG_TRACE("port%d dev_configure = %d\n",
852 rte_eth_dev_rx_queue_config(dev, 0);
853 rte_eth_dev_tx_queue_config(dev, 0);
861 _rte_eth_dev_reset(struct rte_eth_dev *dev)
863 if (dev->data->dev_started) {
865 "port %d must be stopped to allow reset\n",
870 rte_eth_dev_rx_queue_config(dev, 0);
871 rte_eth_dev_tx_queue_config(dev, 0);
873 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
877 rte_eth_dev_config_restore(uint8_t port_id)
879 struct rte_eth_dev *dev;
880 struct rte_eth_dev_info dev_info;
881 struct ether_addr addr;
885 dev = &rte_eth_devices[port_id];
887 rte_eth_dev_info_get(port_id, &dev_info);
889 if (RTE_ETH_DEV_SRIOV(dev).active)
890 pool = RTE_ETH_DEV_SRIOV(dev).def_vmdq_idx;
892 /* replay MAC address configuration */
893 for (i = 0; i < dev_info.max_mac_addrs; i++) {
894 addr = dev->data->mac_addrs[i];
896 /* skip zero address */
897 if (is_zero_ether_addr(&addr))
900 /* add address to the hardware */
901 if (*dev->dev_ops->mac_addr_add &&
902 (dev->data->mac_pool_sel[i] & (1ULL << pool)))
903 (*dev->dev_ops->mac_addr_add)(dev, &addr, i, pool);
905 RTE_PMD_DEBUG_TRACE("port %d: MAC address array not supported\n",
907 /* exit the loop but not return an error */
912 /* replay promiscuous configuration */
913 if (rte_eth_promiscuous_get(port_id) == 1)
914 rte_eth_promiscuous_enable(port_id);
915 else if (rte_eth_promiscuous_get(port_id) == 0)
916 rte_eth_promiscuous_disable(port_id);
918 /* replay all multicast configuration */
919 if (rte_eth_allmulticast_get(port_id) == 1)
920 rte_eth_allmulticast_enable(port_id);
921 else if (rte_eth_allmulticast_get(port_id) == 0)
922 rte_eth_allmulticast_disable(port_id);
926 rte_eth_dev_start(uint8_t port_id)
928 struct rte_eth_dev *dev;
931 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
933 dev = &rte_eth_devices[port_id];
935 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
937 if (dev->data->dev_started != 0) {
938 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu8
939 " already started\n",
944 diag = (*dev->dev_ops->dev_start)(dev);
946 dev->data->dev_started = 1;
950 rte_eth_dev_config_restore(port_id);
952 if (dev->data->dev_conf.intr_conf.lsc == 0) {
953 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
954 (*dev->dev_ops->link_update)(dev, 0);
960 rte_eth_dev_stop(uint8_t port_id)
962 struct rte_eth_dev *dev;
964 RTE_ETH_VALID_PORTID_OR_RET(port_id);
965 dev = &rte_eth_devices[port_id];
967 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
969 if (dev->data->dev_started == 0) {
970 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu8
971 " already stopped\n",
976 dev->data->dev_started = 0;
977 (*dev->dev_ops->dev_stop)(dev);
981 rte_eth_dev_set_link_up(uint8_t port_id)
983 struct rte_eth_dev *dev;
985 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
987 dev = &rte_eth_devices[port_id];
989 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
990 return (*dev->dev_ops->dev_set_link_up)(dev);
994 rte_eth_dev_set_link_down(uint8_t port_id)
996 struct rte_eth_dev *dev;
998 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1000 dev = &rte_eth_devices[port_id];
1002 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1003 return (*dev->dev_ops->dev_set_link_down)(dev);
1007 rte_eth_dev_close(uint8_t port_id)
1009 struct rte_eth_dev *dev;
1011 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1012 dev = &rte_eth_devices[port_id];
1014 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1015 dev->data->dev_started = 0;
1016 (*dev->dev_ops->dev_close)(dev);
1018 rte_free(dev->data->rx_queues);
1019 dev->data->rx_queues = NULL;
1020 rte_free(dev->data->tx_queues);
1021 dev->data->tx_queues = NULL;
1025 rte_eth_rx_queue_setup(uint8_t port_id, uint16_t rx_queue_id,
1026 uint16_t nb_rx_desc, unsigned int socket_id,
1027 const struct rte_eth_rxconf *rx_conf,
1028 struct rte_mempool *mp)
1031 uint32_t mbp_buf_size;
1032 struct rte_eth_dev *dev;
1033 struct rte_eth_dev_info dev_info;
1036 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1038 dev = &rte_eth_devices[port_id];
1039 if (rx_queue_id >= dev->data->nb_rx_queues) {
1040 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
1044 if (dev->data->dev_started) {
1045 RTE_PMD_DEBUG_TRACE(
1046 "port %d must be stopped to allow configuration\n", port_id);
1050 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1051 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1054 * Check the size of the mbuf data buffer.
1055 * This value must be provided in the private data of the memory pool.
1056 * First check that the memory pool has a valid private data.
1058 rte_eth_dev_info_get(port_id, &dev_info);
1059 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1060 RTE_PMD_DEBUG_TRACE("%s private_data_size %d < %d\n",
1061 mp->name, (int) mp->private_data_size,
1062 (int) sizeof(struct rte_pktmbuf_pool_private));
1065 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1067 if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1068 RTE_PMD_DEBUG_TRACE("%s mbuf_data_room_size %d < %d "
1069 "(RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)"
1073 (int)(RTE_PKTMBUF_HEADROOM +
1074 dev_info.min_rx_bufsize),
1075 (int)RTE_PKTMBUF_HEADROOM,
1076 (int)dev_info.min_rx_bufsize);
1080 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1081 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1082 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1084 RTE_PMD_DEBUG_TRACE("Invalid value for nb_rx_desc(=%hu), "
1085 "should be: <= %hu, = %hu, and a product of %hu\n",
1087 dev_info.rx_desc_lim.nb_max,
1088 dev_info.rx_desc_lim.nb_min,
1089 dev_info.rx_desc_lim.nb_align);
1093 rxq = dev->data->rx_queues;
1094 if (rxq[rx_queue_id]) {
1095 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1097 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1098 rxq[rx_queue_id] = NULL;
1101 if (rx_conf == NULL)
1102 rx_conf = &dev_info.default_rxconf;
1104 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1105 socket_id, rx_conf, mp);
1107 if (!dev->data->min_rx_buf_size ||
1108 dev->data->min_rx_buf_size > mbp_buf_size)
1109 dev->data->min_rx_buf_size = mbp_buf_size;
1116 rte_eth_tx_queue_setup(uint8_t port_id, uint16_t tx_queue_id,
1117 uint16_t nb_tx_desc, unsigned int socket_id,
1118 const struct rte_eth_txconf *tx_conf)
1120 struct rte_eth_dev *dev;
1121 struct rte_eth_dev_info dev_info;
1124 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1126 dev = &rte_eth_devices[port_id];
1127 if (tx_queue_id >= dev->data->nb_tx_queues) {
1128 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
1132 if (dev->data->dev_started) {
1133 RTE_PMD_DEBUG_TRACE(
1134 "port %d must be stopped to allow configuration\n", port_id);
1138 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1139 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
1141 rte_eth_dev_info_get(port_id, &dev_info);
1143 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
1144 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
1145 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
1146 RTE_PMD_DEBUG_TRACE("Invalid value for nb_tx_desc(=%hu), "
1147 "should be: <= %hu, = %hu, and a product of %hu\n",
1149 dev_info.tx_desc_lim.nb_max,
1150 dev_info.tx_desc_lim.nb_min,
1151 dev_info.tx_desc_lim.nb_align);
1155 txq = dev->data->tx_queues;
1156 if (txq[tx_queue_id]) {
1157 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
1159 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
1160 txq[tx_queue_id] = NULL;
1163 if (tx_conf == NULL)
1164 tx_conf = &dev_info.default_txconf;
1166 return (*dev->dev_ops->tx_queue_setup)(dev, tx_queue_id, nb_tx_desc,
1167 socket_id, tx_conf);
1171 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
1172 void *userdata __rte_unused)
1176 for (i = 0; i < unsent; i++)
1177 rte_pktmbuf_free(pkts[i]);
1181 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
1184 uint64_t *count = userdata;
1187 for (i = 0; i < unsent; i++)
1188 rte_pktmbuf_free(pkts[i]);
1194 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
1195 buffer_tx_error_fn cbfn, void *userdata)
1197 buffer->error_callback = cbfn;
1198 buffer->error_userdata = userdata;
1203 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
1210 buffer->size = size;
1211 if (buffer->error_callback == NULL) {
1212 ret = rte_eth_tx_buffer_set_err_callback(
1213 buffer, rte_eth_tx_buffer_drop_callback, NULL);
1220 rte_eth_promiscuous_enable(uint8_t port_id)
1222 struct rte_eth_dev *dev;
1224 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1225 dev = &rte_eth_devices[port_id];
1227 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_enable);
1228 (*dev->dev_ops->promiscuous_enable)(dev);
1229 dev->data->promiscuous = 1;
1233 rte_eth_promiscuous_disable(uint8_t port_id)
1235 struct rte_eth_dev *dev;
1237 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1238 dev = &rte_eth_devices[port_id];
1240 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_disable);
1241 dev->data->promiscuous = 0;
1242 (*dev->dev_ops->promiscuous_disable)(dev);
1246 rte_eth_promiscuous_get(uint8_t port_id)
1248 struct rte_eth_dev *dev;
1250 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1252 dev = &rte_eth_devices[port_id];
1253 return dev->data->promiscuous;
1257 rte_eth_allmulticast_enable(uint8_t port_id)
1259 struct rte_eth_dev *dev;
1261 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1262 dev = &rte_eth_devices[port_id];
1264 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_enable);
1265 (*dev->dev_ops->allmulticast_enable)(dev);
1266 dev->data->all_multicast = 1;
1270 rte_eth_allmulticast_disable(uint8_t port_id)
1272 struct rte_eth_dev *dev;
1274 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1275 dev = &rte_eth_devices[port_id];
1277 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_disable);
1278 dev->data->all_multicast = 0;
1279 (*dev->dev_ops->allmulticast_disable)(dev);
1283 rte_eth_allmulticast_get(uint8_t port_id)
1285 struct rte_eth_dev *dev;
1287 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1289 dev = &rte_eth_devices[port_id];
1290 return dev->data->all_multicast;
1294 rte_eth_dev_atomic_read_link_status(struct rte_eth_dev *dev,
1295 struct rte_eth_link *link)
1297 struct rte_eth_link *dst = link;
1298 struct rte_eth_link *src = &(dev->data->dev_link);
1300 if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
1301 *(uint64_t *)src) == 0)
1308 rte_eth_link_get(uint8_t port_id, struct rte_eth_link *eth_link)
1310 struct rte_eth_dev *dev;
1312 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1313 dev = &rte_eth_devices[port_id];
1315 if (dev->data->dev_conf.intr_conf.lsc != 0)
1316 rte_eth_dev_atomic_read_link_status(dev, eth_link);
1318 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1319 (*dev->dev_ops->link_update)(dev, 1);
1320 *eth_link = dev->data->dev_link;
1325 rte_eth_link_get_nowait(uint8_t port_id, struct rte_eth_link *eth_link)
1327 struct rte_eth_dev *dev;
1329 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1330 dev = &rte_eth_devices[port_id];
1332 if (dev->data->dev_conf.intr_conf.lsc != 0)
1333 rte_eth_dev_atomic_read_link_status(dev, eth_link);
1335 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1336 (*dev->dev_ops->link_update)(dev, 0);
1337 *eth_link = dev->data->dev_link;
1342 rte_eth_stats_get(uint8_t port_id, struct rte_eth_stats *stats)
1344 struct rte_eth_dev *dev;
1346 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1348 dev = &rte_eth_devices[port_id];
1349 memset(stats, 0, sizeof(*stats));
1351 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
1352 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
1353 (*dev->dev_ops->stats_get)(dev, stats);
1358 rte_eth_stats_reset(uint8_t port_id)
1360 struct rte_eth_dev *dev;
1362 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1363 dev = &rte_eth_devices[port_id];
1365 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->stats_reset);
1366 (*dev->dev_ops->stats_reset)(dev);
1367 dev->data->rx_mbuf_alloc_failed = 0;
1371 get_xstats_count(uint8_t port_id)
1373 struct rte_eth_dev *dev;
1376 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1377 dev = &rte_eth_devices[port_id];
1378 if (dev->dev_ops->xstats_get_names != NULL) {
1379 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
1384 count += RTE_NB_STATS;
1385 count += RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS) *
1387 count += RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS) *
1393 rte_eth_xstats_get_names(uint8_t port_id,
1394 struct rte_eth_xstat_name *xstats_names,
1397 struct rte_eth_dev *dev;
1398 int cnt_used_entries;
1399 int cnt_expected_entries;
1400 int cnt_driver_entries;
1401 uint32_t idx, id_queue;
1404 cnt_expected_entries = get_xstats_count(port_id);
1405 if (xstats_names == NULL || cnt_expected_entries < 0 ||
1406 (int)size < cnt_expected_entries)
1407 return cnt_expected_entries;
1409 /* port_id checked in get_xstats_count() */
1410 dev = &rte_eth_devices[port_id];
1411 cnt_used_entries = 0;
1413 for (idx = 0; idx < RTE_NB_STATS; idx++) {
1414 snprintf(xstats_names[cnt_used_entries].name,
1415 sizeof(xstats_names[0].name),
1416 "%s", rte_stats_strings[idx].name);
1419 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1420 for (id_queue = 0; id_queue < num_q; id_queue++) {
1421 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
1422 snprintf(xstats_names[cnt_used_entries].name,
1423 sizeof(xstats_names[0].name),
1425 id_queue, rte_rxq_stats_strings[idx].name);
1430 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1431 for (id_queue = 0; id_queue < num_q; id_queue++) {
1432 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
1433 snprintf(xstats_names[cnt_used_entries].name,
1434 sizeof(xstats_names[0].name),
1436 id_queue, rte_txq_stats_strings[idx].name);
1441 if (dev->dev_ops->xstats_get_names != NULL) {
1442 /* If there are any driver-specific xstats, append them
1445 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
1447 xstats_names + cnt_used_entries,
1448 size - cnt_used_entries);
1449 if (cnt_driver_entries < 0)
1450 return cnt_driver_entries;
1451 cnt_used_entries += cnt_driver_entries;
1454 return cnt_used_entries;
1457 /* retrieve ethdev extended statistics */
1459 rte_eth_xstats_get(uint8_t port_id, struct rte_eth_xstat *xstats,
1462 struct rte_eth_stats eth_stats;
1463 struct rte_eth_dev *dev;
1464 unsigned count = 0, i, q;
1466 uint64_t val, *stats_ptr;
1467 uint16_t nb_rxqs, nb_txqs;
1469 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1471 dev = &rte_eth_devices[port_id];
1473 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1474 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1476 /* Return generic statistics */
1477 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
1478 (nb_txqs * RTE_NB_TXQ_STATS);
1480 /* implemented by the driver */
1481 if (dev->dev_ops->xstats_get != NULL) {
1482 /* Retrieve the xstats from the driver at the end of the
1485 xcount = (*dev->dev_ops->xstats_get)(dev,
1486 xstats ? xstats + count : NULL,
1487 (n > count) ? n - count : 0);
1493 if (n < count + xcount || xstats == NULL)
1494 return count + xcount;
1496 /* now fill the xstats structure */
1498 rte_eth_stats_get(port_id, ð_stats);
1501 for (i = 0; i < RTE_NB_STATS; i++) {
1502 stats_ptr = RTE_PTR_ADD(ð_stats,
1503 rte_stats_strings[i].offset);
1505 xstats[count++].value = val;
1509 for (q = 0; q < nb_rxqs; q++) {
1510 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
1511 stats_ptr = RTE_PTR_ADD(ð_stats,
1512 rte_rxq_stats_strings[i].offset +
1513 q * sizeof(uint64_t));
1515 xstats[count++].value = val;
1520 for (q = 0; q < nb_txqs; q++) {
1521 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
1522 stats_ptr = RTE_PTR_ADD(ð_stats,
1523 rte_txq_stats_strings[i].offset +
1524 q * sizeof(uint64_t));
1526 xstats[count++].value = val;
1530 for (i = 0; i < count; i++)
1532 /* add an offset to driver-specific stats */
1533 for ( ; i < count + xcount; i++)
1534 xstats[i].id += count;
1536 return count + xcount;
1539 /* reset ethdev extended statistics */
1541 rte_eth_xstats_reset(uint8_t port_id)
1543 struct rte_eth_dev *dev;
1545 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1546 dev = &rte_eth_devices[port_id];
1548 /* implemented by the driver */
1549 if (dev->dev_ops->xstats_reset != NULL) {
1550 (*dev->dev_ops->xstats_reset)(dev);
1554 /* fallback to default */
1555 rte_eth_stats_reset(port_id);
1559 set_queue_stats_mapping(uint8_t port_id, uint16_t queue_id, uint8_t stat_idx,
1562 struct rte_eth_dev *dev;
1564 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1566 dev = &rte_eth_devices[port_id];
1568 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
1569 return (*dev->dev_ops->queue_stats_mapping_set)
1570 (dev, queue_id, stat_idx, is_rx);
1575 rte_eth_dev_set_tx_queue_stats_mapping(uint8_t port_id, uint16_t tx_queue_id,
1578 return set_queue_stats_mapping(port_id, tx_queue_id, stat_idx,
1584 rte_eth_dev_set_rx_queue_stats_mapping(uint8_t port_id, uint16_t rx_queue_id,
1587 return set_queue_stats_mapping(port_id, rx_queue_id, stat_idx,
1592 rte_eth_dev_info_get(uint8_t port_id, struct rte_eth_dev_info *dev_info)
1594 struct rte_eth_dev *dev;
1595 const struct rte_eth_desc_lim lim = {
1596 .nb_max = UINT16_MAX,
1601 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1602 dev = &rte_eth_devices[port_id];
1604 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
1605 dev_info->rx_desc_lim = lim;
1606 dev_info->tx_desc_lim = lim;
1608 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_infos_get);
1609 (*dev->dev_ops->dev_infos_get)(dev, dev_info);
1610 dev_info->driver_name = dev->data->drv_name;
1611 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
1612 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
1616 rte_eth_dev_get_supported_ptypes(uint8_t port_id, uint32_t ptype_mask,
1617 uint32_t *ptypes, int num)
1620 struct rte_eth_dev *dev;
1621 const uint32_t *all_ptypes;
1623 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1624 dev = &rte_eth_devices[port_id];
1625 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
1626 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
1631 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
1632 if (all_ptypes[i] & ptype_mask) {
1634 ptypes[j] = all_ptypes[i];
1642 rte_eth_macaddr_get(uint8_t port_id, struct ether_addr *mac_addr)
1644 struct rte_eth_dev *dev;
1646 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1647 dev = &rte_eth_devices[port_id];
1648 ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
1653 rte_eth_dev_get_mtu(uint8_t port_id, uint16_t *mtu)
1655 struct rte_eth_dev *dev;
1657 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1659 dev = &rte_eth_devices[port_id];
1660 *mtu = dev->data->mtu;
1665 rte_eth_dev_set_mtu(uint8_t port_id, uint16_t mtu)
1668 struct rte_eth_dev *dev;
1670 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1671 dev = &rte_eth_devices[port_id];
1672 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
1674 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
1676 dev->data->mtu = mtu;
1682 rte_eth_dev_vlan_filter(uint8_t port_id, uint16_t vlan_id, int on)
1684 struct rte_eth_dev *dev;
1686 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1687 dev = &rte_eth_devices[port_id];
1688 if (!(dev->data->dev_conf.rxmode.hw_vlan_filter)) {
1689 RTE_PMD_DEBUG_TRACE("port %d: vlan-filtering disabled\n", port_id);
1693 if (vlan_id > 4095) {
1694 RTE_PMD_DEBUG_TRACE("(port_id=%d) invalid vlan_id=%u > 4095\n",
1695 port_id, (unsigned) vlan_id);
1698 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
1700 return (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
1704 rte_eth_dev_set_vlan_strip_on_queue(uint8_t port_id, uint16_t rx_queue_id, int on)
1706 struct rte_eth_dev *dev;
1708 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1709 dev = &rte_eth_devices[port_id];
1710 if (rx_queue_id >= dev->data->nb_rx_queues) {
1711 RTE_PMD_DEBUG_TRACE("Invalid rx_queue_id=%d\n", port_id);
1715 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
1716 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
1722 rte_eth_dev_set_vlan_ether_type(uint8_t port_id,
1723 enum rte_vlan_type vlan_type,
1726 struct rte_eth_dev *dev;
1728 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1729 dev = &rte_eth_devices[port_id];
1730 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
1732 return (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type, tpid);
1736 rte_eth_dev_set_vlan_offload(uint8_t port_id, int offload_mask)
1738 struct rte_eth_dev *dev;
1743 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1744 dev = &rte_eth_devices[port_id];
1746 /*check which option changed by application*/
1747 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
1748 org = !!(dev->data->dev_conf.rxmode.hw_vlan_strip);
1750 dev->data->dev_conf.rxmode.hw_vlan_strip = (uint8_t)cur;
1751 mask |= ETH_VLAN_STRIP_MASK;
1754 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
1755 org = !!(dev->data->dev_conf.rxmode.hw_vlan_filter);
1757 dev->data->dev_conf.rxmode.hw_vlan_filter = (uint8_t)cur;
1758 mask |= ETH_VLAN_FILTER_MASK;
1761 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
1762 org = !!(dev->data->dev_conf.rxmode.hw_vlan_extend);
1764 dev->data->dev_conf.rxmode.hw_vlan_extend = (uint8_t)cur;
1765 mask |= ETH_VLAN_EXTEND_MASK;
1772 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
1773 (*dev->dev_ops->vlan_offload_set)(dev, mask);
1779 rte_eth_dev_get_vlan_offload(uint8_t port_id)
1781 struct rte_eth_dev *dev;
1784 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1785 dev = &rte_eth_devices[port_id];
1787 if (dev->data->dev_conf.rxmode.hw_vlan_strip)
1788 ret |= ETH_VLAN_STRIP_OFFLOAD;
1790 if (dev->data->dev_conf.rxmode.hw_vlan_filter)
1791 ret |= ETH_VLAN_FILTER_OFFLOAD;
1793 if (dev->data->dev_conf.rxmode.hw_vlan_extend)
1794 ret |= ETH_VLAN_EXTEND_OFFLOAD;
1800 rte_eth_dev_set_vlan_pvid(uint8_t port_id, uint16_t pvid, int on)
1802 struct rte_eth_dev *dev;
1804 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1805 dev = &rte_eth_devices[port_id];
1806 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
1807 (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on);
1813 rte_eth_dev_flow_ctrl_get(uint8_t port_id, struct rte_eth_fc_conf *fc_conf)
1815 struct rte_eth_dev *dev;
1817 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1818 dev = &rte_eth_devices[port_id];
1819 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
1820 memset(fc_conf, 0, sizeof(*fc_conf));
1821 return (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf);
1825 rte_eth_dev_flow_ctrl_set(uint8_t port_id, struct rte_eth_fc_conf *fc_conf)
1827 struct rte_eth_dev *dev;
1829 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1830 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
1831 RTE_PMD_DEBUG_TRACE("Invalid send_xon, only 0/1 allowed\n");
1835 dev = &rte_eth_devices[port_id];
1836 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
1837 return (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf);
1841 rte_eth_dev_priority_flow_ctrl_set(uint8_t port_id, struct rte_eth_pfc_conf *pfc_conf)
1843 struct rte_eth_dev *dev;
1845 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1846 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
1847 RTE_PMD_DEBUG_TRACE("Invalid priority, only 0-7 allowed\n");
1851 dev = &rte_eth_devices[port_id];
1852 /* High water, low water validation are device specific */
1853 if (*dev->dev_ops->priority_flow_ctrl_set)
1854 return (*dev->dev_ops->priority_flow_ctrl_set)(dev, pfc_conf);
1859 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
1867 if (reta_size != RTE_ALIGN(reta_size, RTE_RETA_GROUP_SIZE)) {
1868 RTE_PMD_DEBUG_TRACE("Invalid reta size, should be %u aligned\n",
1869 RTE_RETA_GROUP_SIZE);
1873 num = reta_size / RTE_RETA_GROUP_SIZE;
1874 for (i = 0; i < num; i++) {
1875 if (reta_conf[i].mask)
1883 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
1887 uint16_t i, idx, shift;
1893 RTE_PMD_DEBUG_TRACE("No receive queue is available\n");
1897 for (i = 0; i < reta_size; i++) {
1898 idx = i / RTE_RETA_GROUP_SIZE;
1899 shift = i % RTE_RETA_GROUP_SIZE;
1900 if ((reta_conf[idx].mask & (1ULL << shift)) &&
1901 (reta_conf[idx].reta[shift] >= max_rxq)) {
1902 RTE_PMD_DEBUG_TRACE("reta_conf[%u]->reta[%u]: %u exceeds "
1903 "the maximum rxq index: %u\n", idx, shift,
1904 reta_conf[idx].reta[shift], max_rxq);
1913 rte_eth_dev_rss_reta_update(uint8_t port_id,
1914 struct rte_eth_rss_reta_entry64 *reta_conf,
1917 struct rte_eth_dev *dev;
1920 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1921 /* Check mask bits */
1922 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
1926 dev = &rte_eth_devices[port_id];
1928 /* Check entry value */
1929 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
1930 dev->data->nb_rx_queues);
1934 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
1935 return (*dev->dev_ops->reta_update)(dev, reta_conf, reta_size);
1939 rte_eth_dev_rss_reta_query(uint8_t port_id,
1940 struct rte_eth_rss_reta_entry64 *reta_conf,
1943 struct rte_eth_dev *dev;
1946 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1948 /* Check mask bits */
1949 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
1953 dev = &rte_eth_devices[port_id];
1954 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
1955 return (*dev->dev_ops->reta_query)(dev, reta_conf, reta_size);
1959 rte_eth_dev_rss_hash_update(uint8_t port_id, struct rte_eth_rss_conf *rss_conf)
1961 struct rte_eth_dev *dev;
1962 uint16_t rss_hash_protos;
1964 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1965 rss_hash_protos = rss_conf->rss_hf;
1966 if ((rss_hash_protos != 0) &&
1967 ((rss_hash_protos & ETH_RSS_PROTO_MASK) == 0)) {
1968 RTE_PMD_DEBUG_TRACE("Invalid rss_hash_protos=0x%x\n",
1972 dev = &rte_eth_devices[port_id];
1973 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
1974 return (*dev->dev_ops->rss_hash_update)(dev, rss_conf);
1978 rte_eth_dev_rss_hash_conf_get(uint8_t port_id,
1979 struct rte_eth_rss_conf *rss_conf)
1981 struct rte_eth_dev *dev;
1983 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1984 dev = &rte_eth_devices[port_id];
1985 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
1986 return (*dev->dev_ops->rss_hash_conf_get)(dev, rss_conf);
1990 rte_eth_dev_udp_tunnel_port_add(uint8_t port_id,
1991 struct rte_eth_udp_tunnel *udp_tunnel)
1993 struct rte_eth_dev *dev;
1995 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1996 if (udp_tunnel == NULL) {
1997 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2001 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2002 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2006 dev = &rte_eth_devices[port_id];
2007 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
2008 return (*dev->dev_ops->udp_tunnel_port_add)(dev, udp_tunnel);
2012 rte_eth_dev_udp_tunnel_port_delete(uint8_t port_id,
2013 struct rte_eth_udp_tunnel *udp_tunnel)
2015 struct rte_eth_dev *dev;
2017 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2018 dev = &rte_eth_devices[port_id];
2020 if (udp_tunnel == NULL) {
2021 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2025 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2026 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2030 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
2031 return (*dev->dev_ops->udp_tunnel_port_del)(dev, udp_tunnel);
2035 rte_eth_led_on(uint8_t port_id)
2037 struct rte_eth_dev *dev;
2039 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2040 dev = &rte_eth_devices[port_id];
2041 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
2042 return (*dev->dev_ops->dev_led_on)(dev);
2046 rte_eth_led_off(uint8_t port_id)
2048 struct rte_eth_dev *dev;
2050 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2051 dev = &rte_eth_devices[port_id];
2052 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
2053 return (*dev->dev_ops->dev_led_off)(dev);
2057 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2061 get_mac_addr_index(uint8_t port_id, const struct ether_addr *addr)
2063 struct rte_eth_dev_info dev_info;
2064 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2067 rte_eth_dev_info_get(port_id, &dev_info);
2069 for (i = 0; i < dev_info.max_mac_addrs; i++)
2070 if (memcmp(addr, &dev->data->mac_addrs[i], ETHER_ADDR_LEN) == 0)
2076 static const struct ether_addr null_mac_addr;
2079 rte_eth_dev_mac_addr_add(uint8_t port_id, struct ether_addr *addr,
2082 struct rte_eth_dev *dev;
2086 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2087 dev = &rte_eth_devices[port_id];
2088 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
2090 if (is_zero_ether_addr(addr)) {
2091 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
2095 if (pool >= ETH_64_POOLS) {
2096 RTE_PMD_DEBUG_TRACE("pool id must be 0-%d\n", ETH_64_POOLS - 1);
2100 index = get_mac_addr_index(port_id, addr);
2102 index = get_mac_addr_index(port_id, &null_mac_addr);
2104 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
2109 pool_mask = dev->data->mac_pool_sel[index];
2111 /* Check if both MAC address and pool is already there, and do nothing */
2112 if (pool_mask & (1ULL << pool))
2117 (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
2119 /* Update address in NIC data structure */
2120 ether_addr_copy(addr, &dev->data->mac_addrs[index]);
2122 /* Update pool bitmap in NIC data structure */
2123 dev->data->mac_pool_sel[index] |= (1ULL << pool);
2129 rte_eth_dev_mac_addr_remove(uint8_t port_id, struct ether_addr *addr)
2131 struct rte_eth_dev *dev;
2134 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2135 dev = &rte_eth_devices[port_id];
2136 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
2138 index = get_mac_addr_index(port_id, addr);
2140 RTE_PMD_DEBUG_TRACE("port %d: Cannot remove default MAC address\n", port_id);
2142 } else if (index < 0)
2143 return 0; /* Do nothing if address wasn't found */
2146 (*dev->dev_ops->mac_addr_remove)(dev, index);
2148 /* Update address in NIC data structure */
2149 ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
2151 /* reset pool bitmap */
2152 dev->data->mac_pool_sel[index] = 0;
2158 rte_eth_dev_default_mac_addr_set(uint8_t port_id, struct ether_addr *addr)
2160 struct rte_eth_dev *dev;
2162 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2164 if (!is_valid_assigned_ether_addr(addr))
2167 dev = &rte_eth_devices[port_id];
2168 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
2170 /* Update default address in NIC data structure */
2171 ether_addr_copy(addr, &dev->data->mac_addrs[0]);
2173 (*dev->dev_ops->mac_addr_set)(dev, addr);
2179 rte_eth_dev_set_vf_rxmode(uint8_t port_id, uint16_t vf,
2180 uint16_t rx_mode, uint8_t on)
2183 struct rte_eth_dev *dev;
2184 struct rte_eth_dev_info dev_info;
2186 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2188 dev = &rte_eth_devices[port_id];
2189 rte_eth_dev_info_get(port_id, &dev_info);
2191 num_vfs = dev_info.max_vfs;
2193 RTE_PMD_DEBUG_TRACE("set VF RX mode:invalid VF id %d\n", vf);
2198 RTE_PMD_DEBUG_TRACE("set VF RX mode:mode mask ca not be zero\n");
2201 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_vf_rx_mode, -ENOTSUP);
2202 return (*dev->dev_ops->set_vf_rx_mode)(dev, vf, rx_mode, on);
2206 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2210 get_hash_mac_addr_index(uint8_t port_id, const struct ether_addr *addr)
2212 struct rte_eth_dev_info dev_info;
2213 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2216 rte_eth_dev_info_get(port_id, &dev_info);
2217 if (!dev->data->hash_mac_addrs)
2220 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
2221 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
2222 ETHER_ADDR_LEN) == 0)
2229 rte_eth_dev_uc_hash_table_set(uint8_t port_id, struct ether_addr *addr,
2234 struct rte_eth_dev *dev;
2236 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2238 dev = &rte_eth_devices[port_id];
2239 if (is_zero_ether_addr(addr)) {
2240 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
2245 index = get_hash_mac_addr_index(port_id, addr);
2246 /* Check if it's already there, and do nothing */
2247 if ((index >= 0) && (on))
2252 RTE_PMD_DEBUG_TRACE("port %d: the MAC address was not "
2253 "set in UTA\n", port_id);
2257 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
2259 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
2265 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
2266 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
2268 /* Update address in NIC data structure */
2270 ether_addr_copy(addr,
2271 &dev->data->hash_mac_addrs[index]);
2273 ether_addr_copy(&null_mac_addr,
2274 &dev->data->hash_mac_addrs[index]);
2281 rte_eth_dev_uc_all_hash_table_set(uint8_t port_id, uint8_t on)
2283 struct rte_eth_dev *dev;
2285 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2287 dev = &rte_eth_devices[port_id];
2289 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
2290 return (*dev->dev_ops->uc_all_hash_table_set)(dev, on);
2294 rte_eth_dev_set_vf_rx(uint8_t port_id, uint16_t vf, uint8_t on)
2297 struct rte_eth_dev *dev;
2298 struct rte_eth_dev_info dev_info;
2300 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2302 dev = &rte_eth_devices[port_id];
2303 rte_eth_dev_info_get(port_id, &dev_info);
2305 num_vfs = dev_info.max_vfs;
2307 RTE_PMD_DEBUG_TRACE("port %d: invalid vf id\n", port_id);
2311 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_vf_rx, -ENOTSUP);
2312 return (*dev->dev_ops->set_vf_rx)(dev, vf, on);
2316 rte_eth_dev_set_vf_tx(uint8_t port_id, uint16_t vf, uint8_t on)
2319 struct rte_eth_dev *dev;
2320 struct rte_eth_dev_info dev_info;
2322 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2324 dev = &rte_eth_devices[port_id];
2325 rte_eth_dev_info_get(port_id, &dev_info);
2327 num_vfs = dev_info.max_vfs;
2329 RTE_PMD_DEBUG_TRACE("set pool tx:invalid pool id=%d\n", vf);
2333 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_vf_tx, -ENOTSUP);
2334 return (*dev->dev_ops->set_vf_tx)(dev, vf, on);
2338 rte_eth_dev_set_vf_vlan_filter(uint8_t port_id, uint16_t vlan_id,
2339 uint64_t vf_mask, uint8_t vlan_on)
2341 struct rte_eth_dev *dev;
2343 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2345 dev = &rte_eth_devices[port_id];
2347 if (vlan_id > ETHER_MAX_VLAN_ID) {
2348 RTE_PMD_DEBUG_TRACE("VF VLAN filter:invalid VLAN id=%d\n",
2354 RTE_PMD_DEBUG_TRACE("VF VLAN filter:pool_mask can not be 0\n");
2358 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_vf_vlan_filter, -ENOTSUP);
2359 return (*dev->dev_ops->set_vf_vlan_filter)(dev, vlan_id,
2363 int rte_eth_set_queue_rate_limit(uint8_t port_id, uint16_t queue_idx,
2366 struct rte_eth_dev *dev;
2367 struct rte_eth_dev_info dev_info;
2368 struct rte_eth_link link;
2370 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2372 dev = &rte_eth_devices[port_id];
2373 rte_eth_dev_info_get(port_id, &dev_info);
2374 link = dev->data->dev_link;
2376 if (queue_idx > dev_info.max_tx_queues) {
2377 RTE_PMD_DEBUG_TRACE("set queue rate limit:port %d: "
2378 "invalid queue id=%d\n", port_id, queue_idx);
2382 if (tx_rate > link.link_speed) {
2383 RTE_PMD_DEBUG_TRACE("set queue rate limit:invalid tx_rate=%d, "
2384 "bigger than link speed= %d\n",
2385 tx_rate, link.link_speed);
2389 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
2390 return (*dev->dev_ops->set_queue_rate_limit)(dev, queue_idx, tx_rate);
2393 int rte_eth_set_vf_rate_limit(uint8_t port_id, uint16_t vf, uint16_t tx_rate,
2396 struct rte_eth_dev *dev;
2397 struct rte_eth_dev_info dev_info;
2398 struct rte_eth_link link;
2403 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2405 dev = &rte_eth_devices[port_id];
2406 rte_eth_dev_info_get(port_id, &dev_info);
2407 link = dev->data->dev_link;
2409 if (vf > dev_info.max_vfs) {
2410 RTE_PMD_DEBUG_TRACE("set VF rate limit:port %d: "
2411 "invalid vf id=%d\n", port_id, vf);
2415 if (tx_rate > link.link_speed) {
2416 RTE_PMD_DEBUG_TRACE("set VF rate limit:invalid tx_rate=%d, "
2417 "bigger than link speed= %d\n",
2418 tx_rate, link.link_speed);
2422 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_vf_rate_limit, -ENOTSUP);
2423 return (*dev->dev_ops->set_vf_rate_limit)(dev, vf, tx_rate, q_msk);
2427 rte_eth_mirror_rule_set(uint8_t port_id,
2428 struct rte_eth_mirror_conf *mirror_conf,
2429 uint8_t rule_id, uint8_t on)
2431 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2433 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2434 if (mirror_conf->rule_type == 0) {
2435 RTE_PMD_DEBUG_TRACE("mirror rule type can not be 0.\n");
2439 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
2440 RTE_PMD_DEBUG_TRACE("Invalid dst pool, pool id must be 0-%d\n",
2445 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
2446 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
2447 (mirror_conf->pool_mask == 0)) {
2448 RTE_PMD_DEBUG_TRACE("Invalid mirror pool, pool mask can not be 0.\n");
2452 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
2453 mirror_conf->vlan.vlan_mask == 0) {
2454 RTE_PMD_DEBUG_TRACE("Invalid vlan mask, vlan mask can not be 0.\n");
2458 dev = &rte_eth_devices[port_id];
2459 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
2461 return (*dev->dev_ops->mirror_rule_set)(dev, mirror_conf, rule_id, on);
2465 rte_eth_mirror_rule_reset(uint8_t port_id, uint8_t rule_id)
2467 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2469 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2471 dev = &rte_eth_devices[port_id];
2472 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
2474 return (*dev->dev_ops->mirror_rule_reset)(dev, rule_id);
2478 rte_eth_dev_callback_register(uint8_t port_id,
2479 enum rte_eth_event_type event,
2480 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
2482 struct rte_eth_dev *dev;
2483 struct rte_eth_dev_callback *user_cb;
2488 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2490 dev = &rte_eth_devices[port_id];
2491 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2493 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
2494 if (user_cb->cb_fn == cb_fn &&
2495 user_cb->cb_arg == cb_arg &&
2496 user_cb->event == event) {
2501 /* create a new callback. */
2502 if (user_cb == NULL) {
2503 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
2504 sizeof(struct rte_eth_dev_callback), 0);
2505 if (user_cb != NULL) {
2506 user_cb->cb_fn = cb_fn;
2507 user_cb->cb_arg = cb_arg;
2508 user_cb->event = event;
2509 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs), user_cb, next);
2513 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2514 return (user_cb == NULL) ? -ENOMEM : 0;
2518 rte_eth_dev_callback_unregister(uint8_t port_id,
2519 enum rte_eth_event_type event,
2520 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
2523 struct rte_eth_dev *dev;
2524 struct rte_eth_dev_callback *cb, *next;
2529 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2531 dev = &rte_eth_devices[port_id];
2532 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2535 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL; cb = next) {
2537 next = TAILQ_NEXT(cb, next);
2539 if (cb->cb_fn != cb_fn || cb->event != event ||
2540 (cb->cb_arg != (void *)-1 &&
2541 cb->cb_arg != cb_arg))
2545 * if this callback is not executing right now,
2548 if (cb->active == 0) {
2549 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
2556 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2561 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
2562 enum rte_eth_event_type event, void *cb_arg)
2564 struct rte_eth_dev_callback *cb_lst;
2565 struct rte_eth_dev_callback dev_cb;
2567 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2568 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
2569 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
2574 dev_cb.cb_arg = (void *) cb_arg;
2576 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2577 dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
2579 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2582 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2586 rte_eth_dev_rx_intr_ctl(uint8_t port_id, int epfd, int op, void *data)
2589 struct rte_eth_dev *dev;
2590 struct rte_intr_handle *intr_handle;
2594 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2596 dev = &rte_eth_devices[port_id];
2598 if (!dev->intr_handle) {
2599 RTE_PMD_DEBUG_TRACE("RX Intr handle unset\n");
2603 intr_handle = dev->intr_handle;
2604 if (!intr_handle->intr_vec) {
2605 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
2609 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
2610 vec = intr_handle->intr_vec[qid];
2611 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
2612 if (rc && rc != -EEXIST) {
2613 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
2614 " op %d epfd %d vec %u\n",
2615 port_id, qid, op, epfd, vec);
2622 const struct rte_memzone *
2623 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
2624 uint16_t queue_id, size_t size, unsigned align,
2627 char z_name[RTE_MEMZONE_NAMESIZE];
2628 const struct rte_memzone *mz;
2630 snprintf(z_name, sizeof(z_name), "%s_%s_%d_%d",
2631 dev->data->drv_name, ring_name,
2632 dev->data->port_id, queue_id);
2634 mz = rte_memzone_lookup(z_name);
2638 if (rte_xen_dom0_supported())
2639 return rte_memzone_reserve_bounded(z_name, size, socket_id,
2640 0, align, RTE_PGSIZE_2M);
2642 return rte_memzone_reserve_aligned(z_name, size, socket_id,
2647 rte_eth_dev_rx_intr_ctl_q(uint8_t port_id, uint16_t queue_id,
2648 int epfd, int op, void *data)
2651 struct rte_eth_dev *dev;
2652 struct rte_intr_handle *intr_handle;
2655 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2657 dev = &rte_eth_devices[port_id];
2658 if (queue_id >= dev->data->nb_rx_queues) {
2659 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%u\n", queue_id);
2663 if (!dev->intr_handle) {
2664 RTE_PMD_DEBUG_TRACE("RX Intr handle unset\n");
2668 intr_handle = dev->intr_handle;
2669 if (!intr_handle->intr_vec) {
2670 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
2674 vec = intr_handle->intr_vec[queue_id];
2675 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
2676 if (rc && rc != -EEXIST) {
2677 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
2678 " op %d epfd %d vec %u\n",
2679 port_id, queue_id, op, epfd, vec);
2687 rte_eth_dev_rx_intr_enable(uint8_t port_id,
2690 struct rte_eth_dev *dev;
2692 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2694 dev = &rte_eth_devices[port_id];
2696 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
2697 return (*dev->dev_ops->rx_queue_intr_enable)(dev, queue_id);
2701 rte_eth_dev_rx_intr_disable(uint8_t port_id,
2704 struct rte_eth_dev *dev;
2706 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2708 dev = &rte_eth_devices[port_id];
2710 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
2711 return (*dev->dev_ops->rx_queue_intr_disable)(dev, queue_id);
2714 #ifdef RTE_NIC_BYPASS
2715 int rte_eth_dev_bypass_init(uint8_t port_id)
2717 struct rte_eth_dev *dev;
2719 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2721 dev = &rte_eth_devices[port_id];
2722 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_init, -ENOTSUP);
2723 (*dev->dev_ops->bypass_init)(dev);
2728 rte_eth_dev_bypass_state_show(uint8_t port_id, uint32_t *state)
2730 struct rte_eth_dev *dev;
2732 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2734 dev = &rte_eth_devices[port_id];
2735 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_state_show, -ENOTSUP);
2736 (*dev->dev_ops->bypass_state_show)(dev, state);
2741 rte_eth_dev_bypass_state_set(uint8_t port_id, uint32_t *new_state)
2743 struct rte_eth_dev *dev;
2745 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2747 dev = &rte_eth_devices[port_id];
2748 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_state_set, -ENOTSUP);
2749 (*dev->dev_ops->bypass_state_set)(dev, new_state);
2754 rte_eth_dev_bypass_event_show(uint8_t port_id, uint32_t event, uint32_t *state)
2756 struct rte_eth_dev *dev;
2758 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2760 dev = &rte_eth_devices[port_id];
2761 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_state_show, -ENOTSUP);
2762 (*dev->dev_ops->bypass_event_show)(dev, event, state);
2767 rte_eth_dev_bypass_event_store(uint8_t port_id, uint32_t event, uint32_t state)
2769 struct rte_eth_dev *dev;
2771 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2773 dev = &rte_eth_devices[port_id];
2775 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_event_set, -ENOTSUP);
2776 (*dev->dev_ops->bypass_event_set)(dev, event, state);
2781 rte_eth_dev_wd_timeout_store(uint8_t port_id, uint32_t timeout)
2783 struct rte_eth_dev *dev;
2785 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2787 dev = &rte_eth_devices[port_id];
2789 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_wd_timeout_set, -ENOTSUP);
2790 (*dev->dev_ops->bypass_wd_timeout_set)(dev, timeout);
2795 rte_eth_dev_bypass_ver_show(uint8_t port_id, uint32_t *ver)
2797 struct rte_eth_dev *dev;
2799 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2801 dev = &rte_eth_devices[port_id];
2803 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_ver_show, -ENOTSUP);
2804 (*dev->dev_ops->bypass_ver_show)(dev, ver);
2809 rte_eth_dev_bypass_wd_timeout_show(uint8_t port_id, uint32_t *wd_timeout)
2811 struct rte_eth_dev *dev;
2813 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2815 dev = &rte_eth_devices[port_id];
2817 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_wd_timeout_show, -ENOTSUP);
2818 (*dev->dev_ops->bypass_wd_timeout_show)(dev, wd_timeout);
2823 rte_eth_dev_bypass_wd_reset(uint8_t port_id)
2825 struct rte_eth_dev *dev;
2827 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2829 dev = &rte_eth_devices[port_id];
2831 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_wd_reset, -ENOTSUP);
2832 (*dev->dev_ops->bypass_wd_reset)(dev);
2838 rte_eth_dev_filter_supported(uint8_t port_id, enum rte_filter_type filter_type)
2840 struct rte_eth_dev *dev;
2842 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2844 dev = &rte_eth_devices[port_id];
2845 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
2846 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
2847 RTE_ETH_FILTER_NOP, NULL);
2851 rte_eth_dev_filter_ctrl(uint8_t port_id, enum rte_filter_type filter_type,
2852 enum rte_filter_op filter_op, void *arg)
2854 struct rte_eth_dev *dev;
2856 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2858 dev = &rte_eth_devices[port_id];
2859 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
2860 return (*dev->dev_ops->filter_ctrl)(dev, filter_type, filter_op, arg);
2864 rte_eth_add_rx_callback(uint8_t port_id, uint16_t queue_id,
2865 rte_rx_callback_fn fn, void *user_param)
2867 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
2868 rte_errno = ENOTSUP;
2871 /* check input parameters */
2872 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
2873 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
2877 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
2885 cb->param = user_param;
2887 rte_spinlock_lock(&rte_eth_rx_cb_lock);
2888 /* Add the callbacks in fifo order. */
2889 struct rte_eth_rxtx_callback *tail =
2890 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
2893 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
2900 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
2906 rte_eth_add_first_rx_callback(uint8_t port_id, uint16_t queue_id,
2907 rte_rx_callback_fn fn, void *user_param)
2909 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
2910 rte_errno = ENOTSUP;
2913 /* check input parameters */
2914 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
2915 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
2920 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
2928 cb->param = user_param;
2930 rte_spinlock_lock(&rte_eth_rx_cb_lock);
2931 /* Add the callbacks at fisrt position*/
2932 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
2934 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
2935 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
2941 rte_eth_add_tx_callback(uint8_t port_id, uint16_t queue_id,
2942 rte_tx_callback_fn fn, void *user_param)
2944 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
2945 rte_errno = ENOTSUP;
2948 /* check input parameters */
2949 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
2950 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
2955 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
2963 cb->param = user_param;
2965 rte_spinlock_lock(&rte_eth_tx_cb_lock);
2966 /* Add the callbacks in fifo order. */
2967 struct rte_eth_rxtx_callback *tail =
2968 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
2971 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
2978 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
2984 rte_eth_remove_rx_callback(uint8_t port_id, uint16_t queue_id,
2985 struct rte_eth_rxtx_callback *user_cb)
2987 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
2990 /* Check input parameters. */
2991 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2992 if (user_cb == NULL ||
2993 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
2996 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2997 struct rte_eth_rxtx_callback *cb;
2998 struct rte_eth_rxtx_callback **prev_cb;
3001 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3002 prev_cb = &dev->post_rx_burst_cbs[queue_id];
3003 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3005 if (cb == user_cb) {
3006 /* Remove the user cb from the callback list. */
3007 *prev_cb = cb->next;
3012 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3018 rte_eth_remove_tx_callback(uint8_t port_id, uint16_t queue_id,
3019 struct rte_eth_rxtx_callback *user_cb)
3021 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3024 /* Check input parameters. */
3025 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3026 if (user_cb == NULL ||
3027 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
3030 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3032 struct rte_eth_rxtx_callback *cb;
3033 struct rte_eth_rxtx_callback **prev_cb;
3035 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3036 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
3037 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3039 if (cb == user_cb) {
3040 /* Remove the user cb from the callback list. */
3041 *prev_cb = cb->next;
3046 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3052 rte_eth_rx_queue_info_get(uint8_t port_id, uint16_t queue_id,
3053 struct rte_eth_rxq_info *qinfo)
3055 struct rte_eth_dev *dev;
3057 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3062 dev = &rte_eth_devices[port_id];
3063 if (queue_id >= dev->data->nb_rx_queues) {
3064 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", queue_id);
3068 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
3070 memset(qinfo, 0, sizeof(*qinfo));
3071 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
3076 rte_eth_tx_queue_info_get(uint8_t port_id, uint16_t queue_id,
3077 struct rte_eth_txq_info *qinfo)
3079 struct rte_eth_dev *dev;
3081 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3086 dev = &rte_eth_devices[port_id];
3087 if (queue_id >= dev->data->nb_tx_queues) {
3088 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", queue_id);
3092 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
3094 memset(qinfo, 0, sizeof(*qinfo));
3095 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
3100 rte_eth_dev_set_mc_addr_list(uint8_t port_id,
3101 struct ether_addr *mc_addr_set,
3102 uint32_t nb_mc_addr)
3104 struct rte_eth_dev *dev;
3106 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3108 dev = &rte_eth_devices[port_id];
3109 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
3110 return dev->dev_ops->set_mc_addr_list(dev, mc_addr_set, nb_mc_addr);
3114 rte_eth_timesync_enable(uint8_t port_id)
3116 struct rte_eth_dev *dev;
3118 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3119 dev = &rte_eth_devices[port_id];
3121 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
3122 return (*dev->dev_ops->timesync_enable)(dev);
3126 rte_eth_timesync_disable(uint8_t port_id)
3128 struct rte_eth_dev *dev;
3130 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3131 dev = &rte_eth_devices[port_id];
3133 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
3134 return (*dev->dev_ops->timesync_disable)(dev);
3138 rte_eth_timesync_read_rx_timestamp(uint8_t port_id, struct timespec *timestamp,
3141 struct rte_eth_dev *dev;
3143 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3144 dev = &rte_eth_devices[port_id];
3146 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
3147 return (*dev->dev_ops->timesync_read_rx_timestamp)(dev, timestamp, flags);
3151 rte_eth_timesync_read_tx_timestamp(uint8_t port_id, struct timespec *timestamp)
3153 struct rte_eth_dev *dev;
3155 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3156 dev = &rte_eth_devices[port_id];
3158 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
3159 return (*dev->dev_ops->timesync_read_tx_timestamp)(dev, timestamp);
3163 rte_eth_timesync_adjust_time(uint8_t port_id, int64_t delta)
3165 struct rte_eth_dev *dev;
3167 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3168 dev = &rte_eth_devices[port_id];
3170 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
3171 return (*dev->dev_ops->timesync_adjust_time)(dev, delta);
3175 rte_eth_timesync_read_time(uint8_t port_id, struct timespec *timestamp)
3177 struct rte_eth_dev *dev;
3179 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3180 dev = &rte_eth_devices[port_id];
3182 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
3183 return (*dev->dev_ops->timesync_read_time)(dev, timestamp);
3187 rte_eth_timesync_write_time(uint8_t port_id, const struct timespec *timestamp)
3189 struct rte_eth_dev *dev;
3191 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3192 dev = &rte_eth_devices[port_id];
3194 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
3195 return (*dev->dev_ops->timesync_write_time)(dev, timestamp);
3199 rte_eth_dev_get_reg_info(uint8_t port_id, struct rte_dev_reg_info *info)
3201 struct rte_eth_dev *dev;
3203 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3205 dev = &rte_eth_devices[port_id];
3206 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
3207 return (*dev->dev_ops->get_reg)(dev, info);
3211 rte_eth_dev_get_eeprom_length(uint8_t port_id)
3213 struct rte_eth_dev *dev;
3215 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3217 dev = &rte_eth_devices[port_id];
3218 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
3219 return (*dev->dev_ops->get_eeprom_length)(dev);
3223 rte_eth_dev_get_eeprom(uint8_t port_id, struct rte_dev_eeprom_info *info)
3225 struct rte_eth_dev *dev;
3227 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3229 dev = &rte_eth_devices[port_id];
3230 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
3231 return (*dev->dev_ops->get_eeprom)(dev, info);
3235 rte_eth_dev_set_eeprom(uint8_t port_id, struct rte_dev_eeprom_info *info)
3237 struct rte_eth_dev *dev;
3239 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3241 dev = &rte_eth_devices[port_id];
3242 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
3243 return (*dev->dev_ops->set_eeprom)(dev, info);
3247 rte_eth_dev_get_dcb_info(uint8_t port_id,
3248 struct rte_eth_dcb_info *dcb_info)
3250 struct rte_eth_dev *dev;
3252 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3254 dev = &rte_eth_devices[port_id];
3255 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
3257 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
3258 return (*dev->dev_ops->get_dcb_info)(dev, dcb_info);
3262 rte_eth_copy_pci_info(struct rte_eth_dev *eth_dev, struct rte_pci_device *pci_dev)
3264 if ((eth_dev == NULL) || (pci_dev == NULL)) {
3265 RTE_PMD_DEBUG_TRACE("NULL pointer eth_dev=%p pci_dev=%p\n",
3270 eth_dev->intr_handle = &pci_dev->intr_handle;
3272 eth_dev->data->dev_flags = 0;
3273 if (pci_dev->driver->drv_flags & RTE_PCI_DRV_INTR_LSC)
3274 eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_LSC;
3275 if (pci_dev->driver->drv_flags & RTE_PCI_DRV_DETACHABLE)
3276 eth_dev->data->dev_flags |= RTE_ETH_DEV_DETACHABLE;
3278 eth_dev->data->kdrv = pci_dev->kdrv;
3279 eth_dev->data->numa_node = pci_dev->device.numa_node;
3280 eth_dev->data->drv_name = pci_dev->driver->driver.name;
3284 rte_eth_dev_l2_tunnel_eth_type_conf(uint8_t port_id,
3285 struct rte_eth_l2_tunnel_conf *l2_tunnel)
3287 struct rte_eth_dev *dev;
3289 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3290 if (l2_tunnel == NULL) {
3291 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
3295 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
3296 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
3300 dev = &rte_eth_devices[port_id];
3301 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
3303 return (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev, l2_tunnel);
3307 rte_eth_dev_l2_tunnel_offload_set(uint8_t port_id,
3308 struct rte_eth_l2_tunnel_conf *l2_tunnel,
3312 struct rte_eth_dev *dev;
3314 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3316 if (l2_tunnel == NULL) {
3317 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
3321 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
3322 RTE_PMD_DEBUG_TRACE("Invalid tunnel type.\n");
3327 RTE_PMD_DEBUG_TRACE("Mask should have a value.\n");
3331 dev = &rte_eth_devices[port_id];
3332 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
3334 return (*dev->dev_ops->l2_tunnel_offload_set)(dev, l2_tunnel, mask, en);