mbuf: add accessors for data room and private size
[dpdk.git] / lib / librte_pmd_i40e / i40e_ethdev_vf.c
1 /*-
2  *   BSD LICENSE
3  *
4  *   Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
5  *   All rights reserved.
6  *
7  *   Redistribution and use in source and binary forms, with or without
8  *   modification, are permitted provided that the following conditions
9  *   are met:
10  *
11  *     * Redistributions of source code must retain the above copyright
12  *       notice, this list of conditions and the following disclaimer.
13  *     * Redistributions in binary form must reproduce the above copyright
14  *       notice, this list of conditions and the following disclaimer in
15  *       the documentation and/or other materials provided with the
16  *       distribution.
17  *     * Neither the name of Intel Corporation nor the names of its
18  *       contributors may be used to endorse or promote products derived
19  *       from this software without specific prior written permission.
20  *
21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32  */
33
34 #include <sys/queue.h>
35 #include <stdio.h>
36 #include <errno.h>
37 #include <stdint.h>
38 #include <string.h>
39 #include <unistd.h>
40 #include <stdarg.h>
41 #include <inttypes.h>
42 #include <rte_byteorder.h>
43 #include <rte_common.h>
44 #include <rte_cycles.h>
45
46 #include <rte_interrupts.h>
47 #include <rte_log.h>
48 #include <rte_debug.h>
49 #include <rte_pci.h>
50 #include <rte_atomic.h>
51 #include <rte_branch_prediction.h>
52 #include <rte_memory.h>
53 #include <rte_memzone.h>
54 #include <rte_eal.h>
55 #include <rte_alarm.h>
56 #include <rte_ether.h>
57 #include <rte_ethdev.h>
58 #include <rte_atomic.h>
59 #include <rte_malloc.h>
60 #include <rte_dev.h>
61
62 #include "i40e_logs.h"
63 #include "i40e/i40e_prototype.h"
64 #include "i40e/i40e_adminq_cmd.h"
65 #include "i40e/i40e_type.h"
66
67 #include "i40e_rxtx.h"
68 #include "i40e_ethdev.h"
69 #include "i40e_pf.h"
70 #define I40EVF_VSI_DEFAULT_MSIX_INTR 1
71
72 /* busy wait delay in msec */
73 #define I40EVF_BUSY_WAIT_DELAY 10
74 #define I40EVF_BUSY_WAIT_COUNT 50
75 #define MAX_RESET_WAIT_CNT     20
76
77 struct i40evf_arq_msg_info {
78         enum i40e_virtchnl_ops ops;
79         enum i40e_status_code result;
80         uint16_t buf_len;
81         uint16_t msg_len;
82         uint8_t *msg;
83 };
84
85 struct vf_cmd_info {
86         enum i40e_virtchnl_ops ops;
87         uint8_t *in_args;
88         uint32_t in_args_size;
89         uint8_t *out_buffer;
90         /* Input & output type. pass in buffer size and pass out
91          * actual return result
92          */
93         uint32_t out_size;
94 };
95
96 enum i40evf_aq_result {
97         I40EVF_MSG_ERR = -1, /* Meet error when accessing admin queue */
98         I40EVF_MSG_NON,      /* Read nothing from admin queue */
99         I40EVF_MSG_SYS,      /* Read system msg from admin queue */
100         I40EVF_MSG_CMD,      /* Read async command result */
101 };
102
103 /* A share buffer to store the command result from PF driver */
104 static uint8_t cmd_result_buffer[I40E_AQ_BUF_SZ];
105
106 static int i40evf_dev_configure(struct rte_eth_dev *dev);
107 static int i40evf_dev_start(struct rte_eth_dev *dev);
108 static void i40evf_dev_stop(struct rte_eth_dev *dev);
109 static void i40evf_dev_info_get(struct rte_eth_dev *dev,
110                                 struct rte_eth_dev_info *dev_info);
111 static int i40evf_dev_link_update(struct rte_eth_dev *dev,
112                                   __rte_unused int wait_to_complete);
113 static void i40evf_dev_stats_get(struct rte_eth_dev *dev,
114                                 struct rte_eth_stats *stats);
115 static int i40evf_vlan_filter_set(struct rte_eth_dev *dev,
116                                   uint16_t vlan_id, int on);
117 static void i40evf_vlan_offload_set(struct rte_eth_dev *dev, int mask);
118 static int i40evf_vlan_pvid_set(struct rte_eth_dev *dev, uint16_t pvid,
119                                 int on);
120 static void i40evf_dev_close(struct rte_eth_dev *dev);
121 static void i40evf_dev_promiscuous_enable(struct rte_eth_dev *dev);
122 static void i40evf_dev_promiscuous_disable(struct rte_eth_dev *dev);
123 static void i40evf_dev_allmulticast_enable(struct rte_eth_dev *dev);
124 static void i40evf_dev_allmulticast_disable(struct rte_eth_dev *dev);
125 static int i40evf_get_link_status(struct rte_eth_dev *dev,
126                                   struct rte_eth_link *link);
127 static int i40evf_init_vlan(struct rte_eth_dev *dev);
128 static int i40evf_dev_rx_queue_start(struct rte_eth_dev *dev,
129                                      uint16_t rx_queue_id);
130 static int i40evf_dev_rx_queue_stop(struct rte_eth_dev *dev,
131                                     uint16_t rx_queue_id);
132 static int i40evf_dev_tx_queue_start(struct rte_eth_dev *dev,
133                                      uint16_t tx_queue_id);
134 static int i40evf_dev_tx_queue_stop(struct rte_eth_dev *dev,
135                                     uint16_t tx_queue_id);
136 static int i40evf_dev_rss_reta_update(struct rte_eth_dev *dev,
137                         struct rte_eth_rss_reta_entry64 *reta_conf,
138                         uint16_t reta_size);
139 static int i40evf_dev_rss_reta_query(struct rte_eth_dev *dev,
140                         struct rte_eth_rss_reta_entry64 *reta_conf,
141                         uint16_t reta_size);
142 static int i40evf_config_rss(struct i40e_vf *vf);
143 static int i40evf_dev_rss_hash_update(struct rte_eth_dev *dev,
144                                       struct rte_eth_rss_conf *rss_conf);
145 static int i40evf_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
146                                         struct rte_eth_rss_conf *rss_conf);
147
148 /* Default hash key buffer for RSS */
149 static uint32_t rss_key_default[I40E_VFQF_HKEY_MAX_INDEX + 1];
150
151 static const struct eth_dev_ops i40evf_eth_dev_ops = {
152         .dev_configure        = i40evf_dev_configure,
153         .dev_start            = i40evf_dev_start,
154         .dev_stop             = i40evf_dev_stop,
155         .promiscuous_enable   = i40evf_dev_promiscuous_enable,
156         .promiscuous_disable  = i40evf_dev_promiscuous_disable,
157         .allmulticast_enable  = i40evf_dev_allmulticast_enable,
158         .allmulticast_disable = i40evf_dev_allmulticast_disable,
159         .link_update          = i40evf_dev_link_update,
160         .stats_get            = i40evf_dev_stats_get,
161         .dev_close            = i40evf_dev_close,
162         .dev_infos_get        = i40evf_dev_info_get,
163         .vlan_filter_set      = i40evf_vlan_filter_set,
164         .vlan_offload_set     = i40evf_vlan_offload_set,
165         .vlan_pvid_set        = i40evf_vlan_pvid_set,
166         .rx_queue_start       = i40evf_dev_rx_queue_start,
167         .rx_queue_stop        = i40evf_dev_rx_queue_stop,
168         .tx_queue_start       = i40evf_dev_tx_queue_start,
169         .tx_queue_stop        = i40evf_dev_tx_queue_stop,
170         .rx_queue_setup       = i40e_dev_rx_queue_setup,
171         .rx_queue_release     = i40e_dev_rx_queue_release,
172         .tx_queue_setup       = i40e_dev_tx_queue_setup,
173         .tx_queue_release     = i40e_dev_tx_queue_release,
174         .reta_update          = i40evf_dev_rss_reta_update,
175         .reta_query           = i40evf_dev_rss_reta_query,
176         .rss_hash_update      = i40evf_dev_rss_hash_update,
177         .rss_hash_conf_get    = i40evf_dev_rss_hash_conf_get,
178 };
179
180 static int
181 i40evf_set_mac_type(struct i40e_hw *hw)
182 {
183         int status = I40E_ERR_DEVICE_NOT_SUPPORTED;
184
185         if (hw->vendor_id == I40E_INTEL_VENDOR_ID) {
186                 switch (hw->device_id) {
187                 case I40E_DEV_ID_VF:
188                 case I40E_DEV_ID_VF_HV:
189                         hw->mac.type = I40E_MAC_VF;
190                         status = I40E_SUCCESS;
191                         break;
192                 default:
193                         ;
194                 }
195         }
196
197         return status;
198 }
199
200 /*
201  * Parse admin queue message.
202  *
203  * return value:
204  *  < 0: meet error
205  *  0: read sys msg
206  *  > 0: read cmd result
207  */
208 static enum i40evf_aq_result
209 i40evf_parse_pfmsg(struct i40e_vf *vf,
210                    struct i40e_arq_event_info *event,
211                    struct i40evf_arq_msg_info *data)
212 {
213         enum i40e_virtchnl_ops opcode = (enum i40e_virtchnl_ops)\
214                         rte_le_to_cpu_32(event->desc.cookie_high);
215         enum i40e_status_code retval = (enum i40e_status_code)\
216                         rte_le_to_cpu_32(event->desc.cookie_low);
217         enum i40evf_aq_result ret = I40EVF_MSG_CMD;
218
219         /* pf sys event */
220         if (opcode == I40E_VIRTCHNL_OP_EVENT) {
221                 struct i40e_virtchnl_pf_event *vpe =
222                         (struct i40e_virtchnl_pf_event *)event->msg_buf;
223
224                 /* Initialize ret to sys event */
225                 ret = I40EVF_MSG_SYS;
226                 switch (vpe->event) {
227                 case I40E_VIRTCHNL_EVENT_LINK_CHANGE:
228                         vf->link_up =
229                                 vpe->event_data.link_event.link_status;
230                         vf->pend_msg |= PFMSG_LINK_CHANGE;
231                         PMD_DRV_LOG(INFO, "Link status update:%s",
232                                     vf->link_up ? "up" : "down");
233                         break;
234                 case I40E_VIRTCHNL_EVENT_RESET_IMPENDING:
235                         vf->vf_reset = true;
236                         vf->pend_msg |= PFMSG_RESET_IMPENDING;
237                         PMD_DRV_LOG(INFO, "vf is reseting");
238                         break;
239                 case I40E_VIRTCHNL_EVENT_PF_DRIVER_CLOSE:
240                         vf->dev_closed = true;
241                         vf->pend_msg |= PFMSG_DRIVER_CLOSE;
242                         PMD_DRV_LOG(INFO, "PF driver closed");
243                         break;
244                 default:
245                         PMD_DRV_LOG(ERR, "%s: Unknown event %d from pf",
246                                     __func__, vpe->event);
247                 }
248         } else {
249                 /* async reply msg on command issued by vf previously */
250                 ret = I40EVF_MSG_CMD;
251                 /* Actual data length read from PF */
252                 data->msg_len = event->msg_len;
253         }
254         /* fill the ops and result to notify VF */
255         data->result = retval;
256         data->ops = opcode;
257
258         return ret;
259 }
260
261 /*
262  * Read data in admin queue to get msg from pf driver
263  */
264 static enum i40evf_aq_result
265 i40evf_read_pfmsg(struct rte_eth_dev *dev, struct i40evf_arq_msg_info *data)
266 {
267         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
268         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
269         struct i40e_arq_event_info event;
270         int ret;
271         enum i40evf_aq_result result = I40EVF_MSG_NON;
272
273         event.buf_len = data->buf_len;
274         event.msg_buf = data->msg;
275         ret = i40e_clean_arq_element(hw, &event, NULL);
276         /* Can't read any msg from adminQ */
277         if (ret) {
278                 if (ret == I40E_ERR_ADMIN_QUEUE_NO_WORK)
279                         result = I40EVF_MSG_NON;
280                 else
281                         result = I40EVF_MSG_ERR;
282                 return result;
283         }
284
285         /* Parse the event */
286         result = i40evf_parse_pfmsg(vf, &event, data);
287
288         return result;
289 }
290
291 /*
292  * Polling read until command result return from pf driver or meet error.
293  */
294 static int
295 i40evf_wait_cmd_done(struct rte_eth_dev *dev,
296                      struct i40evf_arq_msg_info *data)
297 {
298         int i = 0;
299         enum i40evf_aq_result ret;
300
301 #define MAX_TRY_TIMES 10
302 #define ASQ_DELAY_MS  50
303         do {
304                 /* Delay some time first */
305                 rte_delay_ms(ASQ_DELAY_MS);
306                 ret = i40evf_read_pfmsg(dev, data);
307                 if (ret == I40EVF_MSG_CMD)
308                         return 0;
309                 else if (ret == I40EVF_MSG_ERR)
310                         return -1;
311
312                 /* If don't read msg or read sys event, continue */
313         } while(i++ < MAX_TRY_TIMES);
314
315         return -1;
316 }
317
318 /**
319  * clear current command. Only call in case execute
320  * _atomic_set_cmd successfully.
321  */
322 static inline void
323 _clear_cmd(struct i40e_vf *vf)
324 {
325         rte_wmb();
326         vf->pend_cmd = I40E_VIRTCHNL_OP_UNKNOWN;
327 }
328
329 /*
330  * Check there is pending cmd in execution. If none, set new command.
331  */
332 static inline int
333 _atomic_set_cmd(struct i40e_vf *vf, enum i40e_virtchnl_ops ops)
334 {
335         int ret = rte_atomic32_cmpset(&vf->pend_cmd,
336                         I40E_VIRTCHNL_OP_UNKNOWN, ops);
337
338         if (!ret)
339                 PMD_DRV_LOG(ERR, "There is incomplete cmd %d", vf->pend_cmd);
340
341         return !ret;
342 }
343
344 static int
345 i40evf_execute_vf_cmd(struct rte_eth_dev *dev, struct vf_cmd_info *args)
346 {
347         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
348         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
349         int err = -1;
350         struct i40evf_arq_msg_info info;
351
352         if (_atomic_set_cmd(vf, args->ops))
353                 return -1;
354
355         info.msg = args->out_buffer;
356         info.buf_len = args->out_size;
357         info.ops = I40E_VIRTCHNL_OP_UNKNOWN;
358         info.result = I40E_SUCCESS;
359
360         err = i40e_aq_send_msg_to_pf(hw, args->ops, I40E_SUCCESS,
361                      args->in_args, args->in_args_size, NULL);
362         if (err) {
363                 PMD_DRV_LOG(ERR, "fail to send cmd %d", args->ops);
364                 return err;
365         }
366
367         err = i40evf_wait_cmd_done(dev, &info);
368         /* read message and it's expected one */
369         if (!err && args->ops == info.ops)
370                 _clear_cmd(vf);
371         else if (err)
372                 PMD_DRV_LOG(ERR, "Failed to read message from AdminQ");
373         else if (args->ops != info.ops)
374                 PMD_DRV_LOG(ERR, "command mismatch, expect %u, get %u",
375                             args->ops, info.ops);
376
377         return (err | info.result);
378 }
379
380 /*
381  * Check API version with sync wait until version read or fail from admin queue
382  */
383 static int
384 i40evf_check_api_version(struct rte_eth_dev *dev)
385 {
386         struct i40e_virtchnl_version_info version, *pver;
387         int err;
388         struct vf_cmd_info args;
389         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
390
391         version.major = I40E_VIRTCHNL_VERSION_MAJOR;
392         version.minor = I40E_VIRTCHNL_VERSION_MINOR;
393
394         args.ops = I40E_VIRTCHNL_OP_VERSION;
395         args.in_args = (uint8_t *)&version;
396         args.in_args_size = sizeof(version);
397         args.out_buffer = cmd_result_buffer;
398         args.out_size = I40E_AQ_BUF_SZ;
399
400         err = i40evf_execute_vf_cmd(dev, &args);
401         if (err) {
402                 PMD_INIT_LOG(ERR, "fail to execute command OP_VERSION");
403                 return err;
404         }
405
406         pver = (struct i40e_virtchnl_version_info *)args.out_buffer;
407         vf->version_major = pver->major;
408         vf->version_minor = pver->minor;
409         if (vf->version_major == I40E_DPDK_VERSION_MAJOR)
410                 PMD_DRV_LOG(INFO, "Peer is DPDK PF host");
411         else if ((vf->version_major == I40E_VIRTCHNL_VERSION_MAJOR) &&
412                 (vf->version_minor == I40E_VIRTCHNL_VERSION_MINOR))
413                 PMD_DRV_LOG(INFO, "Peer is Linux PF host");
414         else {
415                 PMD_INIT_LOG(ERR, "PF/VF API version mismatch:(%u.%u)-(%u.%u)",
416                                         vf->version_major, vf->version_minor,
417                                                 I40E_VIRTCHNL_VERSION_MAJOR,
418                                                 I40E_VIRTCHNL_VERSION_MINOR);
419                 return -1;
420         }
421
422         return 0;
423 }
424
425 static int
426 i40evf_get_vf_resource(struct rte_eth_dev *dev)
427 {
428         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
429         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
430         int err;
431         struct vf_cmd_info args;
432         uint32_t len;
433
434         args.ops = I40E_VIRTCHNL_OP_GET_VF_RESOURCES;
435         args.in_args = NULL;
436         args.in_args_size = 0;
437         args.out_buffer = cmd_result_buffer;
438         args.out_size = I40E_AQ_BUF_SZ;
439
440         err = i40evf_execute_vf_cmd(dev, &args);
441
442         if (err) {
443                 PMD_DRV_LOG(ERR, "fail to execute command OP_GET_VF_RESOURCE");
444                 return err;
445         }
446
447         len =  sizeof(struct i40e_virtchnl_vf_resource) +
448                 I40E_MAX_VF_VSI * sizeof(struct i40e_virtchnl_vsi_resource);
449
450         (void)rte_memcpy(vf->vf_res, args.out_buffer,
451                         RTE_MIN(args.out_size, len));
452         i40e_vf_parse_hw_config(hw, vf->vf_res);
453
454         return 0;
455 }
456
457 static int
458 i40evf_config_promisc(struct rte_eth_dev *dev,
459                       bool enable_unicast,
460                       bool enable_multicast)
461 {
462         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
463         int err;
464         struct vf_cmd_info args;
465         struct i40e_virtchnl_promisc_info promisc;
466
467         promisc.flags = 0;
468         promisc.vsi_id = vf->vsi_res->vsi_id;
469
470         if (enable_unicast)
471                 promisc.flags |= I40E_FLAG_VF_UNICAST_PROMISC;
472
473         if (enable_multicast)
474                 promisc.flags |= I40E_FLAG_VF_MULTICAST_PROMISC;
475
476         args.ops = I40E_VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE;
477         args.in_args = (uint8_t *)&promisc;
478         args.in_args_size = sizeof(promisc);
479         args.out_buffer = cmd_result_buffer;
480         args.out_size = I40E_AQ_BUF_SZ;
481
482         err = i40evf_execute_vf_cmd(dev, &args);
483
484         if (err)
485                 PMD_DRV_LOG(ERR, "fail to execute command "
486                             "CONFIG_PROMISCUOUS_MODE");
487         return err;
488 }
489
490 /* Configure vlan and double vlan offload. Use flag to specify which part to configure */
491 static int
492 i40evf_config_vlan_offload(struct rte_eth_dev *dev,
493                                 bool enable_vlan_strip)
494 {
495         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
496         int err;
497         struct vf_cmd_info args;
498         struct i40e_virtchnl_vlan_offload_info offload;
499
500         offload.vsi_id = vf->vsi_res->vsi_id;
501         offload.enable_vlan_strip = enable_vlan_strip;
502
503         args.ops = (enum i40e_virtchnl_ops)I40E_VIRTCHNL_OP_CFG_VLAN_OFFLOAD;
504         args.in_args = (uint8_t *)&offload;
505         args.in_args_size = sizeof(offload);
506         args.out_buffer = cmd_result_buffer;
507         args.out_size = I40E_AQ_BUF_SZ;
508
509         err = i40evf_execute_vf_cmd(dev, &args);
510         if (err)
511                 PMD_DRV_LOG(ERR, "fail to execute command CFG_VLAN_OFFLOAD");
512
513         return err;
514 }
515
516 static int
517 i40evf_config_vlan_pvid(struct rte_eth_dev *dev,
518                                 struct i40e_vsi_vlan_pvid_info *info)
519 {
520         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
521         int err;
522         struct vf_cmd_info args;
523         struct i40e_virtchnl_pvid_info tpid_info;
524
525         if (dev == NULL || info == NULL) {
526                 PMD_DRV_LOG(ERR, "invalid parameters");
527                 return I40E_ERR_PARAM;
528         }
529
530         memset(&tpid_info, 0, sizeof(tpid_info));
531         tpid_info.vsi_id = vf->vsi_res->vsi_id;
532         (void)rte_memcpy(&tpid_info.info, info, sizeof(*info));
533
534         args.ops = (enum i40e_virtchnl_ops)I40E_VIRTCHNL_OP_CFG_VLAN_PVID;
535         args.in_args = (uint8_t *)&tpid_info;
536         args.in_args_size = sizeof(tpid_info);
537         args.out_buffer = cmd_result_buffer;
538         args.out_size = I40E_AQ_BUF_SZ;
539
540         err = i40evf_execute_vf_cmd(dev, &args);
541         if (err)
542                 PMD_DRV_LOG(ERR, "fail to execute command CFG_VLAN_PVID");
543
544         return err;
545 }
546
547 static void
548 i40evf_fill_virtchnl_vsi_txq_info(struct i40e_virtchnl_txq_info *txq_info,
549                                   uint16_t vsi_id,
550                                   uint16_t queue_id,
551                                   uint16_t nb_txq,
552                                   struct i40e_tx_queue *txq)
553 {
554         txq_info->vsi_id = vsi_id;
555         txq_info->queue_id = queue_id;
556         if (queue_id < nb_txq) {
557                 txq_info->ring_len = txq->nb_tx_desc;
558                 txq_info->dma_ring_addr = txq->tx_ring_phys_addr;
559         }
560 }
561
562 static void
563 i40evf_fill_virtchnl_vsi_rxq_info(struct i40e_virtchnl_rxq_info *rxq_info,
564                                   uint16_t vsi_id,
565                                   uint16_t queue_id,
566                                   uint16_t nb_rxq,
567                                   uint32_t max_pkt_size,
568                                   struct i40e_rx_queue *rxq)
569 {
570         rxq_info->vsi_id = vsi_id;
571         rxq_info->queue_id = queue_id;
572         rxq_info->max_pkt_size = max_pkt_size;
573         if (queue_id < nb_rxq) {
574                 rxq_info->ring_len = rxq->nb_rx_desc;
575                 rxq_info->dma_ring_addr = rxq->rx_ring_phys_addr;
576                 rxq_info->databuffer_size =
577                         (rte_pktmbuf_data_room_size(rxq->mp) -
578                                 RTE_PKTMBUF_HEADROOM);
579         }
580 }
581
582 /* It configures VSI queues to co-work with Linux PF host */
583 static int
584 i40evf_configure_vsi_queues(struct rte_eth_dev *dev)
585 {
586         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
587         struct i40e_rx_queue **rxq =
588                 (struct i40e_rx_queue **)dev->data->rx_queues;
589         struct i40e_tx_queue **txq =
590                 (struct i40e_tx_queue **)dev->data->tx_queues;
591         struct i40e_virtchnl_vsi_queue_config_info *vc_vqci;
592         struct i40e_virtchnl_queue_pair_info *vc_qpi;
593         struct vf_cmd_info args;
594         uint16_t i, nb_qp = vf->num_queue_pairs;
595         const uint32_t size =
596                 I40E_VIRTCHNL_CONFIG_VSI_QUEUES_SIZE(vc_vqci, nb_qp);
597         uint8_t buff[size];
598         int ret;
599
600         memset(buff, 0, sizeof(buff));
601         vc_vqci = (struct i40e_virtchnl_vsi_queue_config_info *)buff;
602         vc_vqci->vsi_id = vf->vsi_res->vsi_id;
603         vc_vqci->num_queue_pairs = nb_qp;
604
605         for (i = 0, vc_qpi = vc_vqci->qpair; i < nb_qp; i++, vc_qpi++) {
606                 i40evf_fill_virtchnl_vsi_txq_info(&vc_qpi->txq,
607                         vc_vqci->vsi_id, i, dev->data->nb_tx_queues, txq[i]);
608                 i40evf_fill_virtchnl_vsi_rxq_info(&vc_qpi->rxq,
609                         vc_vqci->vsi_id, i, dev->data->nb_rx_queues,
610                                         vf->max_pkt_len, rxq[i]);
611         }
612         memset(&args, 0, sizeof(args));
613         args.ops = I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES;
614         args.in_args = (uint8_t *)vc_vqci;
615         args.in_args_size = size;
616         args.out_buffer = cmd_result_buffer;
617         args.out_size = I40E_AQ_BUF_SZ;
618         ret = i40evf_execute_vf_cmd(dev, &args);
619         if (ret)
620                 PMD_DRV_LOG(ERR, "Failed to execute command of "
621                         "I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES\n");
622
623         return ret;
624 }
625
626 /* It configures VSI queues to co-work with DPDK PF host */
627 static int
628 i40evf_configure_vsi_queues_ext(struct rte_eth_dev *dev)
629 {
630         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
631         struct i40e_rx_queue **rxq =
632                 (struct i40e_rx_queue **)dev->data->rx_queues;
633         struct i40e_tx_queue **txq =
634                 (struct i40e_tx_queue **)dev->data->tx_queues;
635         struct i40e_virtchnl_vsi_queue_config_ext_info *vc_vqcei;
636         struct i40e_virtchnl_queue_pair_ext_info *vc_qpei;
637         struct vf_cmd_info args;
638         uint16_t i, nb_qp = vf->num_queue_pairs;
639         const uint32_t size =
640                 I40E_VIRTCHNL_CONFIG_VSI_QUEUES_SIZE(vc_vqcei, nb_qp);
641         uint8_t buff[size];
642         int ret;
643
644         memset(buff, 0, sizeof(buff));
645         vc_vqcei = (struct i40e_virtchnl_vsi_queue_config_ext_info *)buff;
646         vc_vqcei->vsi_id = vf->vsi_res->vsi_id;
647         vc_vqcei->num_queue_pairs = nb_qp;
648         vc_qpei = vc_vqcei->qpair;
649         for (i = 0; i < nb_qp; i++, vc_qpei++) {
650                 i40evf_fill_virtchnl_vsi_txq_info(&vc_qpei->txq,
651                         vc_vqcei->vsi_id, i, dev->data->nb_tx_queues, txq[i]);
652                 i40evf_fill_virtchnl_vsi_rxq_info(&vc_qpei->rxq,
653                         vc_vqcei->vsi_id, i, dev->data->nb_rx_queues,
654                                         vf->max_pkt_len, rxq[i]);
655                 if (i < dev->data->nb_rx_queues)
656                         /*
657                          * It adds extra info for configuring VSI queues, which
658                          * is needed to enable the configurable crc stripping
659                          * in VF.
660                          */
661                         vc_qpei->rxq_ext.crcstrip =
662                                 dev->data->dev_conf.rxmode.hw_strip_crc;
663         }
664         memset(&args, 0, sizeof(args));
665         args.ops =
666                 (enum i40e_virtchnl_ops)I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES_EXT;
667         args.in_args = (uint8_t *)vc_vqcei;
668         args.in_args_size = size;
669         args.out_buffer = cmd_result_buffer;
670         args.out_size = I40E_AQ_BUF_SZ;
671         ret = i40evf_execute_vf_cmd(dev, &args);
672         if (ret)
673                 PMD_DRV_LOG(ERR, "Failed to execute command of "
674                         "I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES_EXT\n");
675
676         return ret;
677 }
678
679 static int
680 i40evf_configure_queues(struct rte_eth_dev *dev)
681 {
682         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
683
684         if (vf->version_major == I40E_DPDK_VERSION_MAJOR)
685                 /* To support DPDK PF host */
686                 return i40evf_configure_vsi_queues_ext(dev);
687         else
688                 /* To support Linux PF host */
689                 return i40evf_configure_vsi_queues(dev);
690 }
691
692 static int
693 i40evf_config_irq_map(struct rte_eth_dev *dev)
694 {
695         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
696         struct vf_cmd_info args;
697         uint8_t cmd_buffer[sizeof(struct i40e_virtchnl_irq_map_info) + \
698                 sizeof(struct i40e_virtchnl_vector_map)];
699         struct i40e_virtchnl_irq_map_info *map_info;
700         int i, err;
701         map_info = (struct i40e_virtchnl_irq_map_info *)cmd_buffer;
702         map_info->num_vectors = 1;
703         map_info->vecmap[0].rxitr_idx = RTE_LIBRTE_I40E_ITR_INTERVAL / 2;
704         map_info->vecmap[0].txitr_idx = RTE_LIBRTE_I40E_ITR_INTERVAL / 2;
705         map_info->vecmap[0].vsi_id = vf->vsi_res->vsi_id;
706         /* Alway use default dynamic MSIX interrupt */
707         map_info->vecmap[0].vector_id = I40EVF_VSI_DEFAULT_MSIX_INTR;
708         /* Don't map any tx queue */
709         map_info->vecmap[0].txq_map = 0;
710         map_info->vecmap[0].rxq_map = 0;
711         for (i = 0; i < dev->data->nb_rx_queues; i++)
712                 map_info->vecmap[0].rxq_map |= 1 << i;
713
714         args.ops = I40E_VIRTCHNL_OP_CONFIG_IRQ_MAP;
715         args.in_args = (u8 *)cmd_buffer;
716         args.in_args_size = sizeof(cmd_buffer);
717         args.out_buffer = cmd_result_buffer;
718         args.out_size = I40E_AQ_BUF_SZ;
719         err = i40evf_execute_vf_cmd(dev, &args);
720         if (err)
721                 PMD_DRV_LOG(ERR, "fail to execute command OP_ENABLE_QUEUES");
722
723         return err;
724 }
725
726 static int
727 i40evf_switch_queue(struct rte_eth_dev *dev, bool isrx, uint16_t qid,
728                                 bool on)
729 {
730         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
731         struct i40e_virtchnl_queue_select queue_select;
732         int err;
733         struct vf_cmd_info args;
734         memset(&queue_select, 0, sizeof(queue_select));
735         queue_select.vsi_id = vf->vsi_res->vsi_id;
736
737         if (isrx)
738                 queue_select.rx_queues |= 1 << qid;
739         else
740                 queue_select.tx_queues |= 1 << qid;
741
742         if (on)
743                 args.ops = I40E_VIRTCHNL_OP_ENABLE_QUEUES;
744         else
745                 args.ops = I40E_VIRTCHNL_OP_DISABLE_QUEUES;
746         args.in_args = (u8 *)&queue_select;
747         args.in_args_size = sizeof(queue_select);
748         args.out_buffer = cmd_result_buffer;
749         args.out_size = I40E_AQ_BUF_SZ;
750         err = i40evf_execute_vf_cmd(dev, &args);
751         if (err)
752                 PMD_DRV_LOG(ERR, "fail to switch %s %u %s",
753                             isrx ? "RX" : "TX", qid, on ? "on" : "off");
754
755         return err;
756 }
757
758 static int
759 i40evf_start_queues(struct rte_eth_dev *dev)
760 {
761         struct rte_eth_dev_data *dev_data = dev->data;
762         int i;
763         struct i40e_rx_queue *rxq;
764         struct i40e_tx_queue *txq;
765
766         for (i = 0; i < dev->data->nb_rx_queues; i++) {
767                 rxq = dev_data->rx_queues[i];
768                 if (rxq->rx_deferred_start)
769                         continue;
770                 if (i40evf_dev_rx_queue_start(dev, i) != 0) {
771                         PMD_DRV_LOG(ERR, "Fail to start queue %u", i);
772                         return -1;
773                 }
774         }
775
776         for (i = 0; i < dev->data->nb_tx_queues; i++) {
777                 txq = dev_data->tx_queues[i];
778                 if (txq->tx_deferred_start)
779                         continue;
780                 if (i40evf_dev_tx_queue_start(dev, i) != 0) {
781                         PMD_DRV_LOG(ERR, "Fail to start queue %u", i);
782                         return -1;
783                 }
784         }
785
786         return 0;
787 }
788
789 static int
790 i40evf_stop_queues(struct rte_eth_dev *dev)
791 {
792         int i;
793
794         /* Stop TX queues first */
795         for (i = 0; i < dev->data->nb_tx_queues; i++) {
796                 if (i40evf_dev_tx_queue_stop(dev, i) != 0) {
797                         PMD_DRV_LOG(ERR, "Fail to start queue %u", i);
798                         return -1;
799                 }
800         }
801
802         /* Then stop RX queues */
803         for (i = 0; i < dev->data->nb_rx_queues; i++) {
804                 if (i40evf_dev_rx_queue_stop(dev, i) != 0) {
805                         PMD_DRV_LOG(ERR, "Fail to start queue %u", i);
806                         return -1;
807                 }
808         }
809
810         return 0;
811 }
812
813 static int
814 i40evf_add_mac_addr(struct rte_eth_dev *dev, struct ether_addr *addr)
815 {
816         struct i40e_virtchnl_ether_addr_list *list;
817         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
818         uint8_t cmd_buffer[sizeof(struct i40e_virtchnl_ether_addr_list) + \
819                         sizeof(struct i40e_virtchnl_ether_addr)];
820         int err;
821         struct vf_cmd_info args;
822
823         if (i40e_validate_mac_addr(addr->addr_bytes) != I40E_SUCCESS) {
824                 PMD_DRV_LOG(ERR, "Invalid mac:%x:%x:%x:%x:%x:%x",
825                             addr->addr_bytes[0], addr->addr_bytes[1],
826                             addr->addr_bytes[2], addr->addr_bytes[3],
827                             addr->addr_bytes[4], addr->addr_bytes[5]);
828                 return -1;
829         }
830
831         list = (struct i40e_virtchnl_ether_addr_list *)cmd_buffer;
832         list->vsi_id = vf->vsi_res->vsi_id;
833         list->num_elements = 1;
834         (void)rte_memcpy(list->list[0].addr, addr->addr_bytes,
835                                         sizeof(addr->addr_bytes));
836
837         args.ops = I40E_VIRTCHNL_OP_ADD_ETHER_ADDRESS;
838         args.in_args = cmd_buffer;
839         args.in_args_size = sizeof(cmd_buffer);
840         args.out_buffer = cmd_result_buffer;
841         args.out_size = I40E_AQ_BUF_SZ;
842         err = i40evf_execute_vf_cmd(dev, &args);
843         if (err)
844                 PMD_DRV_LOG(ERR, "fail to execute command "
845                             "OP_ADD_ETHER_ADDRESS");
846
847         return err;
848 }
849
850 static int
851 i40evf_del_mac_addr(struct rte_eth_dev *dev, struct ether_addr *addr)
852 {
853         struct i40e_virtchnl_ether_addr_list *list;
854         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
855         uint8_t cmd_buffer[sizeof(struct i40e_virtchnl_ether_addr_list) + \
856                         sizeof(struct i40e_virtchnl_ether_addr)];
857         int err;
858         struct vf_cmd_info args;
859
860         if (i40e_validate_mac_addr(addr->addr_bytes) != I40E_SUCCESS) {
861                 PMD_DRV_LOG(ERR, "Invalid mac:%x-%x-%x-%x-%x-%x",
862                             addr->addr_bytes[0], addr->addr_bytes[1],
863                             addr->addr_bytes[2], addr->addr_bytes[3],
864                             addr->addr_bytes[4], addr->addr_bytes[5]);
865                 return -1;
866         }
867
868         list = (struct i40e_virtchnl_ether_addr_list *)cmd_buffer;
869         list->vsi_id = vf->vsi_res->vsi_id;
870         list->num_elements = 1;
871         (void)rte_memcpy(list->list[0].addr, addr->addr_bytes,
872                         sizeof(addr->addr_bytes));
873
874         args.ops = I40E_VIRTCHNL_OP_DEL_ETHER_ADDRESS;
875         args.in_args = cmd_buffer;
876         args.in_args_size = sizeof(cmd_buffer);
877         args.out_buffer = cmd_result_buffer;
878         args.out_size = I40E_AQ_BUF_SZ;
879         err = i40evf_execute_vf_cmd(dev, &args);
880         if (err)
881                 PMD_DRV_LOG(ERR, "fail to execute command "
882                             "OP_DEL_ETHER_ADDRESS");
883
884         return err;
885 }
886
887 static int
888 i40evf_get_statics(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
889 {
890         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
891         struct i40e_virtchnl_queue_select q_stats;
892         struct i40e_eth_stats *pstats;
893         int err;
894         struct vf_cmd_info args;
895
896         memset(&q_stats, 0, sizeof(q_stats));
897         q_stats.vsi_id = vf->vsi_res->vsi_id;
898         args.ops = I40E_VIRTCHNL_OP_GET_STATS;
899         args.in_args = (u8 *)&q_stats;
900         args.in_args_size = sizeof(q_stats);
901         args.out_buffer = cmd_result_buffer;
902         args.out_size = I40E_AQ_BUF_SZ;
903
904         err = i40evf_execute_vf_cmd(dev, &args);
905         if (err) {
906                 PMD_DRV_LOG(ERR, "fail to execute command OP_GET_STATS");
907                 return err;
908         }
909         pstats = (struct i40e_eth_stats *)args.out_buffer;
910         stats->ipackets = pstats->rx_unicast + pstats->rx_multicast +
911                                                 pstats->rx_broadcast;
912         stats->opackets = pstats->tx_broadcast + pstats->tx_multicast +
913                                                 pstats->tx_unicast;
914         stats->ierrors = pstats->rx_discards;
915         stats->oerrors = pstats->tx_errors + pstats->tx_discards;
916         stats->ibytes = pstats->rx_bytes;
917         stats->obytes = pstats->tx_bytes;
918
919         return 0;
920 }
921
922 static int
923 i40evf_add_vlan(struct rte_eth_dev *dev, uint16_t vlanid)
924 {
925         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
926         struct i40e_virtchnl_vlan_filter_list *vlan_list;
927         uint8_t cmd_buffer[sizeof(struct i40e_virtchnl_vlan_filter_list) +
928                                                         sizeof(uint16_t)];
929         int err;
930         struct vf_cmd_info args;
931
932         vlan_list = (struct i40e_virtchnl_vlan_filter_list *)cmd_buffer;
933         vlan_list->vsi_id = vf->vsi_res->vsi_id;
934         vlan_list->num_elements = 1;
935         vlan_list->vlan_id[0] = vlanid;
936
937         args.ops = I40E_VIRTCHNL_OP_ADD_VLAN;
938         args.in_args = (u8 *)&cmd_buffer;
939         args.in_args_size = sizeof(cmd_buffer);
940         args.out_buffer = cmd_result_buffer;
941         args.out_size = I40E_AQ_BUF_SZ;
942         err = i40evf_execute_vf_cmd(dev, &args);
943         if (err)
944                 PMD_DRV_LOG(ERR, "fail to execute command OP_ADD_VLAN");
945
946         return err;
947 }
948
949 static int
950 i40evf_del_vlan(struct rte_eth_dev *dev, uint16_t vlanid)
951 {
952         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
953         struct i40e_virtchnl_vlan_filter_list *vlan_list;
954         uint8_t cmd_buffer[sizeof(struct i40e_virtchnl_vlan_filter_list) +
955                                                         sizeof(uint16_t)];
956         int err;
957         struct vf_cmd_info args;
958
959         vlan_list = (struct i40e_virtchnl_vlan_filter_list *)cmd_buffer;
960         vlan_list->vsi_id = vf->vsi_res->vsi_id;
961         vlan_list->num_elements = 1;
962         vlan_list->vlan_id[0] = vlanid;
963
964         args.ops = I40E_VIRTCHNL_OP_DEL_VLAN;
965         args.in_args = (u8 *)&cmd_buffer;
966         args.in_args_size = sizeof(cmd_buffer);
967         args.out_buffer = cmd_result_buffer;
968         args.out_size = I40E_AQ_BUF_SZ;
969         err = i40evf_execute_vf_cmd(dev, &args);
970         if (err)
971                 PMD_DRV_LOG(ERR, "fail to execute command OP_DEL_VLAN");
972
973         return err;
974 }
975
976 static int
977 i40evf_get_link_status(struct rte_eth_dev *dev, struct rte_eth_link *link)
978 {
979         int err;
980         struct vf_cmd_info args;
981         struct rte_eth_link *new_link;
982
983         args.ops = (enum i40e_virtchnl_ops)I40E_VIRTCHNL_OP_GET_LINK_STAT;
984         args.in_args = NULL;
985         args.in_args_size = 0;
986         args.out_buffer = cmd_result_buffer;
987         args.out_size = I40E_AQ_BUF_SZ;
988         err = i40evf_execute_vf_cmd(dev, &args);
989         if (err) {
990                 PMD_DRV_LOG(ERR, "fail to execute command OP_GET_LINK_STAT");
991                 return err;
992         }
993
994         new_link = (struct rte_eth_link *)args.out_buffer;
995         (void)rte_memcpy(link, new_link, sizeof(*link));
996
997         return 0;
998 }
999
1000 static const struct rte_pci_id pci_id_i40evf_map[] = {
1001 #define RTE_PCI_DEV_ID_DECL_I40EVF(vend, dev) {RTE_PCI_DEVICE(vend, dev)},
1002 #include "rte_pci_dev_ids.h"
1003 { .vendor_id = 0, /* sentinel */ },
1004 };
1005
1006 static inline int
1007 i40evf_dev_atomic_write_link_status(struct rte_eth_dev *dev,
1008                                     struct rte_eth_link *link)
1009 {
1010         struct rte_eth_link *dst = &(dev->data->dev_link);
1011         struct rte_eth_link *src = link;
1012
1013         if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
1014                                         *(uint64_t *)src) == 0)
1015                 return -1;
1016
1017         return 0;
1018 }
1019
1020 static int
1021 i40evf_reset_vf(struct i40e_hw *hw)
1022 {
1023         int i, reset;
1024
1025         if (i40e_vf_reset(hw) != I40E_SUCCESS) {
1026                 PMD_INIT_LOG(ERR, "Reset VF NIC failed");
1027                 return -1;
1028         }
1029         /**
1030           * After issuing vf reset command to pf, pf won't necessarily
1031           * reset vf, it depends on what state it exactly is. If it's not
1032           * initialized yet, it won't have vf reset since it's in a certain
1033           * state. If not, it will try to reset. Even vf is reset, pf will
1034           * set I40E_VFGEN_RSTAT to COMPLETE first, then wait 10ms and set
1035           * it to ACTIVE. In this duration, vf may not catch the moment that
1036           * COMPLETE is set. So, for vf, we'll try to wait a long time.
1037           */
1038         rte_delay_ms(200);
1039
1040         for (i = 0; i < MAX_RESET_WAIT_CNT; i++) {
1041                 reset = rd32(hw, I40E_VFGEN_RSTAT) &
1042                         I40E_VFGEN_RSTAT_VFR_STATE_MASK;
1043                 reset = reset >> I40E_VFGEN_RSTAT_VFR_STATE_SHIFT;
1044                 if (I40E_VFR_COMPLETED == reset || I40E_VFR_VFACTIVE == reset)
1045                         break;
1046                 else
1047                         rte_delay_ms(50);
1048         }
1049
1050         if (i >= MAX_RESET_WAIT_CNT) {
1051                 PMD_INIT_LOG(ERR, "Reset VF NIC failed");
1052                 return -1;
1053         }
1054
1055         return 0;
1056 }
1057
1058 static int
1059 i40evf_init_vf(struct rte_eth_dev *dev)
1060 {
1061         int i, err, bufsz;
1062         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1063         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1064
1065         vf->adapter = I40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
1066         vf->dev_data = dev->data;
1067         err = i40evf_set_mac_type(hw);
1068         if (err) {
1069                 PMD_INIT_LOG(ERR, "set_mac_type failed: %d", err);
1070                 goto err;
1071         }
1072
1073         i40e_init_adminq_parameter(hw);
1074         err = i40e_init_adminq(hw);
1075         if (err) {
1076                 PMD_INIT_LOG(ERR, "init_adminq failed: %d", err);
1077                 goto err;
1078         }
1079
1080
1081         /* Reset VF and wait until it's complete */
1082         if (i40evf_reset_vf(hw)) {
1083                 PMD_INIT_LOG(ERR, "reset NIC failed");
1084                 goto err_aq;
1085         }
1086
1087         /* VF reset, shutdown admin queue and initialize again */
1088         if (i40e_shutdown_adminq(hw) != I40E_SUCCESS) {
1089                 PMD_INIT_LOG(ERR, "i40e_shutdown_adminq failed");
1090                 return -1;
1091         }
1092
1093         i40e_init_adminq_parameter(hw);
1094         if (i40e_init_adminq(hw) != I40E_SUCCESS) {
1095                 PMD_INIT_LOG(ERR, "init_adminq failed");
1096                 return -1;
1097         }
1098         if (i40evf_check_api_version(dev) != 0) {
1099                 PMD_INIT_LOG(ERR, "check_api version failed");
1100                 goto err_aq;
1101         }
1102         bufsz = sizeof(struct i40e_virtchnl_vf_resource) +
1103                 (I40E_MAX_VF_VSI * sizeof(struct i40e_virtchnl_vsi_resource));
1104         vf->vf_res = rte_zmalloc("vf_res", bufsz, 0);
1105         if (!vf->vf_res) {
1106                 PMD_INIT_LOG(ERR, "unable to allocate vf_res memory");
1107                         goto err_aq;
1108         }
1109
1110         if (i40evf_get_vf_resource(dev) != 0) {
1111                 PMD_INIT_LOG(ERR, "i40evf_get_vf_config failed");
1112                 goto err_alloc;
1113         }
1114
1115         /* got VF config message back from PF, now we can parse it */
1116         for (i = 0; i < vf->vf_res->num_vsis; i++) {
1117                 if (vf->vf_res->vsi_res[i].vsi_type == I40E_VSI_SRIOV)
1118                         vf->vsi_res = &vf->vf_res->vsi_res[i];
1119         }
1120
1121         if (!vf->vsi_res) {
1122                 PMD_INIT_LOG(ERR, "no LAN VSI found");
1123                 goto err_alloc;
1124         }
1125
1126         vf->vsi.vsi_id = vf->vsi_res->vsi_id;
1127         vf->vsi.type = vf->vsi_res->vsi_type;
1128         vf->vsi.nb_qps = vf->vsi_res->num_queue_pairs;
1129
1130         /* check mac addr, if it's not valid, genrate one */
1131         if (I40E_SUCCESS != i40e_validate_mac_addr(\
1132                         vf->vsi_res->default_mac_addr))
1133                 eth_random_addr(vf->vsi_res->default_mac_addr);
1134
1135         ether_addr_copy((struct ether_addr *)vf->vsi_res->default_mac_addr,
1136                                         (struct ether_addr *)hw->mac.addr);
1137
1138         return 0;
1139
1140 err_alloc:
1141         rte_free(vf->vf_res);
1142 err_aq:
1143         i40e_shutdown_adminq(hw); /* ignore error */
1144 err:
1145         return -1;
1146 }
1147
1148 static int
1149 i40evf_dev_init(struct rte_eth_dev *eth_dev)
1150 {
1151         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(\
1152                         eth_dev->data->dev_private);
1153
1154         PMD_INIT_FUNC_TRACE();
1155
1156         /* assign ops func pointer */
1157         eth_dev->dev_ops = &i40evf_eth_dev_ops;
1158         eth_dev->rx_pkt_burst = &i40e_recv_pkts;
1159         eth_dev->tx_pkt_burst = &i40e_xmit_pkts;
1160
1161         /*
1162          * For secondary processes, we don't initialise any further as primary
1163          * has already done this work.
1164          */
1165         if (rte_eal_process_type() != RTE_PROC_PRIMARY){
1166                 if (eth_dev->data->scattered_rx)
1167                         eth_dev->rx_pkt_burst = i40e_recv_scattered_pkts;
1168                 return 0;
1169         }
1170
1171         hw->vendor_id = eth_dev->pci_dev->id.vendor_id;
1172         hw->device_id = eth_dev->pci_dev->id.device_id;
1173         hw->subsystem_vendor_id = eth_dev->pci_dev->id.subsystem_vendor_id;
1174         hw->subsystem_device_id = eth_dev->pci_dev->id.subsystem_device_id;
1175         hw->bus.device = eth_dev->pci_dev->addr.devid;
1176         hw->bus.func = eth_dev->pci_dev->addr.function;
1177         hw->hw_addr = (void *)eth_dev->pci_dev->mem_resource[0].addr;
1178
1179         if(i40evf_init_vf(eth_dev) != 0) {
1180                 PMD_INIT_LOG(ERR, "Init vf failed");
1181                 return -1;
1182         }
1183
1184         /* copy mac addr */
1185         eth_dev->data->mac_addrs = rte_zmalloc("i40evf_mac",
1186                                         ETHER_ADDR_LEN, 0);
1187         if (eth_dev->data->mac_addrs == NULL) {
1188                 PMD_INIT_LOG(ERR, "Failed to allocate %d bytes needed to "
1189                                 "store MAC addresses", ETHER_ADDR_LEN);
1190                 return -ENOMEM;
1191         }
1192         ether_addr_copy((struct ether_addr *)hw->mac.addr,
1193                 (struct ether_addr *)eth_dev->data->mac_addrs);
1194
1195         return 0;
1196 }
1197
1198 /*
1199  * virtual function driver struct
1200  */
1201 static struct eth_driver rte_i40evf_pmd = {
1202         {
1203                 .name = "rte_i40evf_pmd",
1204                 .id_table = pci_id_i40evf_map,
1205                 .drv_flags = RTE_PCI_DRV_NEED_MAPPING,
1206         },
1207         .eth_dev_init = i40evf_dev_init,
1208         .dev_private_size = sizeof(struct i40e_vf),
1209 };
1210
1211 /*
1212  * VF Driver initialization routine.
1213  * Invoked one at EAL init time.
1214  * Register itself as the [Virtual Poll Mode] Driver of PCI Fortville devices.
1215  */
1216 static int
1217 rte_i40evf_pmd_init(const char *name __rte_unused,
1218                     const char *params __rte_unused)
1219 {
1220         PMD_INIT_FUNC_TRACE();
1221
1222         rte_eth_driver_register(&rte_i40evf_pmd);
1223
1224         return 0;
1225 }
1226
1227 static struct rte_driver rte_i40evf_driver = {
1228         .type = PMD_PDEV,
1229         .init = rte_i40evf_pmd_init,
1230 };
1231
1232 PMD_REGISTER_DRIVER(rte_i40evf_driver);
1233
1234 static int
1235 i40evf_dev_configure(struct rte_eth_dev *dev)
1236 {
1237         return i40evf_init_vlan(dev);
1238 }
1239
1240 static int
1241 i40evf_init_vlan(struct rte_eth_dev *dev)
1242 {
1243         struct rte_eth_dev_data *data = dev->data;
1244         int ret;
1245
1246         /* Apply vlan offload setting */
1247         i40evf_vlan_offload_set(dev, ETH_VLAN_STRIP_MASK);
1248
1249         /* Apply pvid setting */
1250         ret = i40evf_vlan_pvid_set(dev, data->dev_conf.txmode.pvid,
1251                                 data->dev_conf.txmode.hw_vlan_insert_pvid);
1252         return ret;
1253 }
1254
1255 static void
1256 i40evf_vlan_offload_set(struct rte_eth_dev *dev, int mask)
1257 {
1258         bool enable_vlan_strip = 0;
1259         struct rte_eth_conf *dev_conf = &dev->data->dev_conf;
1260         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1261
1262         /* Linux pf host doesn't support vlan offload yet */
1263         if (vf->version_major == I40E_DPDK_VERSION_MAJOR) {
1264                 /* Vlan stripping setting */
1265                 if (mask & ETH_VLAN_STRIP_MASK) {
1266                         /* Enable or disable VLAN stripping */
1267                         if (dev_conf->rxmode.hw_vlan_strip)
1268                                 enable_vlan_strip = 1;
1269                         else
1270                                 enable_vlan_strip = 0;
1271
1272                         i40evf_config_vlan_offload(dev, enable_vlan_strip);
1273                 }
1274         }
1275 }
1276
1277 static int
1278 i40evf_vlan_pvid_set(struct rte_eth_dev *dev, uint16_t pvid, int on)
1279 {
1280         struct rte_eth_conf *dev_conf = &dev->data->dev_conf;
1281         struct i40e_vsi_vlan_pvid_info info;
1282         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1283
1284         memset(&info, 0, sizeof(info));
1285         info.on = on;
1286
1287         /* Linux pf host don't support vlan offload yet */
1288         if (vf->version_major == I40E_DPDK_VERSION_MAJOR) {
1289                 if (info.on)
1290                         info.config.pvid = pvid;
1291                 else {
1292                         info.config.reject.tagged =
1293                                 dev_conf->txmode.hw_vlan_reject_tagged;
1294                         info.config.reject.untagged =
1295                                 dev_conf->txmode.hw_vlan_reject_untagged;
1296                 }
1297                 return i40evf_config_vlan_pvid(dev, &info);
1298         }
1299
1300         return 0;
1301 }
1302
1303 static int
1304 i40evf_dev_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1305 {
1306         struct i40e_rx_queue *rxq;
1307         int err = 0;
1308         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1309
1310         PMD_INIT_FUNC_TRACE();
1311
1312         if (rx_queue_id < dev->data->nb_rx_queues) {
1313                 rxq = dev->data->rx_queues[rx_queue_id];
1314
1315                 err = i40e_alloc_rx_queue_mbufs(rxq);
1316                 if (err) {
1317                         PMD_DRV_LOG(ERR, "Failed to allocate RX queue mbuf");
1318                         return err;
1319                 }
1320
1321                 rte_wmb();
1322
1323                 /* Init the RX tail register. */
1324                 I40E_PCI_REG_WRITE(rxq->qrx_tail, rxq->nb_rx_desc - 1);
1325                 I40EVF_WRITE_FLUSH(hw);
1326
1327                 /* Ready to switch the queue on */
1328                 err = i40evf_switch_queue(dev, TRUE, rx_queue_id, TRUE);
1329
1330                 if (err)
1331                         PMD_DRV_LOG(ERR, "Failed to switch RX queue %u on",
1332                                     rx_queue_id);
1333         }
1334
1335         return err;
1336 }
1337
1338 static int
1339 i40evf_dev_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1340 {
1341         struct i40e_rx_queue *rxq;
1342         int err;
1343
1344         if (rx_queue_id < dev->data->nb_rx_queues) {
1345                 rxq = dev->data->rx_queues[rx_queue_id];
1346
1347                 err = i40evf_switch_queue(dev, TRUE, rx_queue_id, FALSE);
1348
1349                 if (err) {
1350                         PMD_DRV_LOG(ERR, "Failed to switch RX queue %u off",
1351                                     rx_queue_id);
1352                         return err;
1353                 }
1354
1355                 i40e_rx_queue_release_mbufs(rxq);
1356                 i40e_reset_rx_queue(rxq);
1357         }
1358
1359         return 0;
1360 }
1361
1362 static int
1363 i40evf_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)
1364 {
1365         int err = 0;
1366
1367         PMD_INIT_FUNC_TRACE();
1368
1369         if (tx_queue_id < dev->data->nb_tx_queues) {
1370
1371                 /* Ready to switch the queue on */
1372                 err = i40evf_switch_queue(dev, FALSE, tx_queue_id, TRUE);
1373
1374                 if (err)
1375                         PMD_DRV_LOG(ERR, "Failed to switch TX queue %u on",
1376                                     tx_queue_id);
1377         }
1378
1379         return err;
1380 }
1381
1382 static int
1383 i40evf_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
1384 {
1385         struct i40e_tx_queue *txq;
1386         int err;
1387
1388         if (tx_queue_id < dev->data->nb_tx_queues) {
1389                 txq = dev->data->tx_queues[tx_queue_id];
1390
1391                 err = i40evf_switch_queue(dev, FALSE, tx_queue_id, FALSE);
1392
1393                 if (err) {
1394                         PMD_DRV_LOG(ERR, "Failed to switch TX queue %u of",
1395                                     tx_queue_id);
1396                         return err;
1397                 }
1398
1399                 i40e_tx_queue_release_mbufs(txq);
1400                 i40e_reset_tx_queue(txq);
1401         }
1402
1403         return 0;
1404 }
1405
1406 static int
1407 i40evf_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
1408 {
1409         int ret;
1410
1411         if (on)
1412                 ret = i40evf_add_vlan(dev, vlan_id);
1413         else
1414                 ret = i40evf_del_vlan(dev,vlan_id);
1415
1416         return ret;
1417 }
1418
1419 static int
1420 i40evf_rx_init(struct rte_eth_dev *dev)
1421 {
1422         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1423         uint16_t i;
1424         struct i40e_rx_queue **rxq =
1425                 (struct i40e_rx_queue **)dev->data->rx_queues;
1426         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1427
1428         i40evf_config_rss(vf);
1429         for (i = 0; i < dev->data->nb_rx_queues; i++) {
1430                 rxq[i]->qrx_tail = hw->hw_addr + I40E_QRX_TAIL1(i);
1431                 I40E_PCI_REG_WRITE(rxq[i]->qrx_tail, rxq[i]->nb_rx_desc - 1);
1432         }
1433
1434         /* Flush the operation to write registers */
1435         I40EVF_WRITE_FLUSH(hw);
1436
1437         return 0;
1438 }
1439
1440 static void
1441 i40evf_tx_init(struct rte_eth_dev *dev)
1442 {
1443         uint16_t i;
1444         struct i40e_tx_queue **txq =
1445                 (struct i40e_tx_queue **)dev->data->tx_queues;
1446         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1447
1448         for (i = 0; i < dev->data->nb_tx_queues; i++)
1449                 txq[i]->qtx_tail = hw->hw_addr + I40E_QTX_TAIL1(i);
1450 }
1451
1452 static inline void
1453 i40evf_enable_queues_intr(struct i40e_hw *hw)
1454 {
1455         I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTLN1(I40EVF_VSI_DEFAULT_MSIX_INTR - 1),
1456                         I40E_VFINT_DYN_CTLN1_INTENA_MASK |
1457                         I40E_VFINT_DYN_CTLN_CLEARPBA_MASK);
1458 }
1459
1460 static inline void
1461 i40evf_disable_queues_intr(struct i40e_hw *hw)
1462 {
1463         I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTLN1(I40EVF_VSI_DEFAULT_MSIX_INTR - 1),
1464                         0);
1465 }
1466
1467 static int
1468 i40evf_dev_start(struct rte_eth_dev *dev)
1469 {
1470         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1471         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1472         struct ether_addr mac_addr;
1473
1474         PMD_INIT_FUNC_TRACE();
1475
1476         vf->max_pkt_len = dev->data->dev_conf.rxmode.max_rx_pkt_len;
1477         if (dev->data->dev_conf.rxmode.jumbo_frame == 1) {
1478                 if (vf->max_pkt_len <= ETHER_MAX_LEN ||
1479                         vf->max_pkt_len > I40E_FRAME_SIZE_MAX) {
1480                         PMD_DRV_LOG(ERR, "maximum packet length must "
1481                                     "be larger than %u and smaller than %u,"
1482                                     "as jumbo frame is enabled",
1483                                     (uint32_t)ETHER_MAX_LEN,
1484                                     (uint32_t)I40E_FRAME_SIZE_MAX);
1485                         return I40E_ERR_CONFIG;
1486                 }
1487         } else {
1488                 if (vf->max_pkt_len < ETHER_MIN_LEN ||
1489                         vf->max_pkt_len > ETHER_MAX_LEN) {
1490                         PMD_DRV_LOG(ERR, "maximum packet length must be "
1491                                     "larger than %u and smaller than %u, "
1492                                     "as jumbo frame is disabled",
1493                                     (uint32_t)ETHER_MIN_LEN,
1494                                     (uint32_t)ETHER_MAX_LEN);
1495                         return I40E_ERR_CONFIG;
1496                 }
1497         }
1498
1499         vf->num_queue_pairs = RTE_MAX(dev->data->nb_rx_queues,
1500                                         dev->data->nb_tx_queues);
1501
1502         if (i40evf_rx_init(dev) != 0){
1503                 PMD_DRV_LOG(ERR, "failed to do RX init");
1504                 return -1;
1505         }
1506
1507         i40evf_tx_init(dev);
1508
1509         if (i40evf_configure_queues(dev) != 0) {
1510                 PMD_DRV_LOG(ERR, "configure queues failed");
1511                 goto err_queue;
1512         }
1513         if (i40evf_config_irq_map(dev)) {
1514                 PMD_DRV_LOG(ERR, "config_irq_map failed");
1515                 goto err_queue;
1516         }
1517
1518         /* Set mac addr */
1519         (void)rte_memcpy(mac_addr.addr_bytes, hw->mac.addr,
1520                                 sizeof(mac_addr.addr_bytes));
1521         if (i40evf_add_mac_addr(dev, &mac_addr)) {
1522                 PMD_DRV_LOG(ERR, "Failed to add mac addr");
1523                 goto err_queue;
1524         }
1525
1526         if (i40evf_start_queues(dev) != 0) {
1527                 PMD_DRV_LOG(ERR, "enable queues failed");
1528                 goto err_mac;
1529         }
1530
1531         i40evf_enable_queues_intr(hw);
1532         return 0;
1533
1534 err_mac:
1535         i40evf_del_mac_addr(dev, &mac_addr);
1536 err_queue:
1537         return -1;
1538 }
1539
1540 static void
1541 i40evf_dev_stop(struct rte_eth_dev *dev)
1542 {
1543         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1544
1545         PMD_INIT_FUNC_TRACE();
1546
1547         i40evf_disable_queues_intr(hw);
1548         i40evf_stop_queues(dev);
1549 }
1550
1551 static int
1552 i40evf_dev_link_update(struct rte_eth_dev *dev,
1553                        __rte_unused int wait_to_complete)
1554 {
1555         struct rte_eth_link new_link;
1556         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1557         /*
1558          * DPDK pf host provide interfacet to acquire link status
1559          * while Linux driver does not
1560          */
1561         if (vf->version_major == I40E_DPDK_VERSION_MAJOR)
1562                 i40evf_get_link_status(dev, &new_link);
1563         else {
1564                 /* Always assume it's up, for Linux driver PF host */
1565                 new_link.link_duplex = ETH_LINK_AUTONEG_DUPLEX;
1566                 new_link.link_speed  = ETH_LINK_SPEED_10000;
1567                 new_link.link_status = 1;
1568         }
1569         i40evf_dev_atomic_write_link_status(dev, &new_link);
1570
1571         return 0;
1572 }
1573
1574 static void
1575 i40evf_dev_promiscuous_enable(struct rte_eth_dev *dev)
1576 {
1577         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1578         int ret;
1579
1580         /* If enabled, just return */
1581         if (vf->promisc_unicast_enabled)
1582                 return;
1583
1584         ret = i40evf_config_promisc(dev, 1, vf->promisc_multicast_enabled);
1585         if (ret == 0)
1586                 vf->promisc_unicast_enabled = TRUE;
1587 }
1588
1589 static void
1590 i40evf_dev_promiscuous_disable(struct rte_eth_dev *dev)
1591 {
1592         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1593         int ret;
1594
1595         /* If disabled, just return */
1596         if (!vf->promisc_unicast_enabled)
1597                 return;
1598
1599         ret = i40evf_config_promisc(dev, 0, vf->promisc_multicast_enabled);
1600         if (ret == 0)
1601                 vf->promisc_unicast_enabled = FALSE;
1602 }
1603
1604 static void
1605 i40evf_dev_allmulticast_enable(struct rte_eth_dev *dev)
1606 {
1607         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1608         int ret;
1609
1610         /* If enabled, just return */
1611         if (vf->promisc_multicast_enabled)
1612                 return;
1613
1614         ret = i40evf_config_promisc(dev, vf->promisc_unicast_enabled, 1);
1615         if (ret == 0)
1616                 vf->promisc_multicast_enabled = TRUE;
1617 }
1618
1619 static void
1620 i40evf_dev_allmulticast_disable(struct rte_eth_dev *dev)
1621 {
1622         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1623         int ret;
1624
1625         /* If enabled, just return */
1626         if (!vf->promisc_multicast_enabled)
1627                 return;
1628
1629         ret = i40evf_config_promisc(dev, vf->promisc_unicast_enabled, 0);
1630         if (ret == 0)
1631                 vf->promisc_multicast_enabled = FALSE;
1632 }
1633
1634 static void
1635 i40evf_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
1636 {
1637         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1638
1639         memset(dev_info, 0, sizeof(*dev_info));
1640         dev_info->max_rx_queues = vf->vsi_res->num_queue_pairs;
1641         dev_info->max_tx_queues = vf->vsi_res->num_queue_pairs;
1642         dev_info->min_rx_bufsize = I40E_BUF_SIZE_MIN;
1643         dev_info->max_rx_pktlen = I40E_FRAME_SIZE_MAX;
1644         dev_info->reta_size = ETH_RSS_RETA_SIZE_64;
1645         dev_info->flow_type_rss_offloads = I40E_RSS_OFFLOAD_ALL;
1646
1647         dev_info->default_rxconf = (struct rte_eth_rxconf) {
1648                 .rx_thresh = {
1649                         .pthresh = I40E_DEFAULT_RX_PTHRESH,
1650                         .hthresh = I40E_DEFAULT_RX_HTHRESH,
1651                         .wthresh = I40E_DEFAULT_RX_WTHRESH,
1652                 },
1653                 .rx_free_thresh = I40E_DEFAULT_RX_FREE_THRESH,
1654                 .rx_drop_en = 0,
1655         };
1656
1657         dev_info->default_txconf = (struct rte_eth_txconf) {
1658                 .tx_thresh = {
1659                         .pthresh = I40E_DEFAULT_TX_PTHRESH,
1660                         .hthresh = I40E_DEFAULT_TX_HTHRESH,
1661                         .wthresh = I40E_DEFAULT_TX_WTHRESH,
1662                 },
1663                 .tx_free_thresh = I40E_DEFAULT_TX_FREE_THRESH,
1664                 .tx_rs_thresh = I40E_DEFAULT_TX_RSBIT_THRESH,
1665                 .txq_flags = ETH_TXQ_FLAGS_NOMULTSEGS |
1666                                 ETH_TXQ_FLAGS_NOOFFLOADS,
1667         };
1668 }
1669
1670 static void
1671 i40evf_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
1672 {
1673         if (i40evf_get_statics(dev, stats))
1674                 PMD_DRV_LOG(ERR, "Get statics failed");
1675 }
1676
1677 static void
1678 i40evf_dev_close(struct rte_eth_dev *dev)
1679 {
1680         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1681
1682         i40evf_dev_stop(dev);
1683         i40evf_reset_vf(hw);
1684         i40e_shutdown_adminq(hw);
1685 }
1686
1687 static int
1688 i40evf_dev_rss_reta_update(struct rte_eth_dev *dev,
1689                            struct rte_eth_rss_reta_entry64 *reta_conf,
1690                            uint16_t reta_size)
1691 {
1692         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1693         uint32_t lut, l;
1694         uint16_t i, j;
1695         uint16_t idx, shift;
1696         uint8_t mask;
1697
1698         if (reta_size != ETH_RSS_RETA_SIZE_64) {
1699                 PMD_DRV_LOG(ERR, "The size of hash lookup table configured "
1700                         "(%d) doesn't match the number of hardware can "
1701                         "support (%d)\n", reta_size, ETH_RSS_RETA_SIZE_64);
1702                 return -EINVAL;
1703         }
1704
1705         for (i = 0; i < reta_size; i += I40E_4_BIT_WIDTH) {
1706                 idx = i / RTE_RETA_GROUP_SIZE;
1707                 shift = i % RTE_RETA_GROUP_SIZE;
1708                 mask = (uint8_t)((reta_conf[idx].mask >> shift) &
1709                                                 I40E_4_BIT_MASK);
1710                 if (!mask)
1711                         continue;
1712                 if (mask == I40E_4_BIT_MASK)
1713                         l = 0;
1714                 else
1715                         l = I40E_READ_REG(hw, I40E_VFQF_HLUT(i >> 2));
1716
1717                 for (j = 0, lut = 0; j < I40E_4_BIT_WIDTH; j++) {
1718                         if (mask & (0x1 << j))
1719                                 lut |= reta_conf[idx].reta[shift + j] <<
1720                                                         (CHAR_BIT * j);
1721                         else
1722                                 lut |= l & (I40E_8_BIT_MASK << (CHAR_BIT * j));
1723                 }
1724                 I40E_WRITE_REG(hw, I40E_VFQF_HLUT(i >> 2), lut);
1725         }
1726
1727         return 0;
1728 }
1729
1730 static int
1731 i40evf_dev_rss_reta_query(struct rte_eth_dev *dev,
1732                           struct rte_eth_rss_reta_entry64 *reta_conf,
1733                           uint16_t reta_size)
1734 {
1735         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1736         uint32_t lut;
1737         uint16_t i, j;
1738         uint16_t idx, shift;
1739         uint8_t mask;
1740
1741         if (reta_size != ETH_RSS_RETA_SIZE_64) {
1742                 PMD_DRV_LOG(ERR, "The size of hash lookup table configured "
1743                         "(%d) doesn't match the number of hardware can "
1744                         "support (%d)\n", reta_size, ETH_RSS_RETA_SIZE_64);
1745                 return -EINVAL;
1746         }
1747
1748         for (i = 0; i < reta_size; i += I40E_4_BIT_WIDTH) {
1749                 idx = i / RTE_RETA_GROUP_SIZE;
1750                 shift = i % RTE_RETA_GROUP_SIZE;
1751                 mask = (uint8_t)((reta_conf[idx].mask >> shift) &
1752                                                 I40E_4_BIT_MASK);
1753                 if (!mask)
1754                         continue;
1755
1756                 lut = I40E_READ_REG(hw, I40E_VFQF_HLUT(i >> 2));
1757                 for (j = 0; j < I40E_4_BIT_WIDTH; j++) {
1758                         if (mask & (0x1 << j))
1759                                 reta_conf[idx].reta[shift + j] =
1760                                         ((lut >> (CHAR_BIT * j)) &
1761                                                 I40E_8_BIT_MASK);
1762                 }
1763         }
1764
1765         return 0;
1766 }
1767
1768 static int
1769 i40evf_hw_rss_hash_set(struct i40e_hw *hw, struct rte_eth_rss_conf *rss_conf)
1770 {
1771         uint32_t *hash_key;
1772         uint8_t hash_key_len;
1773         uint64_t rss_hf, hena;
1774
1775         hash_key = (uint32_t *)(rss_conf->rss_key);
1776         hash_key_len = rss_conf->rss_key_len;
1777         if (hash_key != NULL && hash_key_len >=
1778                 (I40E_VFQF_HKEY_MAX_INDEX + 1) * sizeof(uint32_t)) {
1779                 uint16_t i;
1780
1781                 for (i = 0; i <= I40E_VFQF_HKEY_MAX_INDEX; i++)
1782                         I40E_WRITE_REG(hw, I40E_VFQF_HKEY(i), hash_key[i]);
1783         }
1784
1785         rss_hf = rss_conf->rss_hf;
1786         hena = (uint64_t)I40E_READ_REG(hw, I40E_VFQF_HENA(0));
1787         hena |= ((uint64_t)I40E_READ_REG(hw, I40E_VFQF_HENA(1))) << 32;
1788         hena &= ~I40E_RSS_HENA_ALL;
1789         hena |= i40e_config_hena(rss_hf);
1790         I40E_WRITE_REG(hw, I40E_VFQF_HENA(0), (uint32_t)hena);
1791         I40E_WRITE_REG(hw, I40E_VFQF_HENA(1), (uint32_t)(hena >> 32));
1792         I40EVF_WRITE_FLUSH(hw);
1793
1794         return 0;
1795 }
1796
1797 static void
1798 i40evf_disable_rss(struct i40e_vf *vf)
1799 {
1800         struct i40e_hw *hw = I40E_VF_TO_HW(vf);
1801         uint64_t hena;
1802
1803         hena = (uint64_t)I40E_READ_REG(hw, I40E_VFQF_HENA(0));
1804         hena |= ((uint64_t)I40E_READ_REG(hw, I40E_VFQF_HENA(1))) << 32;
1805         hena &= ~I40E_RSS_HENA_ALL;
1806         I40E_WRITE_REG(hw, I40E_VFQF_HENA(0), (uint32_t)hena);
1807         I40E_WRITE_REG(hw, I40E_VFQF_HENA(1), (uint32_t)(hena >> 32));
1808         I40EVF_WRITE_FLUSH(hw);
1809 }
1810
1811 static int
1812 i40evf_config_rss(struct i40e_vf *vf)
1813 {
1814         struct i40e_hw *hw = I40E_VF_TO_HW(vf);
1815         struct rte_eth_rss_conf rss_conf;
1816         uint32_t i, j, lut = 0, nb_q = (I40E_VFQF_HLUT_MAX_INDEX + 1) * 4;
1817
1818         if (vf->dev_data->dev_conf.rxmode.mq_mode != ETH_MQ_RX_RSS) {
1819                 i40evf_disable_rss(vf);
1820                 PMD_DRV_LOG(DEBUG, "RSS not configured\n");
1821                 return 0;
1822         }
1823
1824         /* Fill out the look up table */
1825         for (i = 0, j = 0; i < nb_q; i++, j++) {
1826                 if (j >= vf->num_queue_pairs)
1827                         j = 0;
1828                 lut = (lut << 8) | j;
1829                 if ((i & 3) == 3)
1830                         I40E_WRITE_REG(hw, I40E_VFQF_HLUT(i >> 2), lut);
1831         }
1832
1833         rss_conf = vf->dev_data->dev_conf.rx_adv_conf.rss_conf;
1834         if ((rss_conf.rss_hf & I40E_RSS_OFFLOAD_ALL) == 0) {
1835                 i40evf_disable_rss(vf);
1836                 PMD_DRV_LOG(DEBUG, "No hash flag is set\n");
1837                 return 0;
1838         }
1839
1840         if (rss_conf.rss_key == NULL || rss_conf.rss_key_len < nb_q) {
1841                 /* Calculate the default hash key */
1842                 for (i = 0; i <= I40E_VFQF_HKEY_MAX_INDEX; i++)
1843                         rss_key_default[i] = (uint32_t)rte_rand();
1844                 rss_conf.rss_key = (uint8_t *)rss_key_default;
1845                 rss_conf.rss_key_len = nb_q;
1846         }
1847
1848         return i40evf_hw_rss_hash_set(hw, &rss_conf);
1849 }
1850
1851 static int
1852 i40evf_dev_rss_hash_update(struct rte_eth_dev *dev,
1853                            struct rte_eth_rss_conf *rss_conf)
1854 {
1855         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1856         uint64_t rss_hf = rss_conf->rss_hf & I40E_RSS_OFFLOAD_ALL;
1857         uint64_t hena;
1858
1859         hena = (uint64_t)I40E_READ_REG(hw, I40E_VFQF_HENA(0));
1860         hena |= ((uint64_t)I40E_READ_REG(hw, I40E_VFQF_HENA(1))) << 32;
1861         if (!(hena & I40E_RSS_HENA_ALL)) { /* RSS disabled */
1862                 if (rss_hf != 0) /* Enable RSS */
1863                         return -EINVAL;
1864                 return 0;
1865         }
1866
1867         /* RSS enabled */
1868         if (rss_hf == 0) /* Disable RSS */
1869                 return -EINVAL;
1870
1871         return i40evf_hw_rss_hash_set(hw, rss_conf);
1872 }
1873
1874 static int
1875 i40evf_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
1876                              struct rte_eth_rss_conf *rss_conf)
1877 {
1878         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1879         uint32_t *hash_key = (uint32_t *)(rss_conf->rss_key);
1880         uint64_t hena;
1881         uint16_t i;
1882
1883         if (hash_key) {
1884                 for (i = 0; i <= I40E_VFQF_HKEY_MAX_INDEX; i++)
1885                         hash_key[i] = I40E_READ_REG(hw, I40E_VFQF_HKEY(i));
1886                 rss_conf->rss_key_len = i * sizeof(uint32_t);
1887         }
1888         hena = (uint64_t)I40E_READ_REG(hw, I40E_VFQF_HENA(0));
1889         hena |= ((uint64_t)I40E_READ_REG(hw, I40E_VFQF_HENA(1))) << 32;
1890         rss_conf->rss_hf = i40e_parse_hena(hena);
1891
1892         return 0;
1893 }