lib/librte_sched/rte_sched.c

   1 /*-
   2  *   BSD LICENSE
   3  *
   4  *   Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
   5  *   All rights reserved.
   6  *
   7  *   Redistribution and use in source and binary forms, with or without
   8  *   modification, are permitted provided that the following conditions
   9  *   are met:
  10  *
  11  *     * Redistributions of source code must retain the above copyright
  12  *       notice, this list of conditions and the following disclaimer.
  13  *     * Redistributions in binary form must reproduce the above copyright
  14  *       notice, this list of conditions and the following disclaimer in
  15  *       the documentation and/or other materials provided with the
  16  *       distribution.
  17  *     * Neither the name of Intel Corporation nor the names of its
  18  *       contributors may be used to endorse or promote products derived
  19  *       from this software without specific prior written permission.
  20  *
  21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32  */
  33
  34 #include <stdio.h>
  35 #include <string.h>
  36
  37 #include <rte_common.h>
  38 #include <rte_log.h>
  39 #include <rte_memory.h>
  40 #include <rte_malloc.h>
  41 #include <rte_cycles.h>
  42 #include <rte_prefetch.h>
  43 #include <rte_branch_prediction.h>
  44 #include <rte_mbuf.h>
  45
  46 #include "rte_sched.h"
  47 #include "rte_bitmap.h"
  48 #include "rte_sched_common.h"
  49 #include "rte_approx.h"
  50
  51 #ifdef __INTEL_COMPILER
  52 #pragma warning(disable:2259) /* conversion may lose significant bits */
  53 #endif
  54
  55 #ifdef RTE_SCHED_VECTOR
  56 #include <immintrin.h>
  57 #endif
  58
  59 #define RTE_SCHED_TB_RATE_CONFIG_ERR          (1e-7)
  60 #define RTE_SCHED_WRR_SHIFT                   3
  61 #define RTE_SCHED_GRINDER_PCACHE_SIZE         (64 / RTE_SCHED_QUEUES_PER_PIPE)
  62 #define RTE_SCHED_PIPE_INVALID                UINT32_MAX
  63 #define RTE_SCHED_BMP_POS_INVALID             UINT32_MAX
  64
  65 struct rte_sched_subport {
  66         /* Token bucket (TB) */
  67         uint64_t tb_time; /* time of last update */
  68         uint32_t tb_period;
  69         uint32_t tb_credits_per_period;
  70         uint32_t tb_size;
  71         uint32_t tb_credits;
  72
  73         /* Traffic classes (TCs) */
  74         uint64_t tc_time; /* time of next update */
  75         uint32_t tc_credits_per_period[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
  76         uint32_t tc_credits[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
  77         uint32_t tc_period;
  78
  79         /* TC oversubscription */
  80         uint32_t tc_ov_wm;
  81         uint32_t tc_ov_wm_min;
  82         uint32_t tc_ov_wm_max;
  83         uint8_t tc_ov_period_id;
  84         uint8_t tc_ov;
  85         uint32_t tc_ov_n;
  86         double tc_ov_rate;
  87
  88         /* Statistics */
  89         struct rte_sched_subport_stats stats;
  90 };
  91
  92 struct rte_sched_pipe_profile {
  93         /* Token bucket (TB) */
  94         uint32_t tb_period;
  95         uint32_t tb_credits_per_period;
  96         uint32_t tb_size;
  97
  98         /* Pipe traffic classes */
  99         uint32_t tc_period;
 100         uint32_t tc_credits_per_period[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
 101         uint8_t tc_ov_weight;
 102
 103         /* Pipe queues */
 104         uint8_t  wrr_cost[RTE_SCHED_QUEUES_PER_PIPE];
 105 };
 106
 107 struct rte_sched_pipe {
 108         /* Token bucket (TB) */
 109         uint64_t tb_time; /* time of last update */
 110         uint32_t tb_credits;
 111
 112         /* Pipe profile and flags */
 113         uint32_t profile;
 114
 115         /* Traffic classes (TCs) */
 116         uint64_t tc_time; /* time of next update */
 117         uint32_t tc_credits[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
 118
 119         /* Weighted Round Robin (WRR) */
 120         uint8_t wrr_tokens[RTE_SCHED_QUEUES_PER_PIPE];
 121
 122         /* TC oversubscription */
 123         uint32_t tc_ov_credits;
 124         uint8_t tc_ov_period_id;
 125         uint8_t reserved[3];
 126 } __rte_cache_aligned;
 127
 128 struct rte_sched_queue {
 129         uint16_t qw;
 130         uint16_t qr;
 131 };
 132
 133 struct rte_sched_queue_extra {
 134         struct rte_sched_queue_stats stats;
 135 #ifdef RTE_SCHED_RED
 136         struct rte_red red;
 137 #endif
 138 };
 139
 140 enum grinder_state {
 141         e_GRINDER_PREFETCH_PIPE = 0,
 142         e_GRINDER_PREFETCH_TC_QUEUE_ARRAYS,
 143         e_GRINDER_PREFETCH_MBUF,
 144         e_GRINDER_READ_MBUF
 145 };
 146
 147 /*
 148  * Path through the scheduler hierarchy used by the scheduler enqueue
 149  * operation to identify the destination queue for the current
 150  * packet. Stored in the field pkt.hash.sched of struct rte_mbuf of
 151  * each packet, typically written by the classification stage and read
 152  * by scheduler enqueue.
 153  */
 154 struct rte_sched_port_hierarchy {
 155         uint16_t queue:2;                /**< Queue ID (0 .. 3) */
 156         uint16_t traffic_class:2;        /**< Traffic class ID (0 .. 3)*/
 157         uint32_t color:2;                /**< Color */
 158         uint16_t unused:10;
 159         uint16_t subport;                /**< Subport ID */
 160         uint32_t pipe;                   /**< Pipe ID */
 161 };
 162
 163 struct rte_sched_grinder {
 164         /* Pipe cache */
 165         uint16_t pcache_qmask[RTE_SCHED_GRINDER_PCACHE_SIZE];
 166         uint32_t pcache_qindex[RTE_SCHED_GRINDER_PCACHE_SIZE];
 167         uint32_t pcache_w;
 168         uint32_t pcache_r;
 169
 170         /* Current pipe */
 171         enum grinder_state state;
 172         uint32_t productive;
 173         uint32_t pindex;
 174         struct rte_sched_subport *subport;
 175         struct rte_sched_pipe *pipe;
 176         struct rte_sched_pipe_profile *pipe_params;
 177
 178         /* TC cache */
 179         uint8_t tccache_qmask[4];
 180         uint32_t tccache_qindex[4];
 181         uint32_t tccache_w;
 182         uint32_t tccache_r;
 183
 184         /* Current TC */
 185         uint32_t tc_index;
 186         struct rte_sched_queue *queue[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
 187         struct rte_mbuf **qbase[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
 188         uint32_t qindex[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
 189         uint16_t qsize;
 190         uint32_t qmask;
 191         uint32_t qpos;
 192         struct rte_mbuf *pkt;
 193
 194         /* WRR */
 195         uint16_t wrr_tokens[RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS];
 196         uint16_t wrr_mask[RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS];
 197         uint8_t wrr_cost[RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS];
 198 };
 199
 200 struct rte_sched_port {
 201         /* User parameters */
 202         uint32_t n_subports_per_port;
 203         uint32_t n_pipes_per_subport;
 204         uint32_t rate;
 205         uint32_t mtu;
 206         uint32_t frame_overhead;
 207         uint16_t qsize[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
 208         uint32_t n_pipe_profiles;
 209         uint32_t pipe_tc3_rate_max;
 210 #ifdef RTE_SCHED_RED
 211         struct rte_red_config red_config[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE][e_RTE_METER_COLORS];
 212 #endif
 213
 214         /* Timing */
 215         uint64_t time_cpu_cycles;     /* Current CPU time measured in CPU cyles */
 216         uint64_t time_cpu_bytes;      /* Current CPU time measured in bytes */
 217         uint64_t time;                /* Current NIC TX time measured in bytes */
 218         double cycles_per_byte;       /* CPU cycles per byte */
 219
 220         /* Scheduling loop detection */
 221         uint32_t pipe_loop;
 222         uint32_t pipe_exhaustion;
 223
 224         /* Bitmap */
 225         struct rte_bitmap *bmp;
 226         uint32_t grinder_base_bmp_pos[RTE_SCHED_PORT_N_GRINDERS] __rte_aligned_16;
 227
 228         /* Grinders */
 229         struct rte_sched_grinder grinder[RTE_SCHED_PORT_N_GRINDERS];
 230         uint32_t busy_grinders;
 231         struct rte_mbuf **pkts_out;
 232         uint32_t n_pkts_out;
 233
 234         /* Queue base calculation */
 235         uint32_t qsize_add[RTE_SCHED_QUEUES_PER_PIPE];
 236         uint32_t qsize_sum;
 237
 238         /* Large data structures */
 239         struct rte_sched_subport *subport;
 240         struct rte_sched_pipe *pipe;
 241         struct rte_sched_queue *queue;
 242         struct rte_sched_queue_extra *queue_extra;
 243         struct rte_sched_pipe_profile *pipe_profiles;
 244         uint8_t *bmp_array;
 245         struct rte_mbuf **queue_array;
 246         uint8_t memory[0] __rte_cache_aligned;
 247 } __rte_cache_aligned;
 248
 249 enum rte_sched_port_array {
 250         e_RTE_SCHED_PORT_ARRAY_SUBPORT = 0,
 251         e_RTE_SCHED_PORT_ARRAY_PIPE,
 252         e_RTE_SCHED_PORT_ARRAY_QUEUE,
 253         e_RTE_SCHED_PORT_ARRAY_QUEUE_EXTRA,
 254         e_RTE_SCHED_PORT_ARRAY_PIPE_PROFILES,
 255         e_RTE_SCHED_PORT_ARRAY_BMP_ARRAY,
 256         e_RTE_SCHED_PORT_ARRAY_QUEUE_ARRAY,
 257         e_RTE_SCHED_PORT_ARRAY_TOTAL,
 258 };
 259
 260 #ifdef RTE_SCHED_COLLECT_STATS
 261
 262 static inline uint32_t
 263 rte_sched_port_queues_per_subport(struct rte_sched_port *port)
 264 {
 265         return RTE_SCHED_QUEUES_PER_PIPE * port->n_pipes_per_subport;
 266 }
 267
 268 #endif
 269
 270 static inline uint32_t
 271 rte_sched_port_queues_per_port(struct rte_sched_port *port)
 272 {
 273         return RTE_SCHED_QUEUES_PER_PIPE * port->n_pipes_per_subport * port->n_subports_per_port;
 274 }
 275
 276 static int
 277 rte_sched_port_check_params(struct rte_sched_port_params *params)
 278 {
 279         uint32_t i, j;
 280
 281         if (params == NULL)
 282                 return -1;
 283
 284         /* socket */
 285         if ((params->socket < 0) || (params->socket >= RTE_MAX_NUMA_NODES))
 286                 return -3;
 287
 288         /* rate */
 289         if (params->rate == 0)
 290                 return -4;
 291
 292         /* mtu */
 293         if (params->mtu == 0)
 294                 return -5;
 295
 296         /* n_subports_per_port: non-zero, limited to 16 bits, power of 2 */
 297         if (params->n_subports_per_port == 0 ||
 298             params->n_subports_per_port > 1u << 16 ||
 299             !rte_is_power_of_2(params->n_subports_per_port))
 300                 return -6;
 301
 302         /* n_pipes_per_subport: non-zero, power of 2 */
 303         if (params->n_pipes_per_subport == 0 ||
 304             !rte_is_power_of_2(params->n_pipes_per_subport))
 305                 return -7;
 306
 307         /* qsize: non-zero, power of 2,
 308          * no bigger than 32K (due to 16-bit read/write pointers)
 309          */
 310         for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) {
 311                 uint16_t qsize = params->qsize[i];
 312
 313                 if (qsize == 0 || !rte_is_power_of_2(qsize))
 314                         return -8;
 315         }
 316
 317         /* pipe_profiles and n_pipe_profiles */
 318         if (params->pipe_profiles == NULL ||
 319             params->n_pipe_profiles == 0 ||
 320             params->n_pipe_profiles > RTE_SCHED_PIPE_PROFILES_PER_PORT)
 321                 return -9;
 322
 323         for (i = 0; i < params->n_pipe_profiles; i++) {
 324                 struct rte_sched_pipe_params *p = params->pipe_profiles + i;
 325
 326                 /* TB rate: non-zero, not greater than port rate */
 327                 if (p->tb_rate == 0 || p->tb_rate > params->rate)
 328                         return -10;
 329
 330                 /* TB size: non-zero */
 331                 if (p->tb_size == 0)
 332                         return -11;
 333
 334                 /* TC rate: non-zero, less than pipe rate */
 335                 for (j = 0; j < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; j++) {
 336                         if (p->tc_rate[j] == 0 || p->tc_rate[j] > p->tb_rate)
 337                                 return -12;
 338                 }
 339
 340                 /* TC period: non-zero */
 341                 if (p->tc_period == 0)
 342                         return -13;
 343
 344 #ifdef RTE_SCHED_SUBPORT_TC_OV
 345                 /* TC3 oversubscription weight: non-zero */
 346                 if (p->tc_ov_weight == 0)
 347                         return -14;
 348 #endif
 349
 350                 /* Queue WRR weights: non-zero */
 351                 for (j = 0; j < RTE_SCHED_QUEUES_PER_PIPE; j++) {
 352                         if (p->wrr_weights[j] == 0)
 353                                 return -15;
 354                 }
 355         }
 356
 357         return 0;
 358 }
 359
 360 static uint32_t
 361 rte_sched_port_get_array_base(struct rte_sched_port_params *params, enum rte_sched_port_array array)
 362 {
 363         uint32_t n_subports_per_port = params->n_subports_per_port;
 364         uint32_t n_pipes_per_subport = params->n_pipes_per_subport;
 365         uint32_t n_pipes_per_port = n_pipes_per_subport * n_subports_per_port;
 366         uint32_t n_queues_per_port = RTE_SCHED_QUEUES_PER_PIPE * n_pipes_per_subport * n_subports_per_port;
 367
 368         uint32_t size_subport = n_subports_per_port * sizeof(struct rte_sched_subport);
 369         uint32_t size_pipe = n_pipes_per_port * sizeof(struct rte_sched_pipe);
 370         uint32_t size_queue = n_queues_per_port * sizeof(struct rte_sched_queue);
 371         uint32_t size_queue_extra
 372                 = n_queues_per_port * sizeof(struct rte_sched_queue_extra);
 373         uint32_t size_pipe_profiles
 374                 = RTE_SCHED_PIPE_PROFILES_PER_PORT * sizeof(struct rte_sched_pipe_profile);
 375         uint32_t size_bmp_array = rte_bitmap_get_memory_footprint(n_queues_per_port);
 376         uint32_t size_per_pipe_queue_array, size_queue_array;
 377
 378         uint32_t base, i;
 379
 380         size_per_pipe_queue_array = 0;
 381         for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) {
 382                 size_per_pipe_queue_array += RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS
 383                         * params->qsize[i] * sizeof(struct rte_mbuf *);
 384         }
 385         size_queue_array = n_pipes_per_port * size_per_pipe_queue_array;
 386
 387         base = 0;
 388
 389         if (array == e_RTE_SCHED_PORT_ARRAY_SUBPORT)
 390                 return base;
 391         base += RTE_CACHE_LINE_ROUNDUP(size_subport);
 392
 393         if (array == e_RTE_SCHED_PORT_ARRAY_PIPE)
 394                 return base;
 395         base += RTE_CACHE_LINE_ROUNDUP(size_pipe);
 396
 397         if (array == e_RTE_SCHED_PORT_ARRAY_QUEUE)
 398                 return base;
 399         base += RTE_CACHE_LINE_ROUNDUP(size_queue);
 400
 401         if (array == e_RTE_SCHED_PORT_ARRAY_QUEUE_EXTRA)
 402                 return base;
 403         base += RTE_CACHE_LINE_ROUNDUP(size_queue_extra);
 404
 405         if (array == e_RTE_SCHED_PORT_ARRAY_PIPE_PROFILES)
 406                 return base;
 407         base += RTE_CACHE_LINE_ROUNDUP(size_pipe_profiles);
 408
 409         if (array == e_RTE_SCHED_PORT_ARRAY_BMP_ARRAY)
 410                 return base;
 411         base += RTE_CACHE_LINE_ROUNDUP(size_bmp_array);
 412
 413         if (array == e_RTE_SCHED_PORT_ARRAY_QUEUE_ARRAY)
 414                 return base;
 415         base += RTE_CACHE_LINE_ROUNDUP(size_queue_array);
 416
 417         return base;
 418 }
 419
 420 uint32_t
 421 rte_sched_port_get_memory_footprint(struct rte_sched_port_params *params)
 422 {
 423         uint32_t size0, size1;
 424         int status;
 425
 426         status = rte_sched_port_check_params(params);
 427         if (status != 0) {
 428                 RTE_LOG(NOTICE, SCHED,
 429                         "Port scheduler params check failed (%d)\n", status);
 430
 431                 return 0;
 432         }
 433
 434         size0 = sizeof(struct rte_sched_port);
 435         size1 = rte_sched_port_get_array_base(params, e_RTE_SCHED_PORT_ARRAY_TOTAL);
 436
 437         return (size0 + size1);
 438 }
 439
 440 static void
 441 rte_sched_port_config_qsize(struct rte_sched_port *port)
 442 {
 443         /* TC 0 */
 444         port->qsize_add[0] = 0;
 445         port->qsize_add[1] = port->qsize_add[0] + port->qsize[0];
 446         port->qsize_add[2] = port->qsize_add[1] + port->qsize[0];
 447         port->qsize_add[3] = port->qsize_add[2] + port->qsize[0];
 448
 449         /* TC 1 */
 450         port->qsize_add[4] = port->qsize_add[3] + port->qsize[0];
 451         port->qsize_add[5] = port->qsize_add[4] + port->qsize[1];
 452         port->qsize_add[6] = port->qsize_add[5] + port->qsize[1];
 453         port->qsize_add[7] = port->qsize_add[6] + port->qsize[1];
 454
 455         /* TC 2 */
 456         port->qsize_add[8] = port->qsize_add[7] + port->qsize[1];
 457         port->qsize_add[9] = port->qsize_add[8] + port->qsize[2];
 458         port->qsize_add[10] = port->qsize_add[9] + port->qsize[2];
 459         port->qsize_add[11] = port->qsize_add[10] + port->qsize[2];
 460
 461         /* TC 3 */
 462         port->qsize_add[12] = port->qsize_add[11] + port->qsize[2];
 463         port->qsize_add[13] = port->qsize_add[12] + port->qsize[3];
 464         port->qsize_add[14] = port->qsize_add[13] + port->qsize[3];
 465         port->qsize_add[15] = port->qsize_add[14] + port->qsize[3];
 466
 467         port->qsize_sum = port->qsize_add[15] + port->qsize[3];
 468 }
 469
 470 static void
 471 rte_sched_port_log_pipe_profile(struct rte_sched_port *port, uint32_t i)
 472 {
 473         struct rte_sched_pipe_profile *p = port->pipe_profiles + i;
 474
 475         RTE_LOG(DEBUG, SCHED, "Low level config for pipe profile %u:\n"
 476                 "    Token bucket: period = %u, credits per period = %u, size = %u\n"
 477                 "    Traffic classes: period = %u, credits per period = [%u, %u, %u, %u]\n"
 478                 "    Traffic class 3 oversubscription: weight = %hhu\n"
 479                 "    WRR cost: [%hhu, %hhu, %hhu, %hhu], [%hhu, %hhu, %hhu, %hhu], [%hhu, %hhu, %hhu, %hhu], [%hhu, %hhu, %hhu, %hhu]\n",
 480                 i,
 481
 482                 /* Token bucket */
 483                 p->tb_period,
 484                 p->tb_credits_per_period,
 485                 p->tb_size,
 486
 487                 /* Traffic classes */
 488                 p->tc_period,
 489                 p->tc_credits_per_period[0],
 490                 p->tc_credits_per_period[1],
 491                 p->tc_credits_per_period[2],
 492                 p->tc_credits_per_period[3],
 493
 494                 /* Traffic class 3 oversubscription */
 495                 p->tc_ov_weight,
 496
 497                 /* WRR */
 498                 p->wrr_cost[ 0], p->wrr_cost[ 1], p->wrr_cost[ 2], p->wrr_cost[ 3],
 499                 p->wrr_cost[ 4], p->wrr_cost[ 5], p->wrr_cost[ 6], p->wrr_cost[ 7],
 500                 p->wrr_cost[ 8], p->wrr_cost[ 9], p->wrr_cost[10], p->wrr_cost[11],
 501                 p->wrr_cost[12], p->wrr_cost[13], p->wrr_cost[14], p->wrr_cost[15]);
 502 }
 503
 504 static inline uint64_t
 505 rte_sched_time_ms_to_bytes(uint32_t time_ms, uint32_t rate)
 506 {
 507         uint64_t time = time_ms;
 508
 509         time = (time * rate) / 1000;
 510
 511         return time;
 512 }
 513
 514 static void
 515 rte_sched_port_config_pipe_profile_table(struct rte_sched_port *port, struct rte_sched_port_params *params)
 516 {
 517         uint32_t i, j;
 518
 519         for (i = 0; i < port->n_pipe_profiles; i++) {
 520                 struct rte_sched_pipe_params *src = params->pipe_profiles + i;
 521                 struct rte_sched_pipe_profile *dst = port->pipe_profiles + i;
 522
 523                 /* Token Bucket */
 524                 if (src->tb_rate == params->rate) {
 525                         dst->tb_credits_per_period = 1;
 526                         dst->tb_period = 1;
 527                 } else {
 528                         double tb_rate = (double) src->tb_rate
 529                                 / (double) params->rate;
 530                         double d = RTE_SCHED_TB_RATE_CONFIG_ERR;
 531
 532                         rte_approx(tb_rate, d,
 533                                    &dst->tb_credits_per_period, &dst->tb_period);
 534                 }
 535                 dst->tb_size = src->tb_size;
 536
 537                 /* Traffic Classes */
 538                 dst->tc_period = rte_sched_time_ms_to_bytes(src->tc_period,
 539                                                             params->rate);
 540
 541                 for (j = 0; j < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; j++)
 542                         dst->tc_credits_per_period[j]
 543                                 = rte_sched_time_ms_to_bytes(src->tc_period,
 544                                                              src->tc_rate[j]);
 545
 546 #ifdef RTE_SCHED_SUBPORT_TC_OV
 547                 dst->tc_ov_weight = src->tc_ov_weight;
 548 #endif
 549
 550                 /* WRR */
 551                 for (j = 0; j < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; j++) {
 552                         uint32_t wrr_cost[RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS];
 553                         uint32_t lcd, lcd1, lcd2;
 554                         uint32_t qindex;
 555
 556                         qindex = j * RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS;
 557
 558                         wrr_cost[0] = src->wrr_weights[qindex];
 559                         wrr_cost[1] = src->wrr_weights[qindex + 1];
 560                         wrr_cost[2] = src->wrr_weights[qindex + 2];
 561                         wrr_cost[3] = src->wrr_weights[qindex + 3];
 562
 563                         lcd1 = rte_get_lcd(wrr_cost[0], wrr_cost[1]);
 564                         lcd2 = rte_get_lcd(wrr_cost[2], wrr_cost[3]);
 565                         lcd = rte_get_lcd(lcd1, lcd2);
 566
 567                         wrr_cost[0] = lcd / wrr_cost[0];
 568                         wrr_cost[1] = lcd / wrr_cost[1];
 569                         wrr_cost[2] = lcd / wrr_cost[2];
 570                         wrr_cost[3] = lcd / wrr_cost[3];
 571
 572                         dst->wrr_cost[qindex] = (uint8_t) wrr_cost[0];
 573                         dst->wrr_cost[qindex + 1] = (uint8_t) wrr_cost[1];
 574                         dst->wrr_cost[qindex + 2] = (uint8_t) wrr_cost[2];
 575                         dst->wrr_cost[qindex + 3] = (uint8_t) wrr_cost[3];
 576                 }
 577
 578                 rte_sched_port_log_pipe_profile(port, i);
 579         }
 580
 581         port->pipe_tc3_rate_max = 0;
 582         for (i = 0; i < port->n_pipe_profiles; i++) {
 583                 struct rte_sched_pipe_params *src = params->pipe_profiles + i;
 584                 uint32_t pipe_tc3_rate = src->tc_rate[3];
 585
 586                 if (port->pipe_tc3_rate_max < pipe_tc3_rate)
 587                         port->pipe_tc3_rate_max = pipe_tc3_rate;
 588         }
 589 }
 590
 591 struct rte_sched_port *
 592 rte_sched_port_config(struct rte_sched_port_params *params)
 593 {
 594         struct rte_sched_port *port = NULL;
 595         uint32_t mem_size, bmp_mem_size, n_queues_per_port, i;
 596
 597         /* Check user parameters. Determine the amount of memory to allocate */
 598         mem_size = rte_sched_port_get_memory_footprint(params);
 599         if (mem_size == 0)
 600                 return NULL;
 601
 602         /* Allocate memory to store the data structures */
 603         port = rte_zmalloc("qos_params", mem_size, RTE_CACHE_LINE_SIZE);
 604         if (port == NULL)
 605                 return NULL;
 606
 607         /* compile time checks */
 608         RTE_BUILD_BUG_ON(RTE_SCHED_PORT_N_GRINDERS == 0);
 609         RTE_BUILD_BUG_ON(RTE_SCHED_PORT_N_GRINDERS & (RTE_SCHED_PORT_N_GRINDERS - 1));
 610
 611         /* User parameters */
 612         port->n_subports_per_port = params->n_subports_per_port;
 613         port->n_pipes_per_subport = params->n_pipes_per_subport;
 614         port->rate = params->rate;
 615         port->mtu = params->mtu + params->frame_overhead;
 616         port->frame_overhead = params->frame_overhead;
 617         memcpy(port->qsize, params->qsize, sizeof(params->qsize));
 618         port->n_pipe_profiles = params->n_pipe_profiles;
 619
 620 #ifdef RTE_SCHED_RED
 621         for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) {
 622                 uint32_t j;
 623
 624                 for (j = 0; j < e_RTE_METER_COLORS; j++) {
 625                         /* if min/max are both zero, then RED is disabled */
 626                         if ((params->red_params[i][j].min_th |
 627                              params->red_params[i][j].max_th) == 0) {
 628                                 continue;
 629                         }
 630
 631                         if (rte_red_config_init(&port->red_config[i][j],
 632                                 params->red_params[i][j].wq_log2,
 633                                 params->red_params[i][j].min_th,
 634                                 params->red_params[i][j].max_th,
 635                                 params->red_params[i][j].maxp_inv) != 0) {
 636                                 return NULL;
 637                         }
 638                 }
 639         }
 640 #endif
 641
 642         /* Timing */
 643         port->time_cpu_cycles = rte_get_tsc_cycles();
 644         port->time_cpu_bytes = 0;
 645         port->time = 0;
 646         port->cycles_per_byte = ((double) rte_get_tsc_hz()) / ((double) params->rate);
 647
 648         /* Scheduling loop detection */
 649         port->pipe_loop = RTE_SCHED_PIPE_INVALID;
 650         port->pipe_exhaustion = 0;
 651
 652         /* Grinders */
 653         port->busy_grinders = 0;
 654         port->pkts_out = NULL;
 655         port->n_pkts_out = 0;
 656
 657         /* Queue base calculation */
 658         rte_sched_port_config_qsize(port);
 659
 660         /* Large data structures */
 661         port->subport = (struct rte_sched_subport *)
 662                 (port->memory + rte_sched_port_get_array_base(params,
 663                                                               e_RTE_SCHED_PORT_ARRAY_SUBPORT));
 664         port->pipe = (struct rte_sched_pipe *)
 665                 (port->memory + rte_sched_port_get_array_base(params,
 666                                                               e_RTE_SCHED_PORT_ARRAY_PIPE));
 667         port->queue = (struct rte_sched_queue *)
 668                 (port->memory + rte_sched_port_get_array_base(params,
 669                                                               e_RTE_SCHED_PORT_ARRAY_QUEUE));
 670         port->queue_extra = (struct rte_sched_queue_extra *)
 671                 (port->memory + rte_sched_port_get_array_base(params,
 672                                                               e_RTE_SCHED_PORT_ARRAY_QUEUE_EXTRA));
 673         port->pipe_profiles = (struct rte_sched_pipe_profile *)
 674                 (port->memory + rte_sched_port_get_array_base(params,
 675                                                               e_RTE_SCHED_PORT_ARRAY_PIPE_PROFILES));
 676         port->bmp_array =  port->memory
 677                 + rte_sched_port_get_array_base(params, e_RTE_SCHED_PORT_ARRAY_BMP_ARRAY);
 678         port->queue_array = (struct rte_mbuf **)
 679                 (port->memory + rte_sched_port_get_array_base(params,
 680                                                               e_RTE_SCHED_PORT_ARRAY_QUEUE_ARRAY));
 681
 682         /* Pipe profile table */
 683         rte_sched_port_config_pipe_profile_table(port, params);
 684
 685         /* Bitmap */
 686         n_queues_per_port = rte_sched_port_queues_per_port(port);
 687         bmp_mem_size = rte_bitmap_get_memory_footprint(n_queues_per_port);
 688         port->bmp = rte_bitmap_init(n_queues_per_port, port->bmp_array,
 689                                     bmp_mem_size);
 690         if (port->bmp == NULL) {
 691                 RTE_LOG(ERR, SCHED, "Bitmap init error\n");
 692                 return NULL;
 693         }
 694
 695         for (i = 0; i < RTE_SCHED_PORT_N_GRINDERS; i++)
 696                 port->grinder_base_bmp_pos[i] = RTE_SCHED_PIPE_INVALID;
 697
 698
 699         return port;
 700 }
 701
 702 void
 703 rte_sched_port_free(struct rte_sched_port *port)
 704 {
 705         /* Check user parameters */
 706         if (port == NULL)
 707                 return;
 708
 709         rte_bitmap_free(port->bmp);
 710         rte_free(port);
 711 }
 712
 713 static void
 714 rte_sched_port_log_subport_config(struct rte_sched_port *port, uint32_t i)
 715 {
 716         struct rte_sched_subport *s = port->subport + i;
 717
 718         RTE_LOG(DEBUG, SCHED, "Low level config for subport %u:\n"
 719                 "    Token bucket: period = %u, credits per period = %u, size = %u\n"
 720                 "    Traffic classes: period = %u, credits per period = [%u, %u, %u, %u]\n"
 721                 "    Traffic class 3 oversubscription: wm min = %u, wm max = %u\n",
 722                 i,
 723
 724                 /* Token bucket */
 725                 s->tb_period,
 726                 s->tb_credits_per_period,
 727                 s->tb_size,
 728
 729                 /* Traffic classes */
 730                 s->tc_period,
 731                 s->tc_credits_per_period[0],
 732                 s->tc_credits_per_period[1],
 733                 s->tc_credits_per_period[2],
 734                 s->tc_credits_per_period[3],
 735
 736                 /* Traffic class 3 oversubscription */
 737                 s->tc_ov_wm_min,
 738                 s->tc_ov_wm_max);
 739 }
 740
 741 int
 742 rte_sched_subport_config(struct rte_sched_port *port,
 743         uint32_t subport_id,
 744         struct rte_sched_subport_params *params)
 745 {
 746         struct rte_sched_subport *s;
 747         uint32_t i;
 748
 749         /* Check user parameters */
 750         if (port == NULL ||
 751             subport_id >= port->n_subports_per_port ||
 752             params == NULL)
 753                 return -1;
 754
 755         if (params->tb_rate == 0 || params->tb_rate > port->rate)
 756                 return -2;
 757
 758         if (params->tb_size == 0)
 759                 return -3;
 760
 761         for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) {
 762                 if (params->tc_rate[i] == 0 ||
 763                     params->tc_rate[i] > params->tb_rate)
 764                         return -4;
 765         }
 766
 767         if (params->tc_period == 0)
 768                 return -5;
 769
 770         s = port->subport + subport_id;
 771
 772         /* Token Bucket (TB) */
 773         if (params->tb_rate == port->rate) {
 774                 s->tb_credits_per_period = 1;
 775                 s->tb_period = 1;
 776         } else {
 777                 double tb_rate = ((double) params->tb_rate) / ((double) port->rate);
 778                 double d = RTE_SCHED_TB_RATE_CONFIG_ERR;
 779
 780                 rte_approx(tb_rate, d, &s->tb_credits_per_period, &s->tb_period);
 781         }
 782
 783         s->tb_size = params->tb_size;
 784         s->tb_time = port->time;
 785         s->tb_credits = s->tb_size / 2;
 786
 787         /* Traffic Classes (TCs) */
 788         s->tc_period = rte_sched_time_ms_to_bytes(params->tc_period, port->rate);
 789         for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) {
 790                 s->tc_credits_per_period[i]
 791                         = rte_sched_time_ms_to_bytes(params->tc_period,
 792                                                      params->tc_rate[i]);
 793         }
 794         s->tc_time = port->time + s->tc_period;
 795         for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++)
 796                 s->tc_credits[i] = s->tc_credits_per_period[i];
 797
 798 #ifdef RTE_SCHED_SUBPORT_TC_OV
 799         /* TC oversubscription */
 800         s->tc_ov_wm_min = port->mtu;
 801         s->tc_ov_wm_max = rte_sched_time_ms_to_bytes(params->tc_period,
 802                                                      port->pipe_tc3_rate_max);
 803         s->tc_ov_wm = s->tc_ov_wm_max;
 804         s->tc_ov_period_id = 0;
 805         s->tc_ov = 0;
 806         s->tc_ov_n = 0;
 807         s->tc_ov_rate = 0;
 808 #endif
 809
 810         rte_sched_port_log_subport_config(port, subport_id);
 811
 812         return 0;
 813 }
 814
 815 int
 816 rte_sched_pipe_config(struct rte_sched_port *port,
 817         uint32_t subport_id,
 818         uint32_t pipe_id,
 819         int32_t pipe_profile)
 820 {
 821         struct rte_sched_subport *s;
 822         struct rte_sched_pipe *p;
 823         struct rte_sched_pipe_profile *params;
 824         uint32_t deactivate, profile, i;
 825
 826         /* Check user parameters */
 827         profile = (uint32_t) pipe_profile;
 828         deactivate = (pipe_profile < 0);
 829
 830         if (port == NULL ||
 831             subport_id >= port->n_subports_per_port ||
 832             pipe_id >= port->n_pipes_per_subport ||
 833             (!deactivate && profile >= port->n_pipe_profiles))
 834                 return -1;
 835
 836
 837         /* Check that subport configuration is valid */
 838         s = port->subport + subport_id;
 839         if (s->tb_period == 0)
 840                 return -2;
 841
 842         p = port->pipe + (subport_id * port->n_pipes_per_subport + pipe_id);
 843
 844         /* Handle the case when pipe already has a valid configuration */
 845         if (p->tb_time) {
 846                 params = port->pipe_profiles + p->profile;
 847
 848 #ifdef RTE_SCHED_SUBPORT_TC_OV
 849                 double subport_tc3_rate = (double) s->tc_credits_per_period[3]
 850                         / (double) s->tc_period;
 851                 double pipe_tc3_rate = (double) params->tc_credits_per_period[3]
 852                         / (double) params->tc_period;
 853                 uint32_t tc3_ov = s->tc_ov;
 854
 855                 /* Unplug pipe from its subport */
 856                 s->tc_ov_n -= params->tc_ov_weight;
 857                 s->tc_ov_rate -= pipe_tc3_rate;
 858                 s->tc_ov = s->tc_ov_rate > subport_tc3_rate;
 859
 860                 if (s->tc_ov != tc3_ov) {
 861                         RTE_LOG(DEBUG, SCHED,
 862                                 "Subport %u TC3 oversubscription is OFF (%.4lf >= %.4lf)\n",
 863                                 subport_id, subport_tc3_rate, s->tc_ov_rate);
 864                 }
 865 #endif
 866
 867                 /* Reset the pipe */
 868                 memset(p, 0, sizeof(struct rte_sched_pipe));
 869         }
 870
 871         if (deactivate)
 872                 return 0;
 873
 874         /* Apply the new pipe configuration */
 875         p->profile = profile;
 876         params = port->pipe_profiles + p->profile;
 877
 878         /* Token Bucket (TB) */
 879         p->tb_time = port->time;
 880         p->tb_credits = params->tb_size / 2;
 881
 882         /* Traffic Classes (TCs) */
 883         p->tc_time = port->time + params->tc_period;
 884         for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++)
 885                 p->tc_credits[i] = params->tc_credits_per_period[i];
 886
 887 #ifdef RTE_SCHED_SUBPORT_TC_OV
 888         {
 889                 /* Subport TC3 oversubscription */
 890                 double subport_tc3_rate = (double) s->tc_credits_per_period[3]
 891                         / (double) s->tc_period;
 892                 double pipe_tc3_rate = (double) params->tc_credits_per_period[3]
 893                         / (double) params->tc_period;
 894                 uint32_t tc3_ov = s->tc_ov;
 895
 896                 s->tc_ov_n += params->tc_ov_weight;
 897                 s->tc_ov_rate += pipe_tc3_rate;
 898                 s->tc_ov = s->tc_ov_rate > subport_tc3_rate;
 899
 900                 if (s->tc_ov != tc3_ov) {
 901                         RTE_LOG(DEBUG, SCHED,
 902                                 "Subport %u TC3 oversubscription is ON (%.4lf < %.4lf)\n",
 903                                 subport_id, subport_tc3_rate, s->tc_ov_rate);
 904                 }
 905                 p->tc_ov_period_id = s->tc_ov_period_id;
 906                 p->tc_ov_credits = s->tc_ov_wm;
 907         }
 908 #endif
 909
 910         return 0;
 911 }
 912
 913 void
 914 rte_sched_port_pkt_write(struct rte_mbuf *pkt,
 915                          uint32_t subport, uint32_t pipe, uint32_t traffic_class,
 916                          uint32_t queue, enum rte_meter_color color)
 917 {
 918         struct rte_sched_port_hierarchy *sched
 919                 = (struct rte_sched_port_hierarchy *) &pkt->hash.sched;
 920
 921         RTE_BUILD_BUG_ON(sizeof(*sched) > sizeof(pkt->hash.sched));
 922
 923         sched->color = (uint32_t) color;
 924         sched->subport = subport;
 925         sched->pipe = pipe;
 926         sched->traffic_class = traffic_class;
 927         sched->queue = queue;
 928 }
 929
 930 void
 931 rte_sched_port_pkt_read_tree_path(const struct rte_mbuf *pkt,
 932                                   uint32_t *subport, uint32_t *pipe,
 933                                   uint32_t *traffic_class, uint32_t *queue)
 934 {
 935         const struct rte_sched_port_hierarchy *sched
 936                 = (const struct rte_sched_port_hierarchy *) &pkt->hash.sched;
 937
 938         *subport = sched->subport;
 939         *pipe = sched->pipe;
 940         *traffic_class = sched->traffic_class;
 941         *queue = sched->queue;
 942 }
 943
 944 enum rte_meter_color
 945 rte_sched_port_pkt_read_color(const struct rte_mbuf *pkt)
 946 {
 947         const struct rte_sched_port_hierarchy *sched
 948                 = (const struct rte_sched_port_hierarchy *) &pkt->hash.sched;
 949
 950         return (enum rte_meter_color) sched->color;
 951 }
 952
 953 int
 954 rte_sched_subport_read_stats(struct rte_sched_port *port,
 955                              uint32_t subport_id,
 956                              struct rte_sched_subport_stats *stats,
 957                              uint32_t *tc_ov)
 958 {
 959         struct rte_sched_subport *s;
 960
 961         /* Check user parameters */
 962         if (port == NULL || subport_id >= port->n_subports_per_port ||
 963             stats == NULL || tc_ov == NULL)
 964                 return -1;
 965
 966         s = port->subport + subport_id;
 967
 968         /* Copy subport stats and clear */
 969         memcpy(stats, &s->stats, sizeof(struct rte_sched_subport_stats));
 970         memset(&s->stats, 0, sizeof(struct rte_sched_subport_stats));
 971
 972         /* Subport TC ovesubscription status */
 973         *tc_ov = s->tc_ov;
 974
 975         return 0;
 976 }
 977
 978 int
 979 rte_sched_queue_read_stats(struct rte_sched_port *port,
 980         uint32_t queue_id,
 981         struct rte_sched_queue_stats *stats,
 982         uint16_t *qlen)
 983 {
 984         struct rte_sched_queue *q;
 985         struct rte_sched_queue_extra *qe;
 986
 987         /* Check user parameters */
 988         if ((port == NULL) ||
 989             (queue_id >= rte_sched_port_queues_per_port(port)) ||
 990                 (stats == NULL) ||
 991                 (qlen == NULL)) {
 992                 return -1;
 993         }
 994         q = port->queue + queue_id;
 995         qe = port->queue_extra + queue_id;
 996
 997         /* Copy queue stats and clear */
 998         memcpy(stats, &qe->stats, sizeof(struct rte_sched_queue_stats));
 999         memset(&qe->stats, 0, sizeof(struct rte_sched_queue_stats));
1000
1001         /* Queue length */
1002         *qlen = q->qw - q->qr;
1003
1004         return 0;
1005 }
1006
1007 static inline uint32_t
1008 rte_sched_port_qindex(struct rte_sched_port *port, uint32_t subport, uint32_t pipe, uint32_t traffic_class, uint32_t queue)
1009 {
1010         uint32_t result;
1011
1012         result = subport * port->n_pipes_per_subport + pipe;
1013         result = result * RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE + traffic_class;
1014         result = result * RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS + queue;
1015
1016         return result;
1017 }
1018
1019 static inline struct rte_mbuf **
1020 rte_sched_port_qbase(struct rte_sched_port *port, uint32_t qindex)
1021 {
1022         uint32_t pindex = qindex >> 4;
1023         uint32_t qpos = qindex & 0xF;
1024
1025         return (port->queue_array + pindex * port->qsize_sum + port->qsize_add[qpos]);
1026 }
1027
1028 static inline uint16_t
1029 rte_sched_port_qsize(struct rte_sched_port *port, uint32_t qindex)
1030 {
1031         uint32_t tc = (qindex >> 2) & 0x3;
1032
1033         return port->qsize[tc];
1034 }
1035
1036 #ifdef RTE_SCHED_DEBUG
1037
1038 static inline int
1039 rte_sched_port_queue_is_empty(struct rte_sched_port *port, uint32_t qindex)
1040 {
1041         struct rte_sched_queue *queue = port->queue + qindex;
1042
1043         return (queue->qr == queue->qw);
1044 }
1045
1046 static inline int
1047 rte_sched_port_queue_is_full(struct rte_sched_port *port, uint32_t qindex)
1048 {
1049         struct rte_sched_queue *queue = port->queue + qindex;
1050         uint16_t qsize = rte_sched_port_qsize(port, qindex);
1051         uint16_t qlen = queue->qw - queue->qr;
1052
1053         return (qlen >= qsize);
1054 }
1055
1056 #endif /* RTE_SCHED_DEBUG */
1057
1058 #ifdef RTE_SCHED_COLLECT_STATS
1059
1060 static inline void
1061 rte_sched_port_update_subport_stats(struct rte_sched_port *port, uint32_t qindex, struct rte_mbuf *pkt)
1062 {
1063         struct rte_sched_subport *s = port->subport + (qindex / rte_sched_port_queues_per_subport(port));
1064         uint32_t tc_index = (qindex >> 2) & 0x3;
1065         uint32_t pkt_len = pkt->pkt_len;
1066
1067         s->stats.n_pkts_tc[tc_index] += 1;
1068         s->stats.n_bytes_tc[tc_index] += pkt_len;
1069 }
1070
1071 static inline void
1072 rte_sched_port_update_subport_stats_on_drop(struct rte_sched_port *port, uint32_t qindex, struct rte_mbuf *pkt)
1073 {
1074         struct rte_sched_subport *s = port->subport + (qindex / rte_sched_port_queues_per_subport(port));
1075         uint32_t tc_index = (qindex >> 2) & 0x3;
1076         uint32_t pkt_len = pkt->pkt_len;
1077
1078         s->stats.n_pkts_tc_dropped[tc_index] += 1;
1079         s->stats.n_bytes_tc_dropped[tc_index] += pkt_len;
1080 }
1081
1082 static inline void
1083 rte_sched_port_update_queue_stats(struct rte_sched_port *port, uint32_t qindex, struct rte_mbuf *pkt)
1084 {
1085         struct rte_sched_queue_extra *qe = port->queue_extra + qindex;
1086         uint32_t pkt_len = pkt->pkt_len;
1087
1088         qe->stats.n_pkts += 1;
1089         qe->stats.n_bytes += pkt_len;
1090 }
1091
1092 static inline void
1093 rte_sched_port_update_queue_stats_on_drop(struct rte_sched_port *port, uint32_t qindex, struct rte_mbuf *pkt)
1094 {
1095         struct rte_sched_queue_extra *qe = port->queue_extra + qindex;
1096         uint32_t pkt_len = pkt->pkt_len;
1097
1098         qe->stats.n_pkts_dropped += 1;
1099         qe->stats.n_bytes_dropped += pkt_len;
1100 }
1101
1102 #endif /* RTE_SCHED_COLLECT_STATS */
1103
1104 #ifdef RTE_SCHED_RED
1105
1106 static inline int
1107 rte_sched_port_red_drop(struct rte_sched_port *port, struct rte_mbuf *pkt, uint32_t qindex, uint16_t qlen)
1108 {
1109         struct rte_sched_queue_extra *qe;
1110         struct rte_red_config *red_cfg;
1111         struct rte_red *red;
1112         uint32_t tc_index;
1113         enum rte_meter_color color;
1114
1115         tc_index = (qindex >> 2) & 0x3;
1116         color = rte_sched_port_pkt_read_color(pkt);
1117         red_cfg = &port->red_config[tc_index][color];
1118
1119         if ((red_cfg->min_th | red_cfg->max_th) == 0)
1120                 return 0;
1121
1122         qe = port->queue_extra + qindex;
1123         red = &qe->red;
1124
1125         return rte_red_enqueue(red_cfg, red, qlen, port->time);
1126 }
1127
1128 static inline void
1129 rte_sched_port_set_queue_empty_timestamp(struct rte_sched_port *port, uint32_t qindex)
1130 {
1131         struct rte_sched_queue_extra *qe = port->queue_extra + qindex;
1132         struct rte_red *red = &qe->red;
1133
1134         rte_red_mark_queue_empty(red, port->time);
1135 }
1136
1137 #else
1138
1139 #define rte_sched_port_red_drop(port, pkt, qindex, qlen)             0
1140
1141 #define rte_sched_port_set_queue_empty_timestamp(port, qindex)
1142
1143 #endif /* RTE_SCHED_RED */
1144
1145 #ifdef RTE_SCHED_DEBUG
1146
1147 static inline int
1148 debug_pipe_is_empty(struct rte_sched_port *port, uint32_t pindex)
1149 {
1150         uint32_t qindex, i;
1151
1152         qindex = pindex << 4;
1153
1154         for (i = 0; i < 16; i++) {
1155                 uint32_t queue_empty = rte_sched_port_queue_is_empty(port, qindex + i);
1156                 uint32_t bmp_bit_clear = (rte_bitmap_get(port->bmp, qindex + i) == 0);
1157
1158                 if (queue_empty != bmp_bit_clear)
1159                         rte_panic("Queue status mismatch for queue %u of pipe %u\n", i, pindex);
1160
1161                 if (!queue_empty)
1162                         return 0;
1163         }
1164
1165         return 1;
1166 }
1167
1168 static inline void
1169 debug_check_queue_slab(struct rte_sched_port *port, uint32_t bmp_pos,
1170                        uint64_t bmp_slab)
1171 {
1172         uint64_t mask;
1173         uint32_t i, panic;
1174
1175         if (bmp_slab == 0)
1176                 rte_panic("Empty slab at position %u\n", bmp_pos);
1177
1178         panic = 0;
1179         for (i = 0, mask = 1; i < 64; i++, mask <<= 1) {
1180                 if (mask & bmp_slab) {
1181                         if (rte_sched_port_queue_is_empty(port, bmp_pos + i)) {
1182                                 printf("Queue %u (slab offset %u) is empty\n", bmp_pos + i, i);
1183                                 panic = 1;
1184                         }
1185                 }
1186         }
1187
1188         if (panic)
1189                 rte_panic("Empty queues in slab 0x%" PRIx64 "starting at position %u\n",
1190                         bmp_slab, bmp_pos);
1191 }
1192
1193 #endif /* RTE_SCHED_DEBUG */
1194
1195 static inline uint32_t
1196 rte_sched_port_enqueue_qptrs_prefetch0(struct rte_sched_port *port,
1197                                        struct rte_mbuf *pkt)
1198 {
1199         struct rte_sched_queue *q;
1200 #ifdef RTE_SCHED_COLLECT_STATS
1201         struct rte_sched_queue_extra *qe;
1202 #endif
1203         uint32_t subport, pipe, traffic_class, queue, qindex;
1204
1205         rte_sched_port_pkt_read_tree_path(pkt, &subport, &pipe, &traffic_class, &queue);
1206
1207         qindex = rte_sched_port_qindex(port, subport, pipe, traffic_class, queue);
1208         q = port->queue + qindex;
1209         rte_prefetch0(q);
1210 #ifdef RTE_SCHED_COLLECT_STATS
1211         qe = port->queue_extra + qindex;
1212         rte_prefetch0(qe);
1213 #endif
1214
1215         return qindex;
1216 }
1217
1218 static inline void
1219 rte_sched_port_enqueue_qwa_prefetch0(struct rte_sched_port *port,
1220                                      uint32_t qindex, struct rte_mbuf **qbase)
1221 {
1222         struct rte_sched_queue *q;
1223         struct rte_mbuf **q_qw;
1224         uint16_t qsize;
1225
1226         q = port->queue + qindex;
1227         qsize = rte_sched_port_qsize(port, qindex);
1228         q_qw = qbase + (q->qw & (qsize - 1));
1229
1230         rte_prefetch0(q_qw);
1231         rte_bitmap_prefetch0(port->bmp, qindex);
1232 }
1233
1234 static inline int
1235 rte_sched_port_enqueue_qwa(struct rte_sched_port *port, uint32_t qindex,
1236                            struct rte_mbuf **qbase, struct rte_mbuf *pkt)
1237 {
1238         struct rte_sched_queue *q;
1239         uint16_t qsize;
1240         uint16_t qlen;
1241
1242         q = port->queue + qindex;
1243         qsize = rte_sched_port_qsize(port, qindex);
1244         qlen = q->qw - q->qr;
1245
1246         /* Drop the packet (and update drop stats) when queue is full */
1247         if (unlikely(rte_sched_port_red_drop(port, pkt, qindex, qlen) ||
1248                      (qlen >= qsize))) {
1249                 rte_pktmbuf_free(pkt);
1250 #ifdef RTE_SCHED_COLLECT_STATS
1251                 rte_sched_port_update_subport_stats_on_drop(port, qindex, pkt);
1252                 rte_sched_port_update_queue_stats_on_drop(port, qindex, pkt);
1253 #endif
1254                 return 0;
1255         }
1256
1257         /* Enqueue packet */
1258         qbase[q->qw & (qsize - 1)] = pkt;
1259         q->qw++;
1260
1261         /* Activate queue in the port bitmap */
1262         rte_bitmap_set(port->bmp, qindex);
1263
1264         /* Statistics */
1265 #ifdef RTE_SCHED_COLLECT_STATS
1266         rte_sched_port_update_subport_stats(port, qindex, pkt);
1267         rte_sched_port_update_queue_stats(port, qindex, pkt);
1268 #endif
1269
1270         return 1;
1271 }
1272
1273
1274 /*
1275  * The enqueue function implements a 4-level pipeline with each stage
1276  * processing two different packets. The purpose of using a pipeline
1277  * is to hide the latency of prefetching the data structures. The
1278  * naming convention is presented in the diagram below:
1279  *
1280  *   p00  _______   p10  _______   p20  _______   p30  _______
1281  * ----->|       |----->|       |----->|       |----->|       |----->
1282  *       |   0   |      |   1   |      |   2   |      |   3   |
1283  * ----->|_______|----->|_______|----->|_______|----->|_______|----->
1284  *   p01            p11            p21            p31
1285  *
1286  */
1287 int
1288 rte_sched_port_enqueue(struct rte_sched_port *port, struct rte_mbuf **pkts,
1289                        uint32_t n_pkts)
1290 {
1291         struct rte_mbuf *pkt00, *pkt01, *pkt10, *pkt11, *pkt20, *pkt21,
1292                 *pkt30, *pkt31, *pkt_last;
1293         struct rte_mbuf **q00_base, **q01_base, **q10_base, **q11_base,
1294                 **q20_base, **q21_base, **q30_base, **q31_base, **q_last_base;
1295         uint32_t q00, q01, q10, q11, q20, q21, q30, q31, q_last;
1296         uint32_t r00, r01, r10, r11, r20, r21, r30, r31, r_last;
1297         uint32_t result, i;
1298
1299         result = 0;
1300
1301         /*
1302          * Less then 6 input packets available, which is not enough to
1303          * feed the pipeline
1304          */
1305         if (unlikely(n_pkts < 6)) {
1306                 struct rte_mbuf **q_base[5];
1307                 uint32_t q[5];
1308
1309                 /* Prefetch the mbuf structure of each packet */
1310                 for (i = 0; i < n_pkts; i++)
1311                         rte_prefetch0(pkts[i]);
1312
1313                 /* Prefetch the queue structure for each queue */
1314                 for (i = 0; i < n_pkts; i++)
1315                         q[i] = rte_sched_port_enqueue_qptrs_prefetch0(port,
1316                                                                       pkts[i]);
1317
1318                 /* Prefetch the write pointer location of each queue */
1319                 for (i = 0; i < n_pkts; i++) {
1320                         q_base[i] = rte_sched_port_qbase(port, q[i]);
1321                         rte_sched_port_enqueue_qwa_prefetch0(port, q[i],
1322                                                              q_base[i]);
1323                 }
1324
1325                 /* Write each packet to its queue */
1326                 for (i = 0; i < n_pkts; i++)
1327                         result += rte_sched_port_enqueue_qwa(port, q[i],
1328                                                              q_base[i], pkts[i]);
1329
1330                 return result;
1331         }
1332
1333         /* Feed the first 3 stages of the pipeline (6 packets needed) */
1334         pkt20 = pkts[0];
1335         pkt21 = pkts[1];
1336         rte_prefetch0(pkt20);
1337         rte_prefetch0(pkt21);
1338
1339         pkt10 = pkts[2];
1340         pkt11 = pkts[3];
1341         rte_prefetch0(pkt10);
1342         rte_prefetch0(pkt11);
1343
1344         q20 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt20);
1345         q21 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt21);
1346
1347         pkt00 = pkts[4];
1348         pkt01 = pkts[5];
1349         rte_prefetch0(pkt00);
1350         rte_prefetch0(pkt01);
1351
1352         q10 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt10);
1353         q11 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt11);
1354
1355         q20_base = rte_sched_port_qbase(port, q20);
1356         q21_base = rte_sched_port_qbase(port, q21);
1357         rte_sched_port_enqueue_qwa_prefetch0(port, q20, q20_base);
1358         rte_sched_port_enqueue_qwa_prefetch0(port, q21, q21_base);
1359
1360         /* Run the pipeline */
1361         for (i = 6; i < (n_pkts & (~1)); i += 2) {
1362                 /* Propagate stage inputs */
1363                 pkt30 = pkt20;
1364                 pkt31 = pkt21;
1365                 pkt20 = pkt10;
1366                 pkt21 = pkt11;
1367                 pkt10 = pkt00;
1368                 pkt11 = pkt01;
1369                 q30 = q20;
1370                 q31 = q21;
1371                 q20 = q10;
1372                 q21 = q11;
1373                 q30_base = q20_base;
1374                 q31_base = q21_base;
1375
1376                 /* Stage 0: Get packets in */
1377                 pkt00 = pkts[i];
1378                 pkt01 = pkts[i + 1];
1379                 rte_prefetch0(pkt00);
1380                 rte_prefetch0(pkt01);
1381
1382                 /* Stage 1: Prefetch queue structure storing queue pointers */
1383                 q10 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt10);
1384                 q11 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt11);
1385
1386                 /* Stage 2: Prefetch queue write location */
1387                 q20_base = rte_sched_port_qbase(port, q20);
1388                 q21_base = rte_sched_port_qbase(port, q21);
1389                 rte_sched_port_enqueue_qwa_prefetch0(port, q20, q20_base);
1390                 rte_sched_port_enqueue_qwa_prefetch0(port, q21, q21_base);
1391
1392                 /* Stage 3: Write packet to queue and activate queue */
1393                 r30 = rte_sched_port_enqueue_qwa(port, q30, q30_base, pkt30);
1394                 r31 = rte_sched_port_enqueue_qwa(port, q31, q31_base, pkt31);
1395                 result += r30 + r31;
1396         }
1397
1398         /*
1399          * Drain the pipeline (exactly 6 packets).
1400          * Handle the last packet in the case
1401          * of an odd number of input packets.
1402          */
1403         pkt_last = pkts[n_pkts - 1];
1404         rte_prefetch0(pkt_last);
1405
1406         q00 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt00);
1407         q01 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt01);
1408
1409         q10_base = rte_sched_port_qbase(port, q10);
1410         q11_base = rte_sched_port_qbase(port, q11);
1411         rte_sched_port_enqueue_qwa_prefetch0(port, q10, q10_base);
1412         rte_sched_port_enqueue_qwa_prefetch0(port, q11, q11_base);
1413
1414         r20 = rte_sched_port_enqueue_qwa(port, q20, q20_base, pkt20);
1415         r21 = rte_sched_port_enqueue_qwa(port, q21, q21_base, pkt21);
1416         result += r20 + r21;
1417
1418         q_last = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt_last);
1419
1420         q00_base = rte_sched_port_qbase(port, q00);
1421         q01_base = rte_sched_port_qbase(port, q01);
1422         rte_sched_port_enqueue_qwa_prefetch0(port, q00, q00_base);
1423         rte_sched_port_enqueue_qwa_prefetch0(port, q01, q01_base);
1424
1425         r10 = rte_sched_port_enqueue_qwa(port, q10, q10_base, pkt10);
1426         r11 = rte_sched_port_enqueue_qwa(port, q11, q11_base, pkt11);
1427         result += r10 + r11;
1428
1429         q_last_base = rte_sched_port_qbase(port, q_last);
1430         rte_sched_port_enqueue_qwa_prefetch0(port, q_last, q_last_base);
1431
1432         r00 = rte_sched_port_enqueue_qwa(port, q00, q00_base, pkt00);
1433         r01 = rte_sched_port_enqueue_qwa(port, q01, q01_base, pkt01);
1434         result += r00 + r01;
1435
1436         if (n_pkts & 1) {
1437                 r_last = rte_sched_port_enqueue_qwa(port, q_last, q_last_base, pkt_last);
1438                 result += r_last;
1439         }
1440
1441         return result;
1442 }
1443
1444 #ifndef RTE_SCHED_SUBPORT_TC_OV
1445
1446 static inline void
1447 grinder_credits_update(struct rte_sched_port *port, uint32_t pos)
1448 {
1449         struct rte_sched_grinder *grinder = port->grinder + pos;
1450         struct rte_sched_subport *subport = grinder->subport;
1451         struct rte_sched_pipe *pipe = grinder->pipe;
1452         struct rte_sched_pipe_profile *params = grinder->pipe_params;
1453         uint64_t n_periods;
1454
1455         /* Subport TB */
1456         n_periods = (port->time - subport->tb_time) / subport->tb_period;
1457         subport->tb_credits += n_periods * subport->tb_credits_per_period;
1458         subport->tb_credits = rte_sched_min_val_2_u32(subport->tb_credits, subport->tb_size);
1459         subport->tb_time += n_periods * subport->tb_period;
1460
1461         /* Pipe TB */
1462         n_periods = (port->time - pipe->tb_time) / params->tb_period;
1463         pipe->tb_credits += n_periods * params->tb_credits_per_period;
1464         pipe->tb_credits = rte_sched_min_val_2_u32(pipe->tb_credits, params->tb_size);
1465         pipe->tb_time += n_periods * params->tb_period;
1466
1467         /* Subport TCs */
1468         if (unlikely(port->time >= subport->tc_time)) {
1469                 subport->tc_credits[0] = subport->tc_credits_per_period[0];
1470                 subport->tc_credits[1] = subport->tc_credits_per_period[1];
1471                 subport->tc_credits[2] = subport->tc_credits_per_period[2];
1472                 subport->tc_credits[3] = subport->tc_credits_per_period[3];
1473                 subport->tc_time = port->time + subport->tc_period;
1474         }
1475
1476         /* Pipe TCs */
1477         if (unlikely(port->time >= pipe->tc_time)) {
1478                 pipe->tc_credits[0] = params->tc_credits_per_period[0];
1479                 pipe->tc_credits[1] = params->tc_credits_per_period[1];
1480                 pipe->tc_credits[2] = params->tc_credits_per_period[2];
1481                 pipe->tc_credits[3] = params->tc_credits_per_period[3];
1482                 pipe->tc_time = port->time + params->tc_period;
1483         }
1484 }
1485
1486 #else
1487
1488 static inline uint32_t
1489 grinder_tc_ov_credits_update(struct rte_sched_port *port, uint32_t pos)
1490 {
1491         struct rte_sched_grinder *grinder = port->grinder + pos;
1492         struct rte_sched_subport *subport = grinder->subport;
1493         uint32_t tc_ov_consumption[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
1494         uint32_t tc_ov_consumption_max;
1495         uint32_t tc_ov_wm = subport->tc_ov_wm;
1496
1497         if (subport->tc_ov == 0)
1498                 return subport->tc_ov_wm_max;
1499
1500         tc_ov_consumption[0] = subport->tc_credits_per_period[0] - subport->tc_credits[0];
1501         tc_ov_consumption[1] = subport->tc_credits_per_period[1] - subport->tc_credits[1];
1502         tc_ov_consumption[2] = subport->tc_credits_per_period[2] - subport->tc_credits[2];
1503         tc_ov_consumption[3] = subport->tc_credits_per_period[3] - subport->tc_credits[3];
1504
1505         tc_ov_consumption_max = subport->tc_credits_per_period[3] -
1506                 (tc_ov_consumption[0] + tc_ov_consumption[1] + tc_ov_consumption[2]);
1507
1508         if (tc_ov_consumption[3] > (tc_ov_consumption_max - port->mtu)) {
1509                 tc_ov_wm  -= tc_ov_wm >> 7;
1510                 if (tc_ov_wm < subport->tc_ov_wm_min)
1511                         tc_ov_wm = subport->tc_ov_wm_min;
1512
1513                 return tc_ov_wm;
1514         }
1515
1516         tc_ov_wm += (tc_ov_wm >> 7) + 1;
1517         if (tc_ov_wm > subport->tc_ov_wm_max)
1518                 tc_ov_wm = subport->tc_ov_wm_max;
1519
1520         return tc_ov_wm;
1521 }
1522
1523 static inline void
1524 grinder_credits_update(struct rte_sched_port *port, uint32_t pos)
1525 {
1526         struct rte_sched_grinder *grinder = port->grinder + pos;
1527         struct rte_sched_subport *subport = grinder->subport;
1528         struct rte_sched_pipe *pipe = grinder->pipe;
1529         struct rte_sched_pipe_profile *params = grinder->pipe_params;
1530         uint64_t n_periods;
1531
1532         /* Subport TB */
1533         n_periods = (port->time - subport->tb_time) / subport->tb_period;
1534         subport->tb_credits += n_periods * subport->tb_credits_per_period;
1535         subport->tb_credits = rte_sched_min_val_2_u32(subport->tb_credits, subport->tb_size);
1536         subport->tb_time += n_periods * subport->tb_period;
1537
1538         /* Pipe TB */
1539         n_periods = (port->time - pipe->tb_time) / params->tb_period;
1540         pipe->tb_credits += n_periods * params->tb_credits_per_period;
1541         pipe->tb_credits = rte_sched_min_val_2_u32(pipe->tb_credits, params->tb_size);
1542         pipe->tb_time += n_periods * params->tb_period;
1543
1544         /* Subport TCs */
1545         if (unlikely(port->time >= subport->tc_time)) {
1546                 subport->tc_ov_wm = grinder_tc_ov_credits_update(port, pos);
1547
1548                 subport->tc_credits[0] = subport->tc_credits_per_period[0];
1549                 subport->tc_credits[1] = subport->tc_credits_per_period[1];
1550                 subport->tc_credits[2] = subport->tc_credits_per_period[2];
1551                 subport->tc_credits[3] = subport->tc_credits_per_period[3];
1552
1553                 subport->tc_time = port->time + subport->tc_period;
1554                 subport->tc_ov_period_id++;
1555         }
1556
1557         /* Pipe TCs */
1558         if (unlikely(port->time >= pipe->tc_time)) {
1559                 pipe->tc_credits[0] = params->tc_credits_per_period[0];
1560                 pipe->tc_credits[1] = params->tc_credits_per_period[1];
1561                 pipe->tc_credits[2] = params->tc_credits_per_period[2];
1562                 pipe->tc_credits[3] = params->tc_credits_per_period[3];
1563                 pipe->tc_time = port->time + params->tc_period;
1564         }
1565
1566         /* Pipe TCs - Oversubscription */
1567         if (unlikely(pipe->tc_ov_period_id != subport->tc_ov_period_id)) {
1568                 pipe->tc_ov_credits = subport->tc_ov_wm * params->tc_ov_weight;
1569
1570                 pipe->tc_ov_period_id = subport->tc_ov_period_id;
1571         }
1572 }
1573
1574 #endif /* RTE_SCHED_TS_CREDITS_UPDATE, RTE_SCHED_SUBPORT_TC_OV */
1575
1576
1577 #ifndef RTE_SCHED_SUBPORT_TC_OV
1578
1579 static inline int
1580 grinder_credits_check(struct rte_sched_port *port, uint32_t pos)
1581 {
1582         struct rte_sched_grinder *grinder = port->grinder + pos;
1583         struct rte_sched_subport *subport = grinder->subport;
1584         struct rte_sched_pipe *pipe = grinder->pipe;
1585         struct rte_mbuf *pkt = grinder->pkt;
1586         uint32_t tc_index = grinder->tc_index;
1587         uint32_t pkt_len = pkt->pkt_len + port->frame_overhead;
1588         uint32_t subport_tb_credits = subport->tb_credits;
1589         uint32_t subport_tc_credits = subport->tc_credits[tc_index];
1590         uint32_t pipe_tb_credits = pipe->tb_credits;
1591         uint32_t pipe_tc_credits = pipe->tc_credits[tc_index];
1592         int enough_credits;
1593
1594         /* Check queue credits */
1595         enough_credits = (pkt_len <= subport_tb_credits) &&
1596                 (pkt_len <= subport_tc_credits) &&
1597                 (pkt_len <= pipe_tb_credits) &&
1598                 (pkt_len <= pipe_tc_credits);
1599
1600         if (!enough_credits)
1601                 return 0;
1602
1603         /* Update port credits */
1604         subport->tb_credits -= pkt_len;
1605         subport->tc_credits[tc_index] -= pkt_len;
1606         pipe->tb_credits -= pkt_len;
1607         pipe->tc_credits[tc_index] -= pkt_len;
1608
1609         return 1;
1610 }
1611
1612 #else
1613
1614 static inline int
1615 grinder_credits_check(struct rte_sched_port *port, uint32_t pos)
1616 {
1617         struct rte_sched_grinder *grinder = port->grinder + pos;
1618         struct rte_sched_subport *subport = grinder->subport;
1619         struct rte_sched_pipe *pipe = grinder->pipe;
1620         struct rte_mbuf *pkt = grinder->pkt;
1621         uint32_t tc_index = grinder->tc_index;
1622         uint32_t pkt_len = pkt->pkt_len + port->frame_overhead;
1623         uint32_t subport_tb_credits = subport->tb_credits;
1624         uint32_t subport_tc_credits = subport->tc_credits[tc_index];
1625         uint32_t pipe_tb_credits = pipe->tb_credits;
1626         uint32_t pipe_tc_credits = pipe->tc_credits[tc_index];
1627         uint32_t pipe_tc_ov_mask1[] = {UINT32_MAX, UINT32_MAX, UINT32_MAX, pipe->tc_ov_credits};
1628         uint32_t pipe_tc_ov_mask2[] = {0, 0, 0, UINT32_MAX};
1629         uint32_t pipe_tc_ov_credits = pipe_tc_ov_mask1[tc_index];
1630         int enough_credits;
1631
1632         /* Check pipe and subport credits */
1633         enough_credits = (pkt_len <= subport_tb_credits) &&
1634                 (pkt_len <= subport_tc_credits) &&
1635                 (pkt_len <= pipe_tb_credits) &&
1636                 (pkt_len <= pipe_tc_credits) &&
1637                 (pkt_len <= pipe_tc_ov_credits);
1638
1639         if (!enough_credits)
1640                 return 0;
1641
1642         /* Update pipe and subport credits */
1643         subport->tb_credits -= pkt_len;
1644         subport->tc_credits[tc_index] -= pkt_len;
1645         pipe->tb_credits -= pkt_len;
1646         pipe->tc_credits[tc_index] -= pkt_len;
1647         pipe->tc_ov_credits -= pipe_tc_ov_mask2[tc_index] & pkt_len;
1648
1649         return 1;
1650 }
1651
1652 #endif /* RTE_SCHED_SUBPORT_TC_OV */
1653
1654
1655 static inline int
1656 grinder_schedule(struct rte_sched_port *port, uint32_t pos)
1657 {
1658         struct rte_sched_grinder *grinder = port->grinder + pos;
1659         struct rte_sched_queue *queue = grinder->queue[grinder->qpos];
1660         struct rte_mbuf *pkt = grinder->pkt;
1661         uint32_t pkt_len = pkt->pkt_len + port->frame_overhead;
1662
1663         if (!grinder_credits_check(port, pos))
1664                 return 0;
1665
1666         /* Advance port time */
1667         port->time += pkt_len;
1668
1669         /* Send packet */
1670         port->pkts_out[port->n_pkts_out++] = pkt;
1671         queue->qr++;
1672         grinder->wrr_tokens[grinder->qpos] += pkt_len * grinder->wrr_cost[grinder->qpos];
1673         if (queue->qr == queue->qw) {
1674                 uint32_t qindex = grinder->qindex[grinder->qpos];
1675
1676                 rte_bitmap_clear(port->bmp, qindex);
1677                 grinder->qmask &= ~(1 << grinder->qpos);
1678                 grinder->wrr_mask[grinder->qpos] = 0;
1679                 rte_sched_port_set_queue_empty_timestamp(port, qindex);
1680         }
1681
1682         /* Reset pipe loop detection */
1683         port->pipe_loop = RTE_SCHED_PIPE_INVALID;
1684         grinder->productive = 1;
1685
1686         return 1;
1687 }
1688
1689 #ifdef RTE_SCHED_VECTOR
1690
1691 static inline int
1692 grinder_pipe_exists(struct rte_sched_port *port, uint32_t base_pipe)
1693 {
1694         __m128i index = _mm_set1_epi32(base_pipe);
1695         __m128i pipes = _mm_load_si128((__m128i *)port->grinder_base_bmp_pos);
1696         __m128i res = _mm_cmpeq_epi32(pipes, index);
1697
1698         pipes = _mm_load_si128((__m128i *)(port->grinder_base_bmp_pos + 4));
1699         pipes = _mm_cmpeq_epi32(pipes, index);
1700         res = _mm_or_si128(res, pipes);
1701
1702         if (_mm_testz_si128(res, res))
1703                 return 0;
1704
1705         return 1;
1706 }
1707
1708 #else
1709
1710 static inline int
1711 grinder_pipe_exists(struct rte_sched_port *port, uint32_t base_pipe)
1712 {
1713         uint32_t i;
1714
1715         for (i = 0; i < RTE_SCHED_PORT_N_GRINDERS; i++) {
1716                 if (port->grinder_base_bmp_pos[i] == base_pipe)
1717                         return 1;
1718         }
1719
1720         return 0;
1721 }
1722
1723 #endif /* RTE_SCHED_OPTIMIZATIONS */
1724
1725 static inline void
1726 grinder_pcache_populate(struct rte_sched_port *port, uint32_t pos, uint32_t bmp_pos, uint64_t bmp_slab)
1727 {
1728         struct rte_sched_grinder *grinder = port->grinder + pos;
1729         uint16_t w[4];
1730
1731         grinder->pcache_w = 0;
1732         grinder->pcache_r = 0;
1733
1734         w[0] = (uint16_t) bmp_slab;
1735         w[1] = (uint16_t) (bmp_slab >> 16);
1736         w[2] = (uint16_t) (bmp_slab >> 32);
1737         w[3] = (uint16_t) (bmp_slab >> 48);
1738
1739         grinder->pcache_qmask[grinder->pcache_w] = w[0];
1740         grinder->pcache_qindex[grinder->pcache_w] = bmp_pos;
1741         grinder->pcache_w += (w[0] != 0);
1742
1743         grinder->pcache_qmask[grinder->pcache_w] = w[1];
1744         grinder->pcache_qindex[grinder->pcache_w] = bmp_pos + 16;
1745         grinder->pcache_w += (w[1] != 0);
1746
1747         grinder->pcache_qmask[grinder->pcache_w] = w[2];
1748         grinder->pcache_qindex[grinder->pcache_w] = bmp_pos + 32;
1749         grinder->pcache_w += (w[2] != 0);
1750
1751         grinder->pcache_qmask[grinder->pcache_w] = w[3];
1752         grinder->pcache_qindex[grinder->pcache_w] = bmp_pos + 48;
1753         grinder->pcache_w += (w[3] != 0);
1754 }
1755
1756 static inline void
1757 grinder_tccache_populate(struct rte_sched_port *port, uint32_t pos, uint32_t qindex, uint16_t qmask)
1758 {
1759         struct rte_sched_grinder *grinder = port->grinder + pos;
1760         uint8_t b[4];
1761
1762         grinder->tccache_w = 0;
1763         grinder->tccache_r = 0;
1764
1765         b[0] = (uint8_t) (qmask & 0xF);
1766         b[1] = (uint8_t) ((qmask >> 4) & 0xF);
1767         b[2] = (uint8_t) ((qmask >> 8) & 0xF);
1768         b[3] = (uint8_t) ((qmask >> 12) & 0xF);
1769
1770         grinder->tccache_qmask[grinder->tccache_w] = b[0];
1771         grinder->tccache_qindex[grinder->tccache_w] = qindex;
1772         grinder->tccache_w += (b[0] != 0);
1773
1774         grinder->tccache_qmask[grinder->tccache_w] = b[1];
1775         grinder->tccache_qindex[grinder->tccache_w] = qindex + 4;
1776         grinder->tccache_w += (b[1] != 0);
1777
1778         grinder->tccache_qmask[grinder->tccache_w] = b[2];
1779         grinder->tccache_qindex[grinder->tccache_w] = qindex + 8;
1780         grinder->tccache_w += (b[2] != 0);
1781
1782         grinder->tccache_qmask[grinder->tccache_w] = b[3];
1783         grinder->tccache_qindex[grinder->tccache_w] = qindex + 12;
1784         grinder->tccache_w += (b[3] != 0);
1785 }
1786
1787 static inline int
1788 grinder_next_tc(struct rte_sched_port *port, uint32_t pos)
1789 {
1790         struct rte_sched_grinder *grinder = port->grinder + pos;
1791         struct rte_mbuf **qbase;
1792         uint32_t qindex;
1793         uint16_t qsize;
1794
1795         if (grinder->tccache_r == grinder->tccache_w)
1796                 return 0;
1797
1798         qindex = grinder->tccache_qindex[grinder->tccache_r];
1799         qbase = rte_sched_port_qbase(port, qindex);
1800         qsize = rte_sched_port_qsize(port, qindex);
1801
1802         grinder->tc_index = (qindex >> 2) & 0x3;
1803         grinder->qmask = grinder->tccache_qmask[grinder->tccache_r];
1804         grinder->qsize = qsize;
1805
1806         grinder->qindex[0] = qindex;
1807         grinder->qindex[1] = qindex + 1;
1808         grinder->qindex[2] = qindex + 2;
1809         grinder->qindex[3] = qindex + 3;
1810
1811         grinder->queue[0] = port->queue + qindex;
1812         grinder->queue[1] = port->queue + qindex + 1;
1813         grinder->queue[2] = port->queue + qindex + 2;
1814         grinder->queue[3] = port->queue + qindex + 3;
1815
1816         grinder->qbase[0] = qbase;
1817         grinder->qbase[1] = qbase + qsize;
1818         grinder->qbase[2] = qbase + 2 * qsize;
1819         grinder->qbase[3] = qbase + 3 * qsize;
1820
1821         grinder->tccache_r++;
1822         return 1;
1823 }
1824
1825 static inline int
1826 grinder_next_pipe(struct rte_sched_port *port, uint32_t pos)
1827 {
1828         struct rte_sched_grinder *grinder = port->grinder + pos;
1829         uint32_t pipe_qindex;
1830         uint16_t pipe_qmask;
1831
1832         if (grinder->pcache_r < grinder->pcache_w) {
1833                 pipe_qmask = grinder->pcache_qmask[grinder->pcache_r];
1834                 pipe_qindex = grinder->pcache_qindex[grinder->pcache_r];
1835                 grinder->pcache_r++;
1836         } else {
1837                 uint64_t bmp_slab = 0;
1838                 uint32_t bmp_pos = 0;
1839
1840                 /* Get another non-empty pipe group */
1841                 if (unlikely(rte_bitmap_scan(port->bmp, &bmp_pos, &bmp_slab) <= 0))
1842                         return 0;
1843
1844 #ifdef RTE_SCHED_DEBUG
1845                 debug_check_queue_slab(port, bmp_pos, bmp_slab);
1846 #endif
1847
1848                 /* Return if pipe group already in one of the other grinders */
1849                 port->grinder_base_bmp_pos[pos] = RTE_SCHED_BMP_POS_INVALID;
1850                 if (unlikely(grinder_pipe_exists(port, bmp_pos)))
1851                         return 0;
1852
1853                 port->grinder_base_bmp_pos[pos] = bmp_pos;
1854
1855                 /* Install new pipe group into grinder's pipe cache */
1856                 grinder_pcache_populate(port, pos, bmp_pos, bmp_slab);
1857
1858                 pipe_qmask = grinder->pcache_qmask[0];
1859                 pipe_qindex = grinder->pcache_qindex[0];
1860                 grinder->pcache_r = 1;
1861         }
1862
1863         /* Install new pipe in the grinder */
1864         grinder->pindex = pipe_qindex >> 4;
1865         grinder->subport = port->subport + (grinder->pindex / port->n_pipes_per_subport);
1866         grinder->pipe = port->pipe + grinder->pindex;
1867         grinder->pipe_params = NULL; /* to be set after the pipe structure is prefetched */
1868         grinder->productive = 0;
1869
1870         grinder_tccache_populate(port, pos, pipe_qindex, pipe_qmask);
1871         grinder_next_tc(port, pos);
1872
1873         /* Check for pipe exhaustion */
1874         if (grinder->pindex == port->pipe_loop) {
1875                 port->pipe_exhaustion = 1;
1876                 port->pipe_loop = RTE_SCHED_PIPE_INVALID;
1877         }
1878
1879         return 1;
1880 }
1881
1882
1883 static inline void
1884 grinder_wrr_load(struct rte_sched_port *port, uint32_t pos)
1885 {
1886         struct rte_sched_grinder *grinder = port->grinder + pos;
1887         struct rte_sched_pipe *pipe = grinder->pipe;
1888         struct rte_sched_pipe_profile *pipe_params = grinder->pipe_params;
1889         uint32_t tc_index = grinder->tc_index;
1890         uint32_t qmask = grinder->qmask;
1891         uint32_t qindex;
1892
1893         qindex = tc_index * 4;
1894
1895         grinder->wrr_tokens[0] = ((uint16_t) pipe->wrr_tokens[qindex]) << RTE_SCHED_WRR_SHIFT;
1896         grinder->wrr_tokens[1] = ((uint16_t) pipe->wrr_tokens[qindex + 1]) << RTE_SCHED_WRR_SHIFT;
1897         grinder->wrr_tokens[2] = ((uint16_t) pipe->wrr_tokens[qindex + 2]) << RTE_SCHED_WRR_SHIFT;
1898         grinder->wrr_tokens[3] = ((uint16_t) pipe->wrr_tokens[qindex + 3]) << RTE_SCHED_WRR_SHIFT;
1899
1900         grinder->wrr_mask[0] = (qmask & 0x1) * 0xFFFF;
1901         grinder->wrr_mask[1] = ((qmask >> 1) & 0x1) * 0xFFFF;
1902         grinder->wrr_mask[2] = ((qmask >> 2) & 0x1) * 0xFFFF;
1903         grinder->wrr_mask[3] = ((qmask >> 3) & 0x1) * 0xFFFF;
1904
1905         grinder->wrr_cost[0] = pipe_params->wrr_cost[qindex];
1906         grinder->wrr_cost[1] = pipe_params->wrr_cost[qindex + 1];
1907         grinder->wrr_cost[2] = pipe_params->wrr_cost[qindex + 2];
1908         grinder->wrr_cost[3] = pipe_params->wrr_cost[qindex + 3];
1909 }
1910
1911 static inline void
1912 grinder_wrr_store(struct rte_sched_port *port, uint32_t pos)
1913 {
1914         struct rte_sched_grinder *grinder = port->grinder + pos;
1915         struct rte_sched_pipe *pipe = grinder->pipe;
1916         uint32_t tc_index = grinder->tc_index;
1917         uint32_t qindex;
1918
1919         qindex = tc_index * 4;
1920
1921         pipe->wrr_tokens[qindex] = (grinder->wrr_tokens[0] & grinder->wrr_mask[0])
1922                 >> RTE_SCHED_WRR_SHIFT;
1923         pipe->wrr_tokens[qindex + 1] = (grinder->wrr_tokens[1] & grinder->wrr_mask[1])
1924                 >> RTE_SCHED_WRR_SHIFT;
1925         pipe->wrr_tokens[qindex + 2] = (grinder->wrr_tokens[2] & grinder->wrr_mask[2])
1926                 >> RTE_SCHED_WRR_SHIFT;
1927         pipe->wrr_tokens[qindex + 3] = (grinder->wrr_tokens[3] & grinder->wrr_mask[3])
1928                 >> RTE_SCHED_WRR_SHIFT;
1929 }
1930
1931 static inline void
1932 grinder_wrr(struct rte_sched_port *port, uint32_t pos)
1933 {
1934         struct rte_sched_grinder *grinder = port->grinder + pos;
1935         uint16_t wrr_tokens_min;
1936
1937         grinder->wrr_tokens[0] |= ~grinder->wrr_mask[0];
1938         grinder->wrr_tokens[1] |= ~grinder->wrr_mask[1];
1939         grinder->wrr_tokens[2] |= ~grinder->wrr_mask[2];
1940         grinder->wrr_tokens[3] |= ~grinder->wrr_mask[3];
1941
1942         grinder->qpos = rte_min_pos_4_u16(grinder->wrr_tokens);
1943         wrr_tokens_min = grinder->wrr_tokens[grinder->qpos];
1944
1945         grinder->wrr_tokens[0] -= wrr_tokens_min;
1946         grinder->wrr_tokens[1] -= wrr_tokens_min;
1947         grinder->wrr_tokens[2] -= wrr_tokens_min;
1948         grinder->wrr_tokens[3] -= wrr_tokens_min;
1949 }
1950
1951
1952 #define grinder_evict(port, pos)
1953
1954 static inline void
1955 grinder_prefetch_pipe(struct rte_sched_port *port, uint32_t pos)
1956 {
1957         struct rte_sched_grinder *grinder = port->grinder + pos;
1958
1959         rte_prefetch0(grinder->pipe);
1960         rte_prefetch0(grinder->queue[0]);
1961 }
1962
1963 static inline void
1964 grinder_prefetch_tc_queue_arrays(struct rte_sched_port *port, uint32_t pos)
1965 {
1966         struct rte_sched_grinder *grinder = port->grinder + pos;
1967         uint16_t qsize, qr[4];
1968
1969         qsize = grinder->qsize;
1970         qr[0] = grinder->queue[0]->qr & (qsize - 1);
1971         qr[1] = grinder->queue[1]->qr & (qsize - 1);
1972         qr[2] = grinder->queue[2]->qr & (qsize - 1);
1973         qr[3] = grinder->queue[3]->qr & (qsize - 1);
1974
1975         rte_prefetch0(grinder->qbase[0] + qr[0]);
1976         rte_prefetch0(grinder->qbase[1] + qr[1]);
1977
1978         grinder_wrr_load(port, pos);
1979         grinder_wrr(port, pos);
1980
1981         rte_prefetch0(grinder->qbase[2] + qr[2]);
1982         rte_prefetch0(grinder->qbase[3] + qr[3]);
1983 }
1984
1985 static inline void
1986 grinder_prefetch_mbuf(struct rte_sched_port *port, uint32_t pos)
1987 {
1988         struct rte_sched_grinder *grinder = port->grinder + pos;
1989         uint32_t qpos = grinder->qpos;
1990         struct rte_mbuf **qbase = grinder->qbase[qpos];
1991         uint16_t qsize = grinder->qsize;
1992         uint16_t qr = grinder->queue[qpos]->qr & (qsize - 1);
1993
1994         grinder->pkt = qbase[qr];
1995         rte_prefetch0(grinder->pkt);
1996
1997         if (unlikely((qr & 0x7) == 7)) {
1998                 uint16_t qr_next = (grinder->queue[qpos]->qr + 1) & (qsize - 1);
1999
2000                 rte_prefetch0(qbase + qr_next);
2001         }
2002 }
2003
2004 static inline uint32_t
2005 grinder_handle(struct rte_sched_port *port, uint32_t pos)
2006 {
2007         struct rte_sched_grinder *grinder = port->grinder + pos;
2008
2009         switch (grinder->state) {
2010         case e_GRINDER_PREFETCH_PIPE:
2011         {
2012                 if (grinder_next_pipe(port, pos)) {
2013                         grinder_prefetch_pipe(port, pos);
2014                         port->busy_grinders++;
2015
2016                         grinder->state = e_GRINDER_PREFETCH_TC_QUEUE_ARRAYS;
2017                         return 0;
2018                 }
2019
2020                 return 0;
2021         }
2022
2023         case e_GRINDER_PREFETCH_TC_QUEUE_ARRAYS:
2024         {
2025                 struct rte_sched_pipe *pipe = grinder->pipe;
2026
2027                 grinder->pipe_params = port->pipe_profiles + pipe->profile;
2028                 grinder_prefetch_tc_queue_arrays(port, pos);
2029                 grinder_credits_update(port, pos);
2030
2031                 grinder->state = e_GRINDER_PREFETCH_MBUF;
2032                 return 0;
2033         }
2034
2035         case e_GRINDER_PREFETCH_MBUF:
2036         {
2037                 grinder_prefetch_mbuf(port, pos);
2038
2039                 grinder->state = e_GRINDER_READ_MBUF;
2040                 return 0;
2041         }
2042
2043         case e_GRINDER_READ_MBUF:
2044         {
2045                 uint32_t result = 0;
2046
2047                 result = grinder_schedule(port, pos);
2048
2049                 /* Look for next packet within the same TC */
2050                 if (result && grinder->qmask) {
2051                         grinder_wrr(port, pos);
2052                         grinder_prefetch_mbuf(port, pos);
2053
2054                         return 1;
2055                 }
2056                 grinder_wrr_store(port, pos);
2057
2058                 /* Look for another active TC within same pipe */
2059                 if (grinder_next_tc(port, pos)) {
2060                         grinder_prefetch_tc_queue_arrays(port, pos);
2061
2062                         grinder->state = e_GRINDER_PREFETCH_MBUF;
2063                         return result;
2064                 }
2065
2066                 if (grinder->productive == 0 &&
2067                     port->pipe_loop == RTE_SCHED_PIPE_INVALID)
2068                         port->pipe_loop = grinder->pindex;
2069
2070                 grinder_evict(port, pos);
2071
2072                 /* Look for another active pipe */
2073                 if (grinder_next_pipe(port, pos)) {
2074                         grinder_prefetch_pipe(port, pos);
2075
2076                         grinder->state = e_GRINDER_PREFETCH_TC_QUEUE_ARRAYS;
2077                         return result;
2078                 }
2079
2080                 /* No active pipe found */
2081                 port->busy_grinders--;
2082
2083                 grinder->state = e_GRINDER_PREFETCH_PIPE;
2084                 return result;
2085         }
2086
2087         default:
2088                 rte_panic("Algorithmic error (invalid state)\n");
2089                 return 0;
2090         }
2091 }
2092
2093 static inline void
2094 rte_sched_port_time_resync(struct rte_sched_port *port)
2095 {
2096         uint64_t cycles = rte_get_tsc_cycles();
2097         uint64_t cycles_diff = cycles - port->time_cpu_cycles;
2098         double bytes_diff = ((double) cycles_diff) / port->cycles_per_byte;
2099
2100         /* Advance port time */
2101         port->time_cpu_cycles = cycles;
2102         port->time_cpu_bytes += (uint64_t) bytes_diff;
2103         if (port->time < port->time_cpu_bytes)
2104                 port->time = port->time_cpu_bytes;
2105
2106         /* Reset pipe loop detection */
2107         port->pipe_loop = RTE_SCHED_PIPE_INVALID;
2108 }
2109
2110 static inline int
2111 rte_sched_port_exceptions(struct rte_sched_port *port, int second_pass)
2112 {
2113         int exceptions;
2114
2115         /* Check if any exception flag is set */
2116         exceptions = (second_pass && port->busy_grinders == 0) ||
2117                 (port->pipe_exhaustion == 1);
2118
2119         /* Clear exception flags */
2120         port->pipe_exhaustion = 0;
2121
2122         return exceptions;
2123 }
2124
2125 int
2126 rte_sched_port_dequeue(struct rte_sched_port *port, struct rte_mbuf **pkts, uint32_t n_pkts)
2127 {
2128         uint32_t i, count;
2129
2130         port->pkts_out = pkts;
2131         port->n_pkts_out = 0;
2132
2133         rte_sched_port_time_resync(port);
2134
2135         /* Take each queue in the grinder one step further */
2136         for (i = 0, count = 0; ; i++)  {
2137                 count += grinder_handle(port, i & (RTE_SCHED_PORT_N_GRINDERS - 1));
2138                 if ((count == n_pkts) ||
2139                     rte_sched_port_exceptions(port, i >= RTE_SCHED_PORT_N_GRINDERS)) {
2140                         break;
2141                 }
2142         }
2143
2144         return count;
2145 }