net/i40e/base: refactor NVM update command processing
authorHelin Zhang <helin.zhang@intel.com>
Tue, 24 May 2016 06:22:57 +0000 (14:22 +0800)
committerBruce Richardson <bruce.richardson@intel.com>
Mon, 20 Jun 2016 15:21:49 +0000 (17:21 +0200)
This patch refactors the NVM update command processing, with adding
a new element of nvm_wait_opcode in struct i40e_hw to indicate
the opcode it waits on, and putting the wait event check into
a function. In addition, that element needs to be initialized
or updated properly.

Signed-off-by: Helin Zhang <helin.zhang@intel.com>
Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
drivers/net/i40e/base/i40e_adminq.c
drivers/net/i40e/base/i40e_nvm.c
drivers/net/i40e/base/i40e_prototype.h
drivers/net/i40e/base/i40e_type.h

index 15d5f5a..ba7ef42 100644 (file)
@@ -37,18 +37,6 @@ POSSIBILITY OF SUCH DAMAGE.
 #include "i40e_adminq.h"
 #include "i40e_prototype.h"
 
-#ifdef PF_DRIVER
-/**
- * i40e_is_nvm_update_op - return true if this is an NVM update operation
- * @desc: API request descriptor
- **/
-STATIC INLINE bool i40e_is_nvm_update_op(struct i40e_aq_desc *desc)
-{
-       return (desc->opcode == CPU_TO_LE16(i40e_aqc_opc_nvm_erase) ||
-               desc->opcode == CPU_TO_LE16(i40e_aqc_opc_nvm_update));
-}
-
-#endif /* PF_DRIVER */
 /**
  *  i40e_adminq_init_regs - Initialize AdminQ registers
  *  @hw: pointer to the hardware structure
@@ -1116,26 +1104,7 @@ enum i40e_status_code i40e_clean_arq_element(struct i40e_hw *hw,
        hw->aq.arq.next_to_use = ntu;
 
 #ifdef PF_DRIVER
-       if (i40e_is_nvm_update_op(&e->desc)) {
-               if (hw->nvm_release_on_done) {
-                       i40e_release_nvm(hw);
-                       hw->nvm_release_on_done = false;
-               }
-
-               switch (hw->nvmupd_state) {
-               case I40E_NVMUPD_STATE_INIT_WAIT:
-                       hw->nvmupd_state = I40E_NVMUPD_STATE_INIT;
-                       break;
-
-               case I40E_NVMUPD_STATE_WRITE_WAIT:
-                       hw->nvmupd_state = I40E_NVMUPD_STATE_WRITING;
-                       break;
-
-               default:
-                       break;
-               }
-       }
-
+       i40e_nvmupd_check_wait_event(hw, LE16_TO_CPU(e->desc.opcode));
 #endif
 clean_arq_element_out:
        /* Set pending if needed, unlock and return */
index 04e422f..4fa1220 100644 (file)
@@ -872,10 +872,10 @@ enum i40e_status_code i40e_nvmupd_command(struct i40e_hw *hw,
        /* early check for status command and debug msgs */
        upd_cmd = i40e_nvmupd_validate_command(hw, cmd, perrno);
 
-       i40e_debug(hw, I40E_DEBUG_NVM, "%s state %d nvm_release_on_hold %d cmd 0x%08x config 0x%08x offset 0x%08x data_size 0x%08x\n",
+       i40e_debug(hw, I40E_DEBUG_NVM, "%s state %d nvm_release_on_hold %d opc 0x%04x cmd 0x%08x config 0x%08x offset 0x%08x data_size 0x%08x\n",
                   i40e_nvm_update_state_str[upd_cmd],
                   hw->nvmupd_state,
-                  hw->nvm_release_on_done,
+                  hw->nvm_release_on_done, hw->nvm_wait_opcode,
                   cmd->command, cmd->config, cmd->offset, cmd->data_size);
 
        if (upd_cmd == I40E_NVMUPD_INVALID) {
@@ -889,7 +889,18 @@ enum i40e_status_code i40e_nvmupd_command(struct i40e_hw *hw,
         * going into the state machine
         */
        if (upd_cmd == I40E_NVMUPD_STATUS) {
+               if (!cmd->data_size) {
+                       *perrno = -EFAULT;
+                       return I40E_ERR_BUF_TOO_SHORT;
+               }
+
                bytes[0] = hw->nvmupd_state;
+
+               if (cmd->data_size >= 4) {
+                       bytes[1] = 0;
+                       *((u16 *)&bytes[2]) = hw->nvm_wait_opcode;
+               }
+
                return I40E_SUCCESS;
        }
 
@@ -908,6 +919,14 @@ enum i40e_status_code i40e_nvmupd_command(struct i40e_hw *hw,
 
        case I40E_NVMUPD_STATE_INIT_WAIT:
        case I40E_NVMUPD_STATE_WRITE_WAIT:
+               /* if we need to stop waiting for an event, clear
+                * the wait info and return before doing anything else
+                */
+               if (cmd->offset == 0xffff) {
+                       i40e_nvmupd_check_wait_event(hw, hw->nvm_wait_opcode);
+                       return I40E_SUCCESS;
+               }
+
                status = I40E_ERR_NOT_READY;
                *perrno = -EBUSY;
                break;
@@ -981,6 +1000,7 @@ STATIC enum i40e_status_code i40e_nvmupd_state_init(struct i40e_hw *hw,
                                i40e_release_nvm(hw);
                        } else {
                                hw->nvm_release_on_done = true;
+                               hw->nvm_wait_opcode = i40e_aqc_opc_nvm_erase;
                                hw->nvmupd_state = I40E_NVMUPD_STATE_INIT_WAIT;
                        }
                }
@@ -997,6 +1017,7 @@ STATIC enum i40e_status_code i40e_nvmupd_state_init(struct i40e_hw *hw,
                                i40e_release_nvm(hw);
                        } else {
                                hw->nvm_release_on_done = true;
+                               hw->nvm_wait_opcode = i40e_aqc_opc_nvm_update;
                                hw->nvmupd_state = I40E_NVMUPD_STATE_INIT_WAIT;
                        }
                }
@@ -1009,10 +1030,12 @@ STATIC enum i40e_status_code i40e_nvmupd_state_init(struct i40e_hw *hw,
                                                     hw->aq.asq_last_status);
                } else {
                        status = i40e_nvmupd_nvm_write(hw, cmd, bytes, perrno);
-                       if (status)
+                       if (status) {
                                i40e_release_nvm(hw);
-                       else
+                       } else {
+                               hw->nvm_wait_opcode = i40e_aqc_opc_nvm_update;
                                hw->nvmupd_state = I40E_NVMUPD_STATE_WRITE_WAIT;
+                       }
                }
                break;
 
@@ -1031,6 +1054,7 @@ STATIC enum i40e_status_code i40e_nvmupd_state_init(struct i40e_hw *hw,
                                i40e_release_nvm(hw);
                        } else {
                                hw->nvm_release_on_done = true;
+                               hw->nvm_wait_opcode = i40e_aqc_opc_nvm_update;
                                hw->nvmupd_state = I40E_NVMUPD_STATE_INIT_WAIT;
                        }
                }
@@ -1125,8 +1149,10 @@ retry:
        switch (upd_cmd) {
        case I40E_NVMUPD_WRITE_CON:
                status = i40e_nvmupd_nvm_write(hw, cmd, bytes, perrno);
-               if (!status)
+               if (!status) {
+                       hw->nvm_wait_opcode = i40e_aqc_opc_nvm_update;
                        hw->nvmupd_state = I40E_NVMUPD_STATE_WRITE_WAIT;
+               }
                break;
 
        case I40E_NVMUPD_WRITE_LCB:
@@ -1139,6 +1165,7 @@ retry:
                        hw->nvmupd_state = I40E_NVMUPD_STATE_INIT;
                } else {
                        hw->nvm_release_on_done = true;
+                       hw->nvm_wait_opcode = i40e_aqc_opc_nvm_update;
                        hw->nvmupd_state = I40E_NVMUPD_STATE_INIT_WAIT;
                }
                break;
@@ -1153,6 +1180,7 @@ retry:
                                   -EIO;
                        hw->nvmupd_state = I40E_NVMUPD_STATE_INIT;
                } else {
+                       hw->nvm_wait_opcode = i40e_aqc_opc_nvm_update;
                        hw->nvmupd_state = I40E_NVMUPD_STATE_WRITE_WAIT;
                }
                break;
@@ -1168,6 +1196,7 @@ retry:
                        hw->nvmupd_state = I40E_NVMUPD_STATE_INIT;
                } else {
                        hw->nvm_release_on_done = true;
+                       hw->nvm_wait_opcode = i40e_aqc_opc_nvm_update;
                        hw->nvmupd_state = I40E_NVMUPD_STATE_INIT_WAIT;
                }
                break;
@@ -1216,6 +1245,37 @@ retry:
        return status;
 }
 
+/**
+ * i40e_nvmupd_check_wait_event - handle NVM update operation events
+ * @hw: pointer to the hardware structure
+ * @opcode: the event that just happened
+ **/
+void i40e_nvmupd_check_wait_event(struct i40e_hw *hw, u16 opcode)
+{
+       if (opcode == hw->nvm_wait_opcode) {
+               i40e_debug(hw, I40E_DEBUG_NVM,
+                          "NVMUPD: clearing wait on opcode 0x%04x\n", opcode);
+               if (hw->nvm_release_on_done) {
+                       i40e_release_nvm(hw);
+                       hw->nvm_release_on_done = false;
+               }
+               hw->nvm_wait_opcode = 0;
+
+               switch (hw->nvmupd_state) {
+               case I40E_NVMUPD_STATE_INIT_WAIT:
+                       hw->nvmupd_state = I40E_NVMUPD_STATE_INIT;
+                       break;
+
+               case I40E_NVMUPD_STATE_WRITE_WAIT:
+                       hw->nvmupd_state = I40E_NVMUPD_STATE_WRITING;
+                       break;
+
+               default:
+                       break;
+               }
+       }
+}
+
 /**
  * i40e_nvmupd_validate_command - Validate given command
  * @hw: pointer to hardware structure
@@ -1378,6 +1438,12 @@ STATIC enum i40e_status_code i40e_nvmupd_exec_aq(struct i40e_hw *hw,
                *perrno = i40e_aq_rc_to_posix(status, hw->aq.asq_last_status);
        }
 
+       /* should we wait for a followup event? */
+       if (cmd->offset) {
+               hw->nvm_wait_opcode = cmd->offset;
+               hw->nvmupd_state = I40E_NVMUPD_STATE_INIT_WAIT;
+       }
+
        return status;
 }
 
index 3b57683..f93b530 100644 (file)
@@ -465,6 +465,7 @@ enum i40e_status_code i40e_validate_nvm_checksum(struct i40e_hw *hw,
 enum i40e_status_code i40e_nvmupd_command(struct i40e_hw *hw,
                                          struct i40e_nvm_access *cmd,
                                          u8 *bytes, int *);
+void i40e_nvmupd_check_wait_event(struct i40e_hw *hw, u16 opcode);
 void i40e_set_pci_config_data(struct i40e_hw *hw, u16 link_status);
 #endif /* PF_DRIVER */
 
index 696fea4..73a18e1 100644 (file)
@@ -656,6 +656,7 @@ struct i40e_hw {
        struct i40e_aq_desc nvm_wb_desc;
        struct i40e_virt_mem nvm_buff;
        bool nvm_release_on_done;
+       u16 nvm_wait_opcode;
 
        /* HMC info */
        struct i40e_hmc_info hmc; /* HMC info struct */