ixgbe/base: allow to disable link on D3

Signed-off-by: Jijiang Liu <jijiang.liu@intel.com>
Acked-by: Helin Zhang <helin.zhang@intel.com>
Tested-by: Waterman Cao <waterman.cao@intel.com>
[Thomas: split code drop]

diff --git a/lib/librte_pmd_ixgbe/ixgbe/ixgbe_82599.c b/lib/librte_pmd_ixgbe/ixgbe/ixgbe_82599.c
index 9706e93..51a5f0d 100644 (file)
--- a/lib/librte_pmd_ixgbe/ixgbe/ixgbe_82599.c
+++ b/lib/librte_pmd_ixgbe/ixgbe/ixgbe_82599.c
@@ -464,6 +464,33 @@ out:
        return media_type;
 }
 
+/**
+ *  ixgbe_stop_mac_link_on_d3_82599 - Disables link on D3
+ *  @hw: pointer to hardware structure
+ *
+ *  Disables link during D3 power down sequence.
+ *
+ **/
+void ixgbe_stop_mac_link_on_d3_82599(struct ixgbe_hw *hw)
+{
+       u32 autoc2_reg, fwsm;
+       u16 ee_ctrl_2 = 0;
+
+       DEBUGFUNC("ixgbe_stop_mac_link_on_d3_82599");
+       ixgbe_read_eeprom(hw, IXGBE_EEPROM_CTRL_2, &ee_ctrl_2);
+
+       /* Check to see if MNG FW could be enabled */
+       fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM);
+
+       if (((fwsm & IXGBE_FWSM_MODE_MASK) != IXGBE_FWSM_FW_MODE_PT) &&
+           !hw->wol_enabled &&
+           ee_ctrl_2 & IXGBE_EEPROM_CCD_BIT) {
+               autoc2_reg = IXGBE_READ_REG(hw, IXGBE_AUTOC2);
+               autoc2_reg |= IXGBE_AUTOC2_LINK_DISABLE_ON_D3_MASK;
+               IXGBE_WRITE_REG(hw, IXGBE_AUTOC2, autoc2_reg);
+       }
+}
+
 /**
  *  ixgbe_start_mac_link_82599 - Setup MAC link settings
  *  @hw: pointer to hardware structure

diff --git a/lib/librte_pmd_ixgbe/ixgbe/ixgbe_common.h b/lib/librte_pmd_ixgbe/ixgbe/ixgbe_common.h
index 700bf1d..4f6a11b 100644 (file)
--- a/lib/librte_pmd_ixgbe/ixgbe/ixgbe_common.h
+++ b/lib/librte_pmd_ixgbe/ixgbe/ixgbe_common.h
@@ -159,6 +159,7 @@ s32 ixgbe_host_interface_command(struct ixgbe_hw *hw, u32 *buffer,
 void ixgbe_clear_tx_pending(struct ixgbe_hw *hw);
 
 extern s32 ixgbe_reset_pipeline_82599(struct ixgbe_hw *hw);
+extern void ixgbe_stop_mac_link_on_d3_82599(struct ixgbe_hw *hw);
 
 void ixgbe_disable_rx_generic(struct ixgbe_hw *hw);
 void ixgbe_enable_rx_generic(struct ixgbe_hw *hw);

diff --git a/lib/librte_pmd_ixgbe/ixgbe/ixgbe_type.h b/lib/librte_pmd_ixgbe/ixgbe/ixgbe_type.h
index 890ea34..bd08be8 100644 (file)
--- a/lib/librte_pmd_ixgbe/ixgbe/ixgbe_type.h
+++ b/lib/librte_pmd_ixgbe/ixgbe/ixgbe_type.h
@@ -805,6 +805,8 @@ POSSIBILITY OF SUCH DAMAGE.
 
 /* Firmware Semaphore Register */
 #define IXGBE_FWSM_MODE_MASK   0xE
+#define IXGBE_FWSM_TS_ENABLED  0x1
+#define IXGBE_FWSM_FW_MODE_PT  0x4
 
 /* ARC Subsystem registers */
 #define IXGBE_HICR             0x15F00
@@ -1716,7 +1718,8 @@ enum {
 #define IXGBE_AUTOC2_10G_KR    (0x0 << IXGBE_AUTOC2_10G_SERIAL_PMA_PMD_SHIFT)
 #define IXGBE_AUTOC2_10G_XFI   (0x1 << IXGBE_AUTOC2_10G_SERIAL_PMA_PMD_SHIFT)
 #define IXGBE_AUTOC2_10G_SFI   (0x2 << IXGBE_AUTOC2_10G_SERIAL_PMA_PMD_SHIFT)
-#define IXGBE_AUTOC2_LINK_DISABLE_MASK 0x70000000
+#define IXGBE_AUTOC2_LINK_DISABLE_ON_D3_MASK   0x50000000
+#define IXGBE_AUTOC2_LINK_DISABLE_MASK         0x70000000
 
 #define IXGBE_MACC_FLU         0x00000001
 #define IXGBE_MACC_FSV_10G     0x00030000
@@ -1889,6 +1892,8 @@ enum {
 #define IXGBE_EEPROM_PAGE_SIZE_MAX     128
 #define IXGBE_EEPROM_RD_BUFFER_MAX_COUNT       512 /* words rd in burst */
 #define IXGBE_EEPROM_WR_BUFFER_MAX_COUNT       256 /* words wr in burst */
+#define IXGBE_EEPROM_CTRL_2            1 /* EEPROM CTRL word 2 */
+#define IXGBE_EEPROM_CCD_BIT           2
 
 #ifndef IXGBE_EEPROM_GRANT_ATTEMPTS
 #define IXGBE_EEPROM_GRANT_ATTEMPTS    1000 /* EEPROM attempts to gain grant */
@@ -3208,6 +3213,7 @@ struct ixgbe_hw {
        int api_version;
        bool force_full_reset;
        bool allow_unsupported_sfp;
+       bool wol_enabled;
 };
 
 #define ixgbe_call_func(hw, func, params, error) \