net/i40e/base: use admin queue for setting LEDs behavior
authorJingjing Wu <jingjing.wu@intel.com>
Tue, 27 Jun 2017 13:29:12 +0000 (21:29 +0800)
committerFerruh Yigit <ferruh.yigit@intel.com>
Thu, 6 Jul 2017 13:00:57 +0000 (15:00 +0200)
Instead of accessing register directly, use newly added AQC in
order to blink LEDs. Introduce and utilize a new flag to prevent
excessive API version checking.

Signed-off-by: Jingjing Wu <jingjing.wu@intel.com>
drivers/net/i40e/base/i40e_adminq.c
drivers/net/i40e/base/i40e_common.c
drivers/net/i40e/base/i40e_register.h
drivers/net/i40e/base/i40e_type.h

index 19871c7..8cc8c5e 100644 (file)
@@ -688,6 +688,12 @@ enum i40e_status_code i40e_init_adminq(struct i40e_hw *hw)
             (hw->aq.api_min_ver >= 7)))
                hw->flags |= I40E_HW_FLAG_802_1AD_CAPABLE;
 
+       if (hw->mac.type ==  I40E_MAC_XL710 &&
+           hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR &&
+           hw->aq.api_min_ver >= I40E_MINOR_VER_GET_LINK_INFO_XL710) {
+               hw->flags |= I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE;
+       }
+
        if (hw->aq.api_maj_ver > I40E_FW_API_VERSION_MAJOR) {
                ret_code = I40E_ERR_FIRMWARE_API_VERSION;
                goto init_adminq_free_arq;
index b4901ef..3f3b275 100644 (file)
@@ -6678,24 +6678,38 @@ enum i40e_status_code i40e_led_get_phy(struct i40e_hw *hw, u16 *led_addr,
        u16 temp_addr;
        u8 port_num;
        u32 i;
-
-       temp_addr = I40E_PHY_LED_PROV_REG_1;
-       i = rd32(hw, I40E_PFGEN_PORTNUM);
-       port_num = (u8)(i & I40E_PFGEN_PORTNUM_PORT_NUM_MASK);
-       phy_addr = i40e_get_phy_address(hw, port_num);
-
-       for (gpio_led_port = 0; gpio_led_port < 3; gpio_led_port++,
-            temp_addr++) {
-               status = i40e_read_phy_register_clause45(hw,
+       u32 reg_val_aq;
+
+       if (hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE) {
+               status =
+                     i40e_aq_get_phy_register(hw,
+                                              I40E_AQ_PHY_REG_ACCESS_EXTERNAL,
+                                              I40E_PHY_COM_REG_PAGE,
+                                              I40E_PHY_LED_PROV_REG_1,
+                                              &reg_val_aq, NULL);
+               if (status)
+                       return status;
+               *val = (u16)reg_val_aq;
+       } else {
+               temp_addr = I40E_PHY_LED_PROV_REG_1;
+               i = rd32(hw, I40E_PFGEN_PORTNUM);
+               port_num = (u8)(i & I40E_PFGEN_PORTNUM_PORT_NUM_MASK);
+               phy_addr = i40e_get_phy_address(hw, port_num);
+
+               for (gpio_led_port = 0; gpio_led_port < 3; gpio_led_port++,
+                    temp_addr++) {
+                       status =
+                        i40e_read_phy_register_clause45(hw,
                                                         I40E_PHY_COM_REG_PAGE,
                                                         temp_addr, phy_addr,
                                                         &reg_val);
-               if (status)
-                       return status;
-               *val = reg_val;
-               if (reg_val & I40E_PHY_LED_LINK_MODE_MASK) {
-                       *led_addr = temp_addr;
-                       break;
+                       if (status)
+                               return status;
+                       *val = reg_val;
+                       if (reg_val & I40E_PHY_LED_LINK_MODE_MASK) {
+                               *led_addr = temp_addr;
+                               break;
+                       }
                }
        }
        return status;
@@ -6713,51 +6727,115 @@ enum i40e_status_code i40e_led_set_phy(struct i40e_hw *hw, bool on,
                                       u16 led_addr, u32 mode)
 {
        enum i40e_status_code status = I40E_SUCCESS;
-       u16 led_ctl = 0;
-       u16 led_reg = 0;
+       u32 led_ctl = 0;
+       u32 led_reg = 0;
        u8 phy_addr = 0;
        u8 port_num;
        u32 i;
 
-       i = rd32(hw, I40E_PFGEN_PORTNUM);
-       port_num = (u8)(i & I40E_PFGEN_PORTNUM_PORT_NUM_MASK);
-       phy_addr = i40e_get_phy_address(hw, port_num);
-       status = i40e_read_phy_register_clause45(hw, I40E_PHY_COM_REG_PAGE,
-                                                led_addr, phy_addr, &led_reg);
+       if (hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE) {
+               status =
+                     i40e_aq_get_phy_register(hw,
+                                              I40E_AQ_PHY_REG_ACCESS_EXTERNAL,
+                                              I40E_PHY_COM_REG_PAGE,
+                                              I40E_PHY_LED_PROV_REG_1,
+                                              &led_reg, NULL);
+       } else {
+               i = rd32(hw, I40E_PFGEN_PORTNUM);
+               port_num = (u8)(i & I40E_PFGEN_PORTNUM_PORT_NUM_MASK);
+               phy_addr = i40e_get_phy_address(hw, port_num);
+               status = i40e_read_phy_register_clause45(hw,
+                                                        I40E_PHY_COM_REG_PAGE,
+                                                        led_addr, phy_addr,
+                                                        (u16 *)&led_reg);
+       }
        if (status)
                return status;
        led_ctl = led_reg;
        if (led_reg & I40E_PHY_LED_LINK_MODE_MASK) {
                led_reg = 0;
-               status = i40e_write_phy_register_clause45(hw,
-                                                         I40E_PHY_COM_REG_PAGE,
-                                                         led_addr, phy_addr,
-                                                         led_reg);
+               if (hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR &&
+                   hw->aq.api_min_ver >= I40E_MINOR_VER_GET_LINK_INFO_XL710) {
+                       status = i40e_aq_set_phy_register(hw,
+                                       I40E_AQ_PHY_REG_ACCESS_EXTERNAL,
+                                       I40E_PHY_COM_REG_PAGE,
+                                       I40E_PHY_LED_PROV_REG_1,
+                                       led_reg, NULL);
+               } else {
+                       status = i40e_write_phy_register_clause45(hw,
+                                                       I40E_PHY_COM_REG_PAGE,
+                                                       led_addr, phy_addr,
+                                                       (u16)led_reg);
+               }
                if (status)
                        return status;
        }
-       status = i40e_read_phy_register_clause45(hw, I40E_PHY_COM_REG_PAGE,
-                                                led_addr, phy_addr, &led_reg);
+       if (hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE) {
+               status =
+                     i40e_aq_get_phy_register(hw,
+                                              I40E_AQ_PHY_REG_ACCESS_EXTERNAL,
+                                              I40E_PHY_COM_REG_PAGE,
+                                              I40E_PHY_LED_PROV_REG_1,
+                                              &led_reg, NULL);
+       } else {
+               status = i40e_read_phy_register_clause45(hw,
+                                                        I40E_PHY_COM_REG_PAGE,
+                                                        led_addr, phy_addr,
+                                                        (u16 *)&led_reg);
+       }
        if (status)
                goto restore_config;
        if (on)
                led_reg = I40E_PHY_LED_MANUAL_ON;
        else
                led_reg = 0;
-       status = i40e_write_phy_register_clause45(hw, I40E_PHY_COM_REG_PAGE,
-                                                 led_addr, phy_addr, led_reg);
+
+       if (hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE) {
+               status =
+                     i40e_aq_set_phy_register(hw,
+                                              I40E_AQ_PHY_REG_ACCESS_EXTERNAL,
+                                              I40E_PHY_COM_REG_PAGE,
+                                              I40E_PHY_LED_PROV_REG_1,
+                                              led_reg, NULL);
+       } else {
+               status =
+                   i40e_write_phy_register_clause45(hw, I40E_PHY_COM_REG_PAGE,
+                                                    led_addr, phy_addr,
+                                                    (u16)led_reg);
+       }
        if (status)
                goto restore_config;
        if (mode & I40E_PHY_LED_MODE_ORIG) {
                led_ctl = (mode & I40E_PHY_LED_MODE_MASK);
-               status = i40e_write_phy_register_clause45(hw,
-                                                I40E_PHY_COM_REG_PAGE,
-                                                led_addr, phy_addr, led_ctl);
+               if (hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE) {
+                       status = i40e_aq_set_phy_register(hw,
+                                       I40E_AQ_PHY_REG_ACCESS_EXTERNAL,
+                                       I40E_PHY_COM_REG_PAGE,
+                                       I40E_PHY_LED_PROV_REG_1,
+                                       led_ctl, NULL);
+               } else {
+                       status = i40e_write_phy_register_clause45(hw,
+                                                        I40E_PHY_COM_REG_PAGE,
+                                                        led_addr, phy_addr,
+                                                        (u16)led_ctl);
+               }
        }
        return status;
 restore_config:
-       status = i40e_write_phy_register_clause45(hw, I40E_PHY_COM_REG_PAGE,
-                                                 led_addr, phy_addr, led_ctl);
+       if (hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE) {
+               status =
+                     i40e_aq_set_phy_register(hw,
+                                              I40E_AQ_PHY_REG_ACCESS_EXTERNAL,
+                                              I40E_PHY_COM_REG_PAGE,
+                                              I40E_PHY_LED_PROV_REG_1,
+                                              led_ctl, NULL);
+       } else {
+               status =
+                       i40e_write_phy_register_clause45(hw,
+                                                        I40E_PHY_COM_REG_PAGE,
+                                                        led_addr, phy_addr,
+                                                        (u16)led_ctl);
+       }
        return status;
 }
 #endif /* PF_DRIVER */
index b150fbd..a482ab9 100644 (file)
@@ -2805,7 +2805,7 @@ POSSIBILITY OF SUCH DAMAGE.
 #define I40E_GLV_RUPP_MAX_INDEX  383
 #define I40E_GLV_RUPP_RUPP_SHIFT 0
 #define I40E_GLV_RUPP_RUPP_MASK  I40E_MASK(0xFFFFFFFF, I40E_GLV_RUPP_RUPP_SHIFT)
-#define I40E_GLV_TEPC(_VSI)      (0x00344000 + ((_VSI) * 8)) /* _i=0...383 */ /* Reset: CORER */
+#define I40E_GLV_TEPC(_i)        (0x00344000 + ((_i) * 8)) /* _i=0...383 */ /* Reset: CORER */
 #define I40E_GLV_TEPC_MAX_INDEX  383
 #define I40E_GLV_TEPC_TEPC_SHIFT 0
 #define I40E_GLV_TEPC_TEPC_MASK  I40E_MASK(0xFFFFFFFF, I40E_GLV_TEPC_TEPC_SHIFT)
index 152b4a7..9d7b1a2 100644 (file)
@@ -701,6 +701,7 @@ struct i40e_hw {
 
 #define I40E_HW_FLAG_AQ_SRCTL_ACCESS_ENABLE BIT_ULL(0)
 #define I40E_HW_FLAG_802_1AD_CAPABLE        BIT_ULL(1)
+#define I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE  BIT_ULL(2)
        u64 flags;
 
        /* Used in set switch config AQ command */