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net/ice/base: support tunnel port for parser
2021-09-21 Qi Zhangnet/ice/base: support tunnel port for parser
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2021-09-21 Qi Zhangnet/ice/base: support double VLAN mode configure for...
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2021-09-21 Qi Zhangnet/ice/base: add parser execution main loop
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2021-09-21 Qi Zhangnet/ice/base: add helper function to aggregate flags
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2021-09-21 Qi Zhangnet/ice/base: add helper function to redirect flags
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2021-09-21 Qi Zhangnet/ice/base: add helper for ptype markers match
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2021-09-21 Qi Zhangnet/ice/base: add helper for parse graph key matching
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2021-09-21 Qi Zhangnet/ice/base: add helper function for boost TCAM match
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2021-09-21 Qi Zhangnet/ice/base: add parser runtime skeleton
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2021-09-21 Qi Zhangnet/ice/base: init XLT key builder for parser
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2021-09-21 Qi Zhangnet/ice/base: init flag redirect table for parser
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2021-09-21 Qi Zhangnet/ice/base: init protocol group table for parser
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2021-09-21 Qi Zhangnet/ice/base: init marker group table for parser
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2021-09-21 Qi Zhangnet/ice/base: init ptype marker TCAM table for parser
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2021-09-21 Qi Zhangnet/ice/base: init boost TCAM table for parser
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2021-09-21 Qi Zhangnet/ice/base: init parse graph CAM table for parser
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2021-09-21 Qi Zhangnet/ice/base: init metainit table for parser
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2021-09-21 Qi Zhangnet/ice/base: init IMEM table for parser
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2021-09-21 Qi Zhangnet/ice/base: add parser create and destroy skeleton
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2021-09-21 Qi Zhangnet/ice/base: update auto-generated hardware register
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2021-09-21 Qi Zhangnet/ice/base: support SMA controller
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2021-09-21 Qi Zhangnet/ice/base: add get/set functions for shared parameters
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2021-09-21 Qi Zhangnet/ice/base: add GCO defines and GCO flex descriptor
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2021-09-21 Qi Zhangnet/ice/base: add helper to check for 100M speed support
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2021-09-21 Qi Zhangnet/ice/base: add package segment ID
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2021-09-21 Qi Zhangnet/ice/base: allow tool access to manageability register
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2021-09-21 Qi Zhangnet/ice/base: change address parameter to 16-bit
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2021-09-21 Qi Zhangnet/ice/base: allow to enable LAN and loopback in switch
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2021-09-21 Qi Zhangnet/ice/base: use macro instead of open-coded division
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2021-09-21 Qi Zhangnet/ice/base: include more E810T adapters
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2021-09-21 Qi Zhangnet/ice/base: calculate logical PF ID
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2021-09-16 Steve Yangnet/ice/base: support L4 for QinQ switch filter
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
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2021-09-16 Steve Yangnet/ice: support L4 for QinQ switch filter
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
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2021-09-15 Qiming Chennet/iavf: fix resource leak on probing failure
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
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2021-09-15 Qiming Chennet/iavf: fix Rx queue buffer size alignment
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
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2021-09-15 Qiming Chennet/i40e/base: fix resource leakage
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
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2021-09-15 Qiming Chennet/iavf: fix mbuf leak
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
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2021-09-13 Dapeng Yunet/ice: fix crash on representor port closing
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2021-09-13 Dapeng Yunet/ice/base: fix PF ID for DCF
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2021-09-13 Qiming Chennet/i40e: fix device startup resource release
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
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2021-09-13 Qiming Chennet/i40e: fix mbuf leak
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
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2021-09-13 Haiyue Wangcommon/iavf: update base driver version
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
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2021-09-13 Haiyue Wangcommon/iavf: remove flow director query opcode
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
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2021-09-13 Alvin Zhangcommon/iavf: enable hash calculation based on L4 checksum
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
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2021-09-13 Junfeng Guocommon/iavf: add QFI fields for GTPU UL and DL
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
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2021-09-06 Qi Zhangnet/ice: fix performance with writeback policy
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2021-09-06 Qiming Chennet/ixgbe: fix mbuf leak
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2021-09-06 Qiming Chennet/ixgbe: fix MAC resource leak
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2021-09-06 Qiming Chennet/ixgbe: fix queue resource leak
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2021-09-06 Qiming Chennet/ixgbe: fix hash handle leak
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
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2021-09-06 Dapeng Yunet/ice: support DCF device reset
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
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2021-09-01 Qiming Chennet/ixgbe: fix Rx multicast statistics after reset
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2021-08-30 Tudor Corneanet/iavf: fix overflow in maximum packet length config
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
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2021-08-29 Jie Wangnet/ice: fix queue config in DCF
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
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2021-08-29 Yu Wenjunnet/ice: fix deadlock on flow query
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
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2021-08-29 Wenjun Wunet/ice: fix default RSS hash for IP fragments
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
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2021-08-29 Wenjun Wunet/iavf: fix default RSS hash for IP fragments
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
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2021-08-29 Wenjun Wunet/iavf: support flow director for IPv6 fragments
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
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2021-08-29 Wenjun Wunet/iavf: fix flow director L3 field for IPv4 fragments
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
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2021-08-29 Qi Zhangnet/ice: fix RXDID default value in DCF
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2021-08-29 Haiyue Wangnet/ice: fix memzone leak after device init failure
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
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2021-08-29 Wenjun Wunet/ice/base: support flow director for IPv6 fragments
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
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2021-08-15 Ting Xunet/ice: fix bandwidth config size in memory copy
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
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2021-08-15 Simei Sunet/ice: fix max entry number for ACL normal priority
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
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2021-08-11 Qi Zhangnet/ice/base: increase maximum TCAM/PTG per profile
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2021-08-11 Qi Zhangnet/ice/base: fix typo in comment
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2021-08-11 Qi Zhangnet/ice/base: rename and add setter for unicast MAC...
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2021-08-11 Qi Zhangnet/ice/base: support flow director for GTPU UL/DL...
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2021-08-11 Qi Zhangnet/ice/base: enable jumbo frame during HW init
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2021-08-11 Qi Zhangnet/ice/base: support RSS for IPv4/L4 checksum
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2021-08-11 Qi Zhangnet/ice/base: support flow director for GTPoGRE
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2021-08-11 Qi Zhangnet/ice/base: enable NVM update reset capabilities
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2021-08-11 Qi Zhangnet/ice/base: support RSS for GTPoGRE
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2021-08-11 Qi Zhangnet/ice/base: support flow director for GTPU EH inner...
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2021-08-11 Qi Zhangnet/ice/base: support RSS for GRE tunnel
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2021-08-11 Qi Zhangnet/ice/base: support flow director for GRE tunnel
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2021-08-11 Qi Zhangnet/ice/base: support TC nodes PIR configuration
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2021-08-11 Qi Zhangnet/ice/base: refine MAC rule adding
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2021-08-11 Qi Zhangnet/ice/base: add new AQ description
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2021-08-11 Qi Zhangnet/ice/base: implement firmware debug dump
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2021-08-11 Qi Zhangnet/ice/base: add E810T check function
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2021-08-11 Qi Zhangnet/ice/base: support starting PHY in bypass mode
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2021-08-11 Qi Zhangnet/ice/base: clarify comments on checking PFC mode
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2021-08-11 Qi Zhangnet/ice/base: implement Vernier calibration for E822
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2021-08-11 Qi Zhangnet/ice/base: print human-friendly PHY types
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2021-08-11 Qi Zhangnet/ice/base: add accessors to get/set time reference
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2021-08-11 Qi Zhangnet/ice/base: add clock initialization function
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2021-08-11 Qi Zhangnet/ice/base: add timestamp masks
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2021-08-11 Qi Zhangnet/ice/base: change dummy packets with VLAN
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2021-08-11 Qi Zhangnet/ice/base: add ethertype IPv6 check for dummy packet
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2021-08-11 Qi Zhangnet/ice/base: add functions for device clock control
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2021-08-11 Qi Zhangnet/ice/base: add IEEE 1588 capability probing
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2021-08-10 Ruifeng Wangnet/i40e: fix clang warning on non-x86
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
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2021-08-10 Wenjun Wunet/ice: fix priority of DCF switch rule
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
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2021-08-10 Feifei Wangnet/i40e: reduce L1 cache misses in NEON Rx
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2021-08-10 Feifei Wangnet/i40e: increase readability in NEON Rx
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2021-08-10 Feifei Wangdrivers/net: fix vector Rx comments
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2021-08-10 Feifei Wangdrivers/net: fix typo in vector Rx comment
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2021-08-02 Qi Zhangdoc: update matching versions in ice guide
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
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2021-07-27 Alvin Zhangnet/iavf: relax RSS virtual channel commands
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
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