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common/mlx5: rename ethernet device class
2021-07-21 Xueming Licommon/mlx5: rename ethernet device class
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-06-30 Xueming Livdpa/mlx5: fix TSO offload without checksum
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-07-05 Xueming Libus/auxiliary: introduce auxiliary bus
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-07-05 Xueming Lidevargs: add common key definition
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-05-12 Xueming Linet/mlx5: fix LAG representor probing on PF1 PCI
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-05-04 Xueming Linet/virtio: fix vectorized Rx queue rearm
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-04-19 Xueming Lidevargs: fix list entry update
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-04-14 Xueming Likvargs: add get by key
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-04-14 Xueming Lidevargs: fix memory leak on parsing failure
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-04-14 Xueming Lidevargs: unify scratch buffer storage
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-03-31 Xueming Linet/mlx5: probe host PF representor with sub-function
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-03-31 Xueming Linet/mlx5: improve xstats of bonding port
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-03-31 Xueming Linet/mlx5: fix setting VF default MAC through representor
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-03-31 Xueming Linet/mlx5: save bonding member ports information
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-03-31 Xueming Linet/mlx5: support list of representor PF
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-03-31 Xueming Linet/mlx5: refactor bonding representor probing
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-03-31 Xueming Linet/mlx5: revert setting bonding representor to first PF
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-03-31 Xueming Linet/mlx5: support sub-function representor
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-03-31 Xueming Licommon/mlx5: support sub-function representor parsing
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-03-17 Xueming Liethdev: add helper function to get representor ID
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-03-17 Xueming Liethdev: add API to get representor info
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-03-16 Xueming Liethdev: support multi-host in representor
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-03-16 Xueming Liethdev: support PF index in representor
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-03-16 Xueming Likvargs: support multiple lists
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-03-16 Xueming Liethdev: support sub-function representor
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-03-16 Xueming Liethdev: support new VF representor syntax
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-03-16 Xueming Liethdev: refactor representor port list parsing
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-03-16 Xueming Liethdev: introduce representor type
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-01-08 Xueming Livdpa/mlx5: add hardware queue moderation
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-01-08 Xueming Licommon/mlx5: support vDPA completion queue moderation
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-01-08 Xueming Livdpa/mlx5: set default event mode to polling
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-01-08 Xueming Livdpa/mlx5: add CPU core parameter to bind polling thread
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-01-08 Xueming Livdpa/mlx5: default polling mode delay time to zero
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-01-08 Xueming Livdpa/mlx5: set polling mode default delay to zero
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2020-11-20 Xueming Linet/mlx5: set representor to first PF in bonding mode
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2020-11-20 Xueming Linet/mlx5: fix flow index type
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2020-11-13 Xueming Linet/mlx5: fix nested flow creation
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2020-11-13 Xueming Linet/mlx5: fix Unix socket path
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2020-11-13 Xueming Linet/mlx5: fix missing meter packet
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2020-11-03 Xueming Livdpa/mlx5: specify lag port affinity
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2020-11-03 Xueming Licommon/mlx5: get number of ports that can be bonded
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2020-11-03 Xueming Livdpa/mlx5: handle hardware error
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2020-11-03 Xueming Licommon/mlx5: add virtq attributes error fields
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2020-11-03 Xueming Linet/mlx5: remove shared context lock
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2020-11-03 Xueming Linet/mlx5: make push VLAN action cache thread safe
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2020-11-03 Xueming Linet/mlx5: make port ID action cache thread safe
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2020-11-03 Xueming Linet/mlx5: make matcher list thread safe
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2020-11-03 Xueming Linet/mlx5: introduce thread safe linked list cache
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2020-11-03 Xueming Linet/mlx5: make metadata copy flow list thread safe
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2020-11-03 Xueming Linet/mlx5: make flow modify action list thread safe
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2020-11-03 Xueming Linet/mlx5: make flow tag list thread safe
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2020-11-03 Xueming Linet/mlx5: make flow table cache thread safe
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2020-11-03 Xueming Linet/mlx5: support concurrent access for hash list
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2020-11-03 Xueming Linet/mlx5: make flow list thread safe
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2020-11-03 Xueming Linet/mlx5: use indexed pool as id generator
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2020-11-03 Xueming Linet/mlx5: support zero size entry for indexed pool
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2020-11-03 Xueming Linet/mlx5: reuse flow id as hairpin id
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2020-11-03 Xueming Linet/mlx5: use thread specific flow workspace
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2020-11-03 Xueming Linet/mlx5: fix port shared data reference count
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2020-10-09 Xueming Linet/mlx5: disable dump of Verbs flows
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2020-09-30 Xueming Linet/mlx5: use bond index for netdev operations
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2020-09-18 Xueming Livdpa/mlx5: fix event channel setup
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2020-08-05 Xueming Livdpa/mlx5: fix queue update synchronization
Signed-off-by: Xueming Li <xuemingl@mellanox.com>
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2020-07-29 Xueming Livdpa/mlx5: fix event queue number query
Signed-off-by: Xueming Li <xuemingl@mellanox.com>
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2020-07-29 Xueming Livdpa/mlx5: fix completion queue initialization
Signed-off-by: Xueming Li <xuemingl@mellanox.com>
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2020-04-21 Xueming Liapp/testpmd: support dumping socket memory
Signed-off-by: Xueming Li <xuemingl@mellanox.com>
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2020-01-17 Xueming Lidoc: add flow dump to mlx5 guide
Signed-off-by: Xueming Li <xuemingl@mellanox.com>
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2020-01-17 Xueming Linet/mlx5: add socket server for external tools
Signed-off-by: Xueming Li <xuemingl@mellanox.com>
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2020-01-17 Xueming Liapp/testpmd: add flow dump command
Signed-off-by: Xueming Li <xuemingl@mellanox.com>
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2019-11-26 Xueming Limalloc: fix memory element size in case of padding
Signed-off-by: Xueming Li <xuemingl@mellanox.com>
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2019-11-20 Xueming Limalloc: fix realloc padded element size
Signed-off-by: Xueming Li <xuemingl@mellanox.com>
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2019-11-20 Xueming Limalloc: fix realloc copy size
Signed-off-by: Xueming Li <xuemingl@mellanox.com>
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2018-10-11 Xueming Linet/mlx5: fix representor port xstats
Signed-off-by: Xueming Li <xuemingl@mellanox.com>
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2018-10-11 Xueming Linet/mlx5: fix representor port link status
Signed-off-by: Xueming Li <xuemingl@mellanox.com>
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2018-09-10 Xueming Linet/mlx5: fix interrupt completion queue index wrapping
Signed-off-by: Xueming Li <xuemingl@mellanox.com>
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2018-07-12 Xueming Liapp/testpmd: distribute queues to cores
Signed-off-by: Xueming Li <xuemingl@mellanox.com>
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2018-06-17 Xueming Linet/mlx5: fix crash in device probe
Signed-off-by: Xueming Li <xuemingl@mellanox.com>
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2018-05-28 Xueming Linet/mlx5: fix memory region cache init
Signed-off-by: Xueming Li <xuemingl@mellanox.com>
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2018-05-14 Xueming Linet/mlx5: fix SW parser enabling
Signed-off-by: Xueming Li <xuemingl@mellanox.com>
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2018-05-14 Xueming Linet/mlx5: fix SW parsing feature detection
Signed-off-by: Xueming Li <xuemingl@mellanox.com>
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2018-05-14 Xueming Linet/mlx5: document update for Tx
Signed-off-by: Xueming Li <xuemingl@mellanox.com>
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2018-04-27 Xueming Lidoc: update mlx5 guide on tunnel offloading
Signed-off-by: Xueming Li <xuemingl@mellanox.com>
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2018-04-27 Xueming Linet/mlx5: allow flow tunnel ID 0 with outer pattern
Signed-off-by: Xueming Li <xuemingl@mellanox.com>
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2018-04-27 Xueming Linet/mlx5: introduce VXLAN-GPE tunnel type
Signed-off-by: Xueming Li <xuemingl@mellanox.com>
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2018-04-27 Xueming Linet/mlx5: add hardware flow debug dump
Signed-off-by: Xueming Li <xuemingl@mellanox.com>
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2018-04-27 Xueming Linet/mlx5: support tunnel RSS level
Signed-off-by: Xueming Li <xuemingl@mellanox.com>
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2018-04-27 Xueming Linet/mlx5: split flow RSS handling logic
Signed-off-by: Xueming Li <xuemingl@mellanox.com>
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2018-04-27 Xueming Linet/mlx5: cleanup tunnel checksum offloads
Signed-off-by: Xueming Li <xuemingl@mellanox.com>
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2018-04-27 Xueming Linet/mlx5: support Rx tunnel type identification
Signed-off-by: Xueming Li <xuemingl@mellanox.com>
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2018-04-27 Xueming Linet/mlx5: support L3 VXLAN flow
Signed-off-by: Xueming Li <xuemingl@mellanox.com>
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2018-04-27 Xueming Linet/mlx5: support GRE tunnel flow
Signed-off-by: Xueming Li <xuemingl@mellanox.com>
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2018-04-27 Xueming Linet/mlx5: support 16 hardware priorities
Signed-off-by: Xueming Li <xuemingl@mellanox.com>
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2018-04-27 Xueming Liapp/testpmd: support more GRE extension in csum engine
Signed-off-by: Xueming Li <xuemingl@mellanox.com>
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2018-04-27 Xueming Liapp/testpmd: introduce new tunnel VXLAN-GPE
Signed-off-by: Xueming Li <xuemingl@mellanox.com>
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2018-04-27 Xueming Liethdev: introduce tunnel type MPLS-in-GRE and MPLS...
Signed-off-by: Xueming Li <xuemingl@mellanox.com>
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2018-04-27 Xueming Liethdev: introduce new tunnel VXLAN-GPE
Signed-off-by: Xueming Li <xuemingl@mellanox.com>
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2018-04-27 Xueming Linet/mlx5: allow max 192B TSO inline header length
Signed-off-by: Xueming Li <xuemingl@mellanox.com>
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2018-04-27 Xueming Linet/mlx5: support generic tunnel offloading
Signed-off-by: Xueming Li <xuemingl@mellanox.com>
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2018-04-27 Xueming Linet/mlx5: separate TSO function in Tx data path
Signed-off-by: Xueming Li <xuemingl@mellanox.com>
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2018-04-27 Xueming Liapp/testpmd: support generic tunnel Tx offloads
Signed-off-by: Xueming Li <xuemingl@mellanox.com>
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