The next parameters control the HW queue moderation feature.
This feature helps to control the traffic performance and latency
trade-off.
Each packet completion report from HW to SW requires CQ processing by SW
and triggers interrupt for the guest driver. Interrupt report and
handling cost CPU cycles and time and the amount of this affects
directly on packet performance and latency.
hw_latency_mode parameters [int]
0, HW default.
1, Latency is counted from the first packet completion report.
2, Latency is counted from the last packet completion.
hw_max_latency_us parameters [int]
0 - 4095, The maximum time in microseconds that packet completion
report can be delayed.
hw_max_pending_comp parameter [int]
0 - 65535, The maximum number of pending packets completions in an HW
queue.
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
CPU core number to set polling thread affinity to, default to control plane
cpu.
+- ``hw_latency_mode`` parameter [int]
+
+ The completion queue moderation mode:
+
+ - 0, HW default.
+
+ - 1, Latency is counted from the first packet completion report.
+
+ - 2, Latency is counted from the last packet completion.
+
+- ``hw_max_latency_us`` parameter [int]
+
+ - 1 - 4095, The maximum time in microseconds that packet completion report
+ can be delayed.
+
+ - 0, HW default.
+
+- ``hw_max_pending_comp`` parameter [int]
+
+ - 1 - 65535, The maximum number of pending packets completions in an HW queue.
+
+ - 0, HW default.
+
+
Error handling
^^^^^^^^^^^^^^
DRV_LOG(WARNING, "Invalid event_core %s.", val);
else
priv->event_core = tmp;
+ } else if (strcmp(key, "hw_latency_mode") == 0) {
+ priv->hw_latency_mode = (uint32_t)tmp;
+ } else if (strcmp(key, "hw_max_latency_us") == 0) {
+ priv->hw_max_latency_us = (uint32_t)tmp;
+ } else if (strcmp(key, "hw_max_pending_comp") == 0) {
+ priv->hw_max_pending_comp = (uint32_t)tmp;
} else {
DRV_LOG(WARNING, "Invalid key %s.", key);
}
uint32_t event_us;
uint32_t timer_delay_us;
uint32_t no_traffic_time_s;
+ uint8_t hw_latency_mode; /* Hardware CQ moderation mode. */
+ uint16_t hw_max_latency_us; /* Hardware CQ moderation period in usec. */
+ uint16_t hw_max_pending_comp; /* Hardware CQ moderation counter. */
struct rte_vdpa_device *vdev; /* vDPA device. */
int vid; /* vhost device id. */
struct ibv_context *ctx; /* Device context. */
attr.tis_id = priv->tiss[(index / 2) % priv->num_lag_ports]->id;
attr.queue_index = index;
attr.pd = priv->pdn;
+ attr.hw_latency_mode = priv->hw_latency_mode;
+ attr.hw_max_latency_us = priv->hw_max_latency_us;
+ attr.hw_max_pending_comp = priv->hw_max_pending_comp;
virtq->virtq = mlx5_devx_cmd_create_virtq(priv->ctx, &attr);
virtq->priv = priv;
if (!virtq->virtq)