1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2014 Intel Corporation
12 #include <sys/types.h>
18 #include <sys/queue.h>
20 #include <sys/ioctl.h>
21 #include <sys/pciio.h>
22 #include <dev/pci/pcireg.h>
24 #if defined(RTE_ARCH_X86)
25 #include <machine/cpufunc.h>
28 #include <rte_interrupts.h>
31 #include <rte_bus_pci.h>
32 #include <rte_common.h>
33 #include <rte_launch.h>
34 #include <rte_memory.h>
36 #include <rte_per_lcore.h>
37 #include <rte_lcore.h>
38 #include <rte_malloc.h>
39 #include <rte_string_fns.h>
40 #include <rte_debug.h>
41 #include <rte_devargs.h>
43 #include "eal_filesystem.h"
48 * PCI probing under BSD.
51 extern struct rte_pci_bus rte_pci_bus;
55 rte_pci_map_device(struct rte_pci_device *dev)
59 /* try mapping the NIC resources */
61 case RTE_PCI_KDRV_NIC_UIO:
62 /* map resources for devices that use uio */
63 ret = pci_uio_map_resource(dev);
67 " Not managed by a supported kernel driver, skipped\n");
75 /* Unmap pci device */
77 rte_pci_unmap_device(struct rte_pci_device *dev)
79 /* try unmapping the NIC resources */
81 case RTE_PCI_KDRV_NIC_UIO:
82 /* unmap resources for devices that use uio */
83 pci_uio_unmap_resource(dev);
87 " Not managed by a supported kernel driver, skipped\n");
93 pci_uio_free_resource(struct rte_pci_device *dev,
94 struct mapped_pci_resource *uio_res)
98 if (rte_intr_fd_get(dev->intr_handle)) {
99 close(rte_intr_fd_get(dev->intr_handle));
100 rte_intr_fd_set(dev->intr_handle, -1);
101 rte_intr_type_set(dev->intr_handle, RTE_INTR_HANDLE_UNKNOWN);
106 pci_uio_alloc_resource(struct rte_pci_device *dev,
107 struct mapped_pci_resource **uio_res)
109 char devname[PATH_MAX]; /* contains the /dev/uioX */
110 struct rte_pci_addr *loc;
114 snprintf(devname, sizeof(devname), "/dev/uio@pci:%u:%u:%u",
115 dev->addr.bus, dev->addr.devid, dev->addr.function);
117 if (access(devname, O_RDWR) < 0) {
118 RTE_LOG(WARNING, EAL, " "PCI_PRI_FMT" not managed by UIO driver, "
119 "skipping\n", loc->domain, loc->bus, loc->devid, loc->function);
123 /* save fd if in primary process */
124 if (rte_intr_fd_set(dev->intr_handle, open(devname, O_RDWR))) {
125 RTE_LOG(WARNING, EAL, "Failed to save fd");
129 if (rte_intr_fd_get(dev->intr_handle) < 0) {
130 RTE_LOG(ERR, EAL, "Cannot open %s: %s\n",
131 devname, strerror(errno));
135 if (rte_intr_type_set(dev->intr_handle, RTE_INTR_HANDLE_UIO))
138 /* allocate the mapping details for secondary processes*/
139 *uio_res = rte_zmalloc("UIO_RES", sizeof(**uio_res), 0);
140 if (*uio_res == NULL) {
142 "%s(): cannot store uio mmap details\n", __func__);
146 strlcpy((*uio_res)->path, devname, sizeof((*uio_res)->path));
147 memcpy(&(*uio_res)->pci_addr, &dev->addr, sizeof((*uio_res)->pci_addr));
152 pci_uio_free_resource(dev, *uio_res);
157 pci_uio_map_resource_by_index(struct rte_pci_device *dev, int res_idx,
158 struct mapped_pci_resource *uio_res, int map_idx)
165 struct pci_map *maps;
167 maps = uio_res->maps;
168 devname = uio_res->path;
169 pagesz = sysconf(_SC_PAGESIZE);
171 /* allocate memory to keep path */
172 maps[map_idx].path = rte_malloc(NULL, strlen(devname) + 1, 0);
173 if (maps[map_idx].path == NULL) {
174 RTE_LOG(ERR, EAL, "Cannot allocate memory for path: %s\n",
180 * open resource file, to mmap it
182 fd = open(devname, O_RDWR);
184 RTE_LOG(ERR, EAL, "Cannot open %s: %s\n",
185 devname, strerror(errno));
189 /* if matching map is found, then use it */
190 offset = res_idx * pagesz;
191 mapaddr = pci_map_resource(NULL, fd, (off_t)offset,
192 (size_t)dev->mem_resource[res_idx].len, 0);
197 maps[map_idx].phaddr = dev->mem_resource[res_idx].phys_addr;
198 maps[map_idx].size = dev->mem_resource[res_idx].len;
199 maps[map_idx].addr = mapaddr;
200 maps[map_idx].offset = offset;
201 strcpy(maps[map_idx].path, devname);
202 dev->mem_resource[res_idx].addr = mapaddr;
207 rte_free(maps[map_idx].path);
212 pci_scan_one(int dev_pci_fd, struct pci_conf *conf)
214 struct rte_pci_device *dev;
215 struct pci_bar_io bar;
218 dev = malloc(sizeof(*dev));
223 memset(dev, 0, sizeof(*dev));
224 dev->device.bus = &rte_pci_bus.bus;
226 dev->addr.domain = conf->pc_sel.pc_domain;
227 dev->addr.bus = conf->pc_sel.pc_bus;
228 dev->addr.devid = conf->pc_sel.pc_dev;
229 dev->addr.function = conf->pc_sel.pc_func;
232 dev->id.vendor_id = conf->pc_vendor;
235 dev->id.device_id = conf->pc_device;
237 /* get subsystem_vendor id */
238 dev->id.subsystem_vendor_id = conf->pc_subvendor;
240 /* get subsystem_device id */
241 dev->id.subsystem_device_id = conf->pc_subdevice;
244 dev->id.class_id = (conf->pc_class << 16) |
245 (conf->pc_subclass << 8) |
248 /* TODO: get max_vfs */
251 /* FreeBSD has no NUMA support (yet) */
252 dev->device.numa_node = 0;
256 /* FreeBSD has only one pass through driver */
257 dev->kdrv = RTE_PCI_KDRV_NIC_UIO;
259 /* parse resources */
260 switch (conf->pc_hdr & PCIM_HDRTYPE) {
261 case PCIM_HDRTYPE_NORMAL:
262 max = PCIR_MAX_BAR_0;
264 case PCIM_HDRTYPE_BRIDGE:
265 max = PCIR_MAX_BAR_1;
267 case PCIM_HDRTYPE_CARDBUS:
268 max = PCIR_MAX_BAR_2;
274 for (i = 0; i <= max; i++) {
275 bar.pbi_sel = conf->pc_sel;
276 bar.pbi_reg = PCIR_BAR(i);
277 if (ioctl(dev_pci_fd, PCIOCGETBAR, &bar) < 0)
280 dev->mem_resource[i].len = bar.pbi_length;
281 if (PCI_BAR_IO(bar.pbi_base)) {
282 dev->mem_resource[i].addr = (void *)(bar.pbi_base & ~((uint64_t)0xf));
285 dev->mem_resource[i].phys_addr = bar.pbi_base & ~((uint64_t)0xf);
288 /* device is valid, add in list (sorted) */
289 if (TAILQ_EMPTY(&rte_pci_bus.device_list)) {
290 rte_pci_add_device(dev);
293 struct rte_pci_device *dev2 = NULL;
296 TAILQ_FOREACH(dev2, &rte_pci_bus.device_list, next) {
297 ret = rte_pci_addr_cmp(&dev->addr, &dev2->addr);
301 rte_pci_insert_device(dev2, dev);
302 } else { /* already registered */
303 dev2->kdrv = dev->kdrv;
304 dev2->max_vfs = dev->max_vfs;
306 memmove(dev2->mem_resource,
308 sizeof(dev->mem_resource));
313 rte_pci_add_device(dev);
324 * Scan the content of the PCI bus, and add the devices in the devices
325 * list. Call pci_scan_one() for each pci entry found.
331 unsigned dev_count = 0;
332 struct pci_conf matches[16];
333 struct pci_conf_io conf_io = {
337 .match_buf_len = sizeof(matches),
338 .matches = &matches[0],
340 struct rte_pci_addr pci_addr;
342 /* for debug purposes, PCI can be disabled */
343 if (!rte_eal_has_pci())
346 fd = open("/dev/pci", O_RDONLY);
348 RTE_LOG(ERR, EAL, "%s(): error opening /dev/pci\n", __func__);
354 if (ioctl(fd, PCIOCGETCONF, &conf_io) < 0) {
355 RTE_LOG(ERR, EAL, "%s(): error with ioctl on /dev/pci: %s\n",
356 __func__, strerror(errno));
360 for (i = 0; i < conf_io.num_matches; i++) {
361 pci_addr.domain = matches[i].pc_sel.pc_domain;
362 pci_addr.bus = matches[i].pc_sel.pc_bus;
363 pci_addr.devid = matches[i].pc_sel.pc_dev;
364 pci_addr.function = matches[i].pc_sel.pc_func;
366 if (rte_pci_ignore_device(&pci_addr))
369 if (pci_scan_one(fd, &matches[i]) < 0)
373 dev_count += conf_io.num_matches;
374 } while(conf_io.status == PCI_GETCONF_MORE_DEVS);
378 RTE_LOG(DEBUG, EAL, "PCI scan found %u devices\n", dev_count);
388 pci_device_iommu_support_va(__rte_unused const struct rte_pci_device *dev)
394 pci_device_iova_mode(const struct rte_pci_driver *pdrv __rte_unused,
395 const struct rte_pci_device *pdev)
397 if (pdev->kdrv != RTE_PCI_KDRV_NIC_UIO)
398 RTE_LOG(DEBUG, EAL, "Unsupported kernel driver? Defaulting to IOVA as 'PA'\n");
403 /* Read PCI config space. */
404 int rte_pci_read_config(const struct rte_pci_device *dev,
405 void *buf, size_t len, off_t offset)
409 /* Copy Linux implementation's behaviour */
410 const int return_len = len;
413 .pc_domain = dev->addr.domain,
414 .pc_bus = dev->addr.bus,
415 .pc_dev = dev->addr.devid,
416 .pc_func = dev->addr.function,
421 fd = open("/dev/pci", O_RDWR);
423 RTE_LOG(ERR, EAL, "%s(): error opening /dev/pci\n", __func__);
428 size = (len >= 4) ? 4 : ((len >= 2) ? 2 : 1);
431 if (ioctl(fd, PCIOCREAD, &pi) < 0)
433 memcpy(buf, &pi.pi_data, size);
435 buf = (char *)buf + size;
449 /* Write PCI config space. */
450 int rte_pci_write_config(const struct rte_pci_device *dev,
451 const void *buf, size_t len, off_t offset)
457 .pc_domain = dev->addr.domain,
458 .pc_bus = dev->addr.bus,
459 .pc_dev = dev->addr.devid,
460 .pc_func = dev->addr.function,
463 .pi_data = *(const uint32_t *)buf,
467 if (len == 3 || len > sizeof(pi.pi_data)) {
468 RTE_LOG(ERR, EAL, "%s(): invalid pci read length\n", __func__);
472 memcpy(&pi.pi_data, buf, len);
474 fd = open("/dev/pci", O_RDWR);
476 RTE_LOG(ERR, EAL, "%s(): error opening /dev/pci\n", __func__);
480 if (ioctl(fd, PCIOCWRITE, &pi) < 0)
493 rte_pci_ioport_map(struct rte_pci_device *dev, int bar,
494 struct rte_pci_ioport *p)
499 #if defined(RTE_ARCH_X86)
500 case RTE_PCI_KDRV_NIC_UIO:
501 if (rte_eal_iopl_init() != 0) {
502 RTE_LOG(ERR, EAL, "%s(): insufficient ioport permissions for PCI device %s\n",
503 __func__, dev->name);
506 if ((uintptr_t) dev->mem_resource[bar].addr <= UINT16_MAX) {
507 p->base = (uintptr_t)dev->mem_resource[bar].addr;
525 pci_uio_ioport_read(struct rte_pci_ioport *p,
526 void *data, size_t len, off_t offset)
528 #if defined(RTE_ARCH_X86)
531 unsigned short reg = p->base + offset;
533 for (d = data; len > 0; d += size, reg += size, len -= size) {
536 *(uint32_t *)d = inl(reg);
537 } else if (len >= 2) {
539 *(uint16_t *)d = inw(reg);
549 RTE_SET_USED(offset);
554 rte_pci_ioport_read(struct rte_pci_ioport *p,
555 void *data, size_t len, off_t offset)
557 switch (p->dev->kdrv) {
558 case RTE_PCI_KDRV_NIC_UIO:
559 pci_uio_ioport_read(p, data, len, offset);
567 pci_uio_ioport_write(struct rte_pci_ioport *p,
568 const void *data, size_t len, off_t offset)
570 #if defined(RTE_ARCH_X86)
573 unsigned short reg = p->base + offset;
575 for (s = data; len > 0; s += size, reg += size, len -= size) {
578 outl(reg, *(const uint32_t *)s);
579 } else if (len >= 2) {
581 outw(reg, *(const uint16_t *)s);
591 RTE_SET_USED(offset);
596 rte_pci_ioport_write(struct rte_pci_ioport *p,
597 const void *data, size_t len, off_t offset)
599 switch (p->dev->kdrv) {
600 case RTE_PCI_KDRV_NIC_UIO:
601 pci_uio_ioport_write(p, data, len, offset);
609 rte_pci_ioport_unmap(struct rte_pci_ioport *p)
613 switch (p->dev->kdrv) {
614 #if defined(RTE_ARCH_X86)
615 case RTE_PCI_KDRV_NIC_UIO: