drivers/net/bnxt/bnxt_ethdev.c

   1 /*-
   2  *   BSD LICENSE
   3  *
   4  *   Copyright(c) Broadcom Limited.
   5  *   All rights reserved.
   6  *
   7  *   Redistribution and use in source and binary forms, with or without
   8  *   modification, are permitted provided that the following conditions
   9  *   are met:
  10  *
  11  *     * Redistributions of source code must retain the above copyright
  12  *       notice, this list of conditions and the following disclaimer.
  13  *     * Redistributions in binary form must reproduce the above copyright
  14  *       notice, this list of conditions and the following disclaimer in
  15  *       the documentation and/or other materials provided with the
  16  *       distribution.
  17  *     * Neither the name of Broadcom Corporation nor the names of its
  18  *       contributors may be used to endorse or promote products derived
  19  *       from this software without specific prior written permission.
  20  *
  21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32  */
  33
  34 #include <inttypes.h>
  35 #include <stdbool.h>
  36
  37 #include <rte_dev.h>
  38 #include <rte_ethdev.h>
  39 #include <rte_ethdev_pci.h>
  40 #include <rte_malloc.h>
  41 #include <rte_cycles.h>
  42
  43 #include "bnxt.h"
  44 #include "bnxt_cpr.h"
  45 #include "bnxt_filter.h"
  46 #include "bnxt_hwrm.h"
  47 #include "bnxt_irq.h"
  48 #include "bnxt_ring.h"
  49 #include "bnxt_rxq.h"
  50 #include "bnxt_rxr.h"
  51 #include "bnxt_stats.h"
  52 #include "bnxt_txq.h"
  53 #include "bnxt_txr.h"
  54 #include "bnxt_vnic.h"
  55 #include "hsi_struct_def_dpdk.h"
  56 #include "bnxt_nvm_defs.h"
  57
  58 #define DRV_MODULE_NAME         "bnxt"
  59 static const char bnxt_version[] =
  60         "Broadcom Cumulus driver " DRV_MODULE_NAME "\n";
  61
  62 #define PCI_VENDOR_ID_BROADCOM 0x14E4
  63
  64 #define BROADCOM_DEV_ID_STRATUS_NIC_VF 0x1609
  65 #define BROADCOM_DEV_ID_STRATUS_NIC 0x1614
  66 #define BROADCOM_DEV_ID_57414_VF 0x16c1
  67 #define BROADCOM_DEV_ID_57301 0x16c8
  68 #define BROADCOM_DEV_ID_57302 0x16c9
  69 #define BROADCOM_DEV_ID_57304_PF 0x16ca
  70 #define BROADCOM_DEV_ID_57304_VF 0x16cb
  71 #define BROADCOM_DEV_ID_57417_MF 0x16cc
  72 #define BROADCOM_DEV_ID_NS2 0x16cd
  73 #define BROADCOM_DEV_ID_57311 0x16ce
  74 #define BROADCOM_DEV_ID_57312 0x16cf
  75 #define BROADCOM_DEV_ID_57402 0x16d0
  76 #define BROADCOM_DEV_ID_57404 0x16d1
  77 #define BROADCOM_DEV_ID_57406_PF 0x16d2
  78 #define BROADCOM_DEV_ID_57406_VF 0x16d3
  79 #define BROADCOM_DEV_ID_57402_MF 0x16d4
  80 #define BROADCOM_DEV_ID_57407_RJ45 0x16d5
  81 #define BROADCOM_DEV_ID_57412 0x16d6
  82 #define BROADCOM_DEV_ID_57414 0x16d7
  83 #define BROADCOM_DEV_ID_57416_RJ45 0x16d8
  84 #define BROADCOM_DEV_ID_57417_RJ45 0x16d9
  85 #define BROADCOM_DEV_ID_5741X_VF 0x16dc
  86 #define BROADCOM_DEV_ID_57412_MF 0x16de
  87 #define BROADCOM_DEV_ID_57314 0x16df
  88 #define BROADCOM_DEV_ID_57317_RJ45 0x16e0
  89 #define BROADCOM_DEV_ID_5731X_VF 0x16e1
  90 #define BROADCOM_DEV_ID_57417_SFP 0x16e2
  91 #define BROADCOM_DEV_ID_57416_SFP 0x16e3
  92 #define BROADCOM_DEV_ID_57317_SFP 0x16e4
  93 #define BROADCOM_DEV_ID_57404_MF 0x16e7
  94 #define BROADCOM_DEV_ID_57406_MF 0x16e8
  95 #define BROADCOM_DEV_ID_57407_SFP 0x16e9
  96 #define BROADCOM_DEV_ID_57407_MF 0x16ea
  97 #define BROADCOM_DEV_ID_57414_MF 0x16ec
  98 #define BROADCOM_DEV_ID_57416_MF 0x16ee
  99
 100 static const struct rte_pci_id bnxt_pci_id_map[] = {
 101         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM,
 102                          BROADCOM_DEV_ID_STRATUS_NIC_VF) },
 103         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_STRATUS_NIC) },
 104         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57414_VF) },
 105         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57301) },
 106         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57302) },
 107         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57304_PF) },
 108         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57304_VF) },
 109         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_NS2) },
 110         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57402) },
 111         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57404) },
 112         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57406_PF) },
 113         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57406_VF) },
 114         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57402_MF) },
 115         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57407_RJ45) },
 116         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57404_MF) },
 117         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57406_MF) },
 118         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57407_SFP) },
 119         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57407_MF) },
 120         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_5741X_VF) },
 121         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_5731X_VF) },
 122         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57314) },
 123         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57417_MF) },
 124         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57311) },
 125         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57312) },
 126         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57412) },
 127         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57414) },
 128         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57416_RJ45) },
 129         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57417_RJ45) },
 130         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57412_MF) },
 131         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57317_RJ45) },
 132         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57417_SFP) },
 133         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57416_SFP) },
 134         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57317_SFP) },
 135         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57414_MF) },
 136         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57416_MF) },
 137         { .vendor_id = 0, /* sentinel */ },
 138 };
 139
 140 #define BNXT_ETH_RSS_SUPPORT (  \
 141         ETH_RSS_IPV4 |          \
 142         ETH_RSS_NONFRAG_IPV4_TCP |      \
 143         ETH_RSS_NONFRAG_IPV4_UDP |      \
 144         ETH_RSS_IPV6 |          \
 145         ETH_RSS_NONFRAG_IPV6_TCP |      \
 146         ETH_RSS_NONFRAG_IPV6_UDP)
 147
 148 static int bnxt_vlan_offload_set_op(struct rte_eth_dev *dev, int mask);
 149 static void bnxt_print_link_info(struct rte_eth_dev *eth_dev);
 150
 151 /***********************/
 152
 153 /*
 154  * High level utility functions
 155  */
 156
 157 static void bnxt_free_mem(struct bnxt *bp)
 158 {
 159         bnxt_free_filter_mem(bp);
 160         bnxt_free_vnic_attributes(bp);
 161         bnxt_free_vnic_mem(bp);
 162
 163         bnxt_free_stats(bp);
 164         bnxt_free_tx_rings(bp);
 165         bnxt_free_rx_rings(bp);
 166         bnxt_free_def_cp_ring(bp);
 167 }
 168
 169 static int bnxt_alloc_mem(struct bnxt *bp)
 170 {
 171         int rc;
 172
 173         /* Default completion ring */
 174         rc = bnxt_init_def_ring_struct(bp, SOCKET_ID_ANY);
 175         if (rc)
 176                 goto alloc_mem_err;
 177
 178         rc = bnxt_alloc_rings(bp, 0, NULL, NULL,
 179                               bp->def_cp_ring, "def_cp");
 180         if (rc)
 181                 goto alloc_mem_err;
 182
 183         rc = bnxt_alloc_vnic_mem(bp);
 184         if (rc)
 185                 goto alloc_mem_err;
 186
 187         rc = bnxt_alloc_vnic_attributes(bp);
 188         if (rc)
 189                 goto alloc_mem_err;
 190
 191         rc = bnxt_alloc_filter_mem(bp);
 192         if (rc)
 193                 goto alloc_mem_err;
 194
 195         return 0;
 196
 197 alloc_mem_err:
 198         bnxt_free_mem(bp);
 199         return rc;
 200 }
 201
 202 static int bnxt_init_chip(struct bnxt *bp)
 203 {
 204         unsigned int i, rss_idx, fw_idx;
 205         struct rte_eth_link new;
 206         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(bp->eth_dev);
 207         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
 208         uint32_t intr_vector = 0;
 209         uint32_t queue_id, base = BNXT_MISC_VEC_ID;
 210         uint32_t vec = BNXT_MISC_VEC_ID;
 211         int rc;
 212
 213         /* disable uio/vfio intr/eventfd mapping */
 214         rte_intr_disable(intr_handle);
 215
 216         if (bp->eth_dev->data->mtu > ETHER_MTU) {
 217                 bp->eth_dev->data->dev_conf.rxmode.jumbo_frame = 1;
 218                 bp->flags |= BNXT_FLAG_JUMBO;
 219         } else {
 220                 bp->eth_dev->data->dev_conf.rxmode.jumbo_frame = 0;
 221                 bp->flags &= ~BNXT_FLAG_JUMBO;
 222         }
 223
 224         rc = bnxt_alloc_all_hwrm_stat_ctxs(bp);
 225         if (rc) {
 226                 RTE_LOG(ERR, PMD, "HWRM stat ctx alloc failure rc: %x\n", rc);
 227                 goto err_out;
 228         }
 229
 230         rc = bnxt_alloc_hwrm_rings(bp);
 231         if (rc) {
 232                 RTE_LOG(ERR, PMD, "HWRM ring alloc failure rc: %x\n", rc);
 233                 goto err_out;
 234         }
 235
 236         rc = bnxt_alloc_all_hwrm_ring_grps(bp);
 237         if (rc) {
 238                 RTE_LOG(ERR, PMD, "HWRM ring grp alloc failure: %x\n", rc);
 239                 goto err_out;
 240         }
 241
 242         rc = bnxt_mq_rx_configure(bp);
 243         if (rc) {
 244                 RTE_LOG(ERR, PMD, "MQ mode configure failure rc: %x\n", rc);
 245                 goto err_out;
 246         }
 247
 248         /* VNIC configuration */
 249         for (i = 0; i < bp->nr_vnics; i++) {
 250                 struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
 251
 252                 rc = bnxt_hwrm_vnic_alloc(bp, vnic);
 253                 if (rc) {
 254                         RTE_LOG(ERR, PMD, "HWRM vnic %d alloc failure rc: %x\n",
 255                                 i, rc);
 256                         goto err_out;
 257                 }
 258
 259                 rc = bnxt_hwrm_vnic_ctx_alloc(bp, vnic);
 260                 if (rc) {
 261                         RTE_LOG(ERR, PMD,
 262                                 "HWRM vnic %d ctx alloc failure rc: %x\n",
 263                                 i, rc);
 264                         goto err_out;
 265                 }
 266
 267                 rc = bnxt_hwrm_vnic_cfg(bp, vnic);
 268                 if (rc) {
 269                         RTE_LOG(ERR, PMD, "HWRM vnic %d cfg failure rc: %x\n",
 270                                 i, rc);
 271                         goto err_out;
 272                 }
 273
 274                 rc = bnxt_set_hwrm_vnic_filters(bp, vnic);
 275                 if (rc) {
 276                         RTE_LOG(ERR, PMD,
 277                                 "HWRM vnic %d filter failure rc: %x\n",
 278                                 i, rc);
 279                         goto err_out;
 280                 }
 281                 if (vnic->rss_table && vnic->hash_type) {
 282                         /*
 283                          * Fill the RSS hash & redirection table with
 284                          * ring group ids for all VNICs
 285                          */
 286                         for (rss_idx = 0, fw_idx = 0;
 287                              rss_idx < HW_HASH_INDEX_SIZE;
 288                              rss_idx++, fw_idx++) {
 289                                 if (vnic->fw_grp_ids[fw_idx] ==
 290                                     INVALID_HW_RING_ID)
 291                                         fw_idx = 0;
 292                                 vnic->rss_table[rss_idx] =
 293                                                 vnic->fw_grp_ids[fw_idx];
 294                         }
 295                         rc = bnxt_hwrm_vnic_rss_cfg(bp, vnic);
 296                         if (rc) {
 297                                 RTE_LOG(ERR, PMD,
 298                                         "HWRM vnic %d set RSS failure rc: %x\n",
 299                                         i, rc);
 300                                 goto err_out;
 301                         }
 302                 }
 303
 304                 bnxt_hwrm_vnic_plcmode_cfg(bp, vnic);
 305
 306                 if (bp->eth_dev->data->dev_conf.rxmode.enable_lro)
 307                         bnxt_hwrm_vnic_tpa_cfg(bp, vnic, 1);
 308                 else
 309                         bnxt_hwrm_vnic_tpa_cfg(bp, vnic, 0);
 310         }
 311         rc = bnxt_hwrm_cfa_l2_set_rx_mask(bp, &bp->vnic_info[0], 0, NULL);
 312         if (rc) {
 313                 RTE_LOG(ERR, PMD,
 314                         "HWRM cfa l2 rx mask failure rc: %x\n", rc);
 315                 goto err_out;
 316         }
 317
 318         /* check and configure queue intr-vector mapping */
 319         if ((rte_intr_cap_multiple(intr_handle) ||
 320              !RTE_ETH_DEV_SRIOV(bp->eth_dev).active) &&
 321             bp->eth_dev->data->dev_conf.intr_conf.rxq != 0) {
 322                 intr_vector = bp->eth_dev->data->nb_rx_queues;
 323                 RTE_LOG(INFO, PMD, "%s(): intr_vector = %d\n", __func__,
 324                         intr_vector);
 325                 if (intr_vector > bp->rx_cp_nr_rings) {
 326                         RTE_LOG(ERR, PMD, "At most %d intr queues supported",
 327                                         bp->rx_cp_nr_rings);
 328                         return -ENOTSUP;
 329                 }
 330                 if (rte_intr_efd_enable(intr_handle, intr_vector))
 331                         return -1;
 332         }
 333
 334         if (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) {
 335                 intr_handle->intr_vec =
 336                         rte_zmalloc("intr_vec",
 337                                     bp->eth_dev->data->nb_rx_queues *
 338                                     sizeof(int), 0);
 339                 if (intr_handle->intr_vec == NULL) {
 340                         RTE_LOG(ERR, PMD, "Failed to allocate %d rx_queues"
 341                                 " intr_vec", bp->eth_dev->data->nb_rx_queues);
 342                         return -ENOMEM;
 343                 }
 344                 RTE_LOG(DEBUG, PMD, "%s(): intr_handle->intr_vec = %p "
 345                         "intr_handle->nb_efd = %d intr_handle->max_intr = %d\n",
 346                          __func__, intr_handle->intr_vec, intr_handle->nb_efd,
 347                         intr_handle->max_intr);
 348         }
 349
 350         for (queue_id = 0; queue_id < bp->eth_dev->data->nb_rx_queues;
 351              queue_id++) {
 352                 intr_handle->intr_vec[queue_id] = vec;
 353                 if (vec < base + intr_handle->nb_efd - 1)
 354                         vec++;
 355         }
 356
 357         /* enable uio/vfio intr/eventfd mapping */
 358         rte_intr_enable(intr_handle);
 359
 360         rc = bnxt_get_hwrm_link_config(bp, &new);
 361         if (rc) {
 362                 RTE_LOG(ERR, PMD, "HWRM Get link config failure rc: %x\n", rc);
 363                 goto err_out;
 364         }
 365
 366         if (!bp->link_info.link_up) {
 367                 rc = bnxt_set_hwrm_link_config(bp, true);
 368                 if (rc) {
 369                         RTE_LOG(ERR, PMD,
 370                                 "HWRM link config failure rc: %x\n", rc);
 371                         goto err_out;
 372                 }
 373         }
 374         bnxt_print_link_info(bp->eth_dev);
 375
 376         return 0;
 377
 378 err_out:
 379         bnxt_free_all_hwrm_resources(bp);
 380
 381         /* Some of the error status returned by FW may not be from errno.h */
 382         if (rc > 0)
 383                 rc = -EIO;
 384
 385         return rc;
 386 }
 387
 388 static int bnxt_shutdown_nic(struct bnxt *bp)
 389 {
 390         bnxt_free_all_hwrm_resources(bp);
 391         bnxt_free_all_filters(bp);
 392         bnxt_free_all_vnics(bp);
 393         return 0;
 394 }
 395
 396 static int bnxt_init_nic(struct bnxt *bp)
 397 {
 398         int rc;
 399
 400         rc = bnxt_init_ring_grps(bp);
 401         if (rc)
 402                 return rc;
 403
 404         bnxt_init_vnics(bp);
 405         bnxt_init_filters(bp);
 406
 407         rc = bnxt_init_chip(bp);
 408         if (rc)
 409                 return rc;
 410
 411         return 0;
 412 }
 413
 414 /*
 415  * Device configuration and status function
 416  */
 417
 418 static void bnxt_dev_info_get_op(struct rte_eth_dev *eth_dev,
 419                                   struct rte_eth_dev_info *dev_info)
 420 {
 421         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 422         uint16_t max_vnics, i, j, vpool, vrxq;
 423         unsigned int max_rx_rings;
 424
 425         dev_info->pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
 426
 427         /* MAC Specifics */
 428         dev_info->max_mac_addrs = bp->max_l2_ctx;
 429         dev_info->max_hash_mac_addrs = 0;
 430
 431         /* PF/VF specifics */
 432         if (BNXT_PF(bp))
 433                 dev_info->max_vfs = bp->pdev->max_vfs;
 434         max_rx_rings = RTE_MIN(bp->max_vnics, RTE_MIN(bp->max_l2_ctx,
 435                                                 RTE_MIN(bp->max_rsscos_ctx,
 436                                                 bp->max_stat_ctx)));
 437         /* For the sake of symmetry, max_rx_queues = max_tx_queues */
 438         dev_info->max_rx_queues = max_rx_rings;
 439         dev_info->max_tx_queues = max_rx_rings;
 440         dev_info->reta_size = bp->max_rsscos_ctx;
 441         dev_info->hash_key_size = 40;
 442         max_vnics = bp->max_vnics;
 443
 444         /* Fast path specifics */
 445         dev_info->min_rx_bufsize = 1;
 446         dev_info->max_rx_pktlen = BNXT_MAX_MTU + ETHER_HDR_LEN + ETHER_CRC_LEN
 447                                   + VLAN_TAG_SIZE;
 448         dev_info->rx_offload_capa = DEV_RX_OFFLOAD_VLAN_STRIP |
 449                                         DEV_RX_OFFLOAD_IPV4_CKSUM |
 450                                         DEV_RX_OFFLOAD_UDP_CKSUM |
 451                                         DEV_RX_OFFLOAD_TCP_CKSUM |
 452                                         DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM;
 453         dev_info->tx_offload_capa = DEV_TX_OFFLOAD_VLAN_INSERT |
 454                                         DEV_TX_OFFLOAD_IPV4_CKSUM |
 455                                         DEV_TX_OFFLOAD_TCP_CKSUM |
 456                                         DEV_TX_OFFLOAD_UDP_CKSUM |
 457                                         DEV_TX_OFFLOAD_TCP_TSO |
 458                                         DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM |
 459                                         DEV_TX_OFFLOAD_VXLAN_TNL_TSO |
 460                                         DEV_TX_OFFLOAD_GRE_TNL_TSO |
 461                                         DEV_TX_OFFLOAD_IPIP_TNL_TSO |
 462                                         DEV_TX_OFFLOAD_GENEVE_TNL_TSO;
 463
 464         /* *INDENT-OFF* */
 465         dev_info->default_rxconf = (struct rte_eth_rxconf) {
 466                 .rx_thresh = {
 467                         .pthresh = 8,
 468                         .hthresh = 8,
 469                         .wthresh = 0,
 470                 },
 471                 .rx_free_thresh = 32,
 472                 .rx_drop_en = 0,
 473         };
 474
 475         dev_info->default_txconf = (struct rte_eth_txconf) {
 476                 .tx_thresh = {
 477                         .pthresh = 32,
 478                         .hthresh = 0,
 479                         .wthresh = 0,
 480                 },
 481                 .tx_free_thresh = 32,
 482                 .tx_rs_thresh = 32,
 483                 .txq_flags = ETH_TXQ_FLAGS_NOMULTSEGS |
 484                              ETH_TXQ_FLAGS_NOOFFLOADS,
 485         };
 486         eth_dev->data->dev_conf.intr_conf.lsc = 1;
 487
 488         eth_dev->data->dev_conf.intr_conf.rxq = 1;
 489
 490         /* *INDENT-ON* */
 491
 492         /*
 493          * TODO: default_rxconf, default_txconf, rx_desc_lim, and tx_desc_lim
 494          *       need further investigation.
 495          */
 496
 497         /* VMDq resources */
 498         vpool = 64; /* ETH_64_POOLS */
 499         vrxq = 128; /* ETH_VMDQ_DCB_NUM_QUEUES */
 500         for (i = 0; i < 4; vpool >>= 1, i++) {
 501                 if (max_vnics > vpool) {
 502                         for (j = 0; j < 5; vrxq >>= 1, j++) {
 503                                 if (dev_info->max_rx_queues > vrxq) {
 504                                         if (vpool > vrxq)
 505                                                 vpool = vrxq;
 506                                         goto found;
 507                                 }
 508                         }
 509                         /* Not enough resources to support VMDq */
 510                         break;
 511                 }
 512         }
 513         /* Not enough resources to support VMDq */
 514         vpool = 0;
 515         vrxq = 0;
 516 found:
 517         dev_info->max_vmdq_pools = vpool;
 518         dev_info->vmdq_queue_num = vrxq;
 519
 520         dev_info->vmdq_pool_base = 0;
 521         dev_info->vmdq_queue_base = 0;
 522 }
 523
 524 /* Configure the device based on the configuration provided */
 525 static int bnxt_dev_configure_op(struct rte_eth_dev *eth_dev)
 526 {
 527         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 528
 529         bp->rx_queues = (void *)eth_dev->data->rx_queues;
 530         bp->tx_queues = (void *)eth_dev->data->tx_queues;
 531
 532         /* Inherit new configurations */
 533         bp->rx_nr_rings = eth_dev->data->nb_rx_queues;
 534         bp->tx_nr_rings = eth_dev->data->nb_tx_queues;
 535         bp->rx_cp_nr_rings = bp->rx_nr_rings;
 536         bp->tx_cp_nr_rings = bp->tx_nr_rings;
 537
 538         if (eth_dev->data->dev_conf.rxmode.jumbo_frame)
 539                 eth_dev->data->mtu =
 540                                 eth_dev->data->dev_conf.rxmode.max_rx_pkt_len -
 541                                 ETHER_HDR_LEN - ETHER_CRC_LEN - VLAN_TAG_SIZE;
 542         return 0;
 543 }
 544
 545 static void bnxt_print_link_info(struct rte_eth_dev *eth_dev)
 546 {
 547         struct rte_eth_link *link = &eth_dev->data->dev_link;
 548
 549         if (link->link_status)
 550                 RTE_LOG(INFO, PMD, "Port %d Link Up - speed %u Mbps - %s\n",
 551                         eth_dev->data->port_id,
 552                         (uint32_t)link->link_speed,
 553                         (link->link_duplex == ETH_LINK_FULL_DUPLEX) ?
 554                         ("full-duplex") : ("half-duplex\n"));
 555         else
 556                 RTE_LOG(INFO, PMD, "Port %d Link Down\n",
 557                         eth_dev->data->port_id);
 558 }
 559
 560 static int bnxt_dev_lsc_intr_setup(struct rte_eth_dev *eth_dev)
 561 {
 562         bnxt_print_link_info(eth_dev);
 563         return 0;
 564 }
 565
 566 static int bnxt_dev_start_op(struct rte_eth_dev *eth_dev)
 567 {
 568         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 569         int vlan_mask = 0;
 570         int rc;
 571
 572         if (bp->rx_cp_nr_rings > RTE_ETHDEV_QUEUE_STAT_CNTRS) {
 573                 RTE_LOG(ERR, PMD,
 574                         "RxQ cnt %d > CONFIG_RTE_ETHDEV_QUEUE_STAT_CNTRS %d\n",
 575                         bp->rx_cp_nr_rings, RTE_ETHDEV_QUEUE_STAT_CNTRS);
 576         }
 577         bp->dev_stopped = 0;
 578
 579         rc = bnxt_init_nic(bp);
 580         if (rc)
 581                 goto error;
 582
 583         bnxt_link_update_op(eth_dev, 1);
 584
 585         if (eth_dev->data->dev_conf.rxmode.hw_vlan_filter)
 586                 vlan_mask |= ETH_VLAN_FILTER_MASK;
 587         if (eth_dev->data->dev_conf.rxmode.hw_vlan_strip)
 588                 vlan_mask |= ETH_VLAN_STRIP_MASK;
 589         rc = bnxt_vlan_offload_set_op(eth_dev, vlan_mask);
 590         if (rc)
 591                 goto error;
 592
 593         bp->flags |= BNXT_FLAG_INIT_DONE;
 594         return 0;
 595
 596 error:
 597         bnxt_shutdown_nic(bp);
 598         bnxt_free_tx_mbufs(bp);
 599         bnxt_free_rx_mbufs(bp);
 600         return rc;
 601 }
 602
 603 static int bnxt_dev_set_link_up_op(struct rte_eth_dev *eth_dev)
 604 {
 605         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 606         int rc = 0;
 607
 608         if (!bp->link_info.link_up)
 609                 rc = bnxt_set_hwrm_link_config(bp, true);
 610         if (!rc)
 611                 eth_dev->data->dev_link.link_status = 1;
 612
 613         bnxt_print_link_info(eth_dev);
 614         return 0;
 615 }
 616
 617 static int bnxt_dev_set_link_down_op(struct rte_eth_dev *eth_dev)
 618 {
 619         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 620
 621         eth_dev->data->dev_link.link_status = 0;
 622         bnxt_set_hwrm_link_config(bp, false);
 623         bp->link_info.link_up = 0;
 624
 625         return 0;
 626 }
 627
 628 /* Unload the driver, release resources */
 629 static void bnxt_dev_stop_op(struct rte_eth_dev *eth_dev)
 630 {
 631         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 632
 633         if (bp->eth_dev->data->dev_started) {
 634                 /* TBD: STOP HW queues DMA */
 635                 eth_dev->data->dev_link.link_status = 0;
 636         }
 637         bnxt_set_hwrm_link_config(bp, false);
 638         bnxt_hwrm_port_clr_stats(bp);
 639         bp->flags &= ~BNXT_FLAG_INIT_DONE;
 640         bnxt_shutdown_nic(bp);
 641         bp->dev_stopped = 1;
 642 }
 643
 644 static void bnxt_dev_close_op(struct rte_eth_dev *eth_dev)
 645 {
 646         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 647
 648         if (bp->dev_stopped == 0)
 649                 bnxt_dev_stop_op(eth_dev);
 650
 651         bnxt_free_tx_mbufs(bp);
 652         bnxt_free_rx_mbufs(bp);
 653         bnxt_free_mem(bp);
 654         if (eth_dev->data->mac_addrs != NULL) {
 655                 rte_free(eth_dev->data->mac_addrs);
 656                 eth_dev->data->mac_addrs = NULL;
 657         }
 658         if (bp->grp_info != NULL) {
 659                 rte_free(bp->grp_info);
 660                 bp->grp_info = NULL;
 661         }
 662 }
 663
 664 static void bnxt_mac_addr_remove_op(struct rte_eth_dev *eth_dev,
 665                                     uint32_t index)
 666 {
 667         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 668         uint64_t pool_mask = eth_dev->data->mac_pool_sel[index];
 669         struct bnxt_vnic_info *vnic;
 670         struct bnxt_filter_info *filter, *temp_filter;
 671         uint32_t pool = RTE_MIN(MAX_FF_POOLS, ETH_64_POOLS);
 672         uint32_t i;
 673
 674         /*
 675          * Loop through all VNICs from the specified filter flow pools to
 676          * remove the corresponding MAC addr filter
 677          */
 678         for (i = 0; i < pool; i++) {
 679                 if (!(pool_mask & (1ULL << i)))
 680                         continue;
 681
 682                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
 683                         filter = STAILQ_FIRST(&vnic->filter);
 684                         while (filter) {
 685                                 temp_filter = STAILQ_NEXT(filter, next);
 686                                 if (filter->mac_index == index) {
 687                                         STAILQ_REMOVE(&vnic->filter, filter,
 688                                                       bnxt_filter_info, next);
 689                                         bnxt_hwrm_clear_l2_filter(bp, filter);
 690                                         filter->mac_index = INVALID_MAC_INDEX;
 691                                         memset(&filter->l2_addr, 0,
 692                                                ETHER_ADDR_LEN);
 693                                         STAILQ_INSERT_TAIL(
 694                                                         &bp->free_filter_list,
 695                                                         filter, next);
 696                                 }
 697                                 filter = temp_filter;
 698                         }
 699                 }
 700         }
 701 }
 702
 703 static int bnxt_mac_addr_add_op(struct rte_eth_dev *eth_dev,
 704                                 struct ether_addr *mac_addr,
 705                                 uint32_t index, uint32_t pool)
 706 {
 707         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 708         struct bnxt_vnic_info *vnic = STAILQ_FIRST(&bp->ff_pool[pool]);
 709         struct bnxt_filter_info *filter;
 710
 711         if (BNXT_VF(bp)) {
 712                 RTE_LOG(ERR, PMD, "Cannot add MAC address to a VF interface\n");
 713                 return -ENOTSUP;
 714         }
 715
 716         if (!vnic) {
 717                 RTE_LOG(ERR, PMD, "VNIC not found for pool %d!\n", pool);
 718                 return -EINVAL;
 719         }
 720         /* Attach requested MAC address to the new l2_filter */
 721         STAILQ_FOREACH(filter, &vnic->filter, next) {
 722                 if (filter->mac_index == index) {
 723                         RTE_LOG(ERR, PMD,
 724                                 "MAC addr already existed for pool %d\n", pool);
 725                         return -EINVAL;
 726                 }
 727         }
 728         filter = bnxt_alloc_filter(bp);
 729         if (!filter) {
 730                 RTE_LOG(ERR, PMD, "L2 filter alloc failed\n");
 731                 return -ENODEV;
 732         }
 733         STAILQ_INSERT_TAIL(&vnic->filter, filter, next);
 734         filter->mac_index = index;
 735         memcpy(filter->l2_addr, mac_addr, ETHER_ADDR_LEN);
 736         return bnxt_hwrm_set_l2_filter(bp, vnic->fw_vnic_id, filter);
 737 }
 738
 739 int bnxt_link_update_op(struct rte_eth_dev *eth_dev, int wait_to_complete)
 740 {
 741         int rc = 0;
 742         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 743         struct rte_eth_link new;
 744         unsigned int cnt = BNXT_LINK_WAIT_CNT;
 745
 746         memset(&new, 0, sizeof(new));
 747         do {
 748                 /* Retrieve link info from hardware */
 749                 rc = bnxt_get_hwrm_link_config(bp, &new);
 750                 if (rc) {
 751                         new.link_speed = ETH_LINK_SPEED_100M;
 752                         new.link_duplex = ETH_LINK_FULL_DUPLEX;
 753                         RTE_LOG(ERR, PMD,
 754                                 "Failed to retrieve link rc = 0x%x!\n", rc);
 755                         goto out;
 756                 }
 757                 rte_delay_ms(BNXT_LINK_WAIT_INTERVAL);
 758
 759                 if (!wait_to_complete)
 760                         break;
 761         } while (!new.link_status && cnt--);
 762
 763 out:
 764         /* Timed out or success */
 765         if (new.link_status != eth_dev->data->dev_link.link_status ||
 766         new.link_speed != eth_dev->data->dev_link.link_speed) {
 767                 memcpy(&eth_dev->data->dev_link, &new,
 768                         sizeof(struct rte_eth_link));
 769                 bnxt_print_link_info(eth_dev);
 770         }
 771
 772         return rc;
 773 }
 774
 775 static void bnxt_promiscuous_enable_op(struct rte_eth_dev *eth_dev)
 776 {
 777         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 778         struct bnxt_vnic_info *vnic;
 779
 780         if (bp->vnic_info == NULL)
 781                 return;
 782
 783         vnic = &bp->vnic_info[0];
 784
 785         vnic->flags |= BNXT_VNIC_INFO_PROMISC;
 786         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic, 0, NULL);
 787 }
 788
 789 static void bnxt_promiscuous_disable_op(struct rte_eth_dev *eth_dev)
 790 {
 791         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 792         struct bnxt_vnic_info *vnic;
 793
 794         if (bp->vnic_info == NULL)
 795                 return;
 796
 797         vnic = &bp->vnic_info[0];
 798
 799         vnic->flags &= ~BNXT_VNIC_INFO_PROMISC;
 800         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic, 0, NULL);
 801 }
 802
 803 static void bnxt_allmulticast_enable_op(struct rte_eth_dev *eth_dev)
 804 {
 805         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 806         struct bnxt_vnic_info *vnic;
 807
 808         if (bp->vnic_info == NULL)
 809                 return;
 810
 811         vnic = &bp->vnic_info[0];
 812
 813         vnic->flags |= BNXT_VNIC_INFO_ALLMULTI;
 814         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic, 0, NULL);
 815 }
 816
 817 static void bnxt_allmulticast_disable_op(struct rte_eth_dev *eth_dev)
 818 {
 819         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 820         struct bnxt_vnic_info *vnic;
 821
 822         if (bp->vnic_info == NULL)
 823                 return;
 824
 825         vnic = &bp->vnic_info[0];
 826
 827         vnic->flags &= ~BNXT_VNIC_INFO_ALLMULTI;
 828         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic, 0, NULL);
 829 }
 830
 831 static int bnxt_reta_update_op(struct rte_eth_dev *eth_dev,
 832                             struct rte_eth_rss_reta_entry64 *reta_conf,
 833                             uint16_t reta_size)
 834 {
 835         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 836         struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
 837         struct bnxt_vnic_info *vnic;
 838         int i;
 839
 840         if (!(dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG))
 841                 return -EINVAL;
 842
 843         if (reta_size != HW_HASH_INDEX_SIZE) {
 844                 RTE_LOG(ERR, PMD, "The configured hash table lookup size "
 845                         "(%d) must equal the size supported by the hardware "
 846                         "(%d)\n", reta_size, HW_HASH_INDEX_SIZE);
 847                 return -EINVAL;
 848         }
 849         /* Update the RSS VNIC(s) */
 850         for (i = 0; i < MAX_FF_POOLS; i++) {
 851                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
 852                         memcpy(vnic->rss_table, reta_conf, reta_size);
 853
 854                         bnxt_hwrm_vnic_rss_cfg(bp, vnic);
 855                 }
 856         }
 857         return 0;
 858 }
 859
 860 static int bnxt_reta_query_op(struct rte_eth_dev *eth_dev,
 861                               struct rte_eth_rss_reta_entry64 *reta_conf,
 862                               uint16_t reta_size)
 863 {
 864         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 865         struct bnxt_vnic_info *vnic = &bp->vnic_info[0];
 866         struct rte_intr_handle *intr_handle
 867                 = &bp->pdev->intr_handle;
 868
 869         /* Retrieve from the default VNIC */
 870         if (!vnic)
 871                 return -EINVAL;
 872         if (!vnic->rss_table)
 873                 return -EINVAL;
 874
 875         if (reta_size != HW_HASH_INDEX_SIZE) {
 876                 RTE_LOG(ERR, PMD, "The configured hash table lookup size "
 877                         "(%d) must equal the size supported by the hardware "
 878                         "(%d)\n", reta_size, HW_HASH_INDEX_SIZE);
 879                 return -EINVAL;
 880         }
 881         /* EW - need to revisit here copying from uint64_t to uint16_t */
 882         memcpy(reta_conf, vnic->rss_table, reta_size);
 883
 884         if (rte_intr_allow_others(intr_handle)) {
 885                 if (eth_dev->data->dev_conf.intr_conf.lsc != 0)
 886                         bnxt_dev_lsc_intr_setup(eth_dev);
 887         }
 888
 889         return 0;
 890 }
 891
 892 static int bnxt_rss_hash_update_op(struct rte_eth_dev *eth_dev,
 893                                    struct rte_eth_rss_conf *rss_conf)
 894 {
 895         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 896         struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
 897         struct bnxt_vnic_info *vnic;
 898         uint16_t hash_type = 0;
 899         int i;
 900
 901         /*
 902          * If RSS enablement were different than dev_configure,
 903          * then return -EINVAL
 904          */
 905         if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) {
 906                 if (!rss_conf->rss_hf)
 907                         RTE_LOG(ERR, PMD, "Hash type NONE\n");
 908         } else {
 909                 if (rss_conf->rss_hf & BNXT_ETH_RSS_SUPPORT)
 910                         return -EINVAL;
 911         }
 912
 913         bp->flags |= BNXT_FLAG_UPDATE_HASH;
 914         memcpy(&bp->rss_conf, rss_conf, sizeof(*rss_conf));
 915
 916         if (rss_conf->rss_hf & ETH_RSS_IPV4)
 917                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4;
 918         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV4_TCP)
 919                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4;
 920         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV4_UDP)
 921                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4;
 922         if (rss_conf->rss_hf & ETH_RSS_IPV6)
 923                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6;
 924         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV6_TCP)
 925                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6;
 926         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV6_UDP)
 927                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6;
 928
 929         /* Update the RSS VNIC(s) */
 930         for (i = 0; i < MAX_FF_POOLS; i++) {
 931                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
 932                         vnic->hash_type = hash_type;
 933
 934                         /*
 935                          * Use the supplied key if the key length is
 936                          * acceptable and the rss_key is not NULL
 937                          */
 938                         if (rss_conf->rss_key &&
 939                             rss_conf->rss_key_len <= HW_HASH_KEY_SIZE)
 940                                 memcpy(vnic->rss_hash_key, rss_conf->rss_key,
 941                                        rss_conf->rss_key_len);
 942
 943                         bnxt_hwrm_vnic_rss_cfg(bp, vnic);
 944                 }
 945         }
 946         return 0;
 947 }
 948
 949 static int bnxt_rss_hash_conf_get_op(struct rte_eth_dev *eth_dev,
 950                                      struct rte_eth_rss_conf *rss_conf)
 951 {
 952         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 953         struct bnxt_vnic_info *vnic = &bp->vnic_info[0];
 954         int len;
 955         uint32_t hash_types;
 956
 957         /* RSS configuration is the same for all VNICs */
 958         if (vnic && vnic->rss_hash_key) {
 959                 if (rss_conf->rss_key) {
 960                         len = rss_conf->rss_key_len <= HW_HASH_KEY_SIZE ?
 961                               rss_conf->rss_key_len : HW_HASH_KEY_SIZE;
 962                         memcpy(rss_conf->rss_key, vnic->rss_hash_key, len);
 963                 }
 964
 965                 hash_types = vnic->hash_type;
 966                 rss_conf->rss_hf = 0;
 967                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4) {
 968                         rss_conf->rss_hf |= ETH_RSS_IPV4;
 969                         hash_types &= ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4;
 970                 }
 971                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4) {
 972                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV4_TCP;
 973                         hash_types &=
 974                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4;
 975                 }
 976                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4) {
 977                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV4_UDP;
 978                         hash_types &=
 979                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4;
 980                 }
 981                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6) {
 982                         rss_conf->rss_hf |= ETH_RSS_IPV6;
 983                         hash_types &= ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6;
 984                 }
 985                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6) {
 986                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV6_TCP;
 987                         hash_types &=
 988                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6;
 989                 }
 990                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6) {
 991                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV6_UDP;
 992                         hash_types &=
 993                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6;
 994                 }
 995                 if (hash_types) {
 996                         RTE_LOG(ERR, PMD,
 997                                 "Unknwon RSS config from firmware (%08x), RSS disabled",
 998                                 vnic->hash_type);
 999                         return -ENOTSUP;
1000                 }
1001         } else {
1002                 rss_conf->rss_hf = 0;
1003         }
1004         return 0;
1005 }
1006
1007 static int bnxt_flow_ctrl_get_op(struct rte_eth_dev *dev,
1008                                struct rte_eth_fc_conf *fc_conf)
1009 {
1010         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1011         struct rte_eth_link link_info;
1012         int rc;
1013
1014         rc = bnxt_get_hwrm_link_config(bp, &link_info);
1015         if (rc)
1016                 return rc;
1017
1018         memset(fc_conf, 0, sizeof(*fc_conf));
1019         if (bp->link_info.auto_pause)
1020                 fc_conf->autoneg = 1;
1021         switch (bp->link_info.pause) {
1022         case 0:
1023                 fc_conf->mode = RTE_FC_NONE;
1024                 break;
1025         case HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_TX:
1026                 fc_conf->mode = RTE_FC_TX_PAUSE;
1027                 break;
1028         case HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_RX:
1029                 fc_conf->mode = RTE_FC_RX_PAUSE;
1030                 break;
1031         case (HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_TX |
1032                         HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_RX):
1033                 fc_conf->mode = RTE_FC_FULL;
1034                 break;
1035         }
1036         return 0;
1037 }
1038
1039 static int bnxt_flow_ctrl_set_op(struct rte_eth_dev *dev,
1040                                struct rte_eth_fc_conf *fc_conf)
1041 {
1042         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1043
1044         if (!BNXT_SINGLE_PF(bp) || BNXT_VF(bp)) {
1045                 RTE_LOG(ERR, PMD, "Flow Control Settings cannot be modified\n");
1046                 return -ENOTSUP;
1047         }
1048
1049         switch (fc_conf->mode) {
1050         case RTE_FC_NONE:
1051                 bp->link_info.auto_pause = 0;
1052                 bp->link_info.force_pause = 0;
1053                 break;
1054         case RTE_FC_RX_PAUSE:
1055                 if (fc_conf->autoneg) {
1056                         bp->link_info.auto_pause =
1057                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_RX;
1058                         bp->link_info.force_pause = 0;
1059                 } else {
1060                         bp->link_info.auto_pause = 0;
1061                         bp->link_info.force_pause =
1062                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_RX;
1063                 }
1064                 break;
1065         case RTE_FC_TX_PAUSE:
1066                 if (fc_conf->autoneg) {
1067                         bp->link_info.auto_pause =
1068                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_TX;
1069                         bp->link_info.force_pause = 0;
1070                 } else {
1071                         bp->link_info.auto_pause = 0;
1072                         bp->link_info.force_pause =
1073                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_TX;
1074                 }
1075                 break;
1076         case RTE_FC_FULL:
1077                 if (fc_conf->autoneg) {
1078                         bp->link_info.auto_pause =
1079                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_TX |
1080                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_RX;
1081                         bp->link_info.force_pause = 0;
1082                 } else {
1083                         bp->link_info.auto_pause = 0;
1084                         bp->link_info.force_pause =
1085                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_TX |
1086                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_RX;
1087                 }
1088                 break;
1089         }
1090         return bnxt_set_hwrm_link_config(bp, true);
1091 }
1092
1093 /* Add UDP tunneling port */
1094 static int
1095 bnxt_udp_tunnel_port_add_op(struct rte_eth_dev *eth_dev,
1096                          struct rte_eth_udp_tunnel *udp_tunnel)
1097 {
1098         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
1099         uint16_t tunnel_type = 0;
1100         int rc = 0;
1101
1102         switch (udp_tunnel->prot_type) {
1103         case RTE_TUNNEL_TYPE_VXLAN:
1104                 if (bp->vxlan_port_cnt) {
1105                         RTE_LOG(ERR, PMD, "Tunnel Port %d already programmed\n",
1106                                 udp_tunnel->udp_port);
1107                         if (bp->vxlan_port != udp_tunnel->udp_port) {
1108                                 RTE_LOG(ERR, PMD, "Only one port allowed\n");
1109                                 return -ENOSPC;
1110                         }
1111                         bp->vxlan_port_cnt++;
1112                         return 0;
1113                 }
1114                 tunnel_type =
1115                         HWRM_TUNNEL_DST_PORT_ALLOC_INPUT_TUNNEL_TYPE_VXLAN;
1116                 bp->vxlan_port_cnt++;
1117                 break;
1118         case RTE_TUNNEL_TYPE_GENEVE:
1119                 if (bp->geneve_port_cnt) {
1120                         RTE_LOG(ERR, PMD, "Tunnel Port %d already programmed\n",
1121                                 udp_tunnel->udp_port);
1122                         if (bp->geneve_port != udp_tunnel->udp_port) {
1123                                 RTE_LOG(ERR, PMD, "Only one port allowed\n");
1124                                 return -ENOSPC;
1125                         }
1126                         bp->geneve_port_cnt++;
1127                         return 0;
1128                 }
1129                 tunnel_type =
1130                         HWRM_TUNNEL_DST_PORT_ALLOC_INPUT_TUNNEL_TYPE_GENEVE;
1131                 bp->geneve_port_cnt++;
1132                 break;
1133         default:
1134                 RTE_LOG(ERR, PMD, "Tunnel type is not supported\n");
1135                 return -ENOTSUP;
1136         }
1137         rc = bnxt_hwrm_tunnel_dst_port_alloc(bp, udp_tunnel->udp_port,
1138                                              tunnel_type);
1139         return rc;
1140 }
1141
1142 static int
1143 bnxt_udp_tunnel_port_del_op(struct rte_eth_dev *eth_dev,
1144                          struct rte_eth_udp_tunnel *udp_tunnel)
1145 {
1146         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
1147         uint16_t tunnel_type = 0;
1148         uint16_t port = 0;
1149         int rc = 0;
1150
1151         switch (udp_tunnel->prot_type) {
1152         case RTE_TUNNEL_TYPE_VXLAN:
1153                 if (!bp->vxlan_port_cnt) {
1154                         RTE_LOG(ERR, PMD, "No Tunnel port configured yet\n");
1155                         return -EINVAL;
1156                 }
1157                 if (bp->vxlan_port != udp_tunnel->udp_port) {
1158                         RTE_LOG(ERR, PMD, "Req Port: %d. Configured port: %d\n",
1159                                 udp_tunnel->udp_port, bp->vxlan_port);
1160                         return -EINVAL;
1161                 }
1162                 if (--bp->vxlan_port_cnt)
1163                         return 0;
1164
1165                 tunnel_type =
1166                         HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_VXLAN;
1167                 port = bp->vxlan_fw_dst_port_id;
1168                 break;
1169         case RTE_TUNNEL_TYPE_GENEVE:
1170                 if (!bp->geneve_port_cnt) {
1171                         RTE_LOG(ERR, PMD, "No Tunnel port configured yet\n");
1172                         return -EINVAL;
1173                 }
1174                 if (bp->geneve_port != udp_tunnel->udp_port) {
1175                         RTE_LOG(ERR, PMD, "Req Port: %d. Configured port: %d\n",
1176                                 udp_tunnel->udp_port, bp->geneve_port);
1177                         return -EINVAL;
1178                 }
1179                 if (--bp->geneve_port_cnt)
1180                         return 0;
1181
1182                 tunnel_type =
1183                         HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_GENEVE;
1184                 port = bp->geneve_fw_dst_port_id;
1185                 break;
1186         default:
1187                 RTE_LOG(ERR, PMD, "Tunnel type is not supported\n");
1188                 return -ENOTSUP;
1189         }
1190
1191         rc = bnxt_hwrm_tunnel_dst_port_free(bp, port, tunnel_type);
1192         if (!rc) {
1193                 if (tunnel_type ==
1194                     HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_VXLAN)
1195                         bp->vxlan_port = 0;
1196                 if (tunnel_type ==
1197                     HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_GENEVE)
1198                         bp->geneve_port = 0;
1199         }
1200         return rc;
1201 }
1202
1203 static int bnxt_del_vlan_filter(struct bnxt *bp, uint16_t vlan_id)
1204 {
1205         struct bnxt_filter_info *filter, *temp_filter, *new_filter;
1206         struct bnxt_vnic_info *vnic;
1207         unsigned int i;
1208         int rc = 0;
1209         uint32_t chk = HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN;
1210
1211         /* Cycle through all VNICs */
1212         for (i = 0; i < bp->nr_vnics; i++) {
1213                 /*
1214                  * For each VNIC and each associated filter(s)
1215                  * if VLAN exists && VLAN matches vlan_id
1216                  *      remove the MAC+VLAN filter
1217                  *      add a new MAC only filter
1218                  * else
1219                  *      VLAN filter doesn't exist, just skip and continue
1220                  */
1221                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
1222                         filter = STAILQ_FIRST(&vnic->filter);
1223                         while (filter) {
1224                                 temp_filter = STAILQ_NEXT(filter, next);
1225
1226                                 if (filter->enables & chk &&
1227                                     filter->l2_ovlan == vlan_id) {
1228                                         /* Must delete the filter */
1229                                         STAILQ_REMOVE(&vnic->filter, filter,
1230                                                       bnxt_filter_info, next);
1231                                         bnxt_hwrm_clear_l2_filter(bp, filter);
1232                                         STAILQ_INSERT_TAIL(
1233                                                         &bp->free_filter_list,
1234                                                         filter, next);
1235
1236                                         /*
1237                                          * Need to examine to see if the MAC
1238                                          * filter already existed or not before
1239                                          * allocating a new one
1240                                          */
1241
1242                                         new_filter = bnxt_alloc_filter(bp);
1243                                         if (!new_filter) {
1244                                                 RTE_LOG(ERR, PMD,
1245                                                         "MAC/VLAN filter alloc failed\n");
1246                                                 rc = -ENOMEM;
1247                                                 goto exit;
1248                                         }
1249                                         STAILQ_INSERT_TAIL(&vnic->filter,
1250                                                            new_filter, next);
1251                                         /* Inherit MAC from previous filter */
1252                                         new_filter->mac_index =
1253                                                         filter->mac_index;
1254                                         memcpy(new_filter->l2_addr,
1255                                                filter->l2_addr, ETHER_ADDR_LEN);
1256                                         /* MAC only filter */
1257                                         rc = bnxt_hwrm_set_l2_filter(bp,
1258                                                         vnic->fw_vnic_id,
1259                                                         new_filter);
1260                                         if (rc)
1261                                                 goto exit;
1262                                         RTE_LOG(INFO, PMD,
1263                                                 "Del Vlan filter for %d\n",
1264                                                 vlan_id);
1265                                 }
1266                                 filter = temp_filter;
1267                         }
1268                 }
1269         }
1270 exit:
1271         return rc;
1272 }
1273
1274 static int bnxt_add_vlan_filter(struct bnxt *bp, uint16_t vlan_id)
1275 {
1276         struct bnxt_filter_info *filter, *temp_filter, *new_filter;
1277         struct bnxt_vnic_info *vnic;
1278         unsigned int i;
1279         int rc = 0;
1280         uint32_t en = HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN |
1281                 HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN_MASK;
1282         uint32_t chk = HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN;
1283
1284         /* Cycle through all VNICs */
1285         for (i = 0; i < bp->nr_vnics; i++) {
1286                 /*
1287                  * For each VNIC and each associated filter(s)
1288                  * if VLAN exists:
1289                  *   if VLAN matches vlan_id
1290                  *      VLAN filter already exists, just skip and continue
1291                  *   else
1292                  *      add a new MAC+VLAN filter
1293                  * else
1294                  *   Remove the old MAC only filter
1295                  *    Add a new MAC+VLAN filter
1296                  */
1297                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
1298                         filter = STAILQ_FIRST(&vnic->filter);
1299                         while (filter) {
1300                                 temp_filter = STAILQ_NEXT(filter, next);
1301
1302                                 if (filter->enables & chk) {
1303                                         if (filter->l2_ovlan == vlan_id)
1304                                                 goto cont;
1305                                 } else {
1306                                         /* Must delete the MAC filter */
1307                                         STAILQ_REMOVE(&vnic->filter, filter,
1308                                                       bnxt_filter_info, next);
1309                                         bnxt_hwrm_clear_l2_filter(bp, filter);
1310                                         filter->l2_ovlan = 0;
1311                                         STAILQ_INSERT_TAIL(
1312                                                         &bp->free_filter_list,
1313                                                         filter, next);
1314                                 }
1315                                 new_filter = bnxt_alloc_filter(bp);
1316                                 if (!new_filter) {
1317                                         RTE_LOG(ERR, PMD,
1318                                                 "MAC/VLAN filter alloc failed\n");
1319                                         rc = -ENOMEM;
1320                                         goto exit;
1321                                 }
1322                                 STAILQ_INSERT_TAIL(&vnic->filter, new_filter,
1323                                                    next);
1324                                 /* Inherit MAC from the previous filter */
1325                                 new_filter->mac_index = filter->mac_index;
1326                                 memcpy(new_filter->l2_addr, filter->l2_addr,
1327                                        ETHER_ADDR_LEN);
1328                                 /* MAC + VLAN ID filter */
1329                                 new_filter->l2_ovlan = vlan_id;
1330                                 new_filter->l2_ovlan_mask = 0xF000;
1331                                 new_filter->enables |= en;
1332                                 rc = bnxt_hwrm_set_l2_filter(bp,
1333                                                              vnic->fw_vnic_id,
1334                                                              new_filter);
1335                                 if (rc)
1336                                         goto exit;
1337                                 RTE_LOG(INFO, PMD,
1338                                         "Added Vlan filter for %d\n", vlan_id);
1339 cont:
1340                                 filter = temp_filter;
1341                         }
1342                 }
1343         }
1344 exit:
1345         return rc;
1346 }
1347
1348 static int bnxt_vlan_filter_set_op(struct rte_eth_dev *eth_dev,
1349                                    uint16_t vlan_id, int on)
1350 {
1351         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
1352
1353         /* These operations apply to ALL existing MAC/VLAN filters */
1354         if (on)
1355                 return bnxt_add_vlan_filter(bp, vlan_id);
1356         else
1357                 return bnxt_del_vlan_filter(bp, vlan_id);
1358 }
1359
1360 static int
1361 bnxt_vlan_offload_set_op(struct rte_eth_dev *dev, int mask)
1362 {
1363         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1364         unsigned int i;
1365
1366         if (mask & ETH_VLAN_FILTER_MASK) {
1367                 if (!dev->data->dev_conf.rxmode.hw_vlan_filter) {
1368                         /* Remove any VLAN filters programmed */
1369                         for (i = 0; i < 4095; i++)
1370                                 bnxt_del_vlan_filter(bp, i);
1371                 }
1372                 RTE_LOG(INFO, PMD, "VLAN Filtering: %d\n",
1373                         dev->data->dev_conf.rxmode.hw_vlan_filter);
1374         }
1375
1376         if (mask & ETH_VLAN_STRIP_MASK) {
1377                 /* Enable or disable VLAN stripping */
1378                 for (i = 0; i < bp->nr_vnics; i++) {
1379                         struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
1380                         if (dev->data->dev_conf.rxmode.hw_vlan_strip)
1381                                 vnic->vlan_strip = true;
1382                         else
1383                                 vnic->vlan_strip = false;
1384                         bnxt_hwrm_vnic_cfg(bp, vnic);
1385                 }
1386                 RTE_LOG(INFO, PMD, "VLAN Strip Offload: %d\n",
1387                         dev->data->dev_conf.rxmode.hw_vlan_strip);
1388         }
1389
1390         if (mask & ETH_VLAN_EXTEND_MASK)
1391                 RTE_LOG(ERR, PMD, "Extend VLAN Not supported\n");
1392
1393         return 0;
1394 }
1395
1396 static void
1397 bnxt_set_default_mac_addr_op(struct rte_eth_dev *dev, struct ether_addr *addr)
1398 {
1399         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1400         /* Default Filter is tied to VNIC 0 */
1401         struct bnxt_vnic_info *vnic = &bp->vnic_info[0];
1402         struct bnxt_filter_info *filter;
1403         int rc;
1404
1405         if (BNXT_VF(bp))
1406                 return;
1407
1408         memcpy(bp->mac_addr, addr, sizeof(bp->mac_addr));
1409         memcpy(&dev->data->mac_addrs[0], bp->mac_addr, ETHER_ADDR_LEN);
1410
1411         STAILQ_FOREACH(filter, &vnic->filter, next) {
1412                 /* Default Filter is at Index 0 */
1413                 if (filter->mac_index != 0)
1414                         continue;
1415                 rc = bnxt_hwrm_clear_l2_filter(bp, filter);
1416                 if (rc)
1417                         break;
1418                 memcpy(filter->l2_addr, bp->mac_addr, ETHER_ADDR_LEN);
1419                 memset(filter->l2_addr_mask, 0xff, ETHER_ADDR_LEN);
1420                 filter->flags |= HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_RX;
1421                 filter->enables |=
1422                         HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR |
1423                         HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR_MASK;
1424                 rc = bnxt_hwrm_set_l2_filter(bp, vnic->fw_vnic_id, filter);
1425                 if (rc)
1426                         break;
1427                 filter->mac_index = 0;
1428                 RTE_LOG(DEBUG, PMD, "Set MAC addr\n");
1429         }
1430 }
1431
1432 static int
1433 bnxt_dev_set_mc_addr_list_op(struct rte_eth_dev *eth_dev,
1434                           struct ether_addr *mc_addr_set,
1435                           uint32_t nb_mc_addr)
1436 {
1437         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
1438         char *mc_addr_list = (char *)mc_addr_set;
1439         struct bnxt_vnic_info *vnic;
1440         uint32_t off = 0, i = 0;
1441
1442         vnic = &bp->vnic_info[0];
1443
1444         if (nb_mc_addr > BNXT_MAX_MC_ADDRS) {
1445                 vnic->flags |= BNXT_VNIC_INFO_ALLMULTI;
1446                 goto allmulti;
1447         }
1448
1449         /* TODO Check for Duplicate mcast addresses */
1450         vnic->flags &= ~BNXT_VNIC_INFO_ALLMULTI;
1451         for (i = 0; i < nb_mc_addr; i++) {
1452                 memcpy(vnic->mc_list + off, &mc_addr_list[i], ETHER_ADDR_LEN);
1453                 off += ETHER_ADDR_LEN;
1454         }
1455
1456         vnic->mc_addr_cnt = i;
1457
1458 allmulti:
1459         return bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic, 0, NULL);
1460 }
1461
1462 static int
1463 bnxt_fw_version_get(struct rte_eth_dev *dev, char *fw_version, size_t fw_size)
1464 {
1465         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1466         uint8_t fw_major = (bp->fw_ver >> 24) & 0xff;
1467         uint8_t fw_minor = (bp->fw_ver >> 16) & 0xff;
1468         uint8_t fw_updt = (bp->fw_ver >> 8) & 0xff;
1469         int ret;
1470
1471         ret = snprintf(fw_version, fw_size, "%d.%d.%d",
1472                         fw_major, fw_minor, fw_updt);
1473
1474         ret += 1; /* add the size of '\0' */
1475         if (fw_size < (uint32_t)ret)
1476                 return ret;
1477         else
1478                 return 0;
1479 }
1480
1481 static void
1482 bnxt_rxq_info_get_op(struct rte_eth_dev *dev, uint16_t queue_id,
1483         struct rte_eth_rxq_info *qinfo)
1484 {
1485         struct bnxt_rx_queue *rxq;
1486
1487         rxq = dev->data->rx_queues[queue_id];
1488
1489         qinfo->mp = rxq->mb_pool;
1490         qinfo->scattered_rx = dev->data->scattered_rx;
1491         qinfo->nb_desc = rxq->nb_rx_desc;
1492
1493         qinfo->conf.rx_free_thresh = rxq->rx_free_thresh;
1494         qinfo->conf.rx_drop_en = 0;
1495         qinfo->conf.rx_deferred_start = 0;
1496 }
1497
1498 static void
1499 bnxt_txq_info_get_op(struct rte_eth_dev *dev, uint16_t queue_id,
1500         struct rte_eth_txq_info *qinfo)
1501 {
1502         struct bnxt_tx_queue *txq;
1503
1504         txq = dev->data->tx_queues[queue_id];
1505
1506         qinfo->nb_desc = txq->nb_tx_desc;
1507
1508         qinfo->conf.tx_thresh.pthresh = txq->pthresh;
1509         qinfo->conf.tx_thresh.hthresh = txq->hthresh;
1510         qinfo->conf.tx_thresh.wthresh = txq->wthresh;
1511
1512         qinfo->conf.tx_free_thresh = txq->tx_free_thresh;
1513         qinfo->conf.tx_rs_thresh = 0;
1514         qinfo->conf.txq_flags = txq->txq_flags;
1515         qinfo->conf.tx_deferred_start = txq->tx_deferred_start;
1516 }
1517
1518 static int bnxt_mtu_set_op(struct rte_eth_dev *eth_dev, uint16_t new_mtu)
1519 {
1520         struct bnxt *bp = eth_dev->data->dev_private;
1521         struct rte_eth_dev_info dev_info;
1522         uint32_t max_dev_mtu;
1523         uint32_t rc = 0;
1524         uint32_t i;
1525
1526         bnxt_dev_info_get_op(eth_dev, &dev_info);
1527         max_dev_mtu = dev_info.max_rx_pktlen -
1528                       ETHER_HDR_LEN - ETHER_CRC_LEN - VLAN_TAG_SIZE * 2;
1529
1530         if (new_mtu < ETHER_MIN_MTU || new_mtu > max_dev_mtu) {
1531                 RTE_LOG(ERR, PMD, "MTU requested must be within (%d, %d)\n",
1532                         ETHER_MIN_MTU, max_dev_mtu);
1533                 return -EINVAL;
1534         }
1535
1536
1537         if (new_mtu > ETHER_MTU) {
1538                 bp->flags |= BNXT_FLAG_JUMBO;
1539                 eth_dev->data->dev_conf.rxmode.jumbo_frame = 1;
1540         } else {
1541                 eth_dev->data->dev_conf.rxmode.jumbo_frame = 0;
1542                 bp->flags &= ~BNXT_FLAG_JUMBO;
1543         }
1544
1545         eth_dev->data->dev_conf.rxmode.max_rx_pkt_len =
1546                 new_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN + VLAN_TAG_SIZE * 2;
1547
1548         eth_dev->data->mtu = new_mtu;
1549         RTE_LOG(INFO, PMD, "New MTU is %d\n", eth_dev->data->mtu);
1550
1551         for (i = 0; i < bp->nr_vnics; i++) {
1552                 struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
1553
1554                 vnic->mru = bp->eth_dev->data->mtu + ETHER_HDR_LEN +
1555                                         ETHER_CRC_LEN + VLAN_TAG_SIZE * 2;
1556                 rc = bnxt_hwrm_vnic_cfg(bp, vnic);
1557                 if (rc)
1558                         break;
1559
1560                 rc = bnxt_hwrm_vnic_plcmode_cfg(bp, vnic);
1561                 if (rc)
1562                         return rc;
1563         }
1564
1565         return rc;
1566 }
1567
1568 static int
1569 bnxt_vlan_pvid_set_op(struct rte_eth_dev *dev, uint16_t pvid, int on)
1570 {
1571         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1572         uint16_t vlan = bp->vlan;
1573         int rc;
1574
1575         if (!BNXT_SINGLE_PF(bp) || BNXT_VF(bp)) {
1576                 RTE_LOG(ERR, PMD,
1577                         "PVID cannot be modified for this function\n");
1578                 return -ENOTSUP;
1579         }
1580         bp->vlan = on ? pvid : 0;
1581
1582         rc = bnxt_hwrm_set_default_vlan(bp, 0, 0);
1583         if (rc)
1584                 bp->vlan = vlan;
1585         return rc;
1586 }
1587
1588 static int
1589 bnxt_dev_led_on_op(struct rte_eth_dev *dev)
1590 {
1591         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1592
1593         return bnxt_hwrm_port_led_cfg(bp, true);
1594 }
1595
1596 static int
1597 bnxt_dev_led_off_op(struct rte_eth_dev *dev)
1598 {
1599         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1600
1601         return bnxt_hwrm_port_led_cfg(bp, false);
1602 }
1603
1604 static uint32_t
1605 bnxt_rx_queue_count_op(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1606 {
1607         uint32_t desc = 0, raw_cons = 0, cons;
1608         struct bnxt_cp_ring_info *cpr;
1609         struct bnxt_rx_queue *rxq;
1610         struct rx_pkt_cmpl *rxcmp;
1611         uint16_t cmp_type;
1612         uint8_t cmp = 1;
1613         bool valid;
1614
1615         rxq = dev->data->rx_queues[rx_queue_id];
1616         cpr = rxq->cp_ring;
1617         valid = cpr->valid;
1618
1619         while (raw_cons < rxq->nb_rx_desc) {
1620                 cons = RING_CMP(cpr->cp_ring_struct, raw_cons);
1621                 rxcmp = (struct rx_pkt_cmpl *)&cpr->cp_desc_ring[cons];
1622
1623                 if (!CMPL_VALID(rxcmp, valid))
1624                         goto nothing_to_do;
1625                 valid = FLIP_VALID(cons, cpr->cp_ring_struct->ring_mask, valid);
1626                 cmp_type = CMP_TYPE(rxcmp);
1627                 if (cmp_type == RX_TPA_END_CMPL_TYPE_RX_TPA_END) {
1628                         cmp = (rte_le_to_cpu_32(
1629                                         ((struct rx_tpa_end_cmpl *)
1630                                          (rxcmp))->agg_bufs_v1) &
1631                                RX_TPA_END_CMPL_AGG_BUFS_MASK) >>
1632                                 RX_TPA_END_CMPL_AGG_BUFS_SFT;
1633                         desc++;
1634                 } else if (cmp_type == 0x11) {
1635                         desc++;
1636                         cmp = (rxcmp->agg_bufs_v1 &
1637                                    RX_PKT_CMPL_AGG_BUFS_MASK) >>
1638                                 RX_PKT_CMPL_AGG_BUFS_SFT;
1639                 } else {
1640                         cmp = 1;
1641                 }
1642 nothing_to_do:
1643                 raw_cons += cmp ? cmp : 2;
1644         }
1645
1646         return desc;
1647 }
1648
1649 static int
1650 bnxt_rx_descriptor_status_op(void *rx_queue, uint16_t offset)
1651 {
1652         struct bnxt_rx_queue *rxq = (struct bnxt_rx_queue *)rx_queue;
1653         struct bnxt_rx_ring_info *rxr;
1654         struct bnxt_cp_ring_info *cpr;
1655         struct bnxt_sw_rx_bd *rx_buf;
1656         struct rx_pkt_cmpl *rxcmp;
1657         uint32_t cons, cp_cons;
1658
1659         if (!rxq)
1660                 return -EINVAL;
1661
1662         cpr = rxq->cp_ring;
1663         rxr = rxq->rx_ring;
1664
1665         if (offset >= rxq->nb_rx_desc)
1666                 return -EINVAL;
1667
1668         cons = RING_CMP(cpr->cp_ring_struct, offset);
1669         cp_cons = cpr->cp_raw_cons;
1670         rxcmp = (struct rx_pkt_cmpl *)&cpr->cp_desc_ring[cons];
1671
1672         if (cons > cp_cons) {
1673                 if (CMPL_VALID(rxcmp, cpr->valid))
1674                         return RTE_ETH_RX_DESC_DONE;
1675         } else {
1676                 if (CMPL_VALID(rxcmp, !cpr->valid))
1677                         return RTE_ETH_RX_DESC_DONE;
1678         }
1679         rx_buf = &rxr->rx_buf_ring[cons];
1680         if (rx_buf->mbuf == NULL)
1681                 return RTE_ETH_RX_DESC_UNAVAIL;
1682
1683
1684         return RTE_ETH_RX_DESC_AVAIL;
1685 }
1686
1687 static int
1688 bnxt_tx_descriptor_status_op(void *tx_queue, uint16_t offset)
1689 {
1690         struct bnxt_tx_queue *txq = (struct bnxt_tx_queue *)tx_queue;
1691         struct bnxt_tx_ring_info *txr;
1692         struct bnxt_cp_ring_info *cpr;
1693         struct bnxt_sw_tx_bd *tx_buf;
1694         struct tx_pkt_cmpl *txcmp;
1695         uint32_t cons, cp_cons;
1696
1697         if (!txq)
1698                 return -EINVAL;
1699
1700         cpr = txq->cp_ring;
1701         txr = txq->tx_ring;
1702
1703         if (offset >= txq->nb_tx_desc)
1704                 return -EINVAL;
1705
1706         cons = RING_CMP(cpr->cp_ring_struct, offset);
1707         txcmp = (struct tx_pkt_cmpl *)&cpr->cp_desc_ring[cons];
1708         cp_cons = cpr->cp_raw_cons;
1709
1710         if (cons > cp_cons) {
1711                 if (CMPL_VALID(txcmp, cpr->valid))
1712                         return RTE_ETH_TX_DESC_UNAVAIL;
1713         } else {
1714                 if (CMPL_VALID(txcmp, !cpr->valid))
1715                         return RTE_ETH_TX_DESC_UNAVAIL;
1716         }
1717         tx_buf = &txr->tx_buf_ring[cons];
1718         if (tx_buf->mbuf == NULL)
1719                 return RTE_ETH_TX_DESC_DONE;
1720
1721         return RTE_ETH_TX_DESC_FULL;
1722 }
1723
1724 static struct bnxt_filter_info *
1725 bnxt_match_and_validate_ether_filter(struct bnxt *bp,
1726                                 struct rte_eth_ethertype_filter *efilter,
1727                                 struct bnxt_vnic_info *vnic0,
1728                                 struct bnxt_vnic_info *vnic,
1729                                 int *ret)
1730 {
1731         struct bnxt_filter_info *mfilter = NULL;
1732         int match = 0;
1733         *ret = 0;
1734
1735         if (efilter->ether_type == ETHER_TYPE_IPv4 ||
1736                 efilter->ether_type == ETHER_TYPE_IPv6) {
1737                 RTE_LOG(ERR, PMD, "invalid ether_type(0x%04x) in"
1738                         " ethertype filter.", efilter->ether_type);
1739                 *ret = -EINVAL;
1740                 goto exit;
1741         }
1742         if (efilter->queue >= bp->rx_nr_rings) {
1743                 RTE_LOG(ERR, PMD, "Invalid queue %d\n", efilter->queue);
1744                 *ret = -EINVAL;
1745                 goto exit;
1746         }
1747
1748         vnic0 = STAILQ_FIRST(&bp->ff_pool[0]);
1749         vnic = STAILQ_FIRST(&bp->ff_pool[efilter->queue]);
1750         if (vnic == NULL) {
1751                 RTE_LOG(ERR, PMD, "Invalid queue %d\n", efilter->queue);
1752                 *ret = -EINVAL;
1753                 goto exit;
1754         }
1755
1756         if (efilter->flags & RTE_ETHTYPE_FLAGS_DROP) {
1757                 STAILQ_FOREACH(mfilter, &vnic0->filter, next) {
1758                         if ((!memcmp(efilter->mac_addr.addr_bytes,
1759                                      mfilter->l2_addr, ETHER_ADDR_LEN) &&
1760                              mfilter->flags ==
1761                              HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_FLAGS_DROP &&
1762                              mfilter->ethertype == efilter->ether_type)) {
1763                                 match = 1;
1764                                 break;
1765                         }
1766                 }
1767         } else {
1768                 STAILQ_FOREACH(mfilter, &vnic->filter, next)
1769                         if ((!memcmp(efilter->mac_addr.addr_bytes,
1770                                      mfilter->l2_addr, ETHER_ADDR_LEN) &&
1771                              mfilter->ethertype == efilter->ether_type &&
1772                              mfilter->flags ==
1773                              HWRM_CFA_L2_FILTER_CFG_INPUT_FLAGS_PATH_RX)) {
1774                                 match = 1;
1775                                 break;
1776                         }
1777         }
1778
1779         if (match)
1780                 *ret = -EEXIST;
1781
1782 exit:
1783         return mfilter;
1784 }
1785
1786 static int
1787 bnxt_ethertype_filter(struct rte_eth_dev *dev,
1788                         enum rte_filter_op filter_op,
1789                         void *arg)
1790 {
1791         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1792         struct rte_eth_ethertype_filter *efilter =
1793                         (struct rte_eth_ethertype_filter *)arg;
1794         struct bnxt_filter_info *bfilter, *filter1;
1795         struct bnxt_vnic_info *vnic, *vnic0;
1796         int ret;
1797
1798         if (filter_op == RTE_ETH_FILTER_NOP)
1799                 return 0;
1800
1801         if (arg == NULL) {
1802                 RTE_LOG(ERR, PMD, "arg shouldn't be NULL for operation %u.",
1803                             filter_op);
1804                 return -EINVAL;
1805         }
1806
1807         vnic0 = STAILQ_FIRST(&bp->ff_pool[0]);
1808         vnic = STAILQ_FIRST(&bp->ff_pool[efilter->queue]);
1809
1810         switch (filter_op) {
1811         case RTE_ETH_FILTER_ADD:
1812                 bnxt_match_and_validate_ether_filter(bp, efilter,
1813                                                         vnic0, vnic, &ret);
1814                 if (ret < 0)
1815                         return ret;
1816
1817                 bfilter = bnxt_get_unused_filter(bp);
1818                 if (bfilter == NULL) {
1819                         RTE_LOG(ERR, PMD,
1820                                 "Not enough resources for a new filter.\n");
1821                         return -ENOMEM;
1822                 }
1823                 bfilter->filter_type = HWRM_CFA_NTUPLE_FILTER;
1824                 memcpy(bfilter->l2_addr, efilter->mac_addr.addr_bytes,
1825                        ETHER_ADDR_LEN);
1826                 memcpy(bfilter->dst_macaddr, efilter->mac_addr.addr_bytes,
1827                        ETHER_ADDR_LEN);
1828                 bfilter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_MACADDR;
1829                 bfilter->ethertype = efilter->ether_type;
1830                 bfilter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
1831
1832                 filter1 = bnxt_get_l2_filter(bp, bfilter, vnic0);
1833                 if (filter1 == NULL) {
1834                         ret = -1;
1835                         goto cleanup;
1836                 }
1837                 bfilter->enables |=
1838                         HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_L2_FILTER_ID;
1839                 bfilter->fw_l2_filter_id = filter1->fw_l2_filter_id;
1840
1841                 bfilter->dst_id = vnic->fw_vnic_id;
1842
1843                 if (efilter->flags & RTE_ETHTYPE_FLAGS_DROP) {
1844                         bfilter->flags =
1845                                 HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_FLAGS_DROP;
1846                 }
1847
1848                 ret = bnxt_hwrm_set_ntuple_filter(bp, bfilter->dst_id, bfilter);
1849                 if (ret)
1850                         goto cleanup;
1851                 STAILQ_INSERT_TAIL(&vnic->filter, bfilter, next);
1852                 break;
1853         case RTE_ETH_FILTER_DELETE:
1854                 filter1 = bnxt_match_and_validate_ether_filter(bp, efilter,
1855                                                         vnic0, vnic, &ret);
1856                 if (ret == -EEXIST) {
1857                         ret = bnxt_hwrm_clear_ntuple_filter(bp, filter1);
1858
1859                         STAILQ_REMOVE(&vnic->filter, filter1, bnxt_filter_info,
1860                                       next);
1861                         bnxt_free_filter(bp, filter1);
1862                 } else if (ret == 0) {
1863                         RTE_LOG(ERR, PMD, "No matching filter found\n");
1864                 }
1865                 break;
1866         default:
1867                 RTE_LOG(ERR, PMD, "unsupported operation %u.", filter_op);
1868                 ret = -EINVAL;
1869                 goto error;
1870         }
1871         return ret;
1872 cleanup:
1873         bnxt_free_filter(bp, bfilter);
1874 error:
1875         return ret;
1876 }
1877
1878 static inline int
1879 parse_ntuple_filter(struct bnxt *bp,
1880                     struct rte_eth_ntuple_filter *nfilter,
1881                     struct bnxt_filter_info *bfilter)
1882 {
1883         uint32_t en = 0;
1884
1885         if (nfilter->queue >= bp->rx_nr_rings) {
1886                 RTE_LOG(ERR, PMD, "Invalid queue %d\n", nfilter->queue);
1887                 return -EINVAL;
1888         }
1889
1890         switch (nfilter->dst_port_mask) {
1891         case UINT16_MAX:
1892                 bfilter->dst_port_mask = -1;
1893                 bfilter->dst_port = nfilter->dst_port;
1894                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT |
1895                         NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT_MASK;
1896                 break;
1897         default:
1898                 RTE_LOG(ERR, PMD, "invalid dst_port mask.");
1899                 return -EINVAL;
1900         }
1901
1902         bfilter->ip_addr_type = NTUPLE_FLTR_ALLOC_INPUT_IP_ADDR_TYPE_IPV4;
1903         en |= NTUPLE_FLTR_ALLOC_IN_EN_IP_PROTO;
1904
1905         switch (nfilter->proto_mask) {
1906         case UINT8_MAX:
1907                 if (nfilter->proto == 17) /* IPPROTO_UDP */
1908                         bfilter->ip_protocol = 17;
1909                 else if (nfilter->proto == 6) /* IPPROTO_TCP */
1910                         bfilter->ip_protocol = 6;
1911                 else
1912                         return -EINVAL;
1913                 en |= NTUPLE_FLTR_ALLOC_IN_EN_IP_PROTO;
1914                 break;
1915         default:
1916                 RTE_LOG(ERR, PMD, "invalid protocol mask.");
1917                 return -EINVAL;
1918         }
1919
1920         switch (nfilter->dst_ip_mask) {
1921         case UINT32_MAX:
1922                 bfilter->dst_ipaddr_mask[0] = -1;
1923                 bfilter->dst_ipaddr[0] = nfilter->dst_ip;
1924                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR |
1925                         NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR_MASK;
1926                 break;
1927         default:
1928                 RTE_LOG(ERR, PMD, "invalid dst_ip mask.");
1929                 return -EINVAL;
1930         }
1931
1932         switch (nfilter->src_ip_mask) {
1933         case UINT32_MAX:
1934                 bfilter->src_ipaddr_mask[0] = -1;
1935                 bfilter->src_ipaddr[0] = nfilter->src_ip;
1936                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR |
1937                         NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR_MASK;
1938                 break;
1939         default:
1940                 RTE_LOG(ERR, PMD, "invalid src_ip mask.");
1941                 return -EINVAL;
1942         }
1943
1944         switch (nfilter->src_port_mask) {
1945         case UINT16_MAX:
1946                 bfilter->src_port_mask = -1;
1947                 bfilter->src_port = nfilter->src_port;
1948                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT |
1949                         NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT_MASK;
1950                 break;
1951         default:
1952                 RTE_LOG(ERR, PMD, "invalid src_port mask.");
1953                 return -EINVAL;
1954         }
1955
1956         //TODO Priority
1957         //nfilter->priority = (uint8_t)filter->priority;
1958
1959         bfilter->enables = en;
1960         return 0;
1961 }
1962
1963 static struct bnxt_filter_info*
1964 bnxt_match_ntuple_filter(struct bnxt *bp,
1965                          struct bnxt_filter_info *bfilter,
1966                          struct bnxt_vnic_info **mvnic)
1967 {
1968         struct bnxt_filter_info *mfilter = NULL;
1969         int i;
1970
1971         for (i = bp->nr_vnics - 1; i >= 0; i--) {
1972                 struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
1973                 STAILQ_FOREACH(mfilter, &vnic->filter, next) {
1974                         if (bfilter->src_ipaddr[0] == mfilter->src_ipaddr[0] &&
1975                             bfilter->src_ipaddr_mask[0] ==
1976                             mfilter->src_ipaddr_mask[0] &&
1977                             bfilter->src_port == mfilter->src_port &&
1978                             bfilter->src_port_mask == mfilter->src_port_mask &&
1979                             bfilter->dst_ipaddr[0] == mfilter->dst_ipaddr[0] &&
1980                             bfilter->dst_ipaddr_mask[0] ==
1981                             mfilter->dst_ipaddr_mask[0] &&
1982                             bfilter->dst_port == mfilter->dst_port &&
1983                             bfilter->dst_port_mask == mfilter->dst_port_mask &&
1984                             bfilter->flags == mfilter->flags &&
1985                             bfilter->enables == mfilter->enables) {
1986                                 if (mvnic)
1987                                         *mvnic = vnic;
1988                                 return mfilter;
1989                         }
1990                 }
1991         }
1992         return NULL;
1993 }
1994
1995 static int
1996 bnxt_cfg_ntuple_filter(struct bnxt *bp,
1997                        struct rte_eth_ntuple_filter *nfilter,
1998                        enum rte_filter_op filter_op)
1999 {
2000         struct bnxt_filter_info *bfilter, *mfilter, *filter1;
2001         struct bnxt_vnic_info *vnic, *vnic0, *mvnic;
2002         int ret;
2003
2004         if (nfilter->flags != RTE_5TUPLE_FLAGS) {
2005                 RTE_LOG(ERR, PMD, "only 5tuple is supported.");
2006                 return -EINVAL;
2007         }
2008
2009         if (nfilter->flags & RTE_NTUPLE_FLAGS_TCP_FLAG) {
2010                 RTE_LOG(ERR, PMD, "Ntuple filter: TCP flags not supported\n");
2011                 return -EINVAL;
2012         }
2013
2014         bfilter = bnxt_get_unused_filter(bp);
2015         if (bfilter == NULL) {
2016                 RTE_LOG(ERR, PMD,
2017                         "Not enough resources for a new filter.\n");
2018                 return -ENOMEM;
2019         }
2020         ret = parse_ntuple_filter(bp, nfilter, bfilter);
2021         if (ret < 0)
2022                 goto free_filter;
2023
2024         vnic = STAILQ_FIRST(&bp->ff_pool[nfilter->queue]);
2025         vnic0 = STAILQ_FIRST(&bp->ff_pool[0]);
2026         filter1 = STAILQ_FIRST(&vnic0->filter);
2027         if (filter1 == NULL) {
2028                 ret = -1;
2029                 goto free_filter;
2030         }
2031
2032         bfilter->dst_id = vnic->fw_vnic_id;
2033         bfilter->fw_l2_filter_id = filter1->fw_l2_filter_id;
2034         bfilter->enables |=
2035                 HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_L2_FILTER_ID;
2036         bfilter->ethertype = 0x800;
2037         bfilter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
2038
2039         mfilter = bnxt_match_ntuple_filter(bp, bfilter, &mvnic);
2040
2041         if (mfilter != NULL && filter_op == RTE_ETH_FILTER_ADD &&
2042             bfilter->dst_id == mfilter->dst_id) {
2043                 RTE_LOG(ERR, PMD, "filter exists.\n");
2044                 ret = -EEXIST;
2045                 goto free_filter;
2046         } else if (mfilter != NULL && filter_op == RTE_ETH_FILTER_ADD &&
2047                    bfilter->dst_id != mfilter->dst_id) {
2048                 mfilter->dst_id = vnic->fw_vnic_id;
2049                 ret = bnxt_hwrm_set_ntuple_filter(bp, mfilter->dst_id, mfilter);
2050                 STAILQ_REMOVE(&mvnic->filter, mfilter, bnxt_filter_info, next);
2051                 STAILQ_INSERT_TAIL(&vnic->filter, mfilter, next);
2052                 RTE_LOG(ERR, PMD, "filter with matching pattern exists.\n");
2053                 RTE_LOG(ERR, PMD, " Updated it to the new destination queue\n");
2054                 goto free_filter;
2055         }
2056         if (mfilter == NULL && filter_op == RTE_ETH_FILTER_DELETE) {
2057                 RTE_LOG(ERR, PMD, "filter doesn't exist.");
2058                 ret = -ENOENT;
2059                 goto free_filter;
2060         }
2061
2062         if (filter_op == RTE_ETH_FILTER_ADD) {
2063                 bfilter->filter_type = HWRM_CFA_NTUPLE_FILTER;
2064                 ret = bnxt_hwrm_set_ntuple_filter(bp, bfilter->dst_id, bfilter);
2065                 if (ret)
2066                         goto free_filter;
2067                 STAILQ_INSERT_TAIL(&vnic->filter, bfilter, next);
2068         } else {
2069                 if (mfilter == NULL) {
2070                         /* This should not happen. But for Coverity! */
2071                         ret = -ENOENT;
2072                         goto free_filter;
2073                 }
2074                 ret = bnxt_hwrm_clear_ntuple_filter(bp, mfilter);
2075
2076                 STAILQ_REMOVE(&vnic->filter, mfilter, bnxt_filter_info, next);
2077                 bnxt_free_filter(bp, mfilter);
2078                 mfilter->fw_l2_filter_id = -1;
2079                 bnxt_free_filter(bp, bfilter);
2080                 bfilter->fw_l2_filter_id = -1;
2081         }
2082
2083         return 0;
2084 free_filter:
2085         bfilter->fw_l2_filter_id = -1;
2086         bnxt_free_filter(bp, bfilter);
2087         return ret;
2088 }
2089
2090 static int
2091 bnxt_ntuple_filter(struct rte_eth_dev *dev,
2092                         enum rte_filter_op filter_op,
2093                         void *arg)
2094 {
2095         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2096         int ret;
2097
2098         if (filter_op == RTE_ETH_FILTER_NOP)
2099                 return 0;
2100
2101         if (arg == NULL) {
2102                 RTE_LOG(ERR, PMD, "arg shouldn't be NULL for operation %u.",
2103                             filter_op);
2104                 return -EINVAL;
2105         }
2106
2107         switch (filter_op) {
2108         case RTE_ETH_FILTER_ADD:
2109                 ret = bnxt_cfg_ntuple_filter(bp,
2110                         (struct rte_eth_ntuple_filter *)arg,
2111                         filter_op);
2112                 break;
2113         case RTE_ETH_FILTER_DELETE:
2114                 ret = bnxt_cfg_ntuple_filter(bp,
2115                         (struct rte_eth_ntuple_filter *)arg,
2116                         filter_op);
2117                 break;
2118         default:
2119                 RTE_LOG(ERR, PMD, "unsupported operation %u.", filter_op);
2120                 ret = -EINVAL;
2121                 break;
2122         }
2123         return ret;
2124 }
2125
2126 static int
2127 bnxt_parse_fdir_filter(struct bnxt *bp,
2128                        struct rte_eth_fdir_filter *fdir,
2129                        struct bnxt_filter_info *filter)
2130 {
2131         enum rte_fdir_mode fdir_mode =
2132                 bp->eth_dev->data->dev_conf.fdir_conf.mode;
2133         struct bnxt_vnic_info *vnic0, *vnic;
2134         struct bnxt_filter_info *filter1;
2135         uint32_t en = 0;
2136         int i;
2137
2138         if (fdir_mode == RTE_FDIR_MODE_PERFECT_TUNNEL)
2139                 return -EINVAL;
2140
2141         filter->l2_ovlan = fdir->input.flow_ext.vlan_tci;
2142         en |= EM_FLOW_ALLOC_INPUT_EN_OVLAN_VID;
2143
2144         switch (fdir->input.flow_type) {
2145         case RTE_ETH_FLOW_IPV4:
2146         case RTE_ETH_FLOW_NONFRAG_IPV4_OTHER:
2147                 /* FALLTHROUGH */
2148                 filter->src_ipaddr[0] = fdir->input.flow.ip4_flow.src_ip;
2149                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR;
2150                 filter->dst_ipaddr[0] = fdir->input.flow.ip4_flow.dst_ip;
2151                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR;
2152                 filter->ip_protocol = fdir->input.flow.ip4_flow.proto;
2153                 en |= NTUPLE_FLTR_ALLOC_IN_EN_IP_PROTO;
2154                 filter->ip_addr_type =
2155                         NTUPLE_FLTR_ALLOC_INPUT_IP_ADDR_TYPE_IPV4;
2156                 filter->src_ipaddr_mask[0] = 0xffffffff;
2157                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR_MASK;
2158                 filter->dst_ipaddr_mask[0] = 0xffffffff;
2159                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR_MASK;
2160                 filter->ethertype = 0x800;
2161                 filter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
2162                 break;
2163         case RTE_ETH_FLOW_NONFRAG_IPV4_TCP:
2164                 filter->src_port = fdir->input.flow.tcp4_flow.src_port;
2165                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT;
2166                 filter->dst_port = fdir->input.flow.tcp4_flow.dst_port;
2167                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT;
2168                 filter->dst_port_mask = 0xffff;
2169                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT_MASK;
2170                 filter->src_port_mask = 0xffff;
2171                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT_MASK;
2172                 filter->src_ipaddr[0] = fdir->input.flow.tcp4_flow.ip.src_ip;
2173                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR;
2174                 filter->dst_ipaddr[0] = fdir->input.flow.tcp4_flow.ip.dst_ip;
2175                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR;
2176                 filter->ip_protocol = 6;
2177                 en |= NTUPLE_FLTR_ALLOC_IN_EN_IP_PROTO;
2178                 filter->ip_addr_type =
2179                         NTUPLE_FLTR_ALLOC_INPUT_IP_ADDR_TYPE_IPV4;
2180                 filter->src_ipaddr_mask[0] = 0xffffffff;
2181                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR_MASK;
2182                 filter->dst_ipaddr_mask[0] = 0xffffffff;
2183                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR_MASK;
2184                 filter->ethertype = 0x800;
2185                 filter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
2186                 break;
2187         case RTE_ETH_FLOW_NONFRAG_IPV4_UDP:
2188                 filter->src_port = fdir->input.flow.udp4_flow.src_port;
2189                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT;
2190                 filter->dst_port = fdir->input.flow.udp4_flow.dst_port;
2191                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT;
2192                 filter->dst_port_mask = 0xffff;
2193                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT_MASK;
2194                 filter->src_port_mask = 0xffff;
2195                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT_MASK;
2196                 filter->src_ipaddr[0] = fdir->input.flow.udp4_flow.ip.src_ip;
2197                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR;
2198                 filter->dst_ipaddr[0] = fdir->input.flow.udp4_flow.ip.dst_ip;
2199                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR;
2200                 filter->ip_protocol = 17;
2201                 en |= NTUPLE_FLTR_ALLOC_IN_EN_IP_PROTO;
2202                 filter->ip_addr_type =
2203                         NTUPLE_FLTR_ALLOC_INPUT_IP_ADDR_TYPE_IPV4;
2204                 filter->src_ipaddr_mask[0] = 0xffffffff;
2205                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR_MASK;
2206                 filter->dst_ipaddr_mask[0] = 0xffffffff;
2207                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR_MASK;
2208                 filter->ethertype = 0x800;
2209                 filter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
2210                 break;
2211         case RTE_ETH_FLOW_IPV6:
2212         case RTE_ETH_FLOW_NONFRAG_IPV6_OTHER:
2213                 /* FALLTHROUGH */
2214                 filter->ip_addr_type =
2215                         NTUPLE_FLTR_ALLOC_INPUT_IP_ADDR_TYPE_IPV6;
2216                 filter->ip_protocol = fdir->input.flow.ipv6_flow.proto;
2217                 en |= NTUPLE_FLTR_ALLOC_IN_EN_IP_PROTO;
2218                 rte_memcpy(filter->src_ipaddr,
2219                            fdir->input.flow.ipv6_flow.src_ip, 16);
2220                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR;
2221                 rte_memcpy(filter->dst_ipaddr,
2222                            fdir->input.flow.ipv6_flow.dst_ip, 16);
2223                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR;
2224                 memset(filter->dst_ipaddr_mask, 0xff, 16);
2225                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR_MASK;
2226                 memset(filter->src_ipaddr_mask, 0xff, 16);
2227                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR_MASK;
2228                 filter->ethertype = 0x86dd;
2229                 filter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
2230                 break;
2231         case RTE_ETH_FLOW_NONFRAG_IPV6_TCP:
2232                 filter->src_port = fdir->input.flow.tcp6_flow.src_port;
2233                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT;
2234                 filter->dst_port = fdir->input.flow.tcp6_flow.dst_port;
2235                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT;
2236                 filter->dst_port_mask = 0xffff;
2237                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT_MASK;
2238                 filter->src_port_mask = 0xffff;
2239                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT_MASK;
2240                 filter->ip_addr_type =
2241                         NTUPLE_FLTR_ALLOC_INPUT_IP_ADDR_TYPE_IPV6;
2242                 filter->ip_protocol = fdir->input.flow.tcp6_flow.ip.proto;
2243                 en |= NTUPLE_FLTR_ALLOC_IN_EN_IP_PROTO;
2244                 rte_memcpy(filter->src_ipaddr,
2245                            fdir->input.flow.tcp6_flow.ip.src_ip, 16);
2246                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR;
2247                 rte_memcpy(filter->dst_ipaddr,
2248                            fdir->input.flow.tcp6_flow.ip.dst_ip, 16);
2249                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR;
2250                 memset(filter->dst_ipaddr_mask, 0xff, 16);
2251                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR_MASK;
2252                 memset(filter->src_ipaddr_mask, 0xff, 16);
2253                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR_MASK;
2254                 filter->ethertype = 0x86dd;
2255                 filter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
2256                 break;
2257         case RTE_ETH_FLOW_NONFRAG_IPV6_UDP:
2258                 filter->src_port = fdir->input.flow.udp6_flow.src_port;
2259                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT;
2260                 filter->dst_port = fdir->input.flow.udp6_flow.dst_port;
2261                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT;
2262                 filter->dst_port_mask = 0xffff;
2263                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT_MASK;
2264                 filter->src_port_mask = 0xffff;
2265                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT_MASK;
2266                 filter->ip_addr_type =
2267                         NTUPLE_FLTR_ALLOC_INPUT_IP_ADDR_TYPE_IPV6;
2268                 filter->ip_protocol = fdir->input.flow.udp6_flow.ip.proto;
2269                 en |= NTUPLE_FLTR_ALLOC_IN_EN_IP_PROTO;
2270                 rte_memcpy(filter->src_ipaddr,
2271                            fdir->input.flow.udp6_flow.ip.src_ip, 16);
2272                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR;
2273                 rte_memcpy(filter->dst_ipaddr,
2274                            fdir->input.flow.udp6_flow.ip.dst_ip, 16);
2275                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR;
2276                 memset(filter->dst_ipaddr_mask, 0xff, 16);
2277                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR_MASK;
2278                 memset(filter->src_ipaddr_mask, 0xff, 16);
2279                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR_MASK;
2280                 filter->ethertype = 0x86dd;
2281                 filter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
2282                 break;
2283         case RTE_ETH_FLOW_L2_PAYLOAD:
2284                 filter->ethertype = fdir->input.flow.l2_flow.ether_type;
2285                 en |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
2286                 break;
2287         case RTE_ETH_FLOW_VXLAN:
2288                 if (fdir->action.behavior == RTE_ETH_FDIR_REJECT)
2289                         return -EINVAL;
2290                 filter->vni = fdir->input.flow.tunnel_flow.tunnel_id;
2291                 filter->tunnel_type =
2292                         CFA_NTUPLE_FILTER_ALLOC_REQ_TUNNEL_TYPE_VXLAN;
2293                 en |= HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_TUNNEL_TYPE;
2294                 break;
2295         case RTE_ETH_FLOW_NVGRE:
2296                 if (fdir->action.behavior == RTE_ETH_FDIR_REJECT)
2297                         return -EINVAL;
2298                 filter->vni = fdir->input.flow.tunnel_flow.tunnel_id;
2299                 filter->tunnel_type =
2300                         CFA_NTUPLE_FILTER_ALLOC_REQ_TUNNEL_TYPE_NVGRE;
2301                 en |= HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_TUNNEL_TYPE;
2302                 break;
2303         case RTE_ETH_FLOW_UNKNOWN:
2304         case RTE_ETH_FLOW_RAW:
2305         case RTE_ETH_FLOW_FRAG_IPV4:
2306         case RTE_ETH_FLOW_NONFRAG_IPV4_SCTP:
2307         case RTE_ETH_FLOW_FRAG_IPV6:
2308         case RTE_ETH_FLOW_NONFRAG_IPV6_SCTP:
2309         case RTE_ETH_FLOW_IPV6_EX:
2310         case RTE_ETH_FLOW_IPV6_TCP_EX:
2311         case RTE_ETH_FLOW_IPV6_UDP_EX:
2312         case RTE_ETH_FLOW_GENEVE:
2313                 /* FALLTHROUGH */
2314         default:
2315                 return -EINVAL;
2316         }
2317
2318         vnic0 = STAILQ_FIRST(&bp->ff_pool[0]);
2319         vnic = STAILQ_FIRST(&bp->ff_pool[fdir->action.rx_queue]);
2320         if (vnic == NULL) {
2321                 RTE_LOG(ERR, PMD, "Invalid queue %d\n", fdir->action.rx_queue);
2322                 return -EINVAL;
2323         }
2324
2325
2326         if (fdir_mode == RTE_FDIR_MODE_PERFECT_MAC_VLAN) {
2327                 rte_memcpy(filter->dst_macaddr,
2328                         fdir->input.flow.mac_vlan_flow.mac_addr.addr_bytes, 6);
2329                         en |= NTUPLE_FLTR_ALLOC_INPUT_EN_DST_MACADDR;
2330         }
2331
2332         if (fdir->action.behavior == RTE_ETH_FDIR_REJECT) {
2333                 filter->flags = HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_FLAGS_DROP;
2334                 filter1 = STAILQ_FIRST(&vnic0->filter);
2335                 //filter1 = bnxt_get_l2_filter(bp, filter, vnic0);
2336         } else {
2337                 filter->dst_id = vnic->fw_vnic_id;
2338                 for (i = 0; i < ETHER_ADDR_LEN; i++)
2339                         if (filter->dst_macaddr[i] == 0x00)
2340                                 filter1 = STAILQ_FIRST(&vnic0->filter);
2341                         else
2342                                 filter1 = bnxt_get_l2_filter(bp, filter, vnic);
2343         }
2344
2345         if (filter1 == NULL)
2346                 return -EINVAL;
2347
2348         en |= HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_L2_FILTER_ID;
2349         filter->fw_l2_filter_id = filter1->fw_l2_filter_id;
2350
2351         filter->enables = en;
2352
2353         return 0;
2354 }
2355
2356 static struct bnxt_filter_info *
2357 bnxt_match_fdir(struct bnxt *bp, struct bnxt_filter_info *nf)
2358 {
2359         struct bnxt_filter_info *mf = NULL;
2360         int i;
2361
2362         for (i = bp->nr_vnics - 1; i >= 0; i--) {
2363                 struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
2364
2365                 STAILQ_FOREACH(mf, &vnic->filter, next) {
2366                         if (mf->filter_type == nf->filter_type &&
2367                             mf->flags == nf->flags &&
2368                             mf->src_port == nf->src_port &&
2369                             mf->src_port_mask == nf->src_port_mask &&
2370                             mf->dst_port == nf->dst_port &&
2371                             mf->dst_port_mask == nf->dst_port_mask &&
2372                             mf->ip_protocol == nf->ip_protocol &&
2373                             mf->ip_addr_type == nf->ip_addr_type &&
2374                             mf->ethertype == nf->ethertype &&
2375                             mf->vni == nf->vni &&
2376                             mf->tunnel_type == nf->tunnel_type &&
2377                             mf->l2_ovlan == nf->l2_ovlan &&
2378                             mf->l2_ovlan_mask == nf->l2_ovlan_mask &&
2379                             mf->l2_ivlan == nf->l2_ivlan &&
2380                             mf->l2_ivlan_mask == nf->l2_ivlan_mask &&
2381                             !memcmp(mf->l2_addr, nf->l2_addr, ETHER_ADDR_LEN) &&
2382                             !memcmp(mf->l2_addr_mask, nf->l2_addr_mask,
2383                                     ETHER_ADDR_LEN) &&
2384                             !memcmp(mf->src_macaddr, nf->src_macaddr,
2385                                     ETHER_ADDR_LEN) &&
2386                             !memcmp(mf->dst_macaddr, nf->dst_macaddr,
2387                                     ETHER_ADDR_LEN) &&
2388                             !memcmp(mf->src_ipaddr, nf->src_ipaddr,
2389                                     sizeof(nf->src_ipaddr)) &&
2390                             !memcmp(mf->src_ipaddr_mask, nf->src_ipaddr_mask,
2391                                     sizeof(nf->src_ipaddr_mask)) &&
2392                             !memcmp(mf->dst_ipaddr, nf->dst_ipaddr,
2393                                     sizeof(nf->dst_ipaddr)) &&
2394                             !memcmp(mf->dst_ipaddr_mask, nf->dst_ipaddr_mask,
2395                                     sizeof(nf->dst_ipaddr_mask)))
2396                                 return mf;
2397                 }
2398         }
2399         return NULL;
2400 }
2401
2402 static int
2403 bnxt_fdir_filter(struct rte_eth_dev *dev,
2404                  enum rte_filter_op filter_op,
2405                  void *arg)
2406 {
2407         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2408         struct rte_eth_fdir_filter *fdir  = (struct rte_eth_fdir_filter *)arg;
2409         struct bnxt_filter_info *filter, *match;
2410         struct bnxt_vnic_info *vnic;
2411         int ret = 0, i;
2412
2413         if (filter_op == RTE_ETH_FILTER_NOP)
2414                 return 0;
2415
2416         if (arg == NULL && filter_op != RTE_ETH_FILTER_FLUSH)
2417                 return -EINVAL;
2418
2419         switch (filter_op) {
2420         case RTE_ETH_FILTER_ADD:
2421         case RTE_ETH_FILTER_DELETE:
2422                 /* FALLTHROUGH */
2423                 filter = bnxt_get_unused_filter(bp);
2424                 if (filter == NULL) {
2425                         RTE_LOG(ERR, PMD,
2426                                 "Not enough resources for a new flow.\n");
2427                         return -ENOMEM;
2428                 }
2429
2430                 ret = bnxt_parse_fdir_filter(bp, fdir, filter);
2431                 if (ret != 0)
2432                         goto free_filter;
2433                 filter->filter_type = HWRM_CFA_NTUPLE_FILTER;
2434
2435                 match = bnxt_match_fdir(bp, filter);
2436                 if (match != NULL && filter_op == RTE_ETH_FILTER_ADD) {
2437                         RTE_LOG(ERR, PMD, "Flow already exists.\n");
2438                         ret = -EEXIST;
2439                         goto free_filter;
2440                 }
2441                 if (match == NULL && filter_op == RTE_ETH_FILTER_DELETE) {
2442                         RTE_LOG(ERR, PMD, "Flow does not exist.\n");
2443                         ret = -ENOENT;
2444                         goto free_filter;
2445                 }
2446
2447                 if (fdir->action.behavior == RTE_ETH_FDIR_REJECT)
2448                         vnic = STAILQ_FIRST(&bp->ff_pool[0]);
2449                 else
2450                         vnic =
2451                         STAILQ_FIRST(&bp->ff_pool[fdir->action.rx_queue]);
2452
2453                 if (filter_op == RTE_ETH_FILTER_ADD) {
2454                         ret = bnxt_hwrm_set_ntuple_filter(bp,
2455                                                           filter->dst_id,
2456                                                           filter);
2457                         if (ret)
2458                                 goto free_filter;
2459                         STAILQ_INSERT_TAIL(&vnic->filter, filter, next);
2460                 } else {
2461                         ret = bnxt_hwrm_clear_ntuple_filter(bp, match);
2462                         STAILQ_REMOVE(&vnic->filter, match,
2463                                       bnxt_filter_info, next);
2464                         bnxt_free_filter(bp, match);
2465                         filter->fw_l2_filter_id = -1;
2466                         bnxt_free_filter(bp, filter);
2467                 }
2468                 break;
2469         case RTE_ETH_FILTER_FLUSH:
2470                 for (i = bp->nr_vnics - 1; i >= 0; i--) {
2471                         struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
2472
2473                         STAILQ_FOREACH(filter, &vnic->filter, next) {
2474                                 if (filter->filter_type ==
2475                                     HWRM_CFA_NTUPLE_FILTER) {
2476                                         ret =
2477                                         bnxt_hwrm_clear_ntuple_filter(bp,
2478                                                                       filter);
2479                                         STAILQ_REMOVE(&vnic->filter, filter,
2480                                                       bnxt_filter_info, next);
2481                                 }
2482                         }
2483                 }
2484                 return ret;
2485         case RTE_ETH_FILTER_UPDATE:
2486         case RTE_ETH_FILTER_STATS:
2487         case RTE_ETH_FILTER_INFO:
2488                 /* FALLTHROUGH */
2489                 RTE_LOG(ERR, PMD, "operation %u not implemented", filter_op);
2490                 break;
2491         default:
2492                 RTE_LOG(ERR, PMD, "unknown operation %u", filter_op);
2493                 ret = -EINVAL;
2494                 break;
2495         }
2496         return ret;
2497
2498 free_filter:
2499         filter->fw_l2_filter_id = -1;
2500         bnxt_free_filter(bp, filter);
2501         return ret;
2502 }
2503
2504 static int
2505 bnxt_filter_ctrl_op(struct rte_eth_dev *dev __rte_unused,
2506                     enum rte_filter_type filter_type,
2507                     enum rte_filter_op filter_op, void *arg)
2508 {
2509         int ret = 0;
2510
2511         switch (filter_type) {
2512         case RTE_ETH_FILTER_TUNNEL:
2513                 RTE_LOG(ERR, PMD,
2514                         "filter type: %d: To be implemented\n", filter_type);
2515                 break;
2516         case RTE_ETH_FILTER_FDIR:
2517                 ret = bnxt_fdir_filter(dev, filter_op, arg);
2518                 break;
2519         case RTE_ETH_FILTER_NTUPLE:
2520                 ret = bnxt_ntuple_filter(dev, filter_op, arg);
2521                 break;
2522         case RTE_ETH_FILTER_ETHERTYPE:
2523                 ret = bnxt_ethertype_filter(dev, filter_op, arg);
2524                 break;
2525         case RTE_ETH_FILTER_GENERIC:
2526                 if (filter_op != RTE_ETH_FILTER_GET)
2527                         return -EINVAL;
2528                 *(const void **)arg = &bnxt_flow_ops;
2529                 break;
2530         default:
2531                 RTE_LOG(ERR, PMD,
2532                         "Filter type (%d) not supported", filter_type);
2533                 ret = -EINVAL;
2534                 break;
2535         }
2536         return ret;
2537 }
2538
2539 static const uint32_t *
2540 bnxt_dev_supported_ptypes_get_op(struct rte_eth_dev *dev)
2541 {
2542         static const uint32_t ptypes[] = {
2543                 RTE_PTYPE_L2_ETHER_VLAN,
2544                 RTE_PTYPE_L3_IPV4_EXT_UNKNOWN,
2545                 RTE_PTYPE_L3_IPV6_EXT_UNKNOWN,
2546                 RTE_PTYPE_L4_ICMP,
2547                 RTE_PTYPE_L4_TCP,
2548                 RTE_PTYPE_L4_UDP,
2549                 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN,
2550                 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN,
2551                 RTE_PTYPE_INNER_L4_ICMP,
2552                 RTE_PTYPE_INNER_L4_TCP,
2553                 RTE_PTYPE_INNER_L4_UDP,
2554                 RTE_PTYPE_UNKNOWN
2555         };
2556
2557         if (dev->rx_pkt_burst == bnxt_recv_pkts)
2558                 return ptypes;
2559         return NULL;
2560 }
2561
2562 static int bnxt_map_regs(struct bnxt *bp, uint32_t *reg_arr, int count,
2563                          int reg_win)
2564 {
2565         uint32_t reg_base = *reg_arr & 0xfffff000;
2566         uint32_t win_off;
2567         int i;
2568
2569         for (i = 0; i < count; i++) {
2570                 if ((reg_arr[i] & 0xfffff000) != reg_base)
2571                         return -ERANGE;
2572         }
2573         win_off = BNXT_GRCPF_REG_WINDOW_BASE_OUT + (reg_win - 1) * 4;
2574         rte_cpu_to_le_32(rte_write32(reg_base, (uint8_t *)bp->bar0 + win_off));
2575         return 0;
2576 }
2577
2578 static int bnxt_map_ptp_regs(struct bnxt *bp)
2579 {
2580         struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
2581         uint32_t *reg_arr;
2582         int rc, i;
2583
2584         reg_arr = ptp->rx_regs;
2585         rc = bnxt_map_regs(bp, reg_arr, BNXT_PTP_RX_REGS, 5);
2586         if (rc)
2587                 return rc;
2588
2589         reg_arr = ptp->tx_regs;
2590         rc = bnxt_map_regs(bp, reg_arr, BNXT_PTP_TX_REGS, 6);
2591         if (rc)
2592                 return rc;
2593
2594         for (i = 0; i < BNXT_PTP_RX_REGS; i++)
2595                 ptp->rx_mapped_regs[i] = 0x5000 + (ptp->rx_regs[i] & 0xfff);
2596
2597         for (i = 0; i < BNXT_PTP_TX_REGS; i++)
2598                 ptp->tx_mapped_regs[i] = 0x6000 + (ptp->tx_regs[i] & 0xfff);
2599
2600         return 0;
2601 }
2602
2603 static void bnxt_unmap_ptp_regs(struct bnxt *bp)
2604 {
2605         rte_cpu_to_le_32(rte_write32(0, (uint8_t *)bp->bar0 +
2606                          BNXT_GRCPF_REG_WINDOW_BASE_OUT + 16));
2607         rte_cpu_to_le_32(rte_write32(0, (uint8_t *)bp->bar0 +
2608                          BNXT_GRCPF_REG_WINDOW_BASE_OUT + 20));
2609 }
2610
2611 static uint64_t bnxt_cc_read(struct bnxt *bp)
2612 {
2613         uint64_t ns;
2614
2615         ns = rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 +
2616                               BNXT_GRCPF_REG_SYNC_TIME));
2617         ns |= (uint64_t)(rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 +
2618                                           BNXT_GRCPF_REG_SYNC_TIME + 4))) << 32;
2619         return ns;
2620 }
2621
2622 static int bnxt_get_tx_ts(struct bnxt *bp, uint64_t *ts)
2623 {
2624         struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
2625         uint32_t fifo;
2626
2627         fifo = rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 +
2628                                 ptp->tx_mapped_regs[BNXT_PTP_TX_FIFO]));
2629         if (fifo & BNXT_PTP_TX_FIFO_EMPTY)
2630                 return -EAGAIN;
2631
2632         fifo = rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 +
2633                                 ptp->tx_mapped_regs[BNXT_PTP_TX_FIFO]));
2634         *ts = rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 +
2635                                 ptp->tx_mapped_regs[BNXT_PTP_TX_TS_L]));
2636         *ts |= (uint64_t)rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 +
2637                                 ptp->tx_mapped_regs[BNXT_PTP_TX_TS_H])) << 32;
2638
2639         return 0;
2640 }
2641
2642 static int bnxt_get_rx_ts(struct bnxt *bp, uint64_t *ts)
2643 {
2644         struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
2645         struct bnxt_pf_info *pf = &bp->pf;
2646         uint16_t port_id;
2647         uint32_t fifo;
2648
2649         if (!ptp)
2650                 return -ENODEV;
2651
2652         fifo = rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 +
2653                                 ptp->rx_mapped_regs[BNXT_PTP_RX_FIFO]));
2654         if (!(fifo & BNXT_PTP_RX_FIFO_PENDING))
2655                 return -EAGAIN;
2656
2657         port_id = pf->port_id;
2658         rte_cpu_to_le_32(rte_write32(1 << port_id, (uint8_t *)bp->bar0 +
2659                ptp->rx_mapped_regs[BNXT_PTP_RX_FIFO_ADV]));
2660
2661         fifo = rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 +
2662                                    ptp->rx_mapped_regs[BNXT_PTP_RX_FIFO]));
2663         if (fifo & BNXT_PTP_RX_FIFO_PENDING) {
2664 /*              bnxt_clr_rx_ts(bp);       TBD  */
2665                 return -EBUSY;
2666         }
2667
2668         *ts = rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 +
2669                                 ptp->rx_mapped_regs[BNXT_PTP_RX_TS_L]));
2670         *ts |= (uint64_t)rte_le_to_cpu_32(rte_read32((uint8_t *)bp->bar0 +
2671                                 ptp->rx_mapped_regs[BNXT_PTP_RX_TS_H])) << 32;
2672
2673         return 0;
2674 }
2675
2676 static int
2677 bnxt_timesync_write_time(struct rte_eth_dev *dev, const struct timespec *ts)
2678 {
2679         uint64_t ns;
2680         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2681         struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
2682
2683         if (!ptp)
2684                 return 0;
2685
2686         ns = rte_timespec_to_ns(ts);
2687         /* Set the timecounters to a new value. */
2688         ptp->tc.nsec = ns;
2689
2690         return 0;
2691 }
2692
2693 static int
2694 bnxt_timesync_read_time(struct rte_eth_dev *dev, struct timespec *ts)
2695 {
2696         uint64_t ns, systime_cycles;
2697         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2698         struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
2699
2700         if (!ptp)
2701                 return 0;
2702
2703         systime_cycles = bnxt_cc_read(bp);
2704         ns = rte_timecounter_update(&ptp->tc, systime_cycles);
2705         *ts = rte_ns_to_timespec(ns);
2706
2707         return 0;
2708 }
2709 static int
2710 bnxt_timesync_enable(struct rte_eth_dev *dev)
2711 {
2712         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2713         struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
2714         uint32_t shift = 0;
2715
2716         if (!ptp)
2717                 return 0;
2718
2719         ptp->rx_filter = 1;
2720         ptp->tx_tstamp_en = 1;
2721         ptp->rxctl = BNXT_PTP_MSG_EVENTS;
2722
2723         if (!bnxt_hwrm_ptp_cfg(bp))
2724                 bnxt_map_ptp_regs(bp);
2725
2726         memset(&ptp->tc, 0, sizeof(struct rte_timecounter));
2727         memset(&ptp->rx_tstamp_tc, 0, sizeof(struct rte_timecounter));
2728         memset(&ptp->tx_tstamp_tc, 0, sizeof(struct rte_timecounter));
2729
2730         ptp->tc.cc_mask = BNXT_CYCLECOUNTER_MASK;
2731         ptp->tc.cc_shift = shift;
2732         ptp->tc.nsec_mask = (1ULL << shift) - 1;
2733
2734         ptp->rx_tstamp_tc.cc_mask = BNXT_CYCLECOUNTER_MASK;
2735         ptp->rx_tstamp_tc.cc_shift = shift;
2736         ptp->rx_tstamp_tc.nsec_mask = (1ULL << shift) - 1;
2737
2738         ptp->tx_tstamp_tc.cc_mask = BNXT_CYCLECOUNTER_MASK;
2739         ptp->tx_tstamp_tc.cc_shift = shift;
2740         ptp->tx_tstamp_tc.nsec_mask = (1ULL << shift) - 1;
2741
2742         return 0;
2743 }
2744
2745 static int
2746 bnxt_timesync_disable(struct rte_eth_dev *dev)
2747 {
2748         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2749         struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
2750
2751         if (!ptp)
2752                 return 0;
2753
2754         ptp->rx_filter = 0;
2755         ptp->tx_tstamp_en = 0;
2756         ptp->rxctl = 0;
2757
2758         bnxt_hwrm_ptp_cfg(bp);
2759
2760         bnxt_unmap_ptp_regs(bp);
2761
2762         return 0;
2763 }
2764
2765 static int
2766 bnxt_timesync_read_rx_timestamp(struct rte_eth_dev *dev,
2767                                  struct timespec *timestamp,
2768                                  uint32_t flags __rte_unused)
2769 {
2770         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2771         struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
2772         uint64_t rx_tstamp_cycles = 0;
2773         uint64_t ns;
2774
2775         if (!ptp)
2776                 return 0;
2777
2778         bnxt_get_rx_ts(bp, &rx_tstamp_cycles);
2779         ns = rte_timecounter_update(&ptp->rx_tstamp_tc, rx_tstamp_cycles);
2780         *timestamp = rte_ns_to_timespec(ns);
2781         return  0;
2782 }
2783
2784 static int
2785 bnxt_timesync_read_tx_timestamp(struct rte_eth_dev *dev,
2786                                  struct timespec *timestamp)
2787 {
2788         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2789         struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
2790         uint64_t tx_tstamp_cycles = 0;
2791         uint64_t ns;
2792
2793         if (!ptp)
2794                 return 0;
2795
2796         bnxt_get_tx_ts(bp, &tx_tstamp_cycles);
2797         ns = rte_timecounter_update(&ptp->tx_tstamp_tc, tx_tstamp_cycles);
2798         *timestamp = rte_ns_to_timespec(ns);
2799
2800         return 0;
2801 }
2802
2803 static int
2804 bnxt_timesync_adjust_time(struct rte_eth_dev *dev, int64_t delta)
2805 {
2806         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2807         struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
2808
2809         if (!ptp)
2810                 return 0;
2811
2812         ptp->tc.nsec += delta;
2813
2814         return 0;
2815 }
2816
2817 static int
2818 bnxt_get_eeprom_length_op(struct rte_eth_dev *dev)
2819 {
2820         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2821         int rc;
2822         uint32_t dir_entries;
2823         uint32_t entry_length;
2824
2825         RTE_LOG(INFO, PMD, "%s(): %04x:%02x:%02x:%02x\n",
2826                 __func__, bp->pdev->addr.domain, bp->pdev->addr.bus,
2827                 bp->pdev->addr.devid, bp->pdev->addr.function);
2828
2829         rc = bnxt_hwrm_nvm_get_dir_info(bp, &dir_entries, &entry_length);
2830         if (rc != 0)
2831                 return rc;
2832
2833         return dir_entries * entry_length;
2834 }
2835
2836 static int
2837 bnxt_get_eeprom_op(struct rte_eth_dev *dev,
2838                 struct rte_dev_eeprom_info *in_eeprom)
2839 {
2840         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2841         uint32_t index;
2842         uint32_t offset;
2843
2844         RTE_LOG(INFO, PMD, "%s(): %04x:%02x:%02x:%02x in_eeprom->offset = %d "
2845                 "len = %d\n", __func__, bp->pdev->addr.domain,
2846                 bp->pdev->addr.bus, bp->pdev->addr.devid,
2847                 bp->pdev->addr.function, in_eeprom->offset, in_eeprom->length);
2848
2849         if (in_eeprom->offset == 0) /* special offset value to get directory */
2850                 return bnxt_get_nvram_directory(bp, in_eeprom->length,
2851                                                 in_eeprom->data);
2852
2853         index = in_eeprom->offset >> 24;
2854         offset = in_eeprom->offset & 0xffffff;
2855
2856         if (index != 0)
2857                 return bnxt_hwrm_get_nvram_item(bp, index - 1, offset,
2858                                            in_eeprom->length, in_eeprom->data);
2859
2860         return 0;
2861 }
2862
2863 static bool bnxt_dir_type_is_ape_bin_format(uint16_t dir_type)
2864 {
2865         switch (dir_type) {
2866         case BNX_DIR_TYPE_CHIMP_PATCH:
2867         case BNX_DIR_TYPE_BOOTCODE:
2868         case BNX_DIR_TYPE_BOOTCODE_2:
2869         case BNX_DIR_TYPE_APE_FW:
2870         case BNX_DIR_TYPE_APE_PATCH:
2871         case BNX_DIR_TYPE_KONG_FW:
2872         case BNX_DIR_TYPE_KONG_PATCH:
2873         case BNX_DIR_TYPE_BONO_FW:
2874         case BNX_DIR_TYPE_BONO_PATCH:
2875                 return true;
2876         }
2877
2878         return false;
2879 }
2880
2881 static bool bnxt_dir_type_is_other_exec_format(uint16_t dir_type)
2882 {
2883         switch (dir_type) {
2884         case BNX_DIR_TYPE_AVS:
2885         case BNX_DIR_TYPE_EXP_ROM_MBA:
2886         case BNX_DIR_TYPE_PCIE:
2887         case BNX_DIR_TYPE_TSCF_UCODE:
2888         case BNX_DIR_TYPE_EXT_PHY:
2889         case BNX_DIR_TYPE_CCM:
2890         case BNX_DIR_TYPE_ISCSI_BOOT:
2891         case BNX_DIR_TYPE_ISCSI_BOOT_IPV6:
2892         case BNX_DIR_TYPE_ISCSI_BOOT_IPV4N6:
2893                 return true;
2894         }
2895
2896         return false;
2897 }
2898
2899 static bool bnxt_dir_type_is_executable(uint16_t dir_type)
2900 {
2901         return bnxt_dir_type_is_ape_bin_format(dir_type) ||
2902                 bnxt_dir_type_is_other_exec_format(dir_type);
2903 }
2904
2905 static int
2906 bnxt_set_eeprom_op(struct rte_eth_dev *dev,
2907                 struct rte_dev_eeprom_info *in_eeprom)
2908 {
2909         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
2910         uint8_t index, dir_op;
2911         uint16_t type, ext, ordinal, attr;
2912
2913         RTE_LOG(INFO, PMD, "%s(): %04x:%02x:%02x:%02x in_eeprom->offset = %d "
2914                 "len = %d\n", __func__, bp->pdev->addr.domain,
2915                 bp->pdev->addr.bus, bp->pdev->addr.devid,
2916                 bp->pdev->addr.function, in_eeprom->offset, in_eeprom->length);
2917
2918         if (!BNXT_PF(bp)) {
2919                 RTE_LOG(ERR, PMD, "NVM write not supported from a VF\n");
2920                 return -EINVAL;
2921         }
2922
2923         type = in_eeprom->magic >> 16;
2924
2925         if (type == 0xffff) { /* special value for directory operations */
2926                 index = in_eeprom->magic & 0xff;
2927                 dir_op = in_eeprom->magic >> 8;
2928                 if (index == 0)
2929                         return -EINVAL;
2930                 switch (dir_op) {
2931                 case 0x0e: /* erase */
2932                         if (in_eeprom->offset != ~in_eeprom->magic)
2933                                 return -EINVAL;
2934                         return bnxt_hwrm_erase_nvram_directory(bp, index - 1);
2935                 default:
2936                         return -EINVAL;
2937                 }
2938         }
2939
2940         /* Create or re-write an NVM item: */
2941         if (bnxt_dir_type_is_executable(type) == true)
2942                 return -EOPNOTSUPP;
2943         ext = in_eeprom->magic & 0xffff;
2944         ordinal = in_eeprom->offset >> 16;
2945         attr = in_eeprom->offset & 0xffff;
2946
2947         return bnxt_hwrm_flash_nvram(bp, type, ordinal, ext, attr,
2948                                      in_eeprom->data, in_eeprom->length);
2949         return 0;
2950 }
2951
2952 /*
2953  * Initialization
2954  */
2955
2956 static const struct eth_dev_ops bnxt_dev_ops = {
2957         .dev_infos_get = bnxt_dev_info_get_op,
2958         .dev_close = bnxt_dev_close_op,
2959         .dev_configure = bnxt_dev_configure_op,
2960         .dev_start = bnxt_dev_start_op,
2961         .dev_stop = bnxt_dev_stop_op,
2962         .dev_set_link_up = bnxt_dev_set_link_up_op,
2963         .dev_set_link_down = bnxt_dev_set_link_down_op,
2964         .stats_get = bnxt_stats_get_op,
2965         .stats_reset = bnxt_stats_reset_op,
2966         .rx_queue_setup = bnxt_rx_queue_setup_op,
2967         .rx_queue_release = bnxt_rx_queue_release_op,
2968         .tx_queue_setup = bnxt_tx_queue_setup_op,
2969         .tx_queue_release = bnxt_tx_queue_release_op,
2970         .rx_queue_intr_enable = bnxt_rx_queue_intr_enable_op,
2971         .rx_queue_intr_disable = bnxt_rx_queue_intr_disable_op,
2972         .reta_update = bnxt_reta_update_op,
2973         .reta_query = bnxt_reta_query_op,
2974         .rss_hash_update = bnxt_rss_hash_update_op,
2975         .rss_hash_conf_get = bnxt_rss_hash_conf_get_op,
2976         .link_update = bnxt_link_update_op,
2977         .promiscuous_enable = bnxt_promiscuous_enable_op,
2978         .promiscuous_disable = bnxt_promiscuous_disable_op,
2979         .allmulticast_enable = bnxt_allmulticast_enable_op,
2980         .allmulticast_disable = bnxt_allmulticast_disable_op,
2981         .mac_addr_add = bnxt_mac_addr_add_op,
2982         .mac_addr_remove = bnxt_mac_addr_remove_op,
2983         .flow_ctrl_get = bnxt_flow_ctrl_get_op,
2984         .flow_ctrl_set = bnxt_flow_ctrl_set_op,
2985         .udp_tunnel_port_add  = bnxt_udp_tunnel_port_add_op,
2986         .udp_tunnel_port_del  = bnxt_udp_tunnel_port_del_op,
2987         .vlan_filter_set = bnxt_vlan_filter_set_op,
2988         .vlan_offload_set = bnxt_vlan_offload_set_op,
2989         .vlan_pvid_set = bnxt_vlan_pvid_set_op,
2990         .mtu_set = bnxt_mtu_set_op,
2991         .mac_addr_set = bnxt_set_default_mac_addr_op,
2992         .xstats_get = bnxt_dev_xstats_get_op,
2993         .xstats_get_names = bnxt_dev_xstats_get_names_op,
2994         .xstats_reset = bnxt_dev_xstats_reset_op,
2995         .fw_version_get = bnxt_fw_version_get,
2996         .set_mc_addr_list = bnxt_dev_set_mc_addr_list_op,
2997         .rxq_info_get = bnxt_rxq_info_get_op,
2998         .txq_info_get = bnxt_txq_info_get_op,
2999         .dev_led_on = bnxt_dev_led_on_op,
3000         .dev_led_off = bnxt_dev_led_off_op,
3001         .xstats_get_by_id = bnxt_dev_xstats_get_by_id_op,
3002         .xstats_get_names_by_id = bnxt_dev_xstats_get_names_by_id_op,
3003         .rx_queue_count = bnxt_rx_queue_count_op,
3004         .rx_descriptor_status = bnxt_rx_descriptor_status_op,
3005         .tx_descriptor_status = bnxt_tx_descriptor_status_op,
3006         .filter_ctrl = bnxt_filter_ctrl_op,
3007         .dev_supported_ptypes_get = bnxt_dev_supported_ptypes_get_op,
3008         .get_eeprom_length    = bnxt_get_eeprom_length_op,
3009         .get_eeprom           = bnxt_get_eeprom_op,
3010         .set_eeprom           = bnxt_set_eeprom_op,
3011         .timesync_enable      = bnxt_timesync_enable,
3012         .timesync_disable     = bnxt_timesync_disable,
3013         .timesync_read_time   = bnxt_timesync_read_time,
3014         .timesync_write_time   = bnxt_timesync_write_time,
3015         .timesync_adjust_time = bnxt_timesync_adjust_time,
3016         .timesync_read_rx_timestamp = bnxt_timesync_read_rx_timestamp,
3017         .timesync_read_tx_timestamp = bnxt_timesync_read_tx_timestamp,
3018 };
3019
3020 static bool bnxt_vf_pciid(uint16_t id)
3021 {
3022         if (id == BROADCOM_DEV_ID_57304_VF ||
3023             id == BROADCOM_DEV_ID_57406_VF ||
3024             id == BROADCOM_DEV_ID_5731X_VF ||
3025             id == BROADCOM_DEV_ID_5741X_VF ||
3026             id == BROADCOM_DEV_ID_57414_VF ||
3027             id == BROADCOM_DEV_ID_STRATUS_NIC_VF)
3028                 return true;
3029         return false;
3030 }
3031
3032 static int bnxt_init_board(struct rte_eth_dev *eth_dev)
3033 {
3034         struct bnxt *bp = eth_dev->data->dev_private;
3035         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
3036         int rc;
3037
3038         /* enable device (incl. PCI PM wakeup), and bus-mastering */
3039         if (!pci_dev->mem_resource[0].addr) {
3040                 RTE_LOG(ERR, PMD,
3041                         "Cannot find PCI device base address, aborting\n");
3042                 rc = -ENODEV;
3043                 goto init_err_disable;
3044         }
3045
3046         bp->eth_dev = eth_dev;
3047         bp->pdev = pci_dev;
3048
3049         bp->bar0 = (void *)pci_dev->mem_resource[0].addr;
3050         if (!bp->bar0) {
3051                 RTE_LOG(ERR, PMD, "Cannot map device registers, aborting\n");
3052                 rc = -ENOMEM;
3053                 goto init_err_release;
3054         }
3055         return 0;
3056
3057 init_err_release:
3058         if (bp->bar0)
3059                 bp->bar0 = NULL;
3060
3061 init_err_disable:
3062
3063         return rc;
3064 }
3065
3066 static int bnxt_dev_uninit(struct rte_eth_dev *eth_dev);
3067
3068 #define ALLOW_FUNC(x)   \
3069         { \
3070                 typeof(x) arg = (x); \
3071                 bp->pf.vf_req_fwd[((arg) >> 5)] &= \
3072                 ~rte_cpu_to_le_32(1 << ((arg) & 0x1f)); \
3073         }
3074 static int
3075 bnxt_dev_init(struct rte_eth_dev *eth_dev)
3076 {
3077         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
3078         char mz_name[RTE_MEMZONE_NAMESIZE];
3079         const struct rte_memzone *mz = NULL;
3080         static int version_printed;
3081         uint32_t total_alloc_len;
3082         rte_iova_t mz_phys_addr;
3083         struct bnxt *bp;
3084         int rc;
3085
3086         if (version_printed++ == 0)
3087                 RTE_LOG(INFO, PMD, "%s\n", bnxt_version);
3088
3089         rte_eth_copy_pci_info(eth_dev, pci_dev);
3090
3091         bp = eth_dev->data->dev_private;
3092
3093         rte_atomic64_init(&bp->rx_mbuf_alloc_fail);
3094         bp->dev_stopped = 1;
3095
3096         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
3097                 goto skip_init;
3098
3099         if (bnxt_vf_pciid(pci_dev->id.device_id))
3100                 bp->flags |= BNXT_FLAG_VF;
3101
3102         rc = bnxt_init_board(eth_dev);
3103         if (rc) {
3104                 RTE_LOG(ERR, PMD,
3105                         "Board initialization failed rc: %x\n", rc);
3106                 goto error;
3107         }
3108 skip_init:
3109         eth_dev->dev_ops = &bnxt_dev_ops;
3110         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
3111                 return 0;
3112         eth_dev->rx_pkt_burst = &bnxt_recv_pkts;
3113         eth_dev->tx_pkt_burst = &bnxt_xmit_pkts;
3114
3115         if (BNXT_PF(bp) && pci_dev->id.device_id != BROADCOM_DEV_ID_NS2) {
3116                 snprintf(mz_name, RTE_MEMZONE_NAMESIZE,
3117                          "bnxt_%04x:%02x:%02x:%02x-%s", pci_dev->addr.domain,
3118                          pci_dev->addr.bus, pci_dev->addr.devid,
3119                          pci_dev->addr.function, "rx_port_stats");
3120                 mz_name[RTE_MEMZONE_NAMESIZE - 1] = 0;
3121                 mz = rte_memzone_lookup(mz_name);
3122                 total_alloc_len = RTE_CACHE_LINE_ROUNDUP(
3123                                 sizeof(struct rx_port_stats) + 512);
3124                 if (!mz) {
3125                         mz = rte_memzone_reserve(mz_name, total_alloc_len,
3126                                                  SOCKET_ID_ANY,
3127                                                  RTE_MEMZONE_2MB |
3128                                                  RTE_MEMZONE_SIZE_HINT_ONLY);
3129                         if (mz == NULL)
3130                                 return -ENOMEM;
3131                 }
3132                 memset(mz->addr, 0, mz->len);
3133                 mz_phys_addr = mz->iova;
3134                 if ((unsigned long)mz->addr == mz_phys_addr) {
3135                         RTE_LOG(WARNING, PMD,
3136                                 "Memzone physical address same as virtual.\n");
3137                         RTE_LOG(WARNING, PMD,
3138                                 "Using rte_mem_virt2iova()\n");
3139                         mz_phys_addr = rte_mem_virt2iova(mz->addr);
3140                         if (mz_phys_addr == 0) {
3141                                 RTE_LOG(ERR, PMD,
3142                                 "unable to map address to physical memory\n");
3143                                 return -ENOMEM;
3144                         }
3145                 }
3146
3147                 bp->rx_mem_zone = (const void *)mz;
3148                 bp->hw_rx_port_stats = mz->addr;
3149                 bp->hw_rx_port_stats_map = mz_phys_addr;
3150
3151                 snprintf(mz_name, RTE_MEMZONE_NAMESIZE,
3152                          "bnxt_%04x:%02x:%02x:%02x-%s", pci_dev->addr.domain,
3153                          pci_dev->addr.bus, pci_dev->addr.devid,
3154                          pci_dev->addr.function, "tx_port_stats");
3155                 mz_name[RTE_MEMZONE_NAMESIZE - 1] = 0;
3156                 mz = rte_memzone_lookup(mz_name);
3157                 total_alloc_len = RTE_CACHE_LINE_ROUNDUP(
3158                                 sizeof(struct tx_port_stats) + 512);
3159                 if (!mz) {
3160                         mz = rte_memzone_reserve(mz_name, total_alloc_len,
3161                                                  SOCKET_ID_ANY,
3162                                                  RTE_MEMZONE_2MB |
3163                                                  RTE_MEMZONE_SIZE_HINT_ONLY);
3164                         if (mz == NULL)
3165                                 return -ENOMEM;
3166                 }
3167                 memset(mz->addr, 0, mz->len);
3168                 mz_phys_addr = mz->iova;
3169                 if ((unsigned long)mz->addr == mz_phys_addr) {
3170                         RTE_LOG(WARNING, PMD,
3171                                 "Memzone physical address same as virtual.\n");
3172                         RTE_LOG(WARNING, PMD,
3173                                 "Using rte_mem_virt2iova()\n");
3174                         mz_phys_addr = rte_mem_virt2iova(mz->addr);
3175                         if (mz_phys_addr == 0) {
3176                                 RTE_LOG(ERR, PMD,
3177                                 "unable to map address to physical memory\n");
3178                                 return -ENOMEM;
3179                         }
3180                 }
3181
3182                 bp->tx_mem_zone = (const void *)mz;
3183                 bp->hw_tx_port_stats = mz->addr;
3184                 bp->hw_tx_port_stats_map = mz_phys_addr;
3185
3186                 bp->flags |= BNXT_FLAG_PORT_STATS;
3187         }
3188
3189         rc = bnxt_alloc_hwrm_resources(bp);
3190         if (rc) {
3191                 RTE_LOG(ERR, PMD,
3192                         "hwrm resource allocation failure rc: %x\n", rc);
3193                 goto error_free;
3194         }
3195         rc = bnxt_hwrm_ver_get(bp);
3196         if (rc)
3197                 goto error_free;
3198         rc = bnxt_hwrm_queue_qportcfg(bp);
3199         if (rc) {
3200                 RTE_LOG(ERR, PMD, "hwrm queue qportcfg failed\n");
3201                 goto error_free;
3202         }
3203
3204         rc = bnxt_hwrm_func_qcfg(bp);
3205         if (rc) {
3206                 RTE_LOG(ERR, PMD, "hwrm func qcfg failed\n");
3207                 goto error_free;
3208         }
3209
3210         /* Get the MAX capabilities for this function */
3211         rc = bnxt_hwrm_func_qcaps(bp);
3212         if (rc) {
3213                 RTE_LOG(ERR, PMD, "hwrm query capability failure rc: %x\n", rc);
3214                 goto error_free;
3215         }
3216         if (bp->max_tx_rings == 0) {
3217                 RTE_LOG(ERR, PMD, "No TX rings available!\n");
3218                 rc = -EBUSY;
3219                 goto error_free;
3220         }
3221         eth_dev->data->mac_addrs = rte_zmalloc("bnxt_mac_addr_tbl",
3222                                         ETHER_ADDR_LEN * bp->max_l2_ctx, 0);
3223         if (eth_dev->data->mac_addrs == NULL) {
3224                 RTE_LOG(ERR, PMD,
3225                         "Failed to alloc %u bytes needed to store MAC addr tbl",
3226                         ETHER_ADDR_LEN * bp->max_l2_ctx);
3227                 rc = -ENOMEM;
3228                 goto error_free;
3229         }
3230         /* Copy the permanent MAC from the qcap response address now. */
3231         memcpy(bp->mac_addr, bp->dflt_mac_addr, sizeof(bp->mac_addr));
3232         memcpy(&eth_dev->data->mac_addrs[0], bp->mac_addr, ETHER_ADDR_LEN);
3233
3234         if (bp->max_ring_grps < bp->rx_cp_nr_rings) {
3235                 /* 1 ring is for default completion ring */
3236                 RTE_LOG(ERR, PMD, "Insufficient resource: Ring Group\n");
3237                 rc = -ENOSPC;
3238                 goto error_free;
3239         }
3240
3241         bp->grp_info = rte_zmalloc("bnxt_grp_info",
3242                                 sizeof(*bp->grp_info) * bp->max_ring_grps, 0);
3243         if (!bp->grp_info) {
3244                 RTE_LOG(ERR, PMD,
3245                         "Failed to alloc %zu bytes to store group info table\n",
3246                         sizeof(*bp->grp_info) * bp->max_ring_grps);
3247                 rc = -ENOMEM;
3248                 goto error_free;
3249         }
3250
3251         /* Forward all requests if firmware is new enough */
3252         if (((bp->fw_ver >= ((20 << 24) | (6 << 16) | (100 << 8))) &&
3253             (bp->fw_ver < ((20 << 24) | (7 << 16)))) ||
3254             ((bp->fw_ver >= ((20 << 24) | (8 << 16))))) {
3255                 memset(bp->pf.vf_req_fwd, 0xff, sizeof(bp->pf.vf_req_fwd));
3256         } else {
3257                 RTE_LOG(WARNING, PMD,
3258                         "Firmware too old for VF mailbox functionality\n");
3259                 memset(bp->pf.vf_req_fwd, 0, sizeof(bp->pf.vf_req_fwd));
3260         }
3261
3262         /*
3263          * The following are used for driver cleanup.  If we disallow these,
3264          * VF drivers can't clean up cleanly.
3265          */
3266         ALLOW_FUNC(HWRM_FUNC_DRV_UNRGTR);
3267         ALLOW_FUNC(HWRM_VNIC_FREE);
3268         ALLOW_FUNC(HWRM_RING_FREE);
3269         ALLOW_FUNC(HWRM_RING_GRP_FREE);
3270         ALLOW_FUNC(HWRM_VNIC_RSS_COS_LB_CTX_FREE);
3271         ALLOW_FUNC(HWRM_CFA_L2_FILTER_FREE);
3272         ALLOW_FUNC(HWRM_STAT_CTX_FREE);
3273         ALLOW_FUNC(HWRM_PORT_PHY_QCFG);
3274         ALLOW_FUNC(HWRM_VNIC_TPA_CFG);
3275         rc = bnxt_hwrm_func_driver_register(bp);
3276         if (rc) {
3277                 RTE_LOG(ERR, PMD,
3278                         "Failed to register driver");
3279                 rc = -EBUSY;
3280                 goto error_free;
3281         }
3282
3283         RTE_LOG(INFO, PMD,
3284                 DRV_MODULE_NAME " found at mem %" PRIx64 ", node addr %pM\n",
3285                 pci_dev->mem_resource[0].phys_addr,
3286                 pci_dev->mem_resource[0].addr);
3287
3288         rc = bnxt_hwrm_func_reset(bp);
3289         if (rc) {
3290                 RTE_LOG(ERR, PMD, "hwrm chip reset failure rc: %x\n", rc);
3291                 rc = -EIO;
3292                 goto error_free;
3293         }
3294
3295         if (BNXT_PF(bp)) {
3296                 //if (bp->pf.active_vfs) {
3297                         // TODO: Deallocate VF resources?
3298                 //}
3299                 if (bp->pdev->max_vfs) {
3300                         rc = bnxt_hwrm_allocate_vfs(bp, bp->pdev->max_vfs);
3301                         if (rc) {
3302                                 RTE_LOG(ERR, PMD, "Failed to allocate VFs\n");
3303                                 goto error_free;
3304                         }
3305                 } else {
3306                         rc = bnxt_hwrm_allocate_pf_only(bp);
3307                         if (rc) {
3308                                 RTE_LOG(ERR, PMD,
3309                                         "Failed to allocate PF resources\n");
3310                                 goto error_free;
3311                         }
3312                 }
3313         }
3314
3315         bnxt_hwrm_port_led_qcaps(bp);
3316
3317         rc = bnxt_setup_int(bp);
3318         if (rc)
3319                 goto error_free;
3320
3321         rc = bnxt_alloc_mem(bp);
3322         if (rc)
3323                 goto error_free_int;
3324
3325         rc = bnxt_request_int(bp);
3326         if (rc)
3327                 goto error_free_int;
3328
3329         rc = bnxt_alloc_def_cp_ring(bp);
3330         if (rc)
3331                 goto error_free_int;
3332
3333         bnxt_enable_int(bp);
3334
3335         return 0;
3336
3337 error_free_int:
3338         bnxt_disable_int(bp);
3339         bnxt_free_def_cp_ring(bp);
3340         bnxt_hwrm_func_buf_unrgtr(bp);
3341         bnxt_free_int(bp);
3342         bnxt_free_mem(bp);
3343 error_free:
3344         bnxt_dev_uninit(eth_dev);
3345 error:
3346         return rc;
3347 }
3348
3349 static int
3350 bnxt_dev_uninit(struct rte_eth_dev *eth_dev) {
3351         struct bnxt *bp = eth_dev->data->dev_private;
3352         int rc;
3353
3354         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
3355                 return -EPERM;
3356
3357         bnxt_disable_int(bp);
3358         bnxt_free_int(bp);
3359         bnxt_free_mem(bp);
3360         if (eth_dev->data->mac_addrs != NULL) {
3361                 rte_free(eth_dev->data->mac_addrs);
3362                 eth_dev->data->mac_addrs = NULL;
3363         }
3364         if (bp->grp_info != NULL) {
3365                 rte_free(bp->grp_info);
3366                 bp->grp_info = NULL;
3367         }
3368         rc = bnxt_hwrm_func_driver_unregister(bp, 0);
3369         bnxt_free_hwrm_resources(bp);
3370         rte_memzone_free((const struct rte_memzone *)bp->tx_mem_zone);
3371         rte_memzone_free((const struct rte_memzone *)bp->rx_mem_zone);
3372         if (bp->dev_stopped == 0)
3373                 bnxt_dev_close_op(eth_dev);
3374         if (bp->pf.vf_info)
3375                 rte_free(bp->pf.vf_info);
3376         eth_dev->dev_ops = NULL;
3377         eth_dev->rx_pkt_burst = NULL;
3378         eth_dev->tx_pkt_burst = NULL;
3379
3380         return rc;
3381 }
3382
3383 static int bnxt_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
3384         struct rte_pci_device *pci_dev)
3385 {
3386         return rte_eth_dev_pci_generic_probe(pci_dev, sizeof(struct bnxt),
3387                 bnxt_dev_init);
3388 }
3389
3390 static int bnxt_pci_remove(struct rte_pci_device *pci_dev)
3391 {
3392         return rte_eth_dev_pci_generic_remove(pci_dev, bnxt_dev_uninit);
3393 }
3394
3395 static struct rte_pci_driver bnxt_rte_pmd = {
3396         .id_table = bnxt_pci_id_map,
3397         .drv_flags = RTE_PCI_DRV_NEED_MAPPING |
3398                 RTE_PCI_DRV_INTR_LSC,
3399         .probe = bnxt_pci_probe,
3400         .remove = bnxt_pci_remove,
3401 };
3402
3403 static bool
3404 is_device_supported(struct rte_eth_dev *dev, struct rte_pci_driver *drv)
3405 {
3406         if (strcmp(dev->device->driver->name, drv->driver.name))
3407                 return false;
3408
3409         return true;
3410 }
3411
3412 bool is_bnxt_supported(struct rte_eth_dev *dev)
3413 {
3414         return is_device_supported(dev, &bnxt_rte_pmd);
3415 }
3416
3417 RTE_PMD_REGISTER_PCI(net_bnxt, bnxt_rte_pmd);
3418 RTE_PMD_REGISTER_PCI_TABLE(net_bnxt, bnxt_pci_id_map);
3419 RTE_PMD_REGISTER_KMOD_DEP(net_bnxt, "* igb_uio | uio_pci_generic | vfio-pci");