drivers/net/mlx5/mlx5.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2015 6WIND S.A.
   3  * Copyright 2015 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <stddef.h>
   7 #include <unistd.h>
   8 #include <string.h>
   9 #include <assert.h>
  10 #include <dlfcn.h>
  11 #include <stdint.h>
  12 #include <stdlib.h>
  13 #include <errno.h>
  14 #include <net/if.h>
  15 #include <sys/mman.h>
  16 #include <linux/rtnetlink.h>
  17
  18 /* Verbs header. */
  19 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
  20 #ifdef PEDANTIC
  21 #pragma GCC diagnostic ignored "-Wpedantic"
  22 #endif
  23 #include <infiniband/verbs.h>
  24 #ifdef PEDANTIC
  25 #pragma GCC diagnostic error "-Wpedantic"
  26 #endif
  27
  28 #include <rte_malloc.h>
  29 #include <rte_ethdev_driver.h>
  30 #include <rte_ethdev_pci.h>
  31 #include <rte_pci.h>
  32 #include <rte_bus_pci.h>
  33 #include <rte_common.h>
  34 #include <rte_config.h>
  35 #include <rte_eal_memconfig.h>
  36 #include <rte_kvargs.h>
  37 #include <rte_rwlock.h>
  38 #include <rte_spinlock.h>
  39 #include <rte_string_fns.h>
  40
  41 #include "mlx5.h"
  42 #include "mlx5_utils.h"
  43 #include "mlx5_rxtx.h"
  44 #include "mlx5_autoconf.h"
  45 #include "mlx5_defs.h"
  46 #include "mlx5_glue.h"
  47 #include "mlx5_mr.h"
  48 #include "mlx5_flow.h"
  49
  50 /* Device parameter to enable RX completion queue compression. */
  51 #define MLX5_RXQ_CQE_COMP_EN "rxq_cqe_comp_en"
  52
  53 /* Device parameter to enable RX completion entry padding to 128B. */
  54 #define MLX5_RXQ_CQE_PAD_EN "rxq_cqe_pad_en"
  55
  56 /* Device parameter to enable padding Rx packet to cacheline size. */
  57 #define MLX5_RXQ_PKT_PAD_EN "rxq_pkt_pad_en"
  58
  59 /* Device parameter to enable Multi-Packet Rx queue. */
  60 #define MLX5_RX_MPRQ_EN "mprq_en"
  61
  62 /* Device parameter to configure log 2 of the number of strides for MPRQ. */
  63 #define MLX5_RX_MPRQ_LOG_STRIDE_NUM "mprq_log_stride_num"
  64
  65 /* Device parameter to limit the size of memcpy'd packet for MPRQ. */
  66 #define MLX5_RX_MPRQ_MAX_MEMCPY_LEN "mprq_max_memcpy_len"
  67
  68 /* Device parameter to set the minimum number of Rx queues to enable MPRQ. */
  69 #define MLX5_RXQS_MIN_MPRQ "rxqs_min_mprq"
  70
  71 /* Device parameter to configure inline send. */
  72 #define MLX5_TXQ_INLINE "txq_inline"
  73
  74 /*
  75  * Device parameter to configure the number of TX queues threshold for
  76  * enabling inline send.
  77  */
  78 #define MLX5_TXQS_MIN_INLINE "txqs_min_inline"
  79
  80 /*
  81  * Device parameter to configure the number of TX queues threshold for
  82  * enabling vectorized Tx.
  83  */
  84 #define MLX5_TXQS_MAX_VEC "txqs_max_vec"
  85
  86 /* Device parameter to enable multi-packet send WQEs. */
  87 #define MLX5_TXQ_MPW_EN "txq_mpw_en"
  88
  89 /* Device parameter to include 2 dsegs in the title WQEBB. */
  90 #define MLX5_TXQ_MPW_HDR_DSEG_EN "txq_mpw_hdr_dseg_en"
  91
  92 /* Device parameter to limit the size of inlining packet. */
  93 #define MLX5_TXQ_MAX_INLINE_LEN "txq_max_inline_len"
  94
  95 /* Device parameter to enable hardware Tx vector. */
  96 #define MLX5_TX_VEC_EN "tx_vec_en"
  97
  98 /* Device parameter to enable hardware Rx vector. */
  99 #define MLX5_RX_VEC_EN "rx_vec_en"
 100
 101 /* Allow L3 VXLAN flow creation. */
 102 #define MLX5_L3_VXLAN_EN "l3_vxlan_en"
 103
 104 /* Activate DV E-Switch flow steering. */
 105 #define MLX5_DV_ESW_EN "dv_esw_en"
 106
 107 /* Activate DV flow steering. */
 108 #define MLX5_DV_FLOW_EN "dv_flow_en"
 109
 110 /* Activate Netlink support in VF mode. */
 111 #define MLX5_VF_NL_EN "vf_nl_en"
 112
 113 /* Enable extending memsegs when creating a MR. */
 114 #define MLX5_MR_EXT_MEMSEG_EN "mr_ext_memseg_en"
 115
 116 /* Select port representors to instantiate. */
 117 #define MLX5_REPRESENTOR "representor"
 118
 119 /* Device parameter to configure the maximum number of dump files per queue. */
 120 #define MLX5_MAX_DUMP_FILES_NUM "max_dump_files_num"
 121
 122 #ifndef HAVE_IBV_MLX5_MOD_MPW
 123 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
 124 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
 125 #endif
 126
 127 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
 128 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
 129 #endif
 130
 131 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
 132
 133 /* Shared memory between primary and secondary processes. */
 134 struct mlx5_shared_data *mlx5_shared_data;
 135
 136 /* Spinlock for mlx5_shared_data allocation. */
 137 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
 138
 139 /* Process local data for secondary processes. */
 140 static struct mlx5_local_data mlx5_local_data;
 141
 142 /** Driver-specific log messages type. */
 143 int mlx5_logtype;
 144
 145 /** Data associated with devices to spawn. */
 146 struct mlx5_dev_spawn_data {
 147         uint32_t ifindex; /**< Network interface index. */
 148         uint32_t max_port; /**< IB device maximal port index. */
 149         uint32_t ibv_port; /**< IB device physical port index. */
 150         struct mlx5_switch_info info; /**< Switch information. */
 151         struct ibv_device *ibv_dev; /**< Associated IB device. */
 152         struct rte_eth_dev *eth_dev; /**< Associated Ethernet device. */
 153         struct rte_pci_device *pci_dev; /**< Backend PCI device. */
 154 };
 155
 156 static LIST_HEAD(, mlx5_ibv_shared) mlx5_ibv_list = LIST_HEAD_INITIALIZER();
 157 static pthread_mutex_t mlx5_ibv_list_mutex = PTHREAD_MUTEX_INITIALIZER;
 158
 159 /**
 160  * Allocate shared IB device context. If there is multiport device the
 161  * master and representors will share this context, if there is single
 162  * port dedicated IB device, the context will be used by only given
 163  * port due to unification.
 164  *
 165  * Routine first searches the context for the specified IB device name,
 166  * if found the shared context assumed and reference counter is incremented.
 167  * If no context found the new one is created and initialized with specified
 168  * IB device context and parameters.
 169  *
 170  * @param[in] spawn
 171  *   Pointer to the IB device attributes (name, port, etc).
 172  *
 173  * @return
 174  *   Pointer to mlx5_ibv_shared object on success,
 175  *   otherwise NULL and rte_errno is set.
 176  */
 177 static struct mlx5_ibv_shared *
 178 mlx5_alloc_shared_ibctx(const struct mlx5_dev_spawn_data *spawn)
 179 {
 180         struct mlx5_ibv_shared *sh;
 181         int err = 0;
 182         uint32_t i;
 183
 184         assert(spawn);
 185         /* Secondary process should not create the shared context. */
 186         assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
 187         pthread_mutex_lock(&mlx5_ibv_list_mutex);
 188         /* Search for IB context by device name. */
 189         LIST_FOREACH(sh, &mlx5_ibv_list, next) {
 190                 if (!strcmp(sh->ibdev_name, spawn->ibv_dev->name)) {
 191                         sh->refcnt++;
 192                         goto exit;
 193                 }
 194         }
 195         /* No device found, we have to create new shared context. */
 196         assert(spawn->max_port);
 197         sh = rte_zmalloc("ethdev shared ib context",
 198                          sizeof(struct mlx5_ibv_shared) +
 199                          spawn->max_port *
 200                          sizeof(struct mlx5_ibv_shared_port),
 201                          RTE_CACHE_LINE_SIZE);
 202         if (!sh) {
 203                 DRV_LOG(ERR, "shared context allocation failure");
 204                 rte_errno  = ENOMEM;
 205                 goto exit;
 206         }
 207         /* Try to open IB device with DV first, then usual Verbs. */
 208         errno = 0;
 209         sh->ctx = mlx5_glue->dv_open_device(spawn->ibv_dev);
 210         if (sh->ctx) {
 211                 sh->devx = 1;
 212                 DRV_LOG(DEBUG, "DevX is supported");
 213         } else {
 214                 sh->ctx = mlx5_glue->open_device(spawn->ibv_dev);
 215                 if (!sh->ctx) {
 216                         err = errno ? errno : ENODEV;
 217                         goto error;
 218                 }
 219                 DRV_LOG(DEBUG, "DevX is NOT supported");
 220         }
 221         err = mlx5_glue->query_device_ex(sh->ctx, NULL, &sh->device_attr);
 222         if (err) {
 223                 DRV_LOG(DEBUG, "ibv_query_device_ex() failed");
 224                 goto error;
 225         }
 226         sh->refcnt = 1;
 227         sh->max_port = spawn->max_port;
 228         strncpy(sh->ibdev_name, sh->ctx->device->name,
 229                 sizeof(sh->ibdev_name));
 230         strncpy(sh->ibdev_path, sh->ctx->device->ibdev_path,
 231                 sizeof(sh->ibdev_path));
 232         sh->pci_dev = spawn->pci_dev;
 233         pthread_mutex_init(&sh->intr_mutex, NULL);
 234         /*
 235          * Setting port_id to max unallowed value means
 236          * there is no interrupt subhandler installed for
 237          * the given port index i.
 238          */
 239         for (i = 0; i < sh->max_port; i++)
 240                 sh->port[i].ih_port_id = RTE_MAX_ETHPORTS;
 241         sh->pd = mlx5_glue->alloc_pd(sh->ctx);
 242         if (sh->pd == NULL) {
 243                 DRV_LOG(ERR, "PD allocation failure");
 244                 err = ENOMEM;
 245                 goto error;
 246         }
 247         /*
 248          * Once the device is added to the list of memory event
 249          * callback, its global MR cache table cannot be expanded
 250          * on the fly because of deadlock. If it overflows, lookup
 251          * should be done by searching MR list linearly, which is slow.
 252          *
 253          * At this point the device is not added to the memory
 254          * event list yet, context is just being created.
 255          */
 256         err = mlx5_mr_btree_init(&sh->mr.cache,
 257                                  MLX5_MR_BTREE_CACHE_N * 2,
 258                                  sh->pci_dev->device.numa_node);
 259         if (err) {
 260                 err = rte_errno;
 261                 goto error;
 262         }
 263         LIST_INSERT_HEAD(&mlx5_ibv_list, sh, next);
 264 exit:
 265         pthread_mutex_unlock(&mlx5_ibv_list_mutex);
 266         return sh;
 267 error:
 268         pthread_mutex_unlock(&mlx5_ibv_list_mutex);
 269         assert(sh);
 270         if (sh->pd)
 271                 claim_zero(mlx5_glue->dealloc_pd(sh->pd));
 272         if (sh->ctx)
 273                 claim_zero(mlx5_glue->close_device(sh->ctx));
 274         rte_free(sh);
 275         assert(err > 0);
 276         rte_errno = err;
 277         return NULL;
 278 }
 279
 280 /**
 281  * Free shared IB device context. Decrement counter and if zero free
 282  * all allocated resources and close handles.
 283  *
 284  * @param[in] sh
 285  *   Pointer to mlx5_ibv_shared object to free
 286  */
 287 static void
 288 mlx5_free_shared_ibctx(struct mlx5_ibv_shared *sh)
 289 {
 290         pthread_mutex_lock(&mlx5_ibv_list_mutex);
 291 #ifndef NDEBUG
 292         /* Check the object presence in the list. */
 293         struct mlx5_ibv_shared *lctx;
 294
 295         LIST_FOREACH(lctx, &mlx5_ibv_list, next)
 296                 if (lctx == sh)
 297                         break;
 298         assert(lctx);
 299         if (lctx != sh) {
 300                 DRV_LOG(ERR, "Freeing non-existing shared IB context");
 301                 goto exit;
 302         }
 303 #endif
 304         assert(sh);
 305         assert(sh->refcnt);
 306         /* Secondary process should not free the shared context. */
 307         assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
 308         if (--sh->refcnt)
 309                 goto exit;
 310         /* Release created Memory Regions. */
 311         mlx5_mr_release(sh);
 312         LIST_REMOVE(sh, next);
 313         /*
 314          *  Ensure there is no async event handler installed.
 315          *  Only primary process handles async device events.
 316          **/
 317         assert(!sh->intr_cnt);
 318         if (sh->intr_cnt)
 319                 mlx5_intr_callback_unregister
 320                         (&sh->intr_handle, mlx5_dev_interrupt_handler, sh);
 321         pthread_mutex_destroy(&sh->intr_mutex);
 322         if (sh->pd)
 323                 claim_zero(mlx5_glue->dealloc_pd(sh->pd));
 324         if (sh->ctx)
 325                 claim_zero(mlx5_glue->close_device(sh->ctx));
 326         rte_free(sh);
 327 exit:
 328         pthread_mutex_unlock(&mlx5_ibv_list_mutex);
 329 }
 330
 331 /**
 332  * Initialize DR related data within private structure.
 333  * Routine checks the reference counter and does actual
 334  * resources creation/initialization only if counter is zero.
 335  *
 336  * @param[in] priv
 337  *   Pointer to the private device data structure.
 338  *
 339  * @return
 340  *   Zero on success, positive error code otherwise.
 341  */
 342 static int
 343 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
 344 {
 345 #ifdef HAVE_MLX5DV_DR
 346         struct mlx5_ibv_shared *sh = priv->sh;
 347         int err = 0;
 348         void *domain;
 349
 350         assert(sh);
 351         if (sh->dv_refcnt) {
 352                 /* Shared DV/DR structures is already initialized. */
 353                 sh->dv_refcnt++;
 354                 priv->dr_shared = 1;
 355                 return 0;
 356         }
 357         /* Reference counter is zero, we should initialize structures. */
 358         domain = mlx5_glue->dr_create_domain(sh->ctx,
 359                                              MLX5DV_DR_DOMAIN_TYPE_NIC_RX);
 360         if (!domain) {
 361                 DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed");
 362                 err = errno;
 363                 goto error;
 364         }
 365         sh->rx_domain = domain;
 366         domain = mlx5_glue->dr_create_domain(sh->ctx,
 367                                              MLX5DV_DR_DOMAIN_TYPE_NIC_TX);
 368         if (!domain) {
 369                 DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed");
 370                 err = errno;
 371                 goto error;
 372         }
 373         pthread_mutex_init(&sh->dv_mutex, NULL);
 374         sh->tx_domain = domain;
 375 #ifdef HAVE_MLX5DV_DR_ESWITCH
 376         if (priv->config.dv_esw_en) {
 377                 domain  = mlx5_glue->dr_create_domain
 378                         (sh->ctx, MLX5DV_DR_DOMAIN_TYPE_FDB);
 379                 if (!domain) {
 380                         DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed");
 381                         err = errno;
 382                         goto error;
 383                 }
 384                 sh->fdb_domain = domain;
 385                 sh->esw_drop_action = mlx5_glue->dr_create_flow_action_drop();
 386         }
 387 #endif
 388         sh->dv_refcnt++;
 389         priv->dr_shared = 1;
 390         return 0;
 391
 392 error:
 393        /* Rollback the created objects. */
 394         if (sh->rx_domain) {
 395                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 396                 sh->rx_domain = NULL;
 397         }
 398         if (sh->tx_domain) {
 399                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 400                 sh->tx_domain = NULL;
 401         }
 402         if (sh->fdb_domain) {
 403                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 404                 sh->fdb_domain = NULL;
 405         }
 406         if (sh->esw_drop_action) {
 407                 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
 408                 sh->esw_drop_action = NULL;
 409         }
 410         return err;
 411 #else
 412         (void)priv;
 413         return 0;
 414 #endif
 415 }
 416
 417 /**
 418  * Destroy DR related data within private structure.
 419  *
 420  * @param[in] priv
 421  *   Pointer to the private device data structure.
 422  */
 423 static void
 424 mlx5_free_shared_dr(struct mlx5_priv *priv)
 425 {
 426 #ifdef HAVE_MLX5DV_DR
 427         struct mlx5_ibv_shared *sh;
 428
 429         if (!priv->dr_shared)
 430                 return;
 431         priv->dr_shared = 0;
 432         sh = priv->sh;
 433         assert(sh);
 434         assert(sh->dv_refcnt);
 435         if (sh->dv_refcnt && --sh->dv_refcnt)
 436                 return;
 437         if (sh->rx_domain) {
 438                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 439                 sh->rx_domain = NULL;
 440         }
 441         if (sh->tx_domain) {
 442                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 443                 sh->tx_domain = NULL;
 444         }
 445 #ifdef HAVE_MLX5DV_DR_ESWITCH
 446         if (sh->fdb_domain) {
 447                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 448                 sh->fdb_domain = NULL;
 449         }
 450         if (sh->esw_drop_action) {
 451                 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
 452                 sh->esw_drop_action = NULL;
 453         }
 454 #endif
 455         pthread_mutex_destroy(&sh->dv_mutex);
 456 #else
 457         (void)priv;
 458 #endif
 459 }
 460
 461 /**
 462  * Initialize shared data between primary and secondary process.
 463  *
 464  * A memzone is reserved by primary process and secondary processes attach to
 465  * the memzone.
 466  *
 467  * @return
 468  *   0 on success, a negative errno value otherwise and rte_errno is set.
 469  */
 470 static int
 471 mlx5_init_shared_data(void)
 472 {
 473         const struct rte_memzone *mz;
 474         int ret = 0;
 475
 476         rte_spinlock_lock(&mlx5_shared_data_lock);
 477         if (mlx5_shared_data == NULL) {
 478                 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
 479                         /* Allocate shared memory. */
 480                         mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
 481                                                  sizeof(*mlx5_shared_data),
 482                                                  SOCKET_ID_ANY, 0);
 483                         if (mz == NULL) {
 484                                 DRV_LOG(ERR,
 485                                         "Cannot allocate mlx5 shared data\n");
 486                                 ret = -rte_errno;
 487                                 goto error;
 488                         }
 489                         mlx5_shared_data = mz->addr;
 490                         memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
 491                         rte_spinlock_init(&mlx5_shared_data->lock);
 492                 } else {
 493                         /* Lookup allocated shared memory. */
 494                         mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
 495                         if (mz == NULL) {
 496                                 DRV_LOG(ERR,
 497                                         "Cannot attach mlx5 shared data\n");
 498                                 ret = -rte_errno;
 499                                 goto error;
 500                         }
 501                         mlx5_shared_data = mz->addr;
 502                         memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
 503                 }
 504         }
 505 error:
 506         rte_spinlock_unlock(&mlx5_shared_data_lock);
 507         return ret;
 508 }
 509
 510 /**
 511  * Retrieve integer value from environment variable.
 512  *
 513  * @param[in] name
 514  *   Environment variable name.
 515  *
 516  * @return
 517  *   Integer value, 0 if the variable is not set.
 518  */
 519 int
 520 mlx5_getenv_int(const char *name)
 521 {
 522         const char *val = getenv(name);
 523
 524         if (val == NULL)
 525                 return 0;
 526         return atoi(val);
 527 }
 528
 529 /**
 530  * Verbs callback to allocate a memory. This function should allocate the space
 531  * according to the size provided residing inside a huge page.
 532  * Please note that all allocation must respect the alignment from libmlx5
 533  * (i.e. currently sysconf(_SC_PAGESIZE)).
 534  *
 535  * @param[in] size
 536  *   The size in bytes of the memory to allocate.
 537  * @param[in] data
 538  *   A pointer to the callback data.
 539  *
 540  * @return
 541  *   Allocated buffer, NULL otherwise and rte_errno is set.
 542  */
 543 static void *
 544 mlx5_alloc_verbs_buf(size_t size, void *data)
 545 {
 546         struct mlx5_priv *priv = data;
 547         void *ret;
 548         size_t alignment = sysconf(_SC_PAGESIZE);
 549         unsigned int socket = SOCKET_ID_ANY;
 550
 551         if (priv->verbs_alloc_ctx.type == MLX5_VERBS_ALLOC_TYPE_TX_QUEUE) {
 552                 const struct mlx5_txq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
 553
 554                 socket = ctrl->socket;
 555         } else if (priv->verbs_alloc_ctx.type ==
 556                    MLX5_VERBS_ALLOC_TYPE_RX_QUEUE) {
 557                 const struct mlx5_rxq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
 558
 559                 socket = ctrl->socket;
 560         }
 561         assert(data != NULL);
 562         ret = rte_malloc_socket(__func__, size, alignment, socket);
 563         if (!ret && size)
 564                 rte_errno = ENOMEM;
 565         return ret;
 566 }
 567
 568 /**
 569  * Verbs callback to free a memory.
 570  *
 571  * @param[in] ptr
 572  *   A pointer to the memory to free.
 573  * @param[in] data
 574  *   A pointer to the callback data.
 575  */
 576 static void
 577 mlx5_free_verbs_buf(void *ptr, void *data __rte_unused)
 578 {
 579         assert(data != NULL);
 580         rte_free(ptr);
 581 }
 582
 583 /**
 584  * Initialize process private data structure.
 585  *
 586  * @param dev
 587  *   Pointer to Ethernet device structure.
 588  *
 589  * @return
 590  *   0 on success, a negative errno value otherwise and rte_errno is set.
 591  */
 592 int
 593 mlx5_proc_priv_init(struct rte_eth_dev *dev)
 594 {
 595         struct mlx5_priv *priv = dev->data->dev_private;
 596         struct mlx5_proc_priv *ppriv;
 597         size_t ppriv_size;
 598
 599         /*
 600          * UAR register table follows the process private structure. BlueFlame
 601          * registers for Tx queues are stored in the table.
 602          */
 603         ppriv_size =
 604                 sizeof(struct mlx5_proc_priv) + priv->txqs_n * sizeof(void *);
 605         ppriv = rte_malloc_socket("mlx5_proc_priv", ppriv_size,
 606                                   RTE_CACHE_LINE_SIZE, dev->device->numa_node);
 607         if (!ppriv) {
 608                 rte_errno = ENOMEM;
 609                 return -rte_errno;
 610         }
 611         ppriv->uar_table_sz = ppriv_size;
 612         dev->process_private = ppriv;
 613         return 0;
 614 }
 615
 616 /**
 617  * Un-initialize process private data structure.
 618  *
 619  * @param dev
 620  *   Pointer to Ethernet device structure.
 621  */
 622 static void
 623 mlx5_proc_priv_uninit(struct rte_eth_dev *dev)
 624 {
 625         if (!dev->process_private)
 626                 return;
 627         rte_free(dev->process_private);
 628         dev->process_private = NULL;
 629 }
 630
 631 /**
 632  * DPDK callback to close the device.
 633  *
 634  * Destroy all queues and objects, free memory.
 635  *
 636  * @param dev
 637  *   Pointer to Ethernet device structure.
 638  */
 639 static void
 640 mlx5_dev_close(struct rte_eth_dev *dev)
 641 {
 642         struct mlx5_priv *priv = dev->data->dev_private;
 643         unsigned int i;
 644         int ret;
 645
 646         DRV_LOG(DEBUG, "port %u closing device \"%s\"",
 647                 dev->data->port_id,
 648                 ((priv->sh->ctx != NULL) ? priv->sh->ctx->device->name : ""));
 649         /* In case mlx5_dev_stop() has not been called. */
 650         mlx5_dev_interrupt_handler_uninstall(dev);
 651         mlx5_traffic_disable(dev);
 652         mlx5_flow_flush(dev, NULL);
 653         /* Prevent crashes when queues are still in use. */
 654         dev->rx_pkt_burst = removed_rx_burst;
 655         dev->tx_pkt_burst = removed_tx_burst;
 656         rte_wmb();
 657         /* Disable datapath on secondary process. */
 658         mlx5_mp_req_stop_rxtx(dev);
 659         if (priv->rxqs != NULL) {
 660                 /* XXX race condition if mlx5_rx_burst() is still running. */
 661                 usleep(1000);
 662                 for (i = 0; (i != priv->rxqs_n); ++i)
 663                         mlx5_rxq_release(dev, i);
 664                 priv->rxqs_n = 0;
 665                 priv->rxqs = NULL;
 666         }
 667         if (priv->txqs != NULL) {
 668                 /* XXX race condition if mlx5_tx_burst() is still running. */
 669                 usleep(1000);
 670                 for (i = 0; (i != priv->txqs_n); ++i)
 671                         mlx5_txq_release(dev, i);
 672                 priv->txqs_n = 0;
 673                 priv->txqs = NULL;
 674         }
 675         mlx5_proc_priv_uninit(dev);
 676         mlx5_mprq_free_mp(dev);
 677         /* Remove from memory callback device list. */
 678         rte_rwlock_write_lock(&mlx5_shared_data->mem_event_rwlock);
 679         assert(priv->sh);
 680         LIST_REMOVE(priv->sh, mem_event_cb);
 681         rte_rwlock_write_unlock(&mlx5_shared_data->mem_event_rwlock);
 682         mlx5_free_shared_dr(priv);
 683         if (priv->rss_conf.rss_key != NULL)
 684                 rte_free(priv->rss_conf.rss_key);
 685         if (priv->reta_idx != NULL)
 686                 rte_free(priv->reta_idx);
 687         if (priv->config.vf)
 688                 mlx5_nl_mac_addr_flush(dev);
 689         if (priv->nl_socket_route >= 0)
 690                 close(priv->nl_socket_route);
 691         if (priv->nl_socket_rdma >= 0)
 692                 close(priv->nl_socket_rdma);
 693         if (priv->tcf_context)
 694                 mlx5_flow_tcf_context_destroy(priv->tcf_context);
 695         if (priv->sh) {
 696                 /*
 697                  * Free the shared context in last turn, because the cleanup
 698                  * routines above may use some shared fields, like
 699                  * mlx5_nl_mac_addr_flush() uses ibdev_path for retrieveing
 700                  * ifindex if Netlink fails.
 701                  */
 702                 mlx5_free_shared_ibctx(priv->sh);
 703                 priv->sh = NULL;
 704         }
 705         ret = mlx5_hrxq_ibv_verify(dev);
 706         if (ret)
 707                 DRV_LOG(WARNING, "port %u some hash Rx queue still remain",
 708                         dev->data->port_id);
 709         ret = mlx5_ind_table_ibv_verify(dev);
 710         if (ret)
 711                 DRV_LOG(WARNING, "port %u some indirection table still remain",
 712                         dev->data->port_id);
 713         ret = mlx5_rxq_ibv_verify(dev);
 714         if (ret)
 715                 DRV_LOG(WARNING, "port %u some Verbs Rx queue still remain",
 716                         dev->data->port_id);
 717         ret = mlx5_rxq_verify(dev);
 718         if (ret)
 719                 DRV_LOG(WARNING, "port %u some Rx queues still remain",
 720                         dev->data->port_id);
 721         ret = mlx5_txq_ibv_verify(dev);
 722         if (ret)
 723                 DRV_LOG(WARNING, "port %u some Verbs Tx queue still remain",
 724                         dev->data->port_id);
 725         ret = mlx5_txq_verify(dev);
 726         if (ret)
 727                 DRV_LOG(WARNING, "port %u some Tx queues still remain",
 728                         dev->data->port_id);
 729         ret = mlx5_flow_verify(dev);
 730         if (ret)
 731                 DRV_LOG(WARNING, "port %u some flows still remain",
 732                         dev->data->port_id);
 733         if (priv->domain_id != RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
 734                 unsigned int c = 0;
 735                 uint16_t port_id;
 736
 737                 RTE_ETH_FOREACH_DEV_OF(port_id, dev->device) {
 738                         struct mlx5_priv *opriv =
 739                                 rte_eth_devices[port_id].data->dev_private;
 740
 741                         if (!opriv ||
 742                             opriv->domain_id != priv->domain_id ||
 743                             &rte_eth_devices[port_id] == dev)
 744                                 continue;
 745                         ++c;
 746                 }
 747                 if (!c)
 748                         claim_zero(rte_eth_switch_domain_free(priv->domain_id));
 749         }
 750         memset(priv, 0, sizeof(*priv));
 751         priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
 752         /*
 753          * Reset mac_addrs to NULL such that it is not freed as part of
 754          * rte_eth_dev_release_port(). mac_addrs is part of dev_private so
 755          * it is freed when dev_private is freed.
 756          */
 757         dev->data->mac_addrs = NULL;
 758 }
 759
 760 const struct eth_dev_ops mlx5_dev_ops = {
 761         .dev_configure = mlx5_dev_configure,
 762         .dev_start = mlx5_dev_start,
 763         .dev_stop = mlx5_dev_stop,
 764         .dev_set_link_down = mlx5_set_link_down,
 765         .dev_set_link_up = mlx5_set_link_up,
 766         .dev_close = mlx5_dev_close,
 767         .promiscuous_enable = mlx5_promiscuous_enable,
 768         .promiscuous_disable = mlx5_promiscuous_disable,
 769         .allmulticast_enable = mlx5_allmulticast_enable,
 770         .allmulticast_disable = mlx5_allmulticast_disable,
 771         .link_update = mlx5_link_update,
 772         .stats_get = mlx5_stats_get,
 773         .stats_reset = mlx5_stats_reset,
 774         .xstats_get = mlx5_xstats_get,
 775         .xstats_reset = mlx5_xstats_reset,
 776         .xstats_get_names = mlx5_xstats_get_names,
 777         .fw_version_get = mlx5_fw_version_get,
 778         .dev_infos_get = mlx5_dev_infos_get,
 779         .read_clock = mlx5_read_clock,
 780         .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
 781         .vlan_filter_set = mlx5_vlan_filter_set,
 782         .rx_queue_setup = mlx5_rx_queue_setup,
 783         .tx_queue_setup = mlx5_tx_queue_setup,
 784         .rx_queue_release = mlx5_rx_queue_release,
 785         .tx_queue_release = mlx5_tx_queue_release,
 786         .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
 787         .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
 788         .mac_addr_remove = mlx5_mac_addr_remove,
 789         .mac_addr_add = mlx5_mac_addr_add,
 790         .mac_addr_set = mlx5_mac_addr_set,
 791         .set_mc_addr_list = mlx5_set_mc_addr_list,
 792         .mtu_set = mlx5_dev_set_mtu,
 793         .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
 794         .vlan_offload_set = mlx5_vlan_offload_set,
 795         .reta_update = mlx5_dev_rss_reta_update,
 796         .reta_query = mlx5_dev_rss_reta_query,
 797         .rss_hash_update = mlx5_rss_hash_update,
 798         .rss_hash_conf_get = mlx5_rss_hash_conf_get,
 799         .filter_ctrl = mlx5_dev_filter_ctrl,
 800         .rx_descriptor_status = mlx5_rx_descriptor_status,
 801         .tx_descriptor_status = mlx5_tx_descriptor_status,
 802         .rx_queue_count = mlx5_rx_queue_count,
 803         .rx_queue_intr_enable = mlx5_rx_intr_enable,
 804         .rx_queue_intr_disable = mlx5_rx_intr_disable,
 805         .is_removed = mlx5_is_removed,
 806 };
 807
 808 /* Available operations from secondary process. */
 809 static const struct eth_dev_ops mlx5_dev_sec_ops = {
 810         .stats_get = mlx5_stats_get,
 811         .stats_reset = mlx5_stats_reset,
 812         .xstats_get = mlx5_xstats_get,
 813         .xstats_reset = mlx5_xstats_reset,
 814         .xstats_get_names = mlx5_xstats_get_names,
 815         .fw_version_get = mlx5_fw_version_get,
 816         .dev_infos_get = mlx5_dev_infos_get,
 817         .rx_descriptor_status = mlx5_rx_descriptor_status,
 818         .tx_descriptor_status = mlx5_tx_descriptor_status,
 819 };
 820
 821 /* Available operations in flow isolated mode. */
 822 const struct eth_dev_ops mlx5_dev_ops_isolate = {
 823         .dev_configure = mlx5_dev_configure,
 824         .dev_start = mlx5_dev_start,
 825         .dev_stop = mlx5_dev_stop,
 826         .dev_set_link_down = mlx5_set_link_down,
 827         .dev_set_link_up = mlx5_set_link_up,
 828         .dev_close = mlx5_dev_close,
 829         .promiscuous_enable = mlx5_promiscuous_enable,
 830         .promiscuous_disable = mlx5_promiscuous_disable,
 831         .allmulticast_enable = mlx5_allmulticast_enable,
 832         .allmulticast_disable = mlx5_allmulticast_disable,
 833         .link_update = mlx5_link_update,
 834         .stats_get = mlx5_stats_get,
 835         .stats_reset = mlx5_stats_reset,
 836         .xstats_get = mlx5_xstats_get,
 837         .xstats_reset = mlx5_xstats_reset,
 838         .xstats_get_names = mlx5_xstats_get_names,
 839         .fw_version_get = mlx5_fw_version_get,
 840         .dev_infos_get = mlx5_dev_infos_get,
 841         .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
 842         .vlan_filter_set = mlx5_vlan_filter_set,
 843         .rx_queue_setup = mlx5_rx_queue_setup,
 844         .tx_queue_setup = mlx5_tx_queue_setup,
 845         .rx_queue_release = mlx5_rx_queue_release,
 846         .tx_queue_release = mlx5_tx_queue_release,
 847         .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
 848         .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
 849         .mac_addr_remove = mlx5_mac_addr_remove,
 850         .mac_addr_add = mlx5_mac_addr_add,
 851         .mac_addr_set = mlx5_mac_addr_set,
 852         .set_mc_addr_list = mlx5_set_mc_addr_list,
 853         .mtu_set = mlx5_dev_set_mtu,
 854         .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
 855         .vlan_offload_set = mlx5_vlan_offload_set,
 856         .filter_ctrl = mlx5_dev_filter_ctrl,
 857         .rx_descriptor_status = mlx5_rx_descriptor_status,
 858         .tx_descriptor_status = mlx5_tx_descriptor_status,
 859         .rx_queue_intr_enable = mlx5_rx_intr_enable,
 860         .rx_queue_intr_disable = mlx5_rx_intr_disable,
 861         .is_removed = mlx5_is_removed,
 862 };
 863
 864 /**
 865  * Verify and store value for device argument.
 866  *
 867  * @param[in] key
 868  *   Key argument to verify.
 869  * @param[in] val
 870  *   Value associated with key.
 871  * @param opaque
 872  *   User data.
 873  *
 874  * @return
 875  *   0 on success, a negative errno value otherwise and rte_errno is set.
 876  */
 877 static int
 878 mlx5_args_check(const char *key, const char *val, void *opaque)
 879 {
 880         struct mlx5_dev_config *config = opaque;
 881         unsigned long tmp;
 882
 883         /* No-op, port representors are processed in mlx5_dev_spawn(). */
 884         if (!strcmp(MLX5_REPRESENTOR, key))
 885                 return 0;
 886         errno = 0;
 887         tmp = strtoul(val, NULL, 0);
 888         if (errno) {
 889                 rte_errno = errno;
 890                 DRV_LOG(WARNING, "%s: \"%s\" is not a valid integer", key, val);
 891                 return -rte_errno;
 892         }
 893         if (strcmp(MLX5_RXQ_CQE_COMP_EN, key) == 0) {
 894                 config->cqe_comp = !!tmp;
 895         } else if (strcmp(MLX5_RXQ_CQE_PAD_EN, key) == 0) {
 896                 config->cqe_pad = !!tmp;
 897         } else if (strcmp(MLX5_RXQ_PKT_PAD_EN, key) == 0) {
 898                 config->hw_padding = !!tmp;
 899         } else if (strcmp(MLX5_RX_MPRQ_EN, key) == 0) {
 900                 config->mprq.enabled = !!tmp;
 901         } else if (strcmp(MLX5_RX_MPRQ_LOG_STRIDE_NUM, key) == 0) {
 902                 config->mprq.stride_num_n = tmp;
 903         } else if (strcmp(MLX5_RX_MPRQ_MAX_MEMCPY_LEN, key) == 0) {
 904                 config->mprq.max_memcpy_len = tmp;
 905         } else if (strcmp(MLX5_RXQS_MIN_MPRQ, key) == 0) {
 906                 config->mprq.min_rxqs_num = tmp;
 907         } else if (strcmp(MLX5_TXQ_INLINE, key) == 0) {
 908                 config->txq_inline = tmp;
 909         } else if (strcmp(MLX5_TXQS_MIN_INLINE, key) == 0) {
 910                 config->txqs_inline = tmp;
 911         } else if (strcmp(MLX5_TXQS_MAX_VEC, key) == 0) {
 912                 config->txqs_vec = tmp;
 913         } else if (strcmp(MLX5_TXQ_MPW_EN, key) == 0) {
 914                 config->mps = !!tmp;
 915         } else if (strcmp(MLX5_TXQ_MPW_HDR_DSEG_EN, key) == 0) {
 916                 config->mpw_hdr_dseg = !!tmp;
 917         } else if (strcmp(MLX5_TXQ_MAX_INLINE_LEN, key) == 0) {
 918                 config->inline_max_packet_sz = tmp;
 919         } else if (strcmp(MLX5_TX_VEC_EN, key) == 0) {
 920                 config->tx_vec_en = !!tmp;
 921         } else if (strcmp(MLX5_RX_VEC_EN, key) == 0) {
 922                 config->rx_vec_en = !!tmp;
 923         } else if (strcmp(MLX5_L3_VXLAN_EN, key) == 0) {
 924                 config->l3_vxlan_en = !!tmp;
 925         } else if (strcmp(MLX5_VF_NL_EN, key) == 0) {
 926                 config->vf_nl_en = !!tmp;
 927         } else if (strcmp(MLX5_DV_ESW_EN, key) == 0) {
 928                 config->dv_esw_en = !!tmp;
 929         } else if (strcmp(MLX5_DV_FLOW_EN, key) == 0) {
 930                 config->dv_flow_en = !!tmp;
 931         } else if (strcmp(MLX5_MR_EXT_MEMSEG_EN, key) == 0) {
 932                 config->mr_ext_memseg_en = !!tmp;
 933         } else if (strcmp(MLX5_MAX_DUMP_FILES_NUM, key) == 0) {
 934                 config->max_dump_files_num = tmp;
 935         } else {
 936                 DRV_LOG(WARNING, "%s: unknown parameter", key);
 937                 rte_errno = EINVAL;
 938                 return -rte_errno;
 939         }
 940         return 0;
 941 }
 942
 943 /**
 944  * Parse device parameters.
 945  *
 946  * @param config
 947  *   Pointer to device configuration structure.
 948  * @param devargs
 949  *   Device arguments structure.
 950  *
 951  * @return
 952  *   0 on success, a negative errno value otherwise and rte_errno is set.
 953  */
 954 static int
 955 mlx5_args(struct mlx5_dev_config *config, struct rte_devargs *devargs)
 956 {
 957         const char **params = (const char *[]){
 958                 MLX5_RXQ_CQE_COMP_EN,
 959                 MLX5_RXQ_CQE_PAD_EN,
 960                 MLX5_RXQ_PKT_PAD_EN,
 961                 MLX5_RX_MPRQ_EN,
 962                 MLX5_RX_MPRQ_LOG_STRIDE_NUM,
 963                 MLX5_RX_MPRQ_MAX_MEMCPY_LEN,
 964                 MLX5_RXQS_MIN_MPRQ,
 965                 MLX5_TXQ_INLINE,
 966                 MLX5_TXQS_MIN_INLINE,
 967                 MLX5_TXQS_MAX_VEC,
 968                 MLX5_TXQ_MPW_EN,
 969                 MLX5_TXQ_MPW_HDR_DSEG_EN,
 970                 MLX5_TXQ_MAX_INLINE_LEN,
 971                 MLX5_TX_VEC_EN,
 972                 MLX5_RX_VEC_EN,
 973                 MLX5_L3_VXLAN_EN,
 974                 MLX5_VF_NL_EN,
 975                 MLX5_DV_ESW_EN,
 976                 MLX5_DV_FLOW_EN,
 977                 MLX5_MR_EXT_MEMSEG_EN,
 978                 MLX5_REPRESENTOR,
 979                 MLX5_MAX_DUMP_FILES_NUM,
 980                 NULL,
 981         };
 982         struct rte_kvargs *kvlist;
 983         int ret = 0;
 984         int i;
 985
 986         if (devargs == NULL)
 987                 return 0;
 988         /* Following UGLY cast is done to pass checkpatch. */
 989         kvlist = rte_kvargs_parse(devargs->args, params);
 990         if (kvlist == NULL) {
 991                 rte_errno = EINVAL;
 992                 return -rte_errno;
 993         }
 994         /* Process parameters. */
 995         for (i = 0; (params[i] != NULL); ++i) {
 996                 if (rte_kvargs_count(kvlist, params[i])) {
 997                         ret = rte_kvargs_process(kvlist, params[i],
 998                                                  mlx5_args_check, config);
 999                         if (ret) {
1000                                 rte_errno = EINVAL;
1001                                 rte_kvargs_free(kvlist);
1002                                 return -rte_errno;
1003                         }
1004                 }
1005         }
1006         rte_kvargs_free(kvlist);
1007         return 0;
1008 }
1009
1010 static struct rte_pci_driver mlx5_driver;
1011
1012 /**
1013  * PMD global initialization.
1014  *
1015  * Independent from individual device, this function initializes global
1016  * per-PMD data structures distinguishing primary and secondary processes.
1017  * Hence, each initialization is called once per a process.
1018  *
1019  * @return
1020  *   0 on success, a negative errno value otherwise and rte_errno is set.
1021  */
1022 static int
1023 mlx5_init_once(void)
1024 {
1025         struct mlx5_shared_data *sd;
1026         struct mlx5_local_data *ld = &mlx5_local_data;
1027         int ret = 0;
1028
1029         if (mlx5_init_shared_data())
1030                 return -rte_errno;
1031         sd = mlx5_shared_data;
1032         assert(sd);
1033         rte_spinlock_lock(&sd->lock);
1034         switch (rte_eal_process_type()) {
1035         case RTE_PROC_PRIMARY:
1036                 if (sd->init_done)
1037                         break;
1038                 LIST_INIT(&sd->mem_event_cb_list);
1039                 rte_rwlock_init(&sd->mem_event_rwlock);
1040                 rte_mem_event_callback_register("MLX5_MEM_EVENT_CB",
1041                                                 mlx5_mr_mem_event_cb, NULL);
1042                 ret = mlx5_mp_init_primary();
1043                 if (ret)
1044                         goto out;
1045                 sd->init_done = true;
1046                 break;
1047         case RTE_PROC_SECONDARY:
1048                 if (ld->init_done)
1049                         break;
1050                 ret = mlx5_mp_init_secondary();
1051                 if (ret)
1052                         goto out;
1053                 ++sd->secondary_cnt;
1054                 ld->init_done = true;
1055                 break;
1056         default:
1057                 break;
1058         }
1059 out:
1060         rte_spinlock_unlock(&sd->lock);
1061         return ret;
1062 }
1063
1064 /**
1065  * Spawn an Ethernet device from Verbs information.
1066  *
1067  * @param dpdk_dev
1068  *   Backing DPDK device.
1069  * @param spawn
1070  *   Verbs device parameters (name, port, switch_info) to spawn.
1071  * @param config
1072  *   Device configuration parameters.
1073  *
1074  * @return
1075  *   A valid Ethernet device object on success, NULL otherwise and rte_errno
1076  *   is set. The following errors are defined:
1077  *
1078  *   EBUSY: device is not supposed to be spawned.
1079  *   EEXIST: device is already spawned
1080  */
1081 static struct rte_eth_dev *
1082 mlx5_dev_spawn(struct rte_device *dpdk_dev,
1083                struct mlx5_dev_spawn_data *spawn,
1084                struct mlx5_dev_config config)
1085 {
1086         const struct mlx5_switch_info *switch_info = &spawn->info;
1087         struct mlx5_ibv_shared *sh = NULL;
1088         struct ibv_port_attr port_attr;
1089         struct mlx5dv_context dv_attr = { .comp_mask = 0 };
1090         struct rte_eth_dev *eth_dev = NULL;
1091         struct mlx5_priv *priv = NULL;
1092         int err = 0;
1093         unsigned int hw_padding = 0;
1094         unsigned int mps;
1095         unsigned int cqe_comp;
1096         unsigned int cqe_pad = 0;
1097         unsigned int tunnel_en = 0;
1098         unsigned int mpls_en = 0;
1099         unsigned int swp = 0;
1100         unsigned int mprq = 0;
1101         unsigned int mprq_min_stride_size_n = 0;
1102         unsigned int mprq_max_stride_size_n = 0;
1103         unsigned int mprq_min_stride_num_n = 0;
1104         unsigned int mprq_max_stride_num_n = 0;
1105         struct rte_ether_addr mac;
1106         char name[RTE_ETH_NAME_MAX_LEN];
1107         int own_domain_id = 0;
1108         uint16_t port_id;
1109         unsigned int i;
1110
1111         /* Determine if this port representor is supposed to be spawned. */
1112         if (switch_info->representor && dpdk_dev->devargs) {
1113                 struct rte_eth_devargs eth_da;
1114
1115                 err = rte_eth_devargs_parse(dpdk_dev->devargs->args, &eth_da);
1116                 if (err) {
1117                         rte_errno = -err;
1118                         DRV_LOG(ERR, "failed to process device arguments: %s",
1119                                 strerror(rte_errno));
1120                         return NULL;
1121                 }
1122                 for (i = 0; i < eth_da.nb_representor_ports; ++i)
1123                         if (eth_da.representor_ports[i] ==
1124                             (uint16_t)switch_info->port_name)
1125                                 break;
1126                 if (i == eth_da.nb_representor_ports) {
1127                         rte_errno = EBUSY;
1128                         return NULL;
1129                 }
1130         }
1131         /* Build device name. */
1132         if (!switch_info->representor)
1133                 strlcpy(name, dpdk_dev->name, sizeof(name));
1134         else
1135                 snprintf(name, sizeof(name), "%s_representor_%u",
1136                          dpdk_dev->name, switch_info->port_name);
1137         /* check if the device is already spawned */
1138         if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
1139                 rte_errno = EEXIST;
1140                 return NULL;
1141         }
1142         DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
1143         if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
1144                 eth_dev = rte_eth_dev_attach_secondary(name);
1145                 if (eth_dev == NULL) {
1146                         DRV_LOG(ERR, "can not attach rte ethdev");
1147                         rte_errno = ENOMEM;
1148                         return NULL;
1149                 }
1150                 eth_dev->device = dpdk_dev;
1151                 eth_dev->dev_ops = &mlx5_dev_sec_ops;
1152                 err = mlx5_proc_priv_init(eth_dev);
1153                 if (err)
1154                         return NULL;
1155                 /* Receive command fd from primary process */
1156                 err = mlx5_mp_req_verbs_cmd_fd(eth_dev);
1157                 if (err < 0)
1158                         return NULL;
1159                 /* Remap UAR for Tx queues. */
1160                 err = mlx5_tx_uar_init_secondary(eth_dev, err);
1161                 if (err)
1162                         return NULL;
1163                 /*
1164                  * Ethdev pointer is still required as input since
1165                  * the primary device is not accessible from the
1166                  * secondary process.
1167                  */
1168                 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
1169                 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
1170                 return eth_dev;
1171         }
1172         sh = mlx5_alloc_shared_ibctx(spawn);
1173         if (!sh)
1174                 return NULL;
1175         config.devx = sh->devx;
1176 #ifdef HAVE_IBV_MLX5_MOD_SWP
1177         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
1178 #endif
1179         /*
1180          * Multi-packet send is supported by ConnectX-4 Lx PF as well
1181          * as all ConnectX-5 devices.
1182          */
1183 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1184         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
1185 #endif
1186 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
1187         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
1188 #endif
1189         mlx5_glue->dv_query_device(sh->ctx, &dv_attr);
1190         if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
1191                 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
1192                         DRV_LOG(DEBUG, "enhanced MPW is supported");
1193                         mps = MLX5_MPW_ENHANCED;
1194                 } else {
1195                         DRV_LOG(DEBUG, "MPW is supported");
1196                         mps = MLX5_MPW;
1197                 }
1198         } else {
1199                 DRV_LOG(DEBUG, "MPW isn't supported");
1200                 mps = MLX5_MPW_DISABLED;
1201         }
1202 #ifdef HAVE_IBV_MLX5_MOD_SWP
1203         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
1204                 swp = dv_attr.sw_parsing_caps.sw_parsing_offloads;
1205         DRV_LOG(DEBUG, "SWP support: %u", swp);
1206 #endif
1207         config.swp = !!swp;
1208 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
1209         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
1210                 struct mlx5dv_striding_rq_caps mprq_caps =
1211                         dv_attr.striding_rq_caps;
1212
1213                 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d",
1214                         mprq_caps.min_single_stride_log_num_of_bytes);
1215                 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d",
1216                         mprq_caps.max_single_stride_log_num_of_bytes);
1217                 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d",
1218                         mprq_caps.min_single_wqe_log_num_of_strides);
1219                 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d",
1220                         mprq_caps.max_single_wqe_log_num_of_strides);
1221                 DRV_LOG(DEBUG, "\tsupported_qpts: %d",
1222                         mprq_caps.supported_qpts);
1223                 DRV_LOG(DEBUG, "device supports Multi-Packet RQ");
1224                 mprq = 1;
1225                 mprq_min_stride_size_n =
1226                         mprq_caps.min_single_stride_log_num_of_bytes;
1227                 mprq_max_stride_size_n =
1228                         mprq_caps.max_single_stride_log_num_of_bytes;
1229                 mprq_min_stride_num_n =
1230                         mprq_caps.min_single_wqe_log_num_of_strides;
1231                 mprq_max_stride_num_n =
1232                         mprq_caps.max_single_wqe_log_num_of_strides;
1233                 config.mprq.stride_num_n = RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1234                                                    mprq_min_stride_num_n);
1235         }
1236 #endif
1237         if (RTE_CACHE_LINE_SIZE == 128 &&
1238             !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP))
1239                 cqe_comp = 0;
1240         else
1241                 cqe_comp = 1;
1242         config.cqe_comp = cqe_comp;
1243 #ifdef HAVE_IBV_MLX5_MOD_CQE_128B_PAD
1244         /* Whether device supports 128B Rx CQE padding. */
1245         cqe_pad = RTE_CACHE_LINE_SIZE == 128 &&
1246                   (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_PAD);
1247 #endif
1248 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1249         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
1250                 tunnel_en = ((dv_attr.tunnel_offloads_caps &
1251                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN) &&
1252                              (dv_attr.tunnel_offloads_caps &
1253                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE));
1254         }
1255         DRV_LOG(DEBUG, "tunnel offloading is %ssupported",
1256                 tunnel_en ? "" : "not ");
1257 #else
1258         DRV_LOG(WARNING,
1259                 "tunnel offloading disabled due to old OFED/rdma-core version");
1260 #endif
1261         config.tunnel_en = tunnel_en;
1262 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
1263         mpls_en = ((dv_attr.tunnel_offloads_caps &
1264                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
1265                    (dv_attr.tunnel_offloads_caps &
1266                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
1267         DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported",
1268                 mpls_en ? "" : "not ");
1269 #else
1270         DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to"
1271                 " old OFED/rdma-core version or firmware configuration");
1272 #endif
1273         config.mpls_en = mpls_en;
1274         /* Check port status. */
1275         err = mlx5_glue->query_port(sh->ctx, spawn->ibv_port, &port_attr);
1276         if (err) {
1277                 DRV_LOG(ERR, "port query failed: %s", strerror(err));
1278                 goto error;
1279         }
1280         if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
1281                 DRV_LOG(ERR, "port is not configured in Ethernet mode");
1282                 err = EINVAL;
1283                 goto error;
1284         }
1285         if (port_attr.state != IBV_PORT_ACTIVE)
1286                 DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)",
1287                         mlx5_glue->port_state_str(port_attr.state),
1288                         port_attr.state);
1289         /* Allocate private eth device data. */
1290         priv = rte_zmalloc("ethdev private structure",
1291                            sizeof(*priv),
1292                            RTE_CACHE_LINE_SIZE);
1293         if (priv == NULL) {
1294                 DRV_LOG(ERR, "priv allocation failure");
1295                 err = ENOMEM;
1296                 goto error;
1297         }
1298         priv->sh = sh;
1299         priv->ibv_port = spawn->ibv_port;
1300         priv->mtu = RTE_ETHER_MTU;
1301 #ifndef RTE_ARCH_64
1302         /* Initialize UAR access locks for 32bit implementations. */
1303         rte_spinlock_init(&priv->uar_lock_cq);
1304         for (i = 0; i < MLX5_UAR_PAGE_NUM_MAX; i++)
1305                 rte_spinlock_init(&priv->uar_lock[i]);
1306 #endif
1307         /* Some internal functions rely on Netlink sockets, open them now. */
1308         priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA);
1309         priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE);
1310         priv->nl_sn = 0;
1311         priv->representor = !!switch_info->representor;
1312         priv->master = !!switch_info->master;
1313         priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
1314         /*
1315          * Currently we support single E-Switch per PF configurations
1316          * only and vport_id field contains the vport index for
1317          * associated VF, which is deduced from representor port name.
1318          * For example, let's have the IB device port 10, it has
1319          * attached network device eth0, which has port name attribute
1320          * pf0vf2, we can deduce the VF number as 2, and set vport index
1321          * as 3 (2+1). This assigning schema should be changed if the
1322          * multiple E-Switch instances per PF configurations or/and PCI
1323          * subfunctions are added.
1324          */
1325         priv->vport_id = switch_info->representor ?
1326                          switch_info->port_name + 1 : -1;
1327         /* representor_id field keeps the unmodified port/VF index. */
1328         priv->representor_id = switch_info->representor ?
1329                                switch_info->port_name : -1;
1330         /*
1331          * Look for sibling devices in order to reuse their switch domain
1332          * if any, otherwise allocate one.
1333          */
1334         RTE_ETH_FOREACH_DEV_OF(port_id, dpdk_dev) {
1335                 const struct mlx5_priv *opriv =
1336                         rte_eth_devices[port_id].data->dev_private;
1337
1338                 if (!opriv ||
1339                         opriv->domain_id ==
1340                         RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
1341                         continue;
1342                 priv->domain_id = opriv->domain_id;
1343                 break;
1344         }
1345         if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
1346                 err = rte_eth_switch_domain_alloc(&priv->domain_id);
1347                 if (err) {
1348                         err = rte_errno;
1349                         DRV_LOG(ERR, "unable to allocate switch domain: %s",
1350                                 strerror(rte_errno));
1351                         goto error;
1352                 }
1353                 own_domain_id = 1;
1354         }
1355         err = mlx5_args(&config, dpdk_dev->devargs);
1356         if (err) {
1357                 err = rte_errno;
1358                 DRV_LOG(ERR, "failed to process device arguments: %s",
1359                         strerror(rte_errno));
1360                 goto error;
1361         }
1362         config.hw_csum = !!(sh->device_attr.device_cap_flags_ex &
1363                             IBV_DEVICE_RAW_IP_CSUM);
1364         DRV_LOG(DEBUG, "checksum offloading is %ssupported",
1365                 (config.hw_csum ? "" : "not "));
1366 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
1367         !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
1368         DRV_LOG(DEBUG, "counters are not supported");
1369 #endif
1370 #ifndef HAVE_IBV_FLOW_DV_SUPPORT
1371         if (config.dv_flow_en) {
1372                 DRV_LOG(WARNING, "DV flow is not supported");
1373                 config.dv_flow_en = 0;
1374         }
1375 #endif
1376         config.ind_table_max_size =
1377                 sh->device_attr.rss_caps.max_rwq_indirection_table_size;
1378         /*
1379          * Remove this check once DPDK supports larger/variable
1380          * indirection tables.
1381          */
1382         if (config.ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512)
1383                 config.ind_table_max_size = ETH_RSS_RETA_SIZE_512;
1384         DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
1385                 config.ind_table_max_size);
1386         config.hw_vlan_strip = !!(sh->device_attr.raw_packet_caps &
1387                                   IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
1388         DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
1389                 (config.hw_vlan_strip ? "" : "not "));
1390         config.hw_fcs_strip = !!(sh->device_attr.raw_packet_caps &
1391                                  IBV_RAW_PACKET_CAP_SCATTER_FCS);
1392         DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
1393                 (config.hw_fcs_strip ? "" : "not "));
1394 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
1395         hw_padding = !!sh->device_attr.rx_pad_end_addr_align;
1396 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
1397         hw_padding = !!(sh->device_attr.device_cap_flags_ex &
1398                         IBV_DEVICE_PCI_WRITE_END_PADDING);
1399 #endif
1400         if (config.hw_padding && !hw_padding) {
1401                 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
1402                 config.hw_padding = 0;
1403         } else if (config.hw_padding) {
1404                 DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
1405         }
1406         config.tso = (sh->device_attr.tso_caps.max_tso > 0 &&
1407                       (sh->device_attr.tso_caps.supported_qpts &
1408                        (1 << IBV_QPT_RAW_PACKET)));
1409         if (config.tso)
1410                 config.tso_max_payload_sz = sh->device_attr.tso_caps.max_tso;
1411         /*
1412          * MPW is disabled by default, while the Enhanced MPW is enabled
1413          * by default.
1414          */
1415         if (config.mps == MLX5_ARG_UNSET)
1416                 config.mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED :
1417                                                           MLX5_MPW_DISABLED;
1418         else
1419                 config.mps = config.mps ? mps : MLX5_MPW_DISABLED;
1420         DRV_LOG(INFO, "%sMPS is %s",
1421                 config.mps == MLX5_MPW_ENHANCED ? "enhanced " : "",
1422                 config.mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
1423         if (config.cqe_comp && !cqe_comp) {
1424                 DRV_LOG(WARNING, "Rx CQE compression isn't supported");
1425                 config.cqe_comp = 0;
1426         }
1427         if (config.cqe_pad && !cqe_pad) {
1428                 DRV_LOG(WARNING, "Rx CQE padding isn't supported");
1429                 config.cqe_pad = 0;
1430         } else if (config.cqe_pad) {
1431                 DRV_LOG(INFO, "Rx CQE padding is enabled");
1432         }
1433         if (config.mprq.enabled && mprq) {
1434                 if (config.mprq.stride_num_n > mprq_max_stride_num_n ||
1435                     config.mprq.stride_num_n < mprq_min_stride_num_n) {
1436                         config.mprq.stride_num_n =
1437                                 RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1438                                         mprq_min_stride_num_n);
1439                         DRV_LOG(WARNING,
1440                                 "the number of strides"
1441                                 " for Multi-Packet RQ is out of range,"
1442                                 " setting default value (%u)",
1443                                 1 << config.mprq.stride_num_n);
1444                 }
1445                 config.mprq.min_stride_size_n = mprq_min_stride_size_n;
1446                 config.mprq.max_stride_size_n = mprq_max_stride_size_n;
1447         } else if (config.mprq.enabled && !mprq) {
1448                 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
1449                 config.mprq.enabled = 0;
1450         }
1451         if (config.max_dump_files_num == 0)
1452                 config.max_dump_files_num = 128;
1453         eth_dev = rte_eth_dev_allocate(name);
1454         if (eth_dev == NULL) {
1455                 DRV_LOG(ERR, "can not allocate rte ethdev");
1456                 err = ENOMEM;
1457                 goto error;
1458         }
1459         /* Flag to call rte_eth_dev_release_port() in rte_eth_dev_close(). */
1460         eth_dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE;
1461         if (priv->representor) {
1462                 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
1463                 eth_dev->data->representor_id = priv->representor_id;
1464         }
1465         eth_dev->data->dev_private = priv;
1466         priv->dev_data = eth_dev->data;
1467         eth_dev->data->mac_addrs = priv->mac;
1468         eth_dev->device = dpdk_dev;
1469         /* Configure the first MAC address by default. */
1470         if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
1471                 DRV_LOG(ERR,
1472                         "port %u cannot get MAC address, is mlx5_en"
1473                         " loaded? (errno: %s)",
1474                         eth_dev->data->port_id, strerror(rte_errno));
1475                 err = ENODEV;
1476                 goto error;
1477         }
1478         DRV_LOG(INFO,
1479                 "port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
1480                 eth_dev->data->port_id,
1481                 mac.addr_bytes[0], mac.addr_bytes[1],
1482                 mac.addr_bytes[2], mac.addr_bytes[3],
1483                 mac.addr_bytes[4], mac.addr_bytes[5]);
1484 #ifndef NDEBUG
1485         {
1486                 char ifname[IF_NAMESIZE];
1487
1488                 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
1489                         DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
1490                                 eth_dev->data->port_id, ifname);
1491                 else
1492                         DRV_LOG(DEBUG, "port %u ifname is unknown",
1493                                 eth_dev->data->port_id);
1494         }
1495 #endif
1496         /* Get actual MTU if possible. */
1497         err = mlx5_get_mtu(eth_dev, &priv->mtu);
1498         if (err) {
1499                 err = rte_errno;
1500                 goto error;
1501         }
1502         DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
1503                 priv->mtu);
1504         /* Initialize burst functions to prevent crashes before link-up. */
1505         eth_dev->rx_pkt_burst = removed_rx_burst;
1506         eth_dev->tx_pkt_burst = removed_tx_burst;
1507         eth_dev->dev_ops = &mlx5_dev_ops;
1508         /* Register MAC address. */
1509         claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
1510         if (config.vf && config.vf_nl_en)
1511                 mlx5_nl_mac_addr_sync(eth_dev);
1512         priv->tcf_context = mlx5_flow_tcf_context_create();
1513         if (!priv->tcf_context) {
1514                 err = -rte_errno;
1515                 DRV_LOG(WARNING,
1516                         "flow rules relying on switch offloads will not be"
1517                         " supported: cannot open libmnl socket: %s",
1518                         strerror(rte_errno));
1519         } else {
1520                 struct rte_flow_error error;
1521                 unsigned int ifindex = mlx5_ifindex(eth_dev);
1522
1523                 if (!ifindex) {
1524                         err = -rte_errno;
1525                         error.message =
1526                                 "cannot retrieve network interface index";
1527                 } else {
1528                         err = mlx5_flow_tcf_init(priv->tcf_context,
1529                                                  ifindex, &error);
1530                 }
1531                 if (err) {
1532                         DRV_LOG(WARNING,
1533                                 "flow rules relying on switch offloads will"
1534                                 " not be supported: %s: %s",
1535                                 error.message, strerror(rte_errno));
1536                         mlx5_flow_tcf_context_destroy(priv->tcf_context);
1537                         priv->tcf_context = NULL;
1538                 }
1539         }
1540         TAILQ_INIT(&priv->flows);
1541         TAILQ_INIT(&priv->ctrl_flows);
1542         /* Hint libmlx5 to use PMD allocator for data plane resources */
1543         struct mlx5dv_ctx_allocators alctr = {
1544                 .alloc = &mlx5_alloc_verbs_buf,
1545                 .free = &mlx5_free_verbs_buf,
1546                 .data = priv,
1547         };
1548         mlx5_glue->dv_set_context_attr(sh->ctx,
1549                                        MLX5DV_CTX_ATTR_BUF_ALLOCATORS,
1550                                        (void *)((uintptr_t)&alctr));
1551         /* Bring Ethernet device up. */
1552         DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
1553                 eth_dev->data->port_id);
1554         mlx5_set_link_up(eth_dev);
1555         /*
1556          * Even though the interrupt handler is not installed yet,
1557          * interrupts will still trigger on the async_fd from
1558          * Verbs context returned by ibv_open_device().
1559          */
1560         mlx5_link_update(eth_dev, 0);
1561 #ifdef HAVE_IBV_DEVX_OBJ
1562         if (config.devx) {
1563                 err = mlx5_devx_cmd_query_hca_attr(sh->ctx, &config.hca_attr);
1564                 if (err) {
1565                         err = -err;
1566                         goto error;
1567                 }
1568         }
1569 #endif
1570 #ifdef HAVE_MLX5DV_DR_ESWITCH
1571         if (!(config.hca_attr.eswitch_manager && config.dv_flow_en &&
1572               (switch_info->representor || switch_info->master)))
1573                 config.dv_esw_en = 0;
1574 #else
1575         config.dv_esw_en = 0;
1576 #endif
1577         /* Store device configuration on private structure. */
1578         priv->config = config;
1579         if (config.dv_flow_en) {
1580                 err = mlx5_alloc_shared_dr(priv);
1581                 if (err)
1582                         goto error;
1583         }
1584         /* Supported Verbs flow priority number detection. */
1585         err = mlx5_flow_discover_priorities(eth_dev);
1586         if (err < 0) {
1587                 err = -err;
1588                 goto error;
1589         }
1590         priv->config.flow_prio = err;
1591         /* Add device to memory callback list. */
1592         rte_rwlock_write_lock(&mlx5_shared_data->mem_event_rwlock);
1593         LIST_INSERT_HEAD(&mlx5_shared_data->mem_event_cb_list,
1594                          sh, mem_event_cb);
1595         rte_rwlock_write_unlock(&mlx5_shared_data->mem_event_rwlock);
1596         return eth_dev;
1597 error:
1598         if (priv) {
1599                 if (priv->sh)
1600                         mlx5_free_shared_dr(priv);
1601                 if (priv->nl_socket_route >= 0)
1602                         close(priv->nl_socket_route);
1603                 if (priv->nl_socket_rdma >= 0)
1604                         close(priv->nl_socket_rdma);
1605                 if (priv->tcf_context)
1606                         mlx5_flow_tcf_context_destroy(priv->tcf_context);
1607                 if (own_domain_id)
1608                         claim_zero(rte_eth_switch_domain_free(priv->domain_id));
1609                 rte_free(priv);
1610                 if (eth_dev != NULL)
1611                         eth_dev->data->dev_private = NULL;
1612         }
1613         if (eth_dev != NULL) {
1614                 /* mac_addrs must not be freed alone because part of dev_private */
1615                 eth_dev->data->mac_addrs = NULL;
1616                 rte_eth_dev_release_port(eth_dev);
1617         }
1618         if (sh)
1619                 mlx5_free_shared_ibctx(sh);
1620         assert(err > 0);
1621         rte_errno = err;
1622         return NULL;
1623 }
1624
1625 /**
1626  * Comparison callback to sort device data.
1627  *
1628  * This is meant to be used with qsort().
1629  *
1630  * @param a[in]
1631  *   Pointer to pointer to first data object.
1632  * @param b[in]
1633  *   Pointer to pointer to second data object.
1634  *
1635  * @return
1636  *   0 if both objects are equal, less than 0 if the first argument is less
1637  *   than the second, greater than 0 otherwise.
1638  */
1639 static int
1640 mlx5_dev_spawn_data_cmp(const void *a, const void *b)
1641 {
1642         const struct mlx5_switch_info *si_a =
1643                 &((const struct mlx5_dev_spawn_data *)a)->info;
1644         const struct mlx5_switch_info *si_b =
1645                 &((const struct mlx5_dev_spawn_data *)b)->info;
1646         int ret;
1647
1648         /* Master device first. */
1649         ret = si_b->master - si_a->master;
1650         if (ret)
1651                 return ret;
1652         /* Then representor devices. */
1653         ret = si_b->representor - si_a->representor;
1654         if (ret)
1655                 return ret;
1656         /* Unidentified devices come last in no specific order. */
1657         if (!si_a->representor)
1658                 return 0;
1659         /* Order representors by name. */
1660         return si_a->port_name - si_b->port_name;
1661 }
1662
1663 /**
1664  * DPDK callback to register a PCI device.
1665  *
1666  * This function spawns Ethernet devices out of a given PCI device.
1667  *
1668  * @param[in] pci_drv
1669  *   PCI driver structure (mlx5_driver).
1670  * @param[in] pci_dev
1671  *   PCI device information.
1672  *
1673  * @return
1674  *   0 on success, a negative errno value otherwise and rte_errno is set.
1675  */
1676 static int
1677 mlx5_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
1678                struct rte_pci_device *pci_dev)
1679 {
1680         struct ibv_device **ibv_list;
1681         /*
1682          * Number of found IB Devices matching with requested PCI BDF.
1683          * nd != 1 means there are multiple IB devices over the same
1684          * PCI device and we have representors and master.
1685          */
1686         unsigned int nd = 0;
1687         /*
1688          * Number of found IB device Ports. nd = 1 and np = 1..n means
1689          * we have the single multiport IB device, and there may be
1690          * representors attached to some of found ports.
1691          */
1692         unsigned int np = 0;
1693         /*
1694          * Number of DPDK ethernet devices to Spawn - either over
1695          * multiple IB devices or multiple ports of single IB device.
1696          * Actually this is the number of iterations to spawn.
1697          */
1698         unsigned int ns = 0;
1699         struct mlx5_dev_config dev_config;
1700         int ret;
1701
1702         ret = mlx5_init_once();
1703         if (ret) {
1704                 DRV_LOG(ERR, "unable to init PMD global data: %s",
1705                         strerror(rte_errno));
1706                 return -rte_errno;
1707         }
1708         assert(pci_drv == &mlx5_driver);
1709         errno = 0;
1710         ibv_list = mlx5_glue->get_device_list(&ret);
1711         if (!ibv_list) {
1712                 rte_errno = errno ? errno : ENOSYS;
1713                 DRV_LOG(ERR, "cannot list devices, is ib_uverbs loaded?");
1714                 return -rte_errno;
1715         }
1716         /*
1717          * First scan the list of all Infiniband devices to find
1718          * matching ones, gathering into the list.
1719          */
1720         struct ibv_device *ibv_match[ret + 1];
1721         int nl_route = -1;
1722         int nl_rdma = -1;
1723         unsigned int i;
1724
1725         while (ret-- > 0) {
1726                 struct rte_pci_addr pci_addr;
1727
1728                 DRV_LOG(DEBUG, "checking device \"%s\"", ibv_list[ret]->name);
1729                 if (mlx5_ibv_device_to_pci_addr(ibv_list[ret], &pci_addr))
1730                         continue;
1731                 if (pci_dev->addr.domain != pci_addr.domain ||
1732                     pci_dev->addr.bus != pci_addr.bus ||
1733                     pci_dev->addr.devid != pci_addr.devid ||
1734                     pci_dev->addr.function != pci_addr.function)
1735                         continue;
1736                 DRV_LOG(INFO, "PCI information matches for device \"%s\"",
1737                         ibv_list[ret]->name);
1738                 ibv_match[nd++] = ibv_list[ret];
1739         }
1740         ibv_match[nd] = NULL;
1741         if (!nd) {
1742                 /* No device matches, just complain and bail out. */
1743                 mlx5_glue->free_device_list(ibv_list);
1744                 DRV_LOG(WARNING,
1745                         "no Verbs device matches PCI device " PCI_PRI_FMT ","
1746                         " are kernel drivers loaded?",
1747                         pci_dev->addr.domain, pci_dev->addr.bus,
1748                         pci_dev->addr.devid, pci_dev->addr.function);
1749                 rte_errno = ENOENT;
1750                 ret = -rte_errno;
1751                 return ret;
1752         }
1753         nl_route = mlx5_nl_init(NETLINK_ROUTE);
1754         nl_rdma = mlx5_nl_init(NETLINK_RDMA);
1755         if (nd == 1) {
1756                 /*
1757                  * Found single matching device may have multiple ports.
1758                  * Each port may be representor, we have to check the port
1759                  * number and check the representors existence.
1760                  */
1761                 if (nl_rdma >= 0)
1762                         np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
1763                 if (!np)
1764                         DRV_LOG(WARNING, "can not get IB device \"%s\""
1765                                          " ports number", ibv_match[0]->name);
1766         }
1767         /*
1768          * Now we can determine the maximal
1769          * amount of devices to be spawned.
1770          */
1771         struct mlx5_dev_spawn_data list[np ? np : nd];
1772
1773         if (np > 1) {
1774                 /*
1775                  * Single IB device with multiple ports found,
1776                  * it may be E-Switch master device and representors.
1777                  * We have to perform identification trough the ports.
1778                  */
1779                 assert(nl_rdma >= 0);
1780                 assert(ns == 0);
1781                 assert(nd == 1);
1782                 for (i = 1; i <= np; ++i) {
1783                         list[ns].max_port = np;
1784                         list[ns].ibv_port = i;
1785                         list[ns].ibv_dev = ibv_match[0];
1786                         list[ns].eth_dev = NULL;
1787                         list[ns].pci_dev = pci_dev;
1788                         list[ns].ifindex = mlx5_nl_ifindex
1789                                         (nl_rdma, list[ns].ibv_dev->name, i);
1790                         if (!list[ns].ifindex) {
1791                                 /*
1792                                  * No network interface index found for the
1793                                  * specified port, it means there is no
1794                                  * representor on this port. It's OK,
1795                                  * there can be disabled ports, for example
1796                                  * if sriov_numvfs < sriov_totalvfs.
1797                                  */
1798                                 continue;
1799                         }
1800                         ret = -1;
1801                         if (nl_route >= 0)
1802                                 ret = mlx5_nl_switch_info
1803                                                (nl_route,
1804                                                 list[ns].ifindex,
1805                                                 &list[ns].info);
1806                         if (ret || (!list[ns].info.representor &&
1807                                     !list[ns].info.master)) {
1808                                 /*
1809                                  * We failed to recognize representors with
1810                                  * Netlink, let's try to perform the task
1811                                  * with sysfs.
1812                                  */
1813                                 ret =  mlx5_sysfs_switch_info
1814                                                 (list[ns].ifindex,
1815                                                  &list[ns].info);
1816                         }
1817                         if (!ret && (list[ns].info.representor ^
1818                                      list[ns].info.master))
1819                                 ns++;
1820                 }
1821                 if (!ns) {
1822                         DRV_LOG(ERR,
1823                                 "unable to recognize master/representors"
1824                                 " on the IB device with multiple ports");
1825                         rte_errno = ENOENT;
1826                         ret = -rte_errno;
1827                         goto exit;
1828                 }
1829         } else {
1830                 /*
1831                  * The existence of several matching entries (nd > 1) means
1832                  * port representors have been instantiated. No existing Verbs
1833                  * call nor sysfs entries can tell them apart, this can only
1834                  * be done through Netlink calls assuming kernel drivers are
1835                  * recent enough to support them.
1836                  *
1837                  * In the event of identification failure through Netlink,
1838                  * try again through sysfs, then:
1839                  *
1840                  * 1. A single IB device matches (nd == 1) with single
1841                  *    port (np=0/1) and is not a representor, assume
1842                  *    no switch support.
1843                  *
1844                  * 2. Otherwise no safe assumptions can be made;
1845                  *    complain louder and bail out.
1846                  */
1847                 np = 1;
1848                 for (i = 0; i != nd; ++i) {
1849                         memset(&list[ns].info, 0, sizeof(list[ns].info));
1850                         list[ns].max_port = 1;
1851                         list[ns].ibv_port = 1;
1852                         list[ns].ibv_dev = ibv_match[i];
1853                         list[ns].eth_dev = NULL;
1854                         list[ns].pci_dev = pci_dev;
1855                         list[ns].ifindex = 0;
1856                         if (nl_rdma >= 0)
1857                                 list[ns].ifindex = mlx5_nl_ifindex
1858                                         (nl_rdma, list[ns].ibv_dev->name, 1);
1859                         if (!list[ns].ifindex) {
1860                                 char ifname[IF_NAMESIZE];
1861
1862                                 /*
1863                                  * Netlink failed, it may happen with old
1864                                  * ib_core kernel driver (before 4.16).
1865                                  * We can assume there is old driver because
1866                                  * here we are processing single ports IB
1867                                  * devices. Let's try sysfs to retrieve
1868                                  * the ifindex. The method works for
1869                                  * master device only.
1870                                  */
1871                                 if (nd > 1) {
1872                                         /*
1873                                          * Multiple devices found, assume
1874                                          * representors, can not distinguish
1875                                          * master/representor and retrieve
1876                                          * ifindex via sysfs.
1877                                          */
1878                                         continue;
1879                                 }
1880                                 ret = mlx5_get_master_ifname
1881                                         (ibv_match[i]->ibdev_path, &ifname);
1882                                 if (!ret)
1883                                         list[ns].ifindex =
1884                                                 if_nametoindex(ifname);
1885                                 if (!list[ns].ifindex) {
1886                                         /*
1887                                          * No network interface index found
1888                                          * for the specified device, it means
1889                                          * there it is neither representor
1890                                          * nor master.
1891                                          */
1892                                         continue;
1893                                 }
1894                         }
1895                         ret = -1;
1896                         if (nl_route >= 0)
1897                                 ret = mlx5_nl_switch_info
1898                                                (nl_route,
1899                                                 list[ns].ifindex,
1900                                                 &list[ns].info);
1901                         if (ret || (!list[ns].info.representor &&
1902                                     !list[ns].info.master)) {
1903                                 /*
1904                                  * We failed to recognize representors with
1905                                  * Netlink, let's try to perform the task
1906                                  * with sysfs.
1907                                  */
1908                                 ret =  mlx5_sysfs_switch_info
1909                                                 (list[ns].ifindex,
1910                                                  &list[ns].info);
1911                         }
1912                         if (!ret && (list[ns].info.representor ^
1913                                      list[ns].info.master)) {
1914                                 ns++;
1915                         } else if ((nd == 1) &&
1916                                    !list[ns].info.representor &&
1917                                    !list[ns].info.master) {
1918                                 /*
1919                                  * Single IB device with
1920                                  * one physical port and
1921                                  * attached network device.
1922                                  * May be SRIOV is not enabled
1923                                  * or there is no representors.
1924                                  */
1925                                 DRV_LOG(INFO, "no E-Switch support detected");
1926                                 ns++;
1927                                 break;
1928                         }
1929                 }
1930                 if (!ns) {
1931                         DRV_LOG(ERR,
1932                                 "unable to recognize master/representors"
1933                                 " on the multiple IB devices");
1934                         rte_errno = ENOENT;
1935                         ret = -rte_errno;
1936                         goto exit;
1937                 }
1938         }
1939         assert(ns);
1940         /*
1941          * Sort list to probe devices in natural order for users convenience
1942          * (i.e. master first, then representors from lowest to highest ID).
1943          */
1944         qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
1945         /* Default configuration. */
1946         dev_config = (struct mlx5_dev_config){
1947                 .hw_padding = 0,
1948                 .mps = MLX5_ARG_UNSET,
1949                 .tx_vec_en = 1,
1950                 .rx_vec_en = 1,
1951                 .txq_inline = MLX5_ARG_UNSET,
1952                 .txqs_inline = MLX5_ARG_UNSET,
1953                 .txqs_vec = MLX5_ARG_UNSET,
1954                 .inline_max_packet_sz = MLX5_ARG_UNSET,
1955                 .vf_nl_en = 1,
1956                 .mr_ext_memseg_en = 1,
1957                 .mprq = {
1958                         .enabled = 0, /* Disabled by default. */
1959                         .stride_num_n = MLX5_MPRQ_STRIDE_NUM_N,
1960                         .max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN,
1961                         .min_rxqs_num = MLX5_MPRQ_MIN_RXQS,
1962                 },
1963                 .dv_esw_en = 1,
1964         };
1965         /* Device specific configuration. */
1966         switch (pci_dev->id.device_id) {
1967         case PCI_DEVICE_ID_MELLANOX_CONNECTX5BF:
1968                 dev_config.txqs_vec = MLX5_VPMD_MAX_TXQS_BLUEFIELD;
1969                 break;
1970         case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
1971         case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
1972         case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
1973         case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
1974                 dev_config.vf = 1;
1975                 break;
1976         default:
1977                 break;
1978         }
1979         /* Set architecture-dependent default value if unset. */
1980         if (dev_config.txqs_vec == MLX5_ARG_UNSET)
1981                 dev_config.txqs_vec = MLX5_VPMD_MAX_TXQS;
1982         for (i = 0; i != ns; ++i) {
1983                 uint32_t restore;
1984
1985                 list[i].eth_dev = mlx5_dev_spawn(&pci_dev->device,
1986                                                  &list[i],
1987                                                  dev_config);
1988                 if (!list[i].eth_dev) {
1989                         if (rte_errno != EBUSY && rte_errno != EEXIST)
1990                                 break;
1991                         /* Device is disabled or already spawned. Ignore it. */
1992                         continue;
1993                 }
1994                 restore = list[i].eth_dev->data->dev_flags;
1995                 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
1996                 /* Restore non-PCI flags cleared by the above call. */
1997                 list[i].eth_dev->data->dev_flags |= restore;
1998                 rte_eth_dev_probing_finish(list[i].eth_dev);
1999         }
2000         if (i != ns) {
2001                 DRV_LOG(ERR,
2002                         "probe of PCI device " PCI_PRI_FMT " aborted after"
2003                         " encountering an error: %s",
2004                         pci_dev->addr.domain, pci_dev->addr.bus,
2005                         pci_dev->addr.devid, pci_dev->addr.function,
2006                         strerror(rte_errno));
2007                 ret = -rte_errno;
2008                 /* Roll back. */
2009                 while (i--) {
2010                         if (!list[i].eth_dev)
2011                                 continue;
2012                         mlx5_dev_close(list[i].eth_dev);
2013                         /* mac_addrs must not be freed because in dev_private */
2014                         list[i].eth_dev->data->mac_addrs = NULL;
2015                         claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
2016                 }
2017                 /* Restore original error. */
2018                 rte_errno = -ret;
2019         } else {
2020                 ret = 0;
2021         }
2022 exit:
2023         /*
2024          * Do the routine cleanup:
2025          * - close opened Netlink sockets
2026          * - free the Infiniband device list
2027          */
2028         if (nl_rdma >= 0)
2029                 close(nl_rdma);
2030         if (nl_route >= 0)
2031                 close(nl_route);
2032         assert(ibv_list);
2033         mlx5_glue->free_device_list(ibv_list);
2034         return ret;
2035 }
2036
2037 /**
2038  * DPDK callback to remove a PCI device.
2039  *
2040  * This function removes all Ethernet devices belong to a given PCI device.
2041  *
2042  * @param[in] pci_dev
2043  *   Pointer to the PCI device.
2044  *
2045  * @return
2046  *   0 on success, the function cannot fail.
2047  */
2048 static int
2049 mlx5_pci_remove(struct rte_pci_device *pci_dev)
2050 {
2051         uint16_t port_id;
2052
2053         RTE_ETH_FOREACH_DEV_OF(port_id, &pci_dev->device)
2054                 rte_eth_dev_close(port_id);
2055         return 0;
2056 }
2057
2058 static const struct rte_pci_id mlx5_pci_id_map[] = {
2059         {
2060                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2061                                PCI_DEVICE_ID_MELLANOX_CONNECTX4)
2062         },
2063         {
2064                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2065                                PCI_DEVICE_ID_MELLANOX_CONNECTX4VF)
2066         },
2067         {
2068                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2069                                PCI_DEVICE_ID_MELLANOX_CONNECTX4LX)
2070         },
2071         {
2072                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2073                                PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF)
2074         },
2075         {
2076                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2077                                PCI_DEVICE_ID_MELLANOX_CONNECTX5)
2078         },
2079         {
2080                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2081                                PCI_DEVICE_ID_MELLANOX_CONNECTX5VF)
2082         },
2083         {
2084                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2085                                PCI_DEVICE_ID_MELLANOX_CONNECTX5EX)
2086         },
2087         {
2088                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2089                                PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF)
2090         },
2091         {
2092                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2093                                PCI_DEVICE_ID_MELLANOX_CONNECTX5BF)
2094         },
2095         {
2096                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2097                                PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF)
2098         },
2099         {
2100                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2101                                 PCI_DEVICE_ID_MELLANOX_CONNECTX6)
2102         },
2103         {
2104                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2105                                 PCI_DEVICE_ID_MELLANOX_CONNECTX6VF)
2106         },
2107         {
2108                 .vendor_id = 0
2109         }
2110 };
2111
2112 static struct rte_pci_driver mlx5_driver = {
2113         .driver = {
2114                 .name = MLX5_DRIVER_NAME
2115         },
2116         .id_table = mlx5_pci_id_map,
2117         .probe = mlx5_pci_probe,
2118         .remove = mlx5_pci_remove,
2119         .dma_map = mlx5_dma_map,
2120         .dma_unmap = mlx5_dma_unmap,
2121         .drv_flags = RTE_PCI_DRV_INTR_LSC | RTE_PCI_DRV_INTR_RMV |
2122                      RTE_PCI_DRV_PROBE_AGAIN | RTE_PCI_DRV_IOVA_AS_VA,
2123 };
2124
2125 #ifdef RTE_IBVERBS_LINK_DLOPEN
2126
2127 /**
2128  * Suffix RTE_EAL_PMD_PATH with "-glue".
2129  *
2130  * This function performs a sanity check on RTE_EAL_PMD_PATH before
2131  * suffixing its last component.
2132  *
2133  * @param buf[out]
2134  *   Output buffer, should be large enough otherwise NULL is returned.
2135  * @param size
2136  *   Size of @p out.
2137  *
2138  * @return
2139  *   Pointer to @p buf or @p NULL in case suffix cannot be appended.
2140  */
2141 static char *
2142 mlx5_glue_path(char *buf, size_t size)
2143 {
2144         static const char *const bad[] = { "/", ".", "..", NULL };
2145         const char *path = RTE_EAL_PMD_PATH;
2146         size_t len = strlen(path);
2147         size_t off;
2148         int i;
2149
2150         while (len && path[len - 1] == '/')
2151                 --len;
2152         for (off = len; off && path[off - 1] != '/'; --off)
2153                 ;
2154         for (i = 0; bad[i]; ++i)
2155                 if (!strncmp(path + off, bad[i], (int)(len - off)))
2156                         goto error;
2157         i = snprintf(buf, size, "%.*s-glue", (int)len, path);
2158         if (i == -1 || (size_t)i >= size)
2159                 goto error;
2160         return buf;
2161 error:
2162         DRV_LOG(ERR,
2163                 "unable to append \"-glue\" to last component of"
2164                 " RTE_EAL_PMD_PATH (\"" RTE_EAL_PMD_PATH "\"),"
2165                 " please re-configure DPDK");
2166         return NULL;
2167 }
2168
2169 /**
2170  * Initialization routine for run-time dependency on rdma-core.
2171  */
2172 static int
2173 mlx5_glue_init(void)
2174 {
2175         char glue_path[sizeof(RTE_EAL_PMD_PATH) - 1 + sizeof("-glue")];
2176         const char *path[] = {
2177                 /*
2178                  * A basic security check is necessary before trusting
2179                  * MLX5_GLUE_PATH, which may override RTE_EAL_PMD_PATH.
2180                  */
2181                 (geteuid() == getuid() && getegid() == getgid() ?
2182                  getenv("MLX5_GLUE_PATH") : NULL),
2183                 /*
2184                  * When RTE_EAL_PMD_PATH is set, use its glue-suffixed
2185                  * variant, otherwise let dlopen() look up libraries on its
2186                  * own.
2187                  */
2188                 (*RTE_EAL_PMD_PATH ?
2189                  mlx5_glue_path(glue_path, sizeof(glue_path)) : ""),
2190         };
2191         unsigned int i = 0;
2192         void *handle = NULL;
2193         void **sym;
2194         const char *dlmsg;
2195
2196         while (!handle && i != RTE_DIM(path)) {
2197                 const char *end;
2198                 size_t len;
2199                 int ret;
2200
2201                 if (!path[i]) {
2202                         ++i;
2203                         continue;
2204                 }
2205                 end = strpbrk(path[i], ":;");
2206                 if (!end)
2207                         end = path[i] + strlen(path[i]);
2208                 len = end - path[i];
2209                 ret = 0;
2210                 do {
2211                         char name[ret + 1];
2212
2213                         ret = snprintf(name, sizeof(name), "%.*s%s" MLX5_GLUE,
2214                                        (int)len, path[i],
2215                                        (!len || *(end - 1) == '/') ? "" : "/");
2216                         if (ret == -1)
2217                                 break;
2218                         if (sizeof(name) != (size_t)ret + 1)
2219                                 continue;
2220                         DRV_LOG(DEBUG, "looking for rdma-core glue as \"%s\"",
2221                                 name);
2222                         handle = dlopen(name, RTLD_LAZY);
2223                         break;
2224                 } while (1);
2225                 path[i] = end + 1;
2226                 if (!*end)
2227                         ++i;
2228         }
2229         if (!handle) {
2230                 rte_errno = EINVAL;
2231                 dlmsg = dlerror();
2232                 if (dlmsg)
2233                         DRV_LOG(WARNING, "cannot load glue library: %s", dlmsg);
2234                 goto glue_error;
2235         }
2236         sym = dlsym(handle, "mlx5_glue");
2237         if (!sym || !*sym) {
2238                 rte_errno = EINVAL;
2239                 dlmsg = dlerror();
2240                 if (dlmsg)
2241                         DRV_LOG(ERR, "cannot resolve glue symbol: %s", dlmsg);
2242                 goto glue_error;
2243         }
2244         mlx5_glue = *sym;
2245         return 0;
2246 glue_error:
2247         if (handle)
2248                 dlclose(handle);
2249         DRV_LOG(WARNING,
2250                 "cannot initialize PMD due to missing run-time dependency on"
2251                 " rdma-core libraries (libibverbs, libmlx5)");
2252         return -rte_errno;
2253 }
2254
2255 #endif
2256
2257 /**
2258  * Driver initialization routine.
2259  */
2260 RTE_INIT(rte_mlx5_pmd_init)
2261 {
2262         /* Initialize driver log type. */
2263         mlx5_logtype = rte_log_register("pmd.net.mlx5");
2264         if (mlx5_logtype >= 0)
2265                 rte_log_set_level(mlx5_logtype, RTE_LOG_NOTICE);
2266
2267         /* Build the static tables for Verbs conversion. */
2268         mlx5_set_ptype_table();
2269         mlx5_set_cksum_table();
2270         mlx5_set_swp_types_table();
2271         /*
2272          * RDMAV_HUGEPAGES_SAFE tells ibv_fork_init() we intend to use
2273          * huge pages. Calling ibv_fork_init() during init allows
2274          * applications to use fork() safely for purposes other than
2275          * using this PMD, which is not supported in forked processes.
2276          */
2277         setenv("RDMAV_HUGEPAGES_SAFE", "1", 1);
2278         /* Match the size of Rx completion entry to the size of a cacheline. */
2279         if (RTE_CACHE_LINE_SIZE == 128)
2280                 setenv("MLX5_CQE_SIZE", "128", 0);
2281         /*
2282          * MLX5_DEVICE_FATAL_CLEANUP tells ibv_destroy functions to
2283          * cleanup all the Verbs resources even when the device was removed.
2284          */
2285         setenv("MLX5_DEVICE_FATAL_CLEANUP", "1", 1);
2286 #ifdef RTE_IBVERBS_LINK_DLOPEN
2287         if (mlx5_glue_init())
2288                 return;
2289         assert(mlx5_glue);
2290 #endif
2291 #ifndef NDEBUG
2292         /* Glue structure must not contain any NULL pointers. */
2293         {
2294                 unsigned int i;
2295
2296                 for (i = 0; i != sizeof(*mlx5_glue) / sizeof(void *); ++i)
2297                         assert(((const void *const *)mlx5_glue)[i]);
2298         }
2299 #endif
2300         if (strcmp(mlx5_glue->version, MLX5_GLUE_VERSION)) {
2301                 DRV_LOG(ERR,
2302                         "rdma-core glue \"%s\" mismatch: \"%s\" is required",
2303                         mlx5_glue->version, MLX5_GLUE_VERSION);
2304                 return;
2305         }
2306         mlx5_glue->fork_init();
2307         rte_pci_register(&mlx5_driver);
2308 }
2309
2310 RTE_PMD_EXPORT_NAME(net_mlx5, __COUNTER__);
2311 RTE_PMD_REGISTER_PCI_TABLE(net_mlx5, mlx5_pci_id_map);
2312 RTE_PMD_REGISTER_KMOD_DEP(net_mlx5, "* ib_uverbs & mlx5_core & mlx5_ib");