static inline unsigned int axgbe_get_max_frame(struct axgbe_port *pdata)
{
return pdata->eth_dev->data->mtu + RTE_ETHER_HDR_LEN +
- RTE_ETHER_CRC_LEN + VLAN_HLEN;
+ RTE_ETHER_CRC_LEN + RTE_VLAN_HLEN;
}
/* query busy bit */
#include "rte_time.h"
#define IRQ 0xff
-#define VLAN_HLEN 4
#define AXGBE_TX_MAX_BUF_SIZE (0x3fff & ~(64 - 1))
#define AXGBE_RX_MAX_BUF_SIZE (0x3fff & ~(64 - 1))
-#define AXGBE_RX_MIN_BUF_SIZE (RTE_ETHER_MAX_LEN + VLAN_HLEN)
+#define AXGBE_RX_MIN_BUF_SIZE (RTE_ETHER_MAX_LEN + RTE_VLAN_HLEN)
#define AXGBE_MAX_MAC_ADDRS 32
#define AXGBE_MAX_HASH_MAC_ADDRS 256
if (valid_bitmap & (1 << MAC_ADDR_VALID) && memcmp(bull->mac, sc->old_bulletin.mac, ETH_ALEN))
rte_memcpy(&sc->link_params.mac_addr, bull->mac, ETH_ALEN);
if (valid_bitmap & (1 << VLAN_VALID))
- rte_memcpy(&bull->vlan, &sc->old_bulletin.vlan, VLAN_HLEN);
+ rte_memcpy(&bull->vlan, &sc->old_bulletin.vlan, RTE_VLAN_HLEN);
sc->old_bulletin = *bull;
#include "ecore_sp.h"
-#define VLAN_HLEN 4
-
struct vf_resource_query {
uint8_t num_rxqs;
uint8_t num_txqs;
((bp)->pdev->id.subsystem_device_id == BROADCOM_DEV_957508_N2100)
#define BNXT_MAX_MTU 9574
-#define VLAN_TAG_SIZE 4
#define BNXT_NUM_VLANS 2
#define BNXT_MAX_PKT_LEN (BNXT_MAX_MTU + RTE_ETHER_HDR_LEN +\
RTE_ETHER_CRC_LEN +\
- (BNXT_NUM_VLANS * VLAN_TAG_SIZE))
+ (BNXT_NUM_VLANS * RTE_VLAN_HLEN))
/* FW adds extra 4 bytes for FCS */
#define BNXT_VNIC_MRU(mtu)\
- ((mtu) + RTE_ETHER_HDR_LEN + VLAN_TAG_SIZE * BNXT_NUM_VLANS)
+ ((mtu) + RTE_ETHER_HDR_LEN + RTE_VLAN_HLEN * BNXT_NUM_VLANS)
#define BNXT_VF_RSV_NUM_RSS_CTX 1
#define BNXT_VF_RSV_NUM_L2_CTX 4
/* TODO: For now, do not support VMDq/RFS on VFs. */
HWRM_FUNC_CFG_INPUT_ENABLES_NUM_HW_RING_GRPS);
req->admin_mtu = rte_cpu_to_le_16(bp->eth_dev->data->mtu + RTE_ETHER_HDR_LEN +
- RTE_ETHER_CRC_LEN + VLAN_TAG_SIZE *
+ RTE_ETHER_CRC_LEN + RTE_VLAN_HLEN *
BNXT_NUM_VLANS);
req->mru = rte_cpu_to_le_16(BNXT_VNIC_MRU(bp->eth_dev->data->mtu));
req->num_rsscos_ctxs = rte_cpu_to_le_16(bp->max_rsscos_ctx /
#define CXGBE_ALIGN(x, a) (((x) + (a) - 1) & ~((a) - 1))
#define PTR_ALIGN(p, a) ((typeof(p))CXGBE_ALIGN((unsigned long)(p), (a)))
-#define VLAN_HLEN 4
#define ETHER_ADDR_LEN 6
#define rmb() rte_rmb() /* dpdk rte provided rmb */
{
struct sge *s = &adapter->sge;
- return CXGBE_ALIGN(s->pktshift + RTE_ETHER_HDR_LEN + VLAN_HLEN + mtu,
+ return CXGBE_ALIGN(s->pktshift + RTE_ETHER_HDR_LEN + RTE_VLAN_HLEN + mtu,
s->fl_align);
}
#define BD_LEN 49152
#define ENETFEC_TX_FR_SIZE 2048
#define ETH_HLEN RTE_ETHER_HDR_LEN
-#define VLAN_HLEN 4
/* full duplex */
#define FULL_DUPLEX 0x00
vlan_tag = rte_be_to_cpu_16(vlan_header->vlan_tci);
vlan_packet_rcvd = true;
- memmove((uint8_t *)mbuf_data + VLAN_HLEN,
+ memmove((uint8_t *)mbuf_data + RTE_VLAN_HLEN,
data, RTE_ETHER_ADDR_LEN * 2);
- rte_pktmbuf_adj(mbuf, VLAN_HLEN);
+ rte_pktmbuf_adj(mbuf, RTE_VLAN_HLEN);
}
if (rxq->fep->bufdesc_ex &&
RTE_MIN(((txq)->nb_desc - 2), (txq)->free_thresh)
#define FM10K_TX_RS_THRESH_DIV(txq) ((txq)->nb_desc)
-#define FM10K_VLAN_TAG_SIZE 4
-
/* Maximum number of MAC addresses per PF/VF */
#define FM10K_MAX_MACADDR_NUM 64
/* It adds dual VLAN length for supporting dual VLAN */
if ((dev->data->mtu + RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN +
- 2 * FM10K_VLAN_TAG_SIZE) > buf_size ||
+ 2 * RTE_VLAN_HLEN) > buf_size ||
rxq->offloads & RTE_ETH_RX_OFFLOAD_SCATTER) {
uint32_t reg;
dev->data->scattered_rx = 1;
#define HINIC_MAX_MTU_SIZE 9600
#define HINIC_MIN_MTU_SIZE 256
-#define HINIC_VLAN_TAG_SIZE 4
#define HINIC_ETH_OVERHEAD \
- (RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN + HINIC_VLAN_TAG_SIZE * 2)
+ (RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN + RTE_VLAN_HLEN * 2)
#define HINIC_MIN_FRAME_SIZE (HINIC_MIN_MTU_SIZE + HINIC_ETH_OVERHEAD)
#define HINIC_MAX_JUMBO_FRAME_SIZE (HINIC_MAX_MTU_SIZE + HINIC_ETH_OVERHEAD)
#define HNS3_MAX_NON_TSO_BD_PER_PKT 8
#define HNS3_MAX_TSO_BD_PER_PKT 63
#define HNS3_MAX_FRAME_LEN 9728
-#define HNS3_VLAN_TAG_SIZE 4
#define HNS3_DEFAULT_RX_BUF_LEN 2048
#define HNS3_MAX_BD_PAYLEN (1024 * 1024 - 1)
#define HNS3_MAX_TSO_HDR_SIZE 512
#define HNS3_MAX_LRO_SIZE 64512
#define HNS3_ETH_OVERHEAD \
- (RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN + HNS3_VLAN_TAG_SIZE * 2)
+ (RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN + RTE_VLAN_HLEN * 2)
#define HNS3_PKTLEN_TO_MTU(pktlen) ((pktlen) - HNS3_ETH_OVERHEAD)
#define HNS3_MAX_MTU (HNS3_MAX_FRAME_LEN - HNS3_ETH_OVERHEAD)
#define HNS3_DEFAULT_MTU 1500UL
*/
#define I40E_GL_RXERR1_H(_i) (0x00318004 + ((_i) * 8))
-#define I40E_VLAN_TAG_SIZE 4
-
#define I40E_AQ_LEN 32
#define I40E_AQ_BUF_SZ 4096
/* Number of queues per TC should be one of 1, 2, 4, 8, 16, 32, 64 */
* Considering QinQ packet, the VLAN tag needs to be counted twice.
*/
#define I40E_ETH_OVERHEAD \
- (RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN + I40E_VLAN_TAG_SIZE * 2)
+ (RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN + RTE_VLAN_HLEN * 2)
#define I40E_ETH_MAX_LEN (RTE_ETHER_MTU + I40E_ETH_OVERHEAD)
#define I40E_RXTX_BYTES_H_16_BIT(bytes) ((bytes) & ~I40E_48_BIT_MASK)
/* The overhead from MTU to max frame size.
* Considering QinQ packet, the VLAN tag needs to be counted twice.
*/
-#define IAVF_VLAN_TAG_SIZE 4
#define IAVF_ETH_OVERHEAD \
- (RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN + IAVF_VLAN_TAG_SIZE * 2)
+ (RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN + RTE_VLAN_HLEN * 2)
#define IAVF_ETH_MAX_LEN (RTE_ETHER_MTU + IAVF_ETH_OVERHEAD)
#define IAVF_32_BIT_WIDTH (CHAR_BIT * 4)
rxq->max_pkt_len = max_pkt_len;
if ((dev_data->dev_conf.rxmode.offloads & RTE_ETH_RX_OFFLOAD_SCATTER) ||
- (rxq->max_pkt_len + 2 * ICE_VLAN_TAG_SIZE) > buf_size) {
+ (rxq->max_pkt_len + 2 * RTE_VLAN_HLEN) > buf_size) {
dev_data->scattered_rx = 1;
}
rxq->qrx_tail = hw->hw_addr + IAVF_QRX_TAIL1(rxq->queue_id);
#include "base/ice_adminq_cmd.h"
#include "base/ice_flow.h"
-#define ICE_VLAN_TAG_SIZE 4
-
#define ICE_ADMINQ_LEN 32
#define ICE_SBIOQ_LEN 32
#define ICE_MAILBOXQ_LEN 32
* Considering QinQ packet, the VLAN tag needs to be counted twice.
*/
#define ICE_ETH_OVERHEAD \
- (RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN + ICE_VLAN_TAG_SIZE * 2)
+ (RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN + RTE_VLAN_HLEN * 2)
#define ICE_ETH_MAX_LEN (RTE_ETHER_MTU + ICE_ETH_OVERHEAD)
#define ICE_RXTX_BYTES_HIGH(bytes) ((bytes) & ~ICE_40_BIT_MASK)
#define IPN3KE_MAC_RX_FRAME_CONTROL_EN_ALLMCAST_MASK \
IPN3KE_MASK(0x1, IPN3KE_MAC_RX_FRAME_CONTROL_EN_ALLMCAST_SHIFT)
-#define IPN3KE_VLAN_TAG_SIZE 4
/**
* The overhead from MTU to max frame size.
* Considering QinQ packet, the VLAN tag needs to be counted twice.
*/
#define IPN3KE_ETH_OVERHEAD \
- (RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN + IPN3KE_VLAN_TAG_SIZE * 2)
+ (RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN + RTE_VLAN_HLEN * 2)
#define IPN3KE_ETH_MAX_LEN (RTE_ETHER_MTU + IPN3KE_ETH_OVERHEAD)
#define IPN3KE_MAC_FRAME_SIZE_MAX 9728
* scattered packets when this feature has not been enabled before.
*/
if (dev->data->dev_started && !dev->data->scattered_rx &&
- frame_size + 2 * IXGBE_VLAN_TAG_SIZE >
+ frame_size + 2 * RTE_VLAN_HLEN >
dev->data->min_rx_buf_size - RTE_PKTMBUF_HEADROOM) {
PMD_INIT_LOG(ERR, "Stop port first.");
return -EINVAL;
* scattered packets when this feature has not been enabled before.
*/
if (dev_data->dev_started && !dev_data->scattered_rx &&
- (max_frame + 2 * IXGBE_VLAN_TAG_SIZE >
+ (max_frame + 2 * RTE_VLAN_HLEN >
dev->data->min_rx_buf_size - RTE_PKTMBUF_HEADROOM)) {
PMD_INIT_LOG(ERR, "Stop port first.");
return -EINVAL;
#define IXGBE_NB_STAT_MAPPING_REGS 32
#define IXGBE_EXTENDED_VLAN (uint32_t)(1 << 26) /* EXTENDED VLAN ENABLE */
#define IXGBE_VFTA_SIZE 128
-#define IXGBE_VLAN_TAG_SIZE 4
#define IXGBE_HKEY_MAX_INDEX 10
#define IXGBE_MAX_RX_QUEUE_NUM 128
#define IXGBE_MAX_INTR_QUEUE_NUM 15
IXGBE_SRRCTL_BSIZEPKT_SHIFT);
/* It adds dual VLAN length for supporting dual VLAN */
- if (frame_size + 2 * IXGBE_VLAN_TAG_SIZE > buf_size)
+ if (frame_size + 2 * RTE_VLAN_HLEN > buf_size)
dev->data->scattered_rx = 1;
if (rxq->offloads & RTE_ETH_RX_OFFLOAD_VLAN_STRIP)
rx_conf->offloads |= RTE_ETH_RX_OFFLOAD_VLAN_STRIP;
if (rxmode->offloads & RTE_ETH_RX_OFFLOAD_SCATTER ||
/* It adds dual VLAN length for supporting dual VLAN */
- (frame_size + 2 * IXGBE_VLAN_TAG_SIZE) > buf_size) {
+ (frame_size + 2 * RTE_VLAN_HLEN) > buf_size) {
if (!dev->data->scattered_rx)
PMD_INIT_LOG(DEBUG, "forcing scatter mode");
dev->data->scattered_rx = 1;
/** Rx queue descriptors alignment in B */
#define MRVL_NETA_RXD_ALIGN 32
-#define MRVL_NETA_VLAN_TAG_LEN 4
#define MRVL_NETA_ETH_HDRS_LEN (RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN + \
- MRVL_NETA_VLAN_TAG_LEN)
+ RTE_VLAN_HLEN)
#define MRVL_NETA_HDRS_LEN (MV_MH_SIZE + MRVL_NETA_ETH_HDRS_LEN)
#define MRVL_NETA_MTU_TO_MRU(mtu) ((mtu) + MRVL_NETA_HDRS_LEN)
/** Minimum number of sent buffers to release from shadow queue to BM */
#define MRVL_PP2_BUF_RELEASE_BURST_SIZE 64
-#define MRVL_PP2_VLAN_TAG_LEN 4
#define MRVL_PP2_ETH_HDRS_LEN (RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN + \
- (2 * MRVL_PP2_VLAN_TAG_LEN))
+ (2 * RTE_VLAN_HLEN))
#define MRVL_PP2_HDRS_LEN (MV_MH_SIZE + MRVL_PP2_ETH_HDRS_LEN)
#define MRVL_PP2_MTU_TO_MRU(mtu) ((mtu) + MRVL_PP2_HDRS_LEN)
#define MRVL_PP2_MRU_TO_MTU(mru) ((mru) - MRVL_PP2_HDRS_LEN)
* scattered packets when this feature has not been enabled before.
*/
if (dev_data->dev_started && !dev_data->scattered_rx &&
- (frame_size + 2 * NGBE_VLAN_TAG_SIZE >
+ (frame_size + 2 * RTE_VLAN_HLEN >
dev->data->min_rx_buf_size - RTE_PKTMBUF_HEADROOM)) {
PMD_INIT_LOG(ERR, "Stop port first.");
return -EINVAL;
#define NGBE_FLAG_NEED_LINK_CONFIG ((uint32_t)(1 << 4))
#define NGBE_VFTA_SIZE 128
-#define NGBE_VLAN_TAG_SIZE 4
#define NGBE_HKEY_MAX_INDEX 10
/*Default value of Max Rx Queue*/
#define NGBE_MAX_RX_QUEUE_NUM 8
/* It adds dual VLAN length for supporting dual VLAN */
if (dev->data->mtu + NGBE_ETH_OVERHEAD +
- 2 * NGBE_VLAN_TAG_SIZE > buf_size)
+ 2 * RTE_VLAN_HLEN > buf_size)
dev->data->scattered_rx = 1;
if (rxq->offloads & RTE_ETH_RX_OFFLOAD_VLAN_STRIP)
rx_conf->offloads |= RTE_ETH_RX_OFFLOAD_VLAN_STRIP;
* scattered packets when this feature has not been enabled before.
*/
if (dev_data->dev_started && !dev_data->scattered_rx &&
- (frame_size + 2 * TXGBE_VLAN_TAG_SIZE >
+ (frame_size + 2 * RTE_VLAN_HLEN >
dev->data->min_rx_buf_size - RTE_PKTMBUF_HEADROOM)) {
PMD_INIT_LOG(ERR, "Stop port first.");
return -EINVAL;
* FreeBSD driver.
*/
#define TXGBE_VFTA_SIZE 128
-#define TXGBE_VLAN_TAG_SIZE 4
#define TXGBE_HKEY_MAX_INDEX 10
/*Default value of Max Rx Queue*/
#define TXGBE_MAX_RX_QUEUE_NUM 128
* scattered packets when this feature has not been enabled before.
*/
if (dev_data->dev_started && !dev_data->scattered_rx &&
- (max_frame + 2 * TXGBE_VLAN_TAG_SIZE >
+ (max_frame + 2 * RTE_VLAN_HLEN >
dev->data->min_rx_buf_size - RTE_PKTMBUF_HEADROOM)) {
PMD_INIT_LOG(ERR, "Stop port first.");
return -EINVAL;
/* It adds dual VLAN length for supporting dual VLAN */
if (dev->data->mtu + TXGBE_ETH_OVERHEAD +
- 2 * TXGBE_VLAN_TAG_SIZE > buf_size)
+ 2 * RTE_VLAN_HLEN > buf_size)
dev->data->scattered_rx = 1;
if (rxq->offloads & RTE_ETH_RX_OFFLOAD_VLAN_STRIP)
rx_conf->offloads |= RTE_ETH_RX_OFFLOAD_VLAN_STRIP;
if (rxmode->offloads & RTE_ETH_RX_OFFLOAD_SCATTER ||
/* It adds dual VLAN length for supporting dual VLAN */
(dev->data->mtu + TXGBE_ETH_OVERHEAD +
- 2 * TXGBE_VLAN_TAG_SIZE) > buf_size) {
+ 2 * RTE_VLAN_HLEN) > buf_size) {
if (!dev->data->scattered_rx)
PMD_INIT_LOG(DEBUG, "forcing scatter mode");
dev->data->scattered_rx = 1;
#define MBUF_TABLE_DRAIN_TSC ((rte_get_tsc_hz() + US_PER_S - 1) \
/ US_PER_S * BURST_TX_DRAIN_US)
-#define VLAN_HLEN 4
static inline int
open_dma(const char *value)
* by minus length of vlan tag, so need restore
* the packet length by plus it.
*/
- *offset = VLAN_HLEN;
+ *offset = RTE_VLAN_HLEN;
*vlan_tag = vlan_tags[vdev->vid];
RTE_LOG_DP(DEBUG, VHOST_DATA,
(RTE_ETHER_MAX_LEN - RTE_ETHER_HDR_LEN - \
RTE_ETHER_CRC_LEN) /**< Ethernet MTU. */
+#define RTE_VLAN_HLEN 4 /**< VLAN (IEEE 802.1Q) header length. */
+/** Maximum VLAN frame length (excluding QinQ), including CRC. */
#define RTE_ETHER_MAX_VLAN_FRAME_LEN \
- (RTE_ETHER_MAX_LEN + 4)
- /**< Maximum VLAN frame length, including CRC. */
+ (RTE_ETHER_MAX_LEN + RTE_VLAN_HLEN)
#define RTE_ETHER_MAX_JUMBO_FRAME_LEN \
0x3F00 /**< Maximum Jumbo frame length, including CRC. */