common/mlx5: fix relaxed ordering support detection
authorShiri Kuzin <shirik@mellanox.com>
Tue, 12 May 2020 12:21:44 +0000 (15:21 +0300)
committerFerruh Yigit <ferruh.yigit@intel.com>
Mon, 18 May 2020 18:35:56 +0000 (20:35 +0200)
Relaxed ordering is a PCI optimization that allows reordering
of reads/writes in order to improve performance.

In order to enable this optimization only when relaxed ordering
is supported, it is checked if IBV_ACCESS_RELAXED_ORDERING is
defined in verbs.h.

Since IBV_ACCESS_RELAXED_ORDERING is an enum and not
defined relaxed ordering wasn't enabled even when supported.

This issue is fixed by using AUTOCONF to check if relaxed
ordering is supported and disabling only if it isn't.

Fixes: 53ac93f71ad1 ("net/mlx5: create relaxed ordering memory regions")

Signed-off-by: Shiri Kuzin <shirik@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
drivers/common/mlx5/Makefile
drivers/common/mlx5/meson.build
drivers/common/mlx5/mlx5_glue.h

index 8b663ef..0d8cc1b 100644 (file)
@@ -67,6 +67,11 @@ mlx5_autoconf.h.new: FORCE
 
 mlx5_autoconf.h.new: $(RTE_SDK)/buildtools/auto-config-h.sh
        $Q $(RM) -f -- '$@'
+       $Q sh -- '$<' '$@' \
+               HAVE_IBV_RELAXED_ORDERING \
+               infiniband/verbs.h \
+               enum IBV_ACCESS_RELAXED_ORDERING \
+               $(AUTOCONF_OUTPUT)
        $Q sh -- '$<' '$@' \
                HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT \
                infiniband/mlx5dv.h \
index 165aa25..5a802ba 100644 (file)
@@ -94,6 +94,8 @@ has_member_args = [
 # [ "MACRO to define if found", "header for the search",
 #   "symbol to search" ]
 has_sym_args = [
+       [ 'HAVE_IBV_RELAXED_ORDERING', 'infiniband/verbs.h',
+       'IBV_ACCESS_RELAXED_ORDERING ' ],
        [ 'HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT', 'infiniband/mlx5dv.h',
        'MLX5DV_CQE_RES_FORMAT_CSUM_STRIDX' ],
        [ 'HAVE_IBV_DEVICE_TUNNEL_SUPPORT', 'infiniband/mlx5dv.h',
index 184c410..81d6a22 100644 (file)
@@ -98,7 +98,7 @@ struct mlx5dv_var { uint32_t page_id; uint32_t length; off_t mmap_off;
                        uint64_t comp_mask; };
 #endif
 
-#ifndef IBV_ACCESS_RELAXED_ORDERING
+#ifndef HAVE_IBV_RELAXED_ORDERING
 #define IBV_ACCESS_RELAXED_ORDERING 0
 #endif