Repeated occurrences of 'the'.
The change was obtained using the following command:
sed -i "s;the the ;the ;" `git grep -l "the "`
Signed-off-by: Thierry Herbelot <thierry.herbelot@6wind.com>
burst_size) != 0) {
RTE_LOG(ERR, USER1,
"Failed to allocate more crypto operations "
- "from the the crypto operation pool.\n"
+ "from the crypto operation pool.\n"
"Consider increasing the pool size "
"with --pool-sz\n");
return -1;
burst_size) != 0) {
RTE_LOG(ERR, USER1,
"Failed to allocate more crypto operations "
- "from the the crypto operation pool.\n"
+ "from the crypto operation pool.\n"
"Consider increasing the pool size "
"with --pool-sz\n");
return -1;
burst_size) != 0) {
RTE_LOG(ERR, USER1,
"Failed to allocate more crypto operations "
- "from the the crypto operation pool.\n"
+ "from the crypto operation pool.\n"
"Consider increasing the pool size "
"with --pool-sz\n");
return -1;
ops_needed) != 0) {
RTE_LOG(ERR, USER1,
"Failed to allocate more crypto operations "
- "from the the crypto operation pool.\n"
+ "from the crypto operation pool.\n"
"Consider increasing the pool size "
"with --pool-sz\n");
return -1;
ops_needed) != 0) {
RTE_LOG(ERR, USER1,
"Failed to allocate more crypto operations "
- "from the the crypto operation pool.\n"
+ "from the crypto operation pool.\n"
"Consider increasing the pool size "
"with --pool-sz\n");
return -1;
* Don't break compilation between commits with forward dependencies in a patchset.
Each commit should compile on its own to allow for ``git bisect`` and continuous integration testing.
-* Add tests to the the ``app/test`` unit test framework where possible.
+* Add tests to the ``app/test`` unit test framework where possible.
* Add documentation, if relevant, in the form of Doxygen comments or a User Guide in RST format.
See the :ref:`Documentation Guidelines <doc_guidelines>`.
Checking Compilation
--------------------
-Compilation of patches and changes should be tested using the the ``test-build.sh`` script in the ``devtools``
+Compilation of patches and changes should be tested using the ``test-build.sh`` script in the ``devtools``
directory of the DPDK repo::
devtools/test-build.sh x86_64-native-linuxapp-gcc+next+shared
usertools/cpu_layout.py
- Or run ``lscpu`` to check the the cores on each socket.
+ Or run ``lscpu`` to check the cores on each socket.
3. Check your NIC id and related socket id:
* **eal/linux: Fix irq handling with igb_uio.**
- Fixed an issue where the the introduction of ``uio_pci_generic`` broke
+ Fixed an issue where the introduction of ``uio_pci_generic`` broke
interrupt handling with igb_uio.
Fixes: c112df6875a5 ("eal/linux: toggle interrupt for uio_pci_generic")
rte_exit(EXIT_FAILURE, "Keepalive setup failure.\n");
The rest of the initialization and run-time path follows
-the same paths as the the L2 forwarding application. The only
+the same paths as the L2 forwarding application. The only
addition to the main processing loop is the mark alive
functionality and the example random failures.
On initialization an L-thread scheduler is started on every EAL thread. On all
but the master EAL thread only a a dummy L-thread is initially started.
The L-thread started on the master EAL thread then spawns other L-threads on
-different L-thread schedulers according the the command line parameters.
+different L-thread schedulers according the command line parameters.
The RX threads poll the network interface queues and post received packets
to a TX thread via the corresponding software ring.
rte_cryptodev_scheduler_ordering_get(uint8_t scheduler_id);
/**
- * Get the the attached slaves' count and/or ID
+ * Get the attached slaves' count and/or ID
*
* @param scheduler_id
* The target scheduler device ID
* This is the length of the data for the packet stored in the
* buffer(s) identified by the opaque value. This includes the
* packet BD and any associated buffer BDs. This does not
- * include the the length of any data places in aggregation BDs.
+ * include the length of any data places in aggregation BDs.
*/
uint32_t opaque;
/*
uint16_t fid;
/*
* Function ID of the function that is being configured. If set
- * to 0xFF... (All Fs), then the the configuration is for the
+ * to 0xFF... (All Fs), then the configuration is for the
* requesting function.
*/
uint8_t unused_0;
* e1000_reset_mdicnfg_82580 - Reset MDICNFG destination and com_mdio bits
* @hw: pointer to the HW structure
*
- * This resets the the MDICNFG.Destination and MDICNFG.Com_MDIO bits based on
+ * This resets the MDICNFG.Destination and MDICNFG.Com_MDIO bits based on
* the values found in the EEPROM. This addresses an issue in which these
* bits are not restored from EEPROM after reset.
**/
* @hw: pointer to the HW structure
*
* ICH8 use the PCI Express bus, but does not contain a PCI Express Capability
- * register, so the the bus width is hard coded.
+ * register, so the bus width is hard coded.
**/
STATIC s32 e1000_get_bus_info_ich8lan(struct e1000_hw *hw)
{
* @hw: pointer to hardware structure
* @mbx: pointer to mailbox
*
- * This function copies the message from the the message array to mbmem
+ * This function copies the message from the message array to mbmem
**/
STATIC void fm10k_mbx_write(struct fm10k_hw *hw, struct fm10k_mbx_info *mbx)
{
* needs to add, HW needs to know the layout that VSIs are organized.
* Besides that, VSI isan element and can't switch packets, which needs
* to add new component VEB to perform switching. So, a new VSI needs
- * to specify the the uplink VSI (Parent VSI) before created. The
+ * to specify the uplink VSI (Parent VSI) before created. The
* uplink VSI will check whether it had a VEB to switch packets. If no,
* it will try to create one. Then, uplink VSI will move the new VSI
* into its' sib_vsi_list to manage all the downlink VSI.
* ixgbe_setup_mac_link_sfp_x550a - Setup internal PHY for SFP
* @hw: pointer to hardware structure
*
- * Configure the the integrated PHY for SFP support.
+ * Configure the integrated PHY for SFP support.
**/
s32 ixgbe_setup_mac_link_sfp_x550a(struct ixgbe_hw *hw,
ixgbe_link_speed speed,
} pbl_sp;
/* Address of first page of the chain - the address is required
- * for fastpath operation [consume/produce] but only for the the SINGLE
+ * for fastpath operation [consume/produce] but only for the SINGLE
* flavour which isn't considered fastpath [== SPQ].
*/
void *p_virt_addr;
* resources allocation queries should be atomic. Since several PFs can
* run in parallel - a resource lock is needed.
* If either the resource lock or resource set value commands are not
- * supported - skip the the max values setting, release the lock if
+ * supported - skip the max values setting, release the lock if
* needed, and proceed to the queries. Other failures, including a
* failure to acquire the lock, will cause this function to fail.
* Old drivers that don't acquire the lock can run in parallel, and
*ecore_mcp_get_link_capabilities(struct ecore_hwfn *p_hwfn);
/**
- * @brief Request the MFW to set the the link according to 'link_input'.
+ * @brief Request the MFW to set the link according to 'link_input'.
*
* @param p_hwfn
* @param p_ptt
u32 num_arfs_filters;
};
-/* Most of the the parameters below are described in the FW iSCSI / TCP HSI */
+/* Most of the parameters below are described in the FW iSCSI / TCP HSI */
struct ecore_iscsi_pf_params {
u64 glbl_q_params_addr;
u64 bdq_pbl_base_addr[2];
* For the Huntington family, the current port mode cannot be discovered,
* so the mapping used is instead the last match in the table to the full
* set of port modes to which the NIC can be configured. Therefore the
- * ordering of entries in the the mapping table is significant.
+ * ordering of entries in the mapping table is significant.
*/
static struct {
efx_family_t family;
/*
* Create a key
- * this means getting a key from the the pool
+ * this means getting a key from the pool
*/
int lthread_key_create(unsigned int *key, tls_destructor_func destructor)
{
*
* Guarantees that the LOAD and STORE operations that precede the
* rte_smp_mb() call are globally visible across the lcores
- * before the the LOAD and STORE operations that follows it.
+ * before the LOAD and STORE operations that follows it.
*/
static inline void rte_smp_mb(void);
*
* Guarantees that the STORE operations that precede the
* rte_smp_wmb() call are globally visible across the lcores
- * before the the STORE operations that follows it.
+ * before the STORE operations that follows it.
*/
static inline void rte_smp_wmb(void);
*
* Guarantees that the LOAD operations that precede the
* rte_smp_rmb() call are globally visible across the lcores
- * before the the LOAD operations that follows it.
+ * before the LOAD operations that follows it.
*/
static inline void rte_smp_rmb(void);
* e1000_reset_mdicnfg_82580 - Reset MDICNFG destination and com_mdio bits
* @hw: pointer to the HW structure
*
- * This resets the the MDICNFG.Destination and MDICNFG.Com_MDIO bits based on
+ * This resets the MDICNFG.Destination and MDICNFG.Com_MDIO bits based on
* the values found in the EEPROM. This addresses an issue in which these
* bits are not restored from EEPROM after reset.
**/
/**
* It is to check the governor and then set the original governor back if
- * needed by writing the the sys file.
+ * needed by writing the sys file.
*/
static int
power_set_governor_original(struct rte_power_info *pi)
git.droids-corp.org / dpdk.git / commitdiff