dpdk.git
5 years agonet/atlantic: implement Tx path
Pavel Belous [Fri, 12 Oct 2018 11:09:27 +0000 (11:09 +0000)]
net/atlantic: implement Tx path

Add implementation for TX datapath.

Signed-off-by: Igor Russkikh <igor.russkikh@aquantia.com>
Signed-off-by: Pavel Belous <pavel.belous@aquantia.com>
5 years agonet/atlantic: implement Rx path
Igor Russkikh [Fri, 12 Oct 2018 11:09:25 +0000 (11:09 +0000)]
net/atlantic: implement Rx path

Add implementation for RX datapath.

Signed-off-by: Igor Russkikh <igor.russkikh@aquantia.com>
Signed-off-by: Pavel Belous <pavel.belous@aquantia.com>
5 years agonet/atlantic: implement core logic for Tx/Rx
Pavel Belous [Fri, 12 Oct 2018 11:09:22 +0000 (11:09 +0000)]
net/atlantic: implement core logic for Tx/Rx

Add RX/TX function prototypes for further datapath development.

Signed-off-by: Igor Russkikh <igor.russkikh@aquantia.com>
Signed-off-by: Pavel Belous <pavel.belous@aquantia.com>
5 years agonet/atlantic: configure device start/stop
Pavel Belous [Fri, 12 Oct 2018 11:09:20 +0000 (11:09 +0000)]
net/atlantic: configure device start/stop

Start, stop and reset are all done via hw_atl layer.

Signed-off-by: Igor Russkikh <igor.russkikh@aquantia.com>
Signed-off-by: Pavel Belous <pavel.belous@aquantia.com>
5 years agonet/atlantic: add b0 hardware layer
Igor Russkikh [Fri, 12 Oct 2018 11:09:17 +0000 (11:09 +0000)]
net/atlantic: add b0 hardware layer

This is hw_atl logic layer derived from linux atlantic
driver. It contains RX/TX hardware initialization
sequences, various hw configuration.

Signed-off-by: Igor Russkikh <igor.russkikh@aquantia.com>
Signed-off-by: Pavel Belous <pavel.belous@aquantia.com>
5 years agonet/atlantic: implement firmware operations
Igor Russkikh [Fri, 12 Oct 2018 11:09:14 +0000 (11:09 +0000)]
net/atlantic: implement firmware operations

AQC NICs comes in fields with two major
FW generations: 1x and 3x.

This is part of linux atlantic driver shared code,
responsible for internal NIC firmware interactions,
including link management ops, FW initialization,
various lifecycle features.

Signed-off-by: Igor Russkikh <igor.russkikh@aquantia.com>
Signed-off-by: Pavel Belous <pavel.belous@aquantia.com>
5 years agonet/atlantic: add hardware access layer
Igor Russkikh [Fri, 12 Oct 2018 11:09:11 +0000 (11:09 +0000)]
net/atlantic: add hardware access layer

This patch introduces hw_atl layer which is maintained
in sync with linux kernel driver.
It will generally be in sync with linux upstream.

Signed-off-by: Igor Russkikh <igor.russkikh@aquantia.com>
Signed-off-by: Pavel Belous <pavel.belous@aquantia.com>
5 years agonet/atlantic: add hardware registers access routines
Igor Russkikh [Fri, 12 Oct 2018 11:09:08 +0000 (11:09 +0000)]
net/atlantic: add hardware registers access routines

Add implementation for hardware registers access routines.

Signed-off-by: Igor Russkikh <igor.russkikh@aquantia.com>
Signed-off-by: Pavel Belous <pavel.belous@aquantia.com>
5 years agonet/atlantic: add logging structure
Igor Russkikh [Fri, 12 Oct 2018 11:09:06 +0000 (11:09 +0000)]
net/atlantic: add logging structure

Implement logging macroses for debug purposes.

Signed-off-by: Igor Russkikh <igor.russkikh@aquantia.com>
Signed-off-by: Pavel Belous <pavel.belous@aquantia.com>
5 years agonet/atlantic: add PMD driver skeleton
Pavel Belous [Fri, 12 Oct 2018 11:09:03 +0000 (11:09 +0000)]
net/atlantic: add PMD driver skeleton

Makefile/meson build infrastructure, atl_ethdev minimal skeleton,
header with aquantia aQtion NIC device and vendor IDs.

Signed-off-by: Igor Russkikh <igor.russkikh@aquantia.com>
Signed-off-by: Pavel Belous <pavel.belous@aquantia.com>
5 years agonet/enic: fix counter action
John Daley [Wed, 10 Oct 2018 22:11:31 +0000 (15:11 -0700)]
net/enic: fix counter action

- track whether counter DMAs are active or not so they can be stopped if
  needed before DMA memory is freed
- fix counter DMA shut-down by changing vnic_dev_counter_dma_cfg() to
  take the number of counters to DMA instead of high counter index and
  use num counters = 0 to shut off DMAs
- remove unnecessary checks that DMA counter memory is valid and that
  counter DMAs are in use
- change the minimum DMA period to match what 1400 series adapter is
  capable of
- fix comments and change a couple variable names to make more sense

Fixes: 86df6c4e2fce ("net/enic: support flow counter action")

Signed-off-by: John Daley <johndale@cisco.com>
Reviewed-by: Hyong Youb Kim <hyonkim@cisco.com>
5 years agocommon/qat: fix failure to create PMD
Fiona Trahe [Thu, 11 Oct 2018 17:14:05 +0000 (18:14 +0100)]
common/qat: fix failure to create PMD

If QAT crypto pmd failed to be created due to reaching MAX
cryptodevs it prevented QAT comp PMD being created. And vice versa.
Change to warning in these cases and allow the other PMD to be created.

Fixes: c0c90bc4cade ("compress/qat: add create and destroy functions")
Cc: stable@dpdk.org
Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
Acked-by: Tomasz Cel <tomaszx.cel@intel.com>
5 years agocryptodev: fix library version
Fan Zhang [Mon, 15 Oct 2018 11:28:16 +0000 (12:28 +0100)]
cryptodev: fix library version

This patch fixes the cryptodev library version number that was
missed updating in DPDK 18.08.

Fixes: a4493be5bdfa ("cryptodev: replace bus specific struct with generic dev")
Cc: stable@dpdk.org
Signed-off-by: Fan Zhang <roy.fan.zhang@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
5 years agotest/crypto: add CAAM JR validation cases
Hemant Agrawal [Tue, 16 Oct 2018 09:47:53 +0000 (09:47 +0000)]
test/crypto: add CAAM JR validation cases

This patch adds the validation test cases for
CAAM JR driver

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Reviewed-by: Akhil Goyal <akhil.goyal@nxp.com>
5 years agodoc: add CAAM JR guide
Hemant Agrawal [Tue, 16 Oct 2018 12:48:57 +0000 (18:18 +0530)]
doc: add CAAM JR guide

add caam jr driver details, supported features and algorithms
in the document.

release note and MAINTAINERS are also updated.

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
5 years agocrypto/caam_jr: add security offload
Hemant Agrawal [Fri, 12 Oct 2018 14:40:54 +0000 (20:10 +0530)]
crypto/caam_jr: add security offload

This patch provides the support for protocol offload
to the hardware. following security operations are
added:
 - session_create
 - session_destroy
 - capabilities_get

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
5 years agocrypto/caam_jr: add statistics operations
Hemant Agrawal [Fri, 12 Oct 2018 14:40:53 +0000 (20:10 +0530)]
crypto/caam_jr: add statistics operations

This patch adds the following statistics operations:
 - stats_get
 - stats_reset

Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
5 years agocrypto/caam_jr: add scatter gather
Gagandeep Singh [Fri, 12 Oct 2018 14:40:52 +0000 (20:10 +0530)]
crypto/caam_jr: add scatter gather

This patch add the scatter gather feature
for auth-only, cipher-only and cipher-auth
operations

Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
5 years agocrypto/caam_jr: add enqueue/dequeue operations
Gagandeep Singh [Fri, 12 Oct 2018 14:40:51 +0000 (20:10 +0530)]
crypto/caam_jr: add enqueue/dequeue operations

This patch add support for :
1. creating run time sec hw decriptors for a given request.
2. enqueue operation to the caam jr ring
3. dequeue operation from the caam jr ring in poll mode
4. creating a crypto protocol descriptor for session - first time.

Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
5 years agocrypto/caam_jr: add device cababilities
Gagandeep Singh [Fri, 12 Oct 2018 14:40:49 +0000 (20:10 +0530)]
crypto/caam_jr: add device cababilities

add device capabilities for supported algorithms,
key length etc.

Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
5 years agocrypto/caam_jr: add session configuration methods
Gagandeep Singh [Fri, 12 Oct 2018 14:40:50 +0000 (20:10 +0530)]
crypto/caam_jr: add session configuration methods

This patch add support to create session configuration
of various types i.e. cipher, auth and aead etc.

Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
5 years agocrypto/caam_jr: add queue pair config
Hemant Agrawal [Fri, 12 Oct 2018 14:40:48 +0000 (20:10 +0530)]
crypto/caam_jr: add queue pair config

add following ops for configuring queues
 - queue_pair_setup
 - queue_pair_release
 - queue_pair_count

Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
5 years agocrypto/caam_jr: add device basic operations
Gagandeep Singh [Fri, 12 Oct 2018 14:40:47 +0000 (20:10 +0530)]
crypto/caam_jr: add device basic operations

This patch adds following device operations
 - dev_configure
 - dev_start
 - dev_stop
 - dev_close
 - dev_infos_get

Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
5 years agocrypto/caam_jr: add basic job ring routines
Gagandeep Singh [Fri, 12 Oct 2018 14:40:46 +0000 (20:10 +0530)]
crypto/caam_jr: add basic job ring routines

This patch adds following job ring routines
 - init_job_ring (configure hw/sw resources)
 - shutdown_job_ring (releases hw/sw resources)
 - close_job_ring (flush job ring)

Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
5 years agocrypto/caam_jr: add UIO specific operations
Gagandeep Singh [Fri, 12 Oct 2018 14:40:45 +0000 (20:10 +0530)]
crypto/caam_jr: add UIO specific operations

caam_jr need support from kernel caam driver for
job ring initialisation. So to access register space
for job ring and allow re configure and map to userspace
UIO interface is used. This also allows to handle the
caam interrupts from the user space.

This patch adds UIO specific operations

Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
5 years agocrypto/caam_jr: add routines to configure HW
Gagandeep Singh [Fri, 12 Oct 2018 14:40:44 +0000 (20:10 +0530)]
crypto/caam_jr: add routines to configure HW

This patch add routines for configuring the hw
to support various features.
These routines will be used by the PMD ops.
The patch also defines structure and macros used
to access hw capabilities.

Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
5 years agocrypto/caam_jr: add HW tuning options
Gagandeep Singh [Fri, 12 Oct 2018 14:40:43 +0000 (20:10 +0530)]
crypto/caam_jr: add HW tuning options

caam_jr hardware can be tuned for multiple settings
like ring depth, coalescing, notification types, cache
size etc.

These parameter can be used for performance tuning
for various platforms.

Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
5 years agocrypto/caam_jr: introduce basic driver
Gagandeep Singh [Fri, 12 Oct 2018 14:40:42 +0000 (20:10 +0530)]
crypto/caam_jr: introduce basic driver

The caam_jr poll mode crypto driver is supported for
NXP SEC 4.x+ (CAAM) hardware accelerator.
This driver is by default supported on LE platforms,
if it is used on BE platforms like LS104X,
config option CONFIG_RTE_LIBRTE_PMD_CAAM_JR_BE can be
enabled.

This patch add skeleton for caam jobring driver
with probe and uintialisation functions

Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
5 years agocrypto/aesni_mb: support AES-GCM algorithm
Fan Zhang [Wed, 10 Oct 2018 11:04:41 +0000 (12:04 +0100)]
crypto/aesni_mb: support AES-GCM algorithm

This patch updates the current AESNI-MB PMD with added AES-GCM
algorithm support. The patch includes the necessary changes
to the code including the capability update, control and data
patch changes for the AES-GCM algorithm support.

Signed-off-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
5 years agocommon/qat: support GEN3 devices
Fiona Trahe [Mon, 1 Oct 2018 21:17:44 +0000 (22:17 +0100)]
common/qat: support GEN3 devices

This adds pci detection, queue-pair configuration and
documentation for Intel GEN3 QuickAssist devices.

Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
Acked-by: Tomasz Jozwiak <tomaszx.jozwiak@intel.com>
5 years agocrypto/qat: support AES-CMAC
Tomasz Cel [Tue, 9 Oct 2018 16:08:10 +0000 (18:08 +0200)]
crypto/qat: support AES-CMAC

This patch add AES-CMAC support. CMAC is a keyed hash function
that is based on a symmetric key block cipher. It is One-Key
CBC MAC improvement over XCBC-MAC. RFC 4493. NIST SP 800-38B.

Signed-off-by: Tomasz Cel <tomaszx.cel@intel.com>
Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
5 years agocryptodev: fix pool element size for undefined operation
Junxiao Shi [Tue, 9 Oct 2018 14:16:23 +0000 (10:16 -0400)]
cryptodev: fix pool element size for undefined operation

The documentation of rte_crypto_op_pool_create indicates that
specifying RTE_CRYPTO_OP_TYPE_UNDEFINED would create a pool that
supports all operation types. This change makes the code
consistent with documentation.

Fixes: c0f87eb5252b ("cryptodev: change burst API to be crypto op oriented")
Cc: stable@dpdk.org
Signed-off-by: Junxiao Shi <git@mail1.yoursunny.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
5 years agoevent/dpaa2: support crypto adapter
Akhil Goyal [Fri, 14 Sep 2018 11:48:10 +0000 (17:18 +0530)]
event/dpaa2: support crypto adapter

event dpaa2 device support both ethernet as well as
crypto queues to be attached to it. eth_rx_adapter
provide infrastructure to attach ethernet queues and
crypto_adapter provide support for crypto queues.

This patch add support for dpaa2_eventdev to attach
dpaa2_sec queues.

Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
Signed-off-by: Ashish Jain <ashish.jain@nxp.com>
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Acked-by: Abhinandan Gujjar <abhinandan.gujjar@intel.com>
5 years agocrypto/dpaa2_sec: support atomic queues
Ashish Jain [Fri, 14 Sep 2018 11:48:09 +0000 (17:18 +0530)]
crypto/dpaa2_sec: support atomic queues

Queues attached to event crypto device can be
parallel, atomic and ordered.
This patch add support for atomic queues processing
for dpaa2_sec queues.

Signed-off-by: Ashish Jain <ashish.jain@nxp.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
5 years agocrypto/dpaa2_sec: support event crypto adapter
Akhil Goyal [Fri, 14 Sep 2018 11:48:08 +0000 (17:18 +0530)]
crypto/dpaa2_sec: support event crypto adapter

dpaa2_sec hw queues can be attached to a hw dpaa2 event
device and the application can configure the event
crypto adapter to access the dpaa2_sec packets using
hardware events.
This patch defines APIs which can be used by the dpaa2
event device to attach/detach dpaa2_sec queues.

Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
Signed-off-by: Ashish Jain <ashish.jain@nxp.com>
5 years agocrypto/zuc: enable meson build
Hari Kumar Vemula [Fri, 5 Oct 2018 10:59:17 +0000 (11:59 +0100)]
crypto/zuc: enable meson build

Added new meson.build file for ZUC

Signed-off-by: Hari Kumar Vemula <hari.kumarx.vemula@intel.com>
Acked-by: Luca Boccassi <bluca@debian.org>
5 years agocrypto/kasumi: enable meson build
Hari Kumar Vemula [Fri, 5 Oct 2018 10:59:16 +0000 (11:59 +0100)]
crypto/kasumi: enable meson build

Added new meson.build file for KASUMI

Signed-off-by: Hari Kumar Vemula <hari.kumarx.vemula@intel.com>
Acked-by: Luca Boccassi <bluca@debian.org>
5 years agocrypto/aesni_mb: enable meson build
Hari Kumar Vemula [Fri, 5 Oct 2018 10:59:15 +0000 (11:59 +0100)]
crypto/aesni_mb: enable meson build

Added new meson.build file for aesni_mb

Signed-off-by: Hari Kumar Vemula <hari.kumarx.vemula@intel.com>
Acked-by: Luca Boccassi <bluca@debian.org>
5 years agocrypto/aesni_gcm: enable meson build
Hari Kumar Vemula [Fri, 5 Oct 2018 10:59:14 +0000 (11:59 +0100)]
crypto/aesni_gcm: enable meson build

Added new meson.build files for aesni_gcm

Signed-off-by: Hari Kumar Vemula <hari.kumarx.vemula@intel.com>
Acked-by: Luca Boccassi <bluca@debian.org>
5 years agocrypto/openssl: support truncated HMAC operations
Dmitry Eremin-Solenikov [Tue, 2 Oct 2018 20:00:03 +0000 (23:00 +0300)]
crypto/openssl: support truncated HMAC operations

IPsec requires truncated HMAC operations support. Extend OpenSSL crypto
PMD to support truncated HMAC operations necessary for IPsec.

Signed-off-by: Dmitry Eremin-Solenikov <dmitry.ereminsolenikov@linaro.org>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
5 years agodoc: add OCTEON TX crypto guide
Anoob Joseph [Tue, 9 Oct 2018 09:07:56 +0000 (14:37 +0530)]
doc: add OCTEON TX crypto guide

Adding feature file and guide for OCTEON TX crypto PMD

Signed-off-by: Ankur Dwivedi <ankur.dwivedi@caviumnetworks.com>
Signed-off-by: Anoob Joseph <anoob.joseph@caviumnetworks.com>
Signed-off-by: Murthy NSSR <nidadavolu.murthy@caviumnetworks.com>
Signed-off-by: Nithin Dabilpuram <nithin.dabilpuram@caviumnetworks.com>
Signed-off-by: Ragothaman Jayaraman <rjayaraman@caviumnetworks.com>
Signed-off-by: Srisivasubramanian S <ssrinivasan@caviumnetworks.com>
Signed-off-by: Tejasree Kondoj <kondoj.tejasree@caviumnetworks.com>
5 years agotest/crypto: add OCTEON TX unit tests
Ankur Dwivedi [Tue, 9 Oct 2018 09:07:55 +0000 (14:37 +0530)]
test/crypto: add OCTEON TX unit tests

Adding validation tests for OCTEON TX crypto device.

Signed-off-by: Ankur Dwivedi <ankur.dwivedi@caviumnetworks.com>
Signed-off-by: Anoob Joseph <anoob.joseph@caviumnetworks.com>
Signed-off-by: Murthy NSSR <nidadavolu.murthy@caviumnetworks.com>
Signed-off-by: Nithin Dabilpuram <nithin.dabilpuram@caviumnetworks.com>
Signed-off-by: Ragothaman Jayaraman <rjayaraman@caviumnetworks.com>
Signed-off-by: Srisivasubramanian S <ssrinivasan@caviumnetworks.com>
Signed-off-by: Tejasree Kondoj <kondoj.tejasree@caviumnetworks.com>
5 years agocrypto/octeontx: add burst dequeue
Tejasree Kondoj [Tue, 9 Oct 2018 09:07:54 +0000 (14:37 +0530)]
crypto/octeontx: add burst dequeue

Signed-off-by: Ankur Dwivedi <ankur.dwivedi@caviumnetworks.com>
Signed-off-by: Anoob Joseph <anoob.joseph@caviumnetworks.com>
Signed-off-by: Murthy NSSR <nidadavolu.murthy@caviumnetworks.com>
Signed-off-by: Nithin Dabilpuram <nithin.dabilpuram@caviumnetworks.com>
Signed-off-by: Ragothaman Jayaraman <rjayaraman@caviumnetworks.com>
Signed-off-by: Srisivasubramanian S <ssrinivasan@caviumnetworks.com>
Signed-off-by: Tejasree Kondoj <kondoj.tejasree@caviumnetworks.com>
5 years agocrypto/octeontx: add burst enqueue
Tejasree Kondoj [Tue, 9 Oct 2018 09:07:53 +0000 (14:37 +0530)]
crypto/octeontx: add burst enqueue

Signed-off-by: Ankur Dwivedi <ankur.dwivedi@caviumnetworks.com>
Signed-off-by: Anoob Joseph <anoob.joseph@caviumnetworks.com>
Signed-off-by: Murthy NSSR <nidadavolu.murthy@caviumnetworks.com>
Signed-off-by: Nithin Dabilpuram <nithin.dabilpuram@caviumnetworks.com>
Signed-off-by: Ragothaman Jayaraman <rjayaraman@caviumnetworks.com>
Signed-off-by: Srisivasubramanian S <ssrinivasan@caviumnetworks.com>
Signed-off-by: Tejasree Kondoj <kondoj.tejasree@caviumnetworks.com>
5 years agocrypto/octeontx: add routines to prepare instructions
Tejasree Kondoj [Tue, 9 Oct 2018 09:07:52 +0000 (14:37 +0530)]
crypto/octeontx: add routines to prepare instructions

Adding hardware specific routines which prepare cpt instructions.

Signed-off-by: Ankur Dwivedi <ankur.dwivedi@caviumnetworks.com>
Signed-off-by: Anoob Joseph <anoob.joseph@caviumnetworks.com>
Signed-off-by: Murthy NSSR <nidadavolu.murthy@caviumnetworks.com>
Signed-off-by: Nithin Dabilpuram <nithin.dabilpuram@caviumnetworks.com>
Signed-off-by: Ragothaman Jayaraman <rjayaraman@caviumnetworks.com>
Signed-off-by: Srisivasubramanian S <ssrinivasan@caviumnetworks.com>
Signed-off-by: Tejasree Kondoj <kondoj.tejasree@caviumnetworks.com>
5 years agocommon/cpt: support hash
Srisivasubramanian S [Tue, 9 Oct 2018 09:07:51 +0000 (14:37 +0530)]
common/cpt: support hash

Adding microcode interface for supporting verify and authentication

Signed-off-by: Ankur Dwivedi <ankur.dwivedi@caviumnetworks.com>
Signed-off-by: Anoob Joseph <anoob.joseph@caviumnetworks.com>
Signed-off-by: Murthy NSSR <nidadavolu.murthy@caviumnetworks.com>
Signed-off-by: Nithin Dabilpuram <nithin.dabilpuram@caviumnetworks.com>
Signed-off-by: Ragothaman Jayaraman <rjayaraman@caviumnetworks.com>
Signed-off-by: Srisivasubramanian S <ssrinivasan@caviumnetworks.com>
Signed-off-by: Tejasree Kondoj <kondoj.tejasree@caviumnetworks.com>
5 years agocommon/cpt: support KASUMI
Srisivasubramanian S [Tue, 9 Oct 2018 09:07:50 +0000 (14:37 +0530)]
common/cpt: support KASUMI

Adding microcode interface for supporting kasumi.

Signed-off-by: Ankur Dwivedi <ankur.dwivedi@caviumnetworks.com>
Signed-off-by: Anoob Joseph <anoob.joseph@caviumnetworks.com>
Signed-off-by: Murthy NSSR <nidadavolu.murthy@caviumnetworks.com>
Signed-off-by: Nithin Dabilpuram <nithin.dabilpuram@caviumnetworks.com>
Signed-off-by: Ragothaman Jayaraman <rjayaraman@caviumnetworks.com>
Signed-off-by: Srisivasubramanian S <ssrinivasan@caviumnetworks.com>
Signed-off-by: Tejasree Kondoj <kondoj.tejasree@caviumnetworks.com>
5 years agocommon/cpt: support ZUC and SNOW3G
Srisivasubramanian S [Tue, 9 Oct 2018 09:07:49 +0000 (14:37 +0530)]
common/cpt: support ZUC and SNOW3G

Adding microcode interface for supporting ZUC and SNOW3G.

Signed-off-by: Ankur Dwivedi <ankur.dwivedi@caviumnetworks.com>
Signed-off-by: Anoob Joseph <anoob.joseph@caviumnetworks.com>
Signed-off-by: Murthy NSSR <nidadavolu.murthy@caviumnetworks.com>
Signed-off-by: Nithin Dabilpuram <nithin.dabilpuram@caviumnetworks.com>
Signed-off-by: Ragothaman Jayaraman <rjayaraman@caviumnetworks.com>
Signed-off-by: Srisivasubramanian S <ssrinivasan@caviumnetworks.com>
Signed-off-by: Tejasree Kondoj <kondoj.tejasree@caviumnetworks.com>
5 years agocommon/cpt: add crypto enqueue request manager framework
Ragothaman Jayaraman [Tue, 9 Oct 2018 09:07:48 +0000 (14:37 +0530)]
common/cpt: add crypto enqueue request manager framework

Adding crypto enqueue op request manager framework. This routine won't
submit to the hardware yet.

Signed-off-by: Ankur Dwivedi <ankur.dwivedi@caviumnetworks.com>
Signed-off-by: Anoob Joseph <anoob.joseph@caviumnetworks.com>
Signed-off-by: Murthy NSSR <nidadavolu.murthy@caviumnetworks.com>
Signed-off-by: Nithin Dabilpuram <nithin.dabilpuram@caviumnetworks.com>
Signed-off-by: Ragothaman Jayaraman <rjayaraman@caviumnetworks.com>
Signed-off-by: Srisivasubramanian S <ssrinivasan@caviumnetworks.com>
Signed-off-by: Tejasree Kondoj <kondoj.tejasree@caviumnetworks.com>
5 years agocommon/cpt: add microcode interface for decryption
Ragothaman Jayaraman [Tue, 9 Oct 2018 09:07:47 +0000 (14:37 +0530)]
common/cpt: add microcode interface for decryption

Adding microcode interface additions for supporting decryption.

Signed-off-by: Ankur Dwivedi <ankur.dwivedi@caviumnetworks.com>
Signed-off-by: Anoob Joseph <anoob.joseph@caviumnetworks.com>
Signed-off-by: Murthy NSSR <nidadavolu.murthy@caviumnetworks.com>
Signed-off-by: Nithin Dabilpuram <nithin.dabilpuram@caviumnetworks.com>
Signed-off-by: Ragothaman Jayaraman <rjayaraman@caviumnetworks.com>
Signed-off-by: Srisivasubramanian S <ssrinivasan@caviumnetworks.com>
Signed-off-by: Tejasree Kondoj <kondoj.tejasree@caviumnetworks.com>
5 years agocommon/cpt: add microcode interface for encryption
Ragothaman Jayaraman [Tue, 9 Oct 2018 09:07:46 +0000 (14:37 +0530)]
common/cpt: add microcode interface for encryption

Adding microcode interface additions for supporting encryption.

Signed-off-by: Ankur Dwivedi <ankur.dwivedi@caviumnetworks.com>
Signed-off-by: Anoob Joseph <anoob.joseph@caviumnetworks.com>
Signed-off-by: Murthy NSSR <nidadavolu.murthy@caviumnetworks.com>
Signed-off-by: Nithin Dabilpuram <nithin.dabilpuram@caviumnetworks.com>
Signed-off-by: Ragothaman Jayaraman <rjayaraman@caviumnetworks.com>
Signed-off-by: Srisivasubramanian S <ssrinivasan@caviumnetworks.com>
Signed-off-by: Tejasree Kondoj <kondoj.tejasree@caviumnetworks.com>
5 years agocommon/cpt: add common defines for microcode
Nithin Dabilpuram [Tue, 9 Oct 2018 09:07:45 +0000 (14:37 +0530)]
common/cpt: add common defines for microcode

Signed-off-by: Ankur Dwivedi <ankur.dwivedi@caviumnetworks.com>
Signed-off-by: Anoob Joseph <anoob.joseph@caviumnetworks.com>
Signed-off-by: Murthy NSSR <nidadavolu.murthy@caviumnetworks.com>
Signed-off-by: Nithin Dabilpuram <nithin.dabilpuram@caviumnetworks.com>
Signed-off-by: Ragothaman Jayaraman <rjayaraman@caviumnetworks.com>
Signed-off-by: Srisivasubramanian S <ssrinivasan@caviumnetworks.com>
Signed-off-by: Tejasree Kondoj <kondoj.tejasree@caviumnetworks.com>
5 years agocrypto/octeontx: add supported sessions
Nithin Dabilpuram [Tue, 9 Oct 2018 09:07:44 +0000 (14:37 +0530)]
crypto/octeontx: add supported sessions

Adding AEAD, cipher & auth sessions support.

Signed-off-by: Ankur Dwivedi <ankur.dwivedi@caviumnetworks.com>
Signed-off-by: Anoob Joseph <anoob.joseph@caviumnetworks.com>
Signed-off-by: Murthy NSSR <nidadavolu.murthy@caviumnetworks.com>
Signed-off-by: Nithin Dabilpuram <nithin.dabilpuram@caviumnetworks.com>
Signed-off-by: Ragothaman Jayaraman <rjayaraman@caviumnetworks.com>
Signed-off-by: Srisivasubramanian S <ssrinivasan@caviumnetworks.com>
Signed-off-by: Tejasree Kondoj <kondoj.tejasree@caviumnetworks.com>
5 years agocrypto/octeontx: add session management operations
Nithin Dabilpuram [Tue, 9 Oct 2018 09:07:43 +0000 (14:37 +0530)]
crypto/octeontx: add session management operations

Adding routines for session configure, session clear and get session
size ops.

Signed-off-by: Ankur Dwivedi <ankur.dwivedi@caviumnetworks.com>
Signed-off-by: Anoob Joseph <anoob.joseph@caviumnetworks.com>
Signed-off-by: Murthy NSSR <nidadavolu.murthy@caviumnetworks.com>
Signed-off-by: Nithin Dabilpuram <nithin.dabilpuram@caviumnetworks.com>
Signed-off-by: Ragothaman Jayaraman <rjayaraman@caviumnetworks.com>
Signed-off-by: Srisivasubramanian S <ssrinivasan@caviumnetworks.com>
Signed-off-by: Tejasree Kondoj <kondoj.tejasree@caviumnetworks.com>
5 years agocrypto/octeontx: add queue pair functions
Murthy NSSR [Tue, 9 Oct 2018 09:07:42 +0000 (14:37 +0530)]
crypto/octeontx: add queue pair functions

Adding queue pair setup and release functions

Signed-off-by: Ankur Dwivedi <ankur.dwivedi@caviumnetworks.com>
Signed-off-by: Anoob Joseph <anoob.joseph@caviumnetworks.com>
Signed-off-by: Murthy NSSR <nidadavolu.murthy@caviumnetworks.com>
Signed-off-by: Nithin Dabilpuram <nithin.dabilpuram@caviumnetworks.com>
Signed-off-by: Ragothaman Jayaraman <rjayaraman@caviumnetworks.com>
Signed-off-by: Srisivasubramanian S <ssrinivasan@caviumnetworks.com>
Signed-off-by: Tejasree Kondoj <kondoj.tejasree@caviumnetworks.com>
5 years agocrypto/octeontx: add basic device operations
Murthy NSSR [Tue, 9 Oct 2018 09:07:41 +0000 (14:37 +0530)]
crypto/octeontx: add basic device operations

Adding the following dev ops,
- dev_configure
- dev_start
- dev_stop
- dev_close
- dev_infos_get
- stats_get
- stats_reset

Signed-off-by: Ankur Dwivedi <ankur.dwivedi@caviumnetworks.com>
Signed-off-by: Anoob Joseph <anoob.joseph@caviumnetworks.com>
Signed-off-by: Murthy NSSR <nidadavolu.murthy@caviumnetworks.com>
Signed-off-by: Nithin Dabilpuram <nithin.dabilpuram@caviumnetworks.com>
Signed-off-by: Ragothaman Jayaraman <rjayaraman@caviumnetworks.com>
Signed-off-by: Srisivasubramanian S <ssrinivasan@caviumnetworks.com>
Signed-off-by: Tejasree Kondoj <kondoj.tejasree@caviumnetworks.com>
5 years agocrypto/octeontx: add mailbox routines
Murthy NSSR [Tue, 9 Oct 2018 09:07:40 +0000 (14:37 +0530)]
crypto/octeontx: add mailbox routines

Adding mailbox routines to interact with the pf driver

Signed-off-by: Ankur Dwivedi <ankur.dwivedi@caviumnetworks.com>
Signed-off-by: Anoob Joseph <anoob.joseph@caviumnetworks.com>
Signed-off-by: Murthy NSSR <nidadavolu.murthy@caviumnetworks.com>
Signed-off-by: Nithin Dabilpuram <nithin.dabilpuram@caviumnetworks.com>
Signed-off-by: Ragothaman Jayaraman <rjayaraman@caviumnetworks.com>
Signed-off-by: Srisivasubramanian S <ssrinivasan@caviumnetworks.com>
Signed-off-by: Tejasree Kondoj <kondoj.tejasree@caviumnetworks.com>
5 years agocrypto/octeontx: add global resource init
Anoob Joseph [Tue, 9 Oct 2018 09:07:39 +0000 (14:37 +0530)]
crypto/octeontx: add global resource init

Adding initialization of global resources. This will be saved as
metadata in cptvf and would be used by common code. Exit path for
failure case is also added along with the new routines.

Signed-off-by: Ankur Dwivedi <ankur.dwivedi@caviumnetworks.com>
Signed-off-by: Anoob Joseph <anoob.joseph@caviumnetworks.com>
Signed-off-by: Murthy NSSR <nidadavolu.murthy@caviumnetworks.com>
Signed-off-by: Nithin Dabilpuram <nithin.dabilpuram@caviumnetworks.com>
Signed-off-by: Ragothaman Jayaraman <rjayaraman@caviumnetworks.com>
Signed-off-by: Srisivasubramanian S <ssrinivasan@caviumnetworks.com>
Signed-off-by: Tejasree Kondoj <kondoj.tejasree@caviumnetworks.com>
5 years agocommon/cpt: add PMD ops helper functions
Anoob Joseph [Tue, 9 Oct 2018 09:07:38 +0000 (14:37 +0530)]
common/cpt: add PMD ops helper functions

Adding pmd ops helper functions. Control path accessed APIs would be
added as helper functions. Adding microcode defined macros etc as
dependencies to the helper functions.

Signed-off-by: Ankur Dwivedi <ankur.dwivedi@caviumnetworks.com>
Signed-off-by: Anoob Joseph <anoob.joseph@caviumnetworks.com>
Signed-off-by: Murthy NSSR <nidadavolu.murthy@caviumnetworks.com>
Signed-off-by: Nithin Dabilpuram <nithin.dabilpuram@caviumnetworks.com>
Signed-off-by: Ragothaman Jayaraman <rjayaraman@caviumnetworks.com>
Signed-off-by: Srisivasubramanian S <ssrinivasan@caviumnetworks.com>
Signed-off-by: Tejasree Kondoj <kondoj.tejasree@caviumnetworks.com>
5 years agocrypto/octeontx: add symmetric capabilities
Ankur Dwivedi [Tue, 9 Oct 2018 09:07:37 +0000 (14:37 +0530)]
crypto/octeontx: add symmetric capabilities

This patch adds the symmetric algorithms capabilities
supported by octeontx crypto hardware.

Signed-off-by: Ankur Dwivedi <ankur.dwivedi@caviumnetworks.com>
Signed-off-by: Anoob Joseph <anoob.joseph@caviumnetworks.com>
Signed-off-by: Murthy NSSR <nidadavolu.murthy@caviumnetworks.com>
Signed-off-by: Nithin Dabilpuram <nithin.dabilpuram@caviumnetworks.com>
Signed-off-by: Ragothaman Jayaraman <rjayaraman@caviumnetworks.com>
Signed-off-by: Srisivasubramanian S <ssrinivasan@caviumnetworks.com>
Signed-off-by: Tejasree Kondoj <kondoj.tejasree@caviumnetworks.com>
5 years agocrypto/octeontx: add hardware register access for misc poll
Ankur Dwivedi [Tue, 9 Oct 2018 09:07:36 +0000 (14:37 +0530)]
crypto/octeontx: add hardware register access for misc poll

Adding hardware register accesses required for misc poll

Signed-off-by: Ankur Dwivedi <ankur.dwivedi@caviumnetworks.com>
Signed-off-by: Anoob Joseph <anoob.joseph@caviumnetworks.com>
Signed-off-by: Murthy NSSR <nidadavolu.murthy@caviumnetworks.com>
Signed-off-by: Nithin Dabilpuram <nithin.dabilpuram@caviumnetworks.com>
Signed-off-by: Ragothaman Jayaraman <rjayaraman@caviumnetworks.com>
Signed-off-by: Srisivasubramanian S <ssrinivasan@caviumnetworks.com>
Signed-off-by: Tejasree Kondoj <kondoj.tejasree@caviumnetworks.com>
5 years agocrypto/octeontx: add hardware init routine
Ankur Dwivedi [Tue, 9 Oct 2018 09:07:35 +0000 (14:37 +0530)]
crypto/octeontx: add hardware init routine

Adding hardware init routine for OCTEON TX crypto device. A place holder
is added for misc polling routine. That will be added in the further
patches.

Signed-off-by: Ankur Dwivedi <ankur.dwivedi@caviumnetworks.com>
Signed-off-by: Anoob Joseph <anoob.joseph@caviumnetworks.com>
Signed-off-by: Murthy NSSR <nidadavolu.murthy@caviumnetworks.com>
Signed-off-by: Nithin Dabilpuram <nithin.dabilpuram@caviumnetworks.com>
Signed-off-by: Ragothaman Jayaraman <rjayaraman@caviumnetworks.com>
Signed-off-by: Srisivasubramanian S <ssrinivasan@caviumnetworks.com>
Signed-off-by: Tejasree Kondoj <kondoj.tejasree@caviumnetworks.com>
5 years agocrypto/octeontx: add PMD skeleton
Anoob Joseph [Tue, 9 Oct 2018 09:07:34 +0000 (14:37 +0530)]
crypto/octeontx: add PMD skeleton

Adding OCTEON TX crypto PMD skeleton. Updating the maintainers files to
claim responsibility. Also enabling driver by default by adding the
component in common_base.

Signed-off-by: Ankur Dwivedi <ankur.dwivedi@caviumnetworks.com>
Signed-off-by: Anoob Joseph <anoob.joseph@caviumnetworks.com>
Signed-off-by: Murthy NSSR <nidadavolu.murthy@caviumnetworks.com>
Signed-off-by: Nithin Dabilpuram <nithin.dabilpuram@caviumnetworks.com>
Signed-off-by: Ragothaman Jayaraman <rjayaraman@caviumnetworks.com>
Signed-off-by: Srisivasubramanian S <ssrinivasan@caviumnetworks.com>
Signed-off-by: Tejasree Kondoj <kondoj.tejasree@caviumnetworks.com>
5 years agocompressdev: fix compression API description
Tomasz Jozwiak [Fri, 28 Sep 2018 13:14:28 +0000 (15:14 +0200)]
compressdev: fix compression API description

This patch fixes following API descriptions
  -  rte_comp_op_raw_bulk_alloc
  -  rte_comp_op_bulk_alloc

Fixes: 96086db5a369 ("compressdev: add operation management")
Cc: stable@dpdk.org
Signed-off-by: Tomasz Jozwiak <tomaszx.jozwiak@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
5 years agocrypto/mvsam: add dynamic logging
Tomasz Duszynski [Mon, 27 Aug 2018 12:22:54 +0000 (14:22 +0200)]
crypto/mvsam: add dynamic logging

Add dynamic logging support to mvsam crypto PMD.

Signed-off-by: Tomasz Duszynski <tdu@semihalf.com>
5 years agocrypto/mvsam: use common initialization
Dmitri Epshtein [Mon, 27 Aug 2018 12:22:53 +0000 (14:22 +0200)]
crypto/mvsam: use common initialization

Use common initialization to reduce boilerplate code.

Signed-off-by: Dmitri Epshtein <dima@marvell.com>
Signed-off-by: Tomasz Duszynski <tdu@semihalf.com>
Reviewed-by: Natalie Samsonov <nsamsono@marvell.com>
5 years agocrypto/mvsam: support scatter gather
Zyta Szpak [Mon, 27 Aug 2018 12:22:52 +0000 (14:22 +0200)]
crypto/mvsam: support scatter gather

The patch adds support for chained source mbufs given
to crypto operations. The crypto engine accepts source buffer
containing a number of segments. The destination buffer
stays the same - always one segment.
On decryption, EIP engine will look for digest at 'auth_icv_offset'
offset in SRC buffer.It must be placed in the last segment and the
offset must be set to reach digest in the last segment.
If application doesn't placed digest in source mbuf, driver try to
copy it to a last segment.

Signed-off-by: Zyta Szpak <zr@semihalf.com>
Signed-off-by: Natalie Samsonov <nsamsono@marvell.com>
Reviewed-by: Dmitri Epshtein <dima@marvell.com>
5 years agocrypto/mvsam: add 3DES ECB to the capabilities list
Tomasz Duszynski [Fri, 21 Sep 2018 14:53:59 +0000 (16:53 +0200)]
crypto/mvsam: add 3DES ECB to the capabilities list

3DES in ECB mode is supported by the PMD thus specific
entry should exist in the crypto PMD capabilities list.

Signed-off-by: Tomasz Duszynski <tdu@semihalf.com>
Reviewed-by: Natalie Samsonov <nsamsono@marvell.com>
5 years agocrypto/mvsam: support crypto/auth NULL algorithms
Tomasz Duszynski [Fri, 21 Sep 2018 14:53:58 +0000 (16:53 +0200)]
crypto/mvsam: support crypto/auth NULL algorithms

Add support for both cipher and auth NULL algorithms.

Signed-off-by: Tomasz Duszynski <tdu@semihalf.com>
Reviewed-by: Natalie Samsonov <nsamsono@marvell.com>
5 years agocrypto/mvsam: support AES ECB
Tomasz Duszynski [Fri, 21 Sep 2018 14:53:57 +0000 (16:53 +0200)]
crypto/mvsam: support AES ECB

Add support for AES128/192/256 in ECB mode.

Signed-off-by: Tomasz Duszynski <tdu@semihalf.com>
Reviewed-by: Natalie Samsonov <nsamsono@marvell.com>
5 years agocrypto/mvsam: support HMAC SHA224
Tomasz Duszynski [Fri, 21 Sep 2018 14:53:56 +0000 (16:53 +0200)]
crypto/mvsam: support HMAC SHA224

Add support for the HMAC SHA224 authentication algorithm.

Signed-off-by: Tomasz Duszynski <tdu@semihalf.com>
Reviewed-by: Natalie Samsonov <nsamsono@marvell.com>
5 years agocrypto/mvsam: update hash digest sizes
Szymon Sliwa [Fri, 21 Sep 2018 14:53:55 +0000 (16:53 +0200)]
crypto/mvsam: update hash digest sizes

Update hash digest sizes to match hardware capabilities.

Cc: stable@dpdk.org
Signed-off-by: Szymon Sliwa <szs@semihalf.com>
Reviewed-by: Yelena Krivosheev <yelena@marvell.com>
Reviewed-by: Natalie Samsonov <nsamsono@marvell.com>
5 years agocrypto/mvsam: fix shared library build
Tomasz Duszynski [Fri, 21 Sep 2018 14:53:54 +0000 (16:53 +0200)]
crypto/mvsam: fix shared library build

Add missing rte_kvargs library dependency. Without that
shared library build fails due to unresolved rte_kvargs_* symbols.

Fixes: 25b05a1c806b ("crypto/mvsam: parse max number of sessions")
Cc: stable@dpdk.org
Signed-off-by: Tomasz Duszynski <tdu@semihalf.com>
5 years agocrypto/mvsam: update features list
Tomasz Duszynski [Tue, 4 Sep 2018 13:59:49 +0000 (15:59 +0200)]
crypto/mvsam: update features list

Add following features to the device's features list
and update documentation accordingly:
* OOP SGL in LB out
* OOP LB in LB out

Signed-off-by: Tomasz Duszynski <tdu@semihalf.com>
5 years agodoc: update mvsam guide
Dmitri Epshtein [Tue, 4 Sep 2018 13:59:48 +0000 (15:59 +0200)]
doc: update mvsam guide

Update mvsam documentation.

Signed-off-by: Dmitri Epshtein <dima@marvell.com>
Signed-off-by: Tomasz Duszynski <tdu@semihalf.com>
Signed-off-by: Natalie Samsonov <nsamsono@marvell.com>
5 years agoeal: allow probing a device again
Thomas Monjalon [Wed, 19 Sep 2018 23:37:14 +0000 (01:37 +0200)]
eal: allow probing a device again

In the devargs syntax for device representors, it is possible to add
several devices at once: -w dbdf,representor=[0-3]
It will become a more frequent case when introducing wildcards
and ranges in the new devargs syntax.

If a devargs string is provided for probing, and updated with a bigger
range for a new probing, then we do not want it to fail because
part of this range was already probed previously.
There can be new ports to create from an existing rte_device.

That's why the check for an already probed device
is moved as bus responsibility.
In the case of vdev, a global check is kept in insert_vdev(),
assuming that a vdev will always have only one port.
In the case of ifpga and vmbus, already probed devices are checked.
In the case of NXP buses, the probing is done only once (no hotplug),
though a check is added at bus level for consistency.
In the case of PCI, a driver flag is added to allow PMD probing again.
Only the PMD knows the ports attached to one rte_device.

As another consequence of being able to probe in several steps,
the field rte_device.devargs must not be considered as a full
representation of the rte_device, but only the latest probing args.
Anyway, the field rte_device.devargs is used only for probing.

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Reviewed-by: Andrew Rybchenko <arybchenko@solarflare.com>
Tested-by: Andrew Rybchenko <arybchenko@solarflare.com>
Acked-by: Shreyansh Jain <shreyansh.jain@nxp.com>
5 years agoeal: add function to query device status
Thomas Monjalon [Tue, 25 Sep 2018 20:55:27 +0000 (22:55 +0200)]
eal: add function to query device status

The function rte_dev_is_probed() is added in order to improve semantic
and enforce proper check of the probing status of a device.

It will answer this rte_device query:
Is it already successfully probed or not?

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Reviewed-by: Andrew Rybchenko <arybchenko@solarflare.com>
Tested-by: Andrew Rybchenko <arybchenko@solarflare.com>
5 years agodrivers/bus: move driver assignment to end of probing
Thomas Monjalon [Tue, 25 Sep 2018 20:55:27 +0000 (22:55 +0200)]
drivers/bus: move driver assignment to end of probing

The PCI mapping requires to know the PCI driver to use,
even before the probing is done. That's why the PCI driver is
referenced early inside the PCI device structure. See
commit 1d20a073fa5e ("bus/pci: reference driver structure before mapping")

However the rte_driver does not need to be referenced in rte_device
before the device probing is done.
By moving back this assignment at the end of the device probing,
it becomes possible to make clear the status of a rte_device.

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Reviewed-by: Andrew Rybchenko <arybchenko@solarflare.com>
Tested-by: Andrew Rybchenko <arybchenko@solarflare.com>
Reviewed-by: Rosen Xu <rosen.xu@intel.com>
5 years agocompressdev: remove driver name from logs
Thomas Monjalon [Fri, 12 Oct 2018 14:37:28 +0000 (16:37 +0200)]
compressdev: remove driver name from logs

The logs printed by COMPRESSDEV_LOG were prefixed with the driver name.

In order to avoid assigning the driver before the end of the probing,
the driver name is removed from the compressdev library logs.

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
5 years agocryptodev: remove driver name from logs
Thomas Monjalon [Fri, 12 Oct 2018 14:37:12 +0000 (16:37 +0200)]
cryptodev: remove driver name from logs

The logs printed by CDEV_LOG_* were prefixed with the driver name.

In order to avoid assigning the driver before the end of the probing,
the driver name is removed from the cryptodev library logs.

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
5 years agoethdev: rename memzones allocated for DMA
Thomas Monjalon [Thu, 11 Oct 2018 12:58:49 +0000 (14:58 +0200)]
ethdev: rename memzones allocated for DMA

The helper rte_eth_dma_zone_reserve() is called by PMDs
when probing a new port.
It creates a new memzone with an unique name.
The name of this memzone was using the name of the driver
doing the probe.

In order to avoid assigning the driver before the end of the probing,
the driver name is removed from these memzone names.
The ethdev name (data->name) is not used because it may be too long
and may be not set at this stage of probing.

Syntax of old name: <driver>_<ring>_<port>_<queue>
Syntax of new name: eth_p<port>_q<queue>_<ring>

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Tested-by: Andrew Rybchenko <arybchenko@solarflare.com>
5 years agonet/mlx5: remove useless driver name comparison
Thomas Monjalon [Sun, 14 Oct 2018 13:06:54 +0000 (15:06 +0200)]
net/mlx5: remove useless driver name comparison

The function mlx5_dev_to_port_id() is returning all the ports
associated to a rte_device.
It was comparing driver names while already comparing rte_device pointers.
If two devices are the same, they will have the same driver.
So the useless driver name comparison is removed.

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Shahaf Shuler <shahafs@mellanox.com>
5 years agoexamples/multi_process: add hotplug sample
Qi Zhang [Tue, 16 Oct 2018 00:16:32 +0000 (08:16 +0800)]
examples/multi_process: add hotplug sample

The sample code demonstrates device (ethdev only) management
at a multi-process environment. The user can attach/detach a
device on primary process and see it is synced on secondary
process automatically.

How to start?
./hotplug_mp --proc-type=auto

Command Line Example:

>help
>list

/* attach a pci device */
> attach 0000:81:00.0

/* detach the pci device */
> detach 0000:81:00.0

/* attach a vdev af_packet device */
> attach net_af_packet,iface=eth0

/* detach the vdev af_packet device */
> detach net_af_packet

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
5 years agodrivers/net: enable device detach on secondary process
Qi Zhang [Tue, 16 Oct 2018 00:16:31 +0000 (08:16 +0800)]
drivers/net: enable device detach on secondary process

With the enabling for hotplug on multi-process,
rte_eth_dev_pci_generic_remove can be used to detach the device from
a secondary process also. But we need to take care of the uninit callback
parameter to make sure it handles the secondary case correctly.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
5 years agodrivers/net: enable hotplug on secondary process
Qi Zhang [Tue, 16 Oct 2018 00:16:30 +0000 (08:16 +0800)]
drivers/net: enable hotplug on secondary process

Attach port from secondary should ignore devargs since the private
device is not necessary to support. Also previously, detach port on
a secondary process will mess primary process and cause the same
device can't be attached back again. A secondary process should use
rte_eth_dev_release_port_secondary to release a port.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
5 years agoeal: support attach/detach shared device from secondary
Qi Zhang [Tue, 16 Oct 2018 00:16:29 +0000 (08:16 +0800)]
eal: support attach/detach shared device from secondary

This patch cover the multi-process hotplug case when a device
attach/detach request be issued from a secondary process

device attach on secondary:
a) secondary send sync request to the primary.
b) primary receive the request and attach the new device if
   failed goto i).
c) primary forward attach sync request to all secondary.
d) secondary receive the request and attach the device and send a reply.
e) primary check the reply if all success goes to j).
f) primary send attach rollback sync request to all secondary.
g) secondary receive the request and detach the device and send a reply.
h) primary receive the reply and detach device as rollback action.
i) send attach fail to secondary as a reply of step a), goto k).
j) send attach success to secondary as a reply of step a).
k) secondary receive reply and return.

device detach on secondary:
a) secondary send sync request to the primary.
b) primary send detach sync request to all secondary.
c) secondary detach the device and send a reply.
d) primary check the reply if all success goes to g).
e) primary send detach rollback sync request to all secondary.
f) secondary receive the request and attach back device. goto h).
g) primary detach the device if success goto i), else goto e).
h) primary send detach fail to secondary as a reply of step a), goto j).
i) primary send detach success to secondary as a reply of step a).
j) secondary receive reply and return.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Anatoly Burakov <anatoly.burakov@intel.com>
5 years agoeal: enable hotplug on multi-process
Qi Zhang [Tue, 16 Oct 2018 00:16:28 +0000 (08:16 +0800)]
eal: enable hotplug on multi-process

We are going to introduce the solution to handle hotplug in
multi-process, it includes the below scenario:

1. Attach a device from the primary
2. Detach a device from the primary
3. Attach a device from a secondary
4. Detach a device from a secondary

In the primary-secondary process model, we assume devices are shared
by default. that means attaches or detaches a device on any process
will broadcast to all other processes through mp channel then device
information will be synchronized on all processes.

Any failure during attaching/detaching process will cause inconsistent
status between processes, so proper rollback action should be considered.

This patch covers the implementation of case 1,2.
Case 3,4 will be implemented on a separate patch.

IPC scenario for Case 1, 2:

attach a device
a) primary attach the new device if failed goto h).
b) primary send attach sync request to all secondary.
c) secondary receive request and attach the device and send a reply.
d) primary check the reply if all success goes to i).
e) primary send attach rollback sync request to all secondary.
f) secondary receive the request and detach the device and send a reply.
g) primary receive the reply and detach device as rollback action.
h) attach fail
i) attach success

detach a device
a) primary send detach sync request to all secondary
b) secondary detach the device and send reply
c) primary check the reply if all success goes to f).
d) primary send detach rollback sync request to all secondary.
e) secondary receive the request and attach back device. goto g)
f) primary detach the device if success goto g), else goto d)
g) detach fail.
h) detach success.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Anatoly Burakov <anatoly.burakov@intel.com>
5 years agoethdev: add function to release port in secondary process
Qi Zhang [Tue, 16 Oct 2018 00:16:27 +0000 (08:16 +0800)]
ethdev: add function to release port in secondary process

Add driver API rte_eth_release_port_secondary to support the
case when an ethdev need to be detached on a secondary process.
Local state is set to unused and shared data will not be reset
so the primary process can still use it.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
5 years agovfio: fix missing header inclusion
Jerin Jacob [Wed, 17 Oct 2018 05:30:28 +0000 (05:30 +0000)]
vfio: fix missing header inclusion

The following change set introduces HAVE_VFIO_DEV_REQ_INTERFACE
and used in the below files.

drivers/bus/pci/linux/pci_vfio.c
drivers/bus/pci/pci_common.c
lib/librte_eal/linuxapp/eal/eal_interrupts.c

However, Except the first file, the change missed to include
<rte_vfio.h> where HAVE_VFIO_DEV_REQ_INTERFACE defined.
This creates runtime following error on vfio-pci mode and
kernel >= 4.0.0 combination.

EAL: [rte_intr_enable] Unknown handle type of fd 95
EAL: [pci_vfio_enable_notifier]Fail to enable req notifier.
EAL: Fail to unregister req notifier handler.
EAL: Error setting up notifier!
EAL: Requested device 0000:07:00.1 cannot be used

Fixes: cda94419964f ("vfio: fix build with Linux < 4.0")

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@caviumnetworks.com>
5 years agonet/dpaa2: fix MAC address initialization
Shreyansh Jain [Wed, 17 Oct 2018 06:04:25 +0000 (06:04 +0000)]
net/dpaa2: fix MAC address initialization

Build error:
https://mails.dpdk.org/archives/test-report/2018-October/066840.html

Fixes: c3e0a706fd75 ("net/dpaa2: read hardware provided MAC for DPNI devices")

Signed-off-by: Shreyansh Jain <shreyansh.jain@nxp.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
5 years agonet/dpaa2: support Rx checksum offload in slow parsing
Hemant Agrawal [Fri, 12 Oct 2018 10:04:26 +0000 (15:34 +0530)]
net/dpaa2: support Rx checksum offload in slow parsing

This is required for new mode for LX2 platform specifically

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
5 years agonet/dpaa2: support VLAN TCI population from HW parser
Hemant Agrawal [Fri, 12 Oct 2018 10:04:25 +0000 (15:34 +0530)]
net/dpaa2: support VLAN TCI population from HW parser

This patch adds the support to update the mbuf vlan tci field
from the HW parse results in annotation area.

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
5 years agonet/dpaa2: enhance queue memory cleanup
Hemant Agrawal [Fri, 12 Oct 2018 10:04:24 +0000 (15:34 +0530)]
net/dpaa2: enhance queue memory cleanup

Earlier the tx queue data was getting cleaned up in close
while rest of the functionality was in un-init.
Now a new func is created to free queue memory.

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
5 years agonet/dpaa2: optimize fd reset in Tx path
Hemant Agrawal [Fri, 12 Oct 2018 10:04:23 +0000 (15:34 +0530)]
net/dpaa2: optimize fd reset in Tx path

various field of FD structure was getting reset in scattered
fashion. This patch align them in single macro.

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
5 years agonet/dpaa2: update RSS value in mbuf for LX2
Hemant Agrawal [Fri, 12 Oct 2018 10:04:22 +0000 (15:34 +0530)]
net/dpaa2: update RSS value in mbuf for LX2

This patch copies the flc based hw provided hash results
to the mbuf rss field for lx2 platform only.

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
5 years agonet/dpaa2: support statistics per queue
Shreyansh Jain [Fri, 12 Oct 2018 10:04:21 +0000 (15:34 +0530)]
net/dpaa2: support statistics per queue

For now, only the packet count stats per queue is available. This is
part of xstats output (though, per queue stats are actually part of
rte_eth_stats basic stats).

Signed-off-by: Shreyansh Jain <shreyansh.jain@nxp.com>
5 years agonet/dpaa2: read hardware provided MAC for DPNI devices
Shreyansh Jain [Fri, 12 Oct 2018 10:04:20 +0000 (15:34 +0530)]
net/dpaa2: read hardware provided MAC for DPNI devices

Firmware would contain pre-configured devices for each DPMAC backing
a DPNI. This patch reads those MAC address when the device is
initialized and sets it. THereafter, it can be changed through API or
commands from testpmd.

Signed-off-by: Shreyansh Jain <shreyansh.jain@nxp.com>
5 years agobus/fslmc: disable annotation prefetch for LX2
Nipun Gupta [Fri, 12 Oct 2018 10:04:19 +0000 (15:34 +0530)]
bus/fslmc: disable annotation prefetch for LX2

In case of LX2 we get parse result summary in FD. We do not need to
prefetch and read the annotation to fetch the parse results.

Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
5 years agobus/fslmc: support 32 enqueues/dequeues for LX2
Nipun Gupta [Fri, 12 Oct 2018 10:04:18 +0000 (15:34 +0530)]
bus/fslmc: support 32 enqueues/dequeues for LX2

LX2 can support upto 32 frames in one hw pull request.

Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
5 years agobus/fslmc: support memory backed portals with QBMAN 5.0
Nipun Gupta [Fri, 12 Oct 2018 10:04:17 +0000 (15:34 +0530)]
bus/fslmc: support memory backed portals with QBMAN 5.0

This new mode is available in LX2160 platform. The code
dynamically detect the underlying qbman version and choose
the mode at runtime.

Signed-off-by: Youri Querry <youri.querry_1@nxp.com>
Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>