regex/mlx5: improve error messages in RXP rules flush
authorMichael Baum <michaelba@nvidia.com>
Wed, 18 Nov 2020 17:00:09 +0000 (17:00 +0000)
committerThomas Monjalon <thomas@monjalon.net>
Sun, 22 Nov 2020 13:53:24 +0000 (14:53 +0100)
During the rules flush, the rxp_poll_csr_for_value function is called
twice. The rxp_poll_csr_for_value function can fail for two reasons:
1. It could not read the value from register, in which case the
function returns -1.
2. It read a value, but not the value it expected to receive. In this
case it returns -EBUSY.

When the function fails it prints an error message that is relevant only
for a second type of failure. Moreover, for failure of the first type it
prints a value of an uninitialized variable.
In case of success, the function prints a debug message about the number
of cycles it took. This line was probably copied by mistake, since the
variable it reads from, is always equal to 0 and is not an indicator of
the number of cycles.

Remove the incorrect line about the cycles, and reduce the error print
only for the relevant error.

Fixes: b34d816363b5 ("regex/mlx5: support rules import")
Cc: stable@dpdk.org
Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Ori Kam <orika@nvidia.com>
drivers/regex/mlx5/mlx5_rxp.c

index ba78cc0..fcbc766 100644 (file)
@@ -179,12 +179,14 @@ rxp_flush_rules(struct ibv_context *ctx, struct mlx5_rxp_rof_entry *rules,
                                     count, ~0,
                                     MLX5_RXP_POLL_CSR_FOR_VALUE_TIMEOUT, id);
        if (ret < 0) {
-               DRV_LOG(ERR, "Rules not rx by RXP: credit: %d, depth: %d", val,
-                       fifo_depth);
+               if (ret == -EBUSY)
+                       DRV_LOG(ERR, "Rules not rx by RXP: credit: %d, depth:"
+                               " %d", val, fifo_depth);
+               else
+                       DRV_LOG(ERR, "CSR poll failed, can't read value!");
                return ret;
        }
        DRV_LOG(DEBUG, "RTRU FIFO depth: 0x%x", fifo_depth);
-       DRV_LOG(DEBUG, "Rules flush took %d cycles.", ret);
        ret = mlx5_devx_regex_register_read(ctx, id, MLX5_RXP_RTRU_CSR_CTRL,
                                            &val);
        if (ret) {
@@ -203,10 +205,12 @@ rxp_flush_rules(struct ibv_context *ctx, struct mlx5_rxp_rof_entry *rules,
                                     MLX5_RXP_RTRU_CSR_STATUS_UPDATE_DONE,
                                     MLX5_RXP_POLL_CSR_FOR_VALUE_TIMEOUT, id);
        if (ret < 0) {
-               DRV_LOG(ERR, "Rules update timeout: 0x%08X", val);
+               if (ret == -EBUSY)
+                       DRV_LOG(ERR, "Rules update timeout: 0x%08X", val);
+               else
+                       DRV_LOG(ERR, "CSR poll failed, can't read value!");
                return ret;
        }
-       DRV_LOG(DEBUG, "Rules update took %d cycles", ret);
        if (mlx5_devx_regex_register_read(ctx, id, MLX5_RXP_RTRU_CSR_CTRL,
                                          &val)) {
                DRV_LOG(ERR, "CSR read failed!");
@@ -215,7 +219,7 @@ rxp_flush_rules(struct ibv_context *ctx, struct mlx5_rxp_rof_entry *rules,
        val &= ~(MLX5_RXP_RTRU_CSR_CTRL_GO);
        if (mlx5_devx_regex_register_write(ctx, id, MLX5_RXP_RTRU_CSR_CTRL,
                                           val)) {
-               DRV_LOG(ERR, "CSR write write failed!");
+               DRV_LOG(ERR, "CSR write failed!");
                return -1;
        }