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app/testpmd: force shared Rx queue polled on same core
2021-10-21 Xueming Liapp/testpmd: force shared Rx queue polled on same core
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-10-21 Xueming Liapp/testpmd: dump port info for shared Rx queue
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-10-21 Xueming Liapp/testpmd: add parameter for shared Rx queue
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-10-21 Xueming Liapp/testpmd: dump device capability and Rx domain info
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-10-21 Xueming Liethdev: get device capability name as string
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-10-21 Xueming Liethdev: introduce shared Rx queue
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-10-21 Xueming Livdpa/mlx5: retry VAR allocation during vDPA restart
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-10-21 Xueming Livdpa/mlx5: workaround FW first completion in start
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-10-21 Xueming Linet/mlx5: check DevX to support more Verbs ports
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-10-21 Xueming Linet/mlx5: enable DevX Tx queue creation
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-10-21 Xueming Linet/mlx5: fix internal root table flow priority
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-10-21 Xueming Linet/mlx5: support flow item of normal Tx queue
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-10-21 Xueming Linet/mlx5: support E-Switch manager egress traffic match
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-10-21 Xueming Linet/mlx5: improve Verbs flow priority discovery
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-10-21 Xueming Linet/mlx5: use Netlink when IB port greater than 255
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-10-21 Xueming Licommon/mlx5: get RDMA port state via Netlink
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-10-21 Xueming Litest: add devargs test cases
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-10-21 Xueming Lidevargs: make bus optional
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-10-21 Xueming Lidevargs: support path value with global device syntax
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-10-15 Xueming Linet/bonding: fix Tx queue release
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-10-06 Xueming Liethdev: change queue release callback
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-10-06 Xueming Liethdev: make queue release callback optional
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-09-29 Xueming Linet/mlx5: support new global device syntax
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-09-28 Xueming Linet/virtio: wait device ready during reset
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-09-27 Xueming Livdpa/mlx5: fix large VM memory region registration
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-09-27 Xueming Lisched: get 64-bit greatest common divisor
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-09-02 Xueming Lidevargs: parse global device syntax
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-09-02 Xueming Libus: add device arguments name parsing
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-08-07 Xueming Lidoc: announce ethdev flag and field for shared queue
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-07-22 Xueming Linet/mlx5: fix SF representor probing in isolate mode
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-07-21 Xueming Licommon/mlx5: remove legacy PCI driver
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-07-21 Xueming Licrypto/mlx5: migrate to bus-agnostic common interface
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-07-21 Xueming Licompress/mlx5: migrate to bus-agnostic common interface
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-07-21 Xueming Liregex/mlx5: migrate to bus-agnostic common interface
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-07-21 Xueming Linet/mlx5: check maximum Verbs port number
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-07-21 Xueming Linet/mlx5: support Sub-Function
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-07-21 Xueming Linet/mlx5: migrate to bus-agnostic common interface
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-07-21 Xueming Linet/mlx5: reduce PCI dependency
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-07-21 Xueming Licommon/mlx5: support auxiliary bus
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-07-21 Xueming Licommon/mlx5: add bus-agnostic layer
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-07-21 Xueming Licommon/mlx5: rename ethernet device class
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-06-30 Xueming Livdpa/mlx5: fix TSO offload without checksum
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-07-05 Xueming Libus/auxiliary: introduce auxiliary bus
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-07-05 Xueming Lidevargs: add common key definition
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-05-12 Xueming Linet/mlx5: fix LAG representor probing on PF1 PCI
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-05-04 Xueming Linet/virtio: fix vectorized Rx queue rearm
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-04-19 Xueming Lidevargs: fix list entry update
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-04-14 Xueming Likvargs: add get by key
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-04-14 Xueming Lidevargs: fix memory leak on parsing failure
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-04-14 Xueming Lidevargs: unify scratch buffer storage
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-03-31 Xueming Linet/mlx5: probe host PF representor with sub-function
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-03-31 Xueming Linet/mlx5: improve xstats of bonding port
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-03-31 Xueming Linet/mlx5: fix setting VF default MAC through representor
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-03-31 Xueming Linet/mlx5: save bonding member ports information
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-03-31 Xueming Linet/mlx5: support list of representor PF
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-03-31 Xueming Linet/mlx5: refactor bonding representor probing
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-03-31 Xueming Linet/mlx5: revert setting bonding representor to first PF
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-03-31 Xueming Linet/mlx5: support sub-function representor
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-03-31 Xueming Licommon/mlx5: support sub-function representor parsing
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-03-17 Xueming Liethdev: add helper function to get representor ID
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-03-17 Xueming Liethdev: add API to get representor info
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-03-16 Xueming Liethdev: support multi-host in representor
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-03-16 Xueming Liethdev: support PF index in representor
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-03-16 Xueming Likvargs: support multiple lists
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-03-16 Xueming Liethdev: support sub-function representor
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-03-16 Xueming Liethdev: support new VF representor syntax
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-03-16 Xueming Liethdev: refactor representor port list parsing
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-03-16 Xueming Liethdev: introduce representor type
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-01-08 Xueming Livdpa/mlx5: add hardware queue moderation
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-01-08 Xueming Licommon/mlx5: support vDPA completion queue moderation
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-01-08 Xueming Livdpa/mlx5: set default event mode to polling
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-01-08 Xueming Livdpa/mlx5: add CPU core parameter to bind polling thread
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-01-08 Xueming Livdpa/mlx5: default polling mode delay time to zero
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2021-01-08 Xueming Livdpa/mlx5: set polling mode default delay to zero
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2020-11-20 Xueming Linet/mlx5: set representor to first PF in bonding mode
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2020-11-20 Xueming Linet/mlx5: fix flow index type
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2020-11-13 Xueming Linet/mlx5: fix nested flow creation
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2020-11-13 Xueming Linet/mlx5: fix Unix socket path
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2020-11-13 Xueming Linet/mlx5: fix missing meter packet
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2020-11-03 Xueming Livdpa/mlx5: specify lag port affinity
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2020-11-03 Xueming Licommon/mlx5: get number of ports that can be bonded
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2020-11-03 Xueming Livdpa/mlx5: handle hardware error
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2020-11-03 Xueming Licommon/mlx5: add virtq attributes error fields
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2020-11-03 Xueming Linet/mlx5: remove shared context lock
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2020-11-03 Xueming Linet/mlx5: make push VLAN action cache thread safe
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2020-11-03 Xueming Linet/mlx5: make port ID action cache thread safe
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2020-11-03 Xueming Linet/mlx5: make matcher list thread safe
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2020-11-03 Xueming Linet/mlx5: introduce thread safe linked list cache
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2020-11-03 Xueming Linet/mlx5: make metadata copy flow list thread safe
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2020-11-03 Xueming Linet/mlx5: make flow modify action list thread safe
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2020-11-03 Xueming Linet/mlx5: make flow tag list thread safe
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2020-11-03 Xueming Linet/mlx5: make flow table cache thread safe
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2020-11-03 Xueming Linet/mlx5: support concurrent access for hash list
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2020-11-03 Xueming Linet/mlx5: make flow list thread safe
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2020-11-03 Xueming Linet/mlx5: use indexed pool as id generator
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2020-11-03 Xueming Linet/mlx5: support zero size entry for indexed pool
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2020-11-03 Xueming Linet/mlx5: reuse flow id as hairpin id
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2020-11-03 Xueming Linet/mlx5: use thread specific flow workspace
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2020-11-03 Xueming Linet/mlx5: fix port shared data reference count
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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2020-10-09 Xueming Linet/mlx5: disable dump of Verbs flows
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
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