dpdk.git
3 years agonet/i40e: refactor RSS flow
Alvin Zhang [Fri, 8 Jan 2021 05:35:40 +0000 (13:35 +0800)]
net/i40e: refactor RSS flow

1. Delete original code.
2. Add 2 tables(One maps flow pattern and RSS type to PCTYPE,
   another maps RSS type to input set).
3. Parse RSS pattern and RSS type to get PCTYPE.
4. Parse RSS action to get queues, RSS function and hash field.
5. Create and destroy RSS filters.
6. Create new files for hash flows.

Signed-off-by: Alvin Zhang <alvinx.zhang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
3 years agonet/i40e: fix returned code for RSS hardware failure
Alvin Zhang [Fri, 8 Jan 2021 05:35:39 +0000 (13:35 +0800)]
net/i40e: fix returned code for RSS hardware failure

The API should return the system error status, but it returned the
hardware error status, this is confuses the caller.
This patch adds check on hardware execution status and returns -EIO
in case of hardware execution failure.

Fixes: 1d4b2b4966bb ("net/i40e: fix VF overwrite PF RSS LUT for X722")
Fixes: d0a349409bd7 ("i40e: support AQ based RSS config")
Cc: stable@dpdk.org
Signed-off-by: Alvin Zhang <alvinx.zhang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
3 years agodoc: fix RSS flow description in i40e guide
Alvin Zhang [Fri, 8 Jan 2021 05:35:38 +0000 (13:35 +0800)]
doc: fix RSS flow description in i40e guide

The command here does not create a queue region, but only sets the
lookup table, so the descriptions in the doc is not exact.

Fixes: feaae285b342 ("net/i40e: support hash configuration in RSS flow")
Cc: stable@dpdk.org
Signed-off-by: Alvin Zhang <alvinx.zhang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
3 years agonet/ice/base: update copyright date
Qi Zhang [Fri, 8 Jan 2021 03:09:14 +0000 (11:09 +0800)]
net/ice/base: update copyright date

Updated the Copyright for 2021
Updated ice driver version.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
3 years agonet/ice/base: update add scheduler node counter
Qi Zhang [Fri, 8 Jan 2021 04:22:49 +0000 (12:22 +0800)]
net/ice/base: update add scheduler node counter

The number of nodes added counter was updated incorrectly. This issue
was exposed when the driver tried to add more than 128 queues per TC.

Fix added to update the counter correctly.

Fixes: 93e84b1bfc92 ("net/ice/base: add basic Tx scheduler")
Cc: stable@dpdk.org
Signed-off-by: Victor Raj <victor.raj@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
3 years agonet/ice/base: cleanup style
Qi Zhang [Fri, 8 Jan 2021 04:20:26 +0000 (12:20 +0800)]
net/ice/base: cleanup style

A few style issues reported by checkpatch have snuck into the code,
resolve the style issues.

PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
3 years agonet/ice/base: support GTPU inner for AVF flow director
Qi Zhang [Fri, 8 Jan 2021 04:16:20 +0000 (12:16 +0800)]
net/ice/base: support GTPU inner for AVF flow director

Add dummy packets for IPV4_GTPU with inner IPV4/UDP/TCP with all
kinds of GTPU (EH) type (i.e., IP/EH/DL/UL) for AVF FDIR.

Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
3 years agonet/ice/base: limit forced overrides based on FW version
Qi Zhang [Fri, 8 Jan 2021 04:10:55 +0000 (12:10 +0800)]
net/ice/base: limit forced overrides based on FW version

Beyond a specific version of firmware, there is no need to provide
override values to the firmware when setting PHY capabilities.  In this
case, we do not need to indicate whether we're in Strict or Lenient Link
Mode.

In the case of translating capabilities to the configuration structure,
the module compliance enforcement is already correctly set by firmware,
so the extra code block is redundant.

Signed-off-by: Jeb Cramer <jeb.j.cramer@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
3 years agonet/ice/base: fix memory handling
Qi Zhang [Fri, 8 Jan 2021 04:03:52 +0000 (12:03 +0800)]
net/ice/base: fix memory handling

Fixed memory handling when memory allocated in user space was handled
as memory allocated in kernel space within QV os_dep implementation
of the ice_memdup function.

Fixes: 93e84b1bfc92 ("net/ice/base: add basic Tx scheduler")
Cc: stable@dpdk.org
Signed-off-by: Andrii Pypchenko <andrii.pypchenko@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
3 years agonet/ice/base: add package ptype enable information
Qi Zhang [Fri, 8 Jan 2021 04:01:49 +0000 (12:01 +0800)]
net/ice/base: add package ptype enable information

Scan the 'Marker PType TCAM' session to retrieve the Rx parser PTYPE
enable information from the current package.

Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
3 years agonet/ice/base: remove deprecated field
Qi Zhang [Fri, 8 Jan 2021 03:57:11 +0000 (11:57 +0800)]
net/ice/base: remove deprecated field

hw_vsi_id is used to replace vsi_id, so remove the deprecated vsi_id.

Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
3 years agonet/ice/base: align add VSI and update VSI AQ command buffer
Qi Zhang [Fri, 8 Jan 2021 03:54:45 +0000 (11:54 +0800)]
net/ice/base: align add VSI and update VSI AQ command buffer

Aligned the buffer the following admin commands to their new
definitions:
* 0x210 = add_vsi
* 0x211 = update_vsi

Signed-off-by: Shay Amir <shay.amir@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
3 years agonet/virtio: improve logs in vhost-vDPA DMA mapping
Maxime Coquelin [Tue, 5 Jan 2021 15:34:46 +0000 (16:34 +0100)]
net/virtio: improve logs in vhost-vDPA DMA mapping

This patch adds debug logs in vhost_vdpa_dma_map() and
vhost_vdpa_dma_unmap() to ease debugging.

Signed-off-by: Maxime Coquelin <maxime.coquelin@redhat.com>
Reviewed-by: Chenbo Xia <chenbo.xia@intel.com>
3 years agovhost: refactor memory regions mapping
Maxime Coquelin [Tue, 5 Jan 2021 12:57:28 +0000 (13:57 +0100)]
vhost: refactor memory regions mapping

This patch moves memory region mmaping and related
preparation in a dedicated function in order to simplify
VHOST_USER_SET_MEM_TABLE request handling function.

Signed-off-by: Maxime Coquelin <maxime.coquelin@redhat.com>
Reviewed-by: Chenbo Xia <chenbo.xia@intel.com>
3 years agovhost: refactor postcopy registration
Maxime Coquelin [Tue, 5 Jan 2021 12:57:27 +0000 (13:57 +0100)]
vhost: refactor postcopy registration

This patch moves the registration of postcopy to a
dedicated function, with the goal of simplifying
VHOST_USER_SET_MEM_TABLE request handling function.

Signed-off-by: Maxime Coquelin <maxime.coquelin@redhat.com>
Reviewed-by: Chenbo Xia <chenbo.xia@intel.com>
3 years agovhost: refactor postcopy region registration
Maxime Coquelin [Tue, 5 Jan 2021 12:57:26 +0000 (13:57 +0100)]
vhost: refactor postcopy region registration

This patch moves the registration of memory regions to
userfaultfd to a dedicated function, with the goal of
simplifying VHOST_USER_SET_MEM_TABLE request handling
function.

Signed-off-by: Maxime Coquelin <maxime.coquelin@redhat.com>
Reviewed-by: Chenbo Xia <chenbo.xia@intel.com>
3 years agovdpa/mlx5: add hardware queue moderation
Xueming Li [Wed, 6 Jan 2021 03:06:30 +0000 (03:06 +0000)]
vdpa/mlx5: add hardware queue moderation

The next parameters control the HW queue moderation feature.
This feature helps to control the traffic performance and latency
trade-off.

Each packet completion report from HW to SW requires CQ processing by SW
and triggers interrupt for the guest driver. Interrupt report and
handling cost CPU cycles and time and the amount of this affects
directly on packet performance and latency.

hw_latency_mode parameters [int]
  0, HW default.
  1, Latency is counted from the first packet completion report.
  2, Latency is counted from the last packet completion.
hw_max_latency_us parameters [int]
  0 - 4095, The maximum time in microseconds that packet completion
  report can be delayed.
hw_max_pending_comp parameter [int]
  0 - 65535, The maximum number of pending packets completions in an HW
queue.

Signed-off-by: Xueming Li <xuemingl@nvidia.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
3 years agocommon/mlx5: support vDPA completion queue moderation
Xueming Li [Wed, 6 Jan 2021 03:06:29 +0000 (03:06 +0000)]
common/mlx5: support vDPA completion queue moderation

This patch introduces new parameters for VirtQ CQ moderation, used for
performance tuning.

Signed-off-by: Xueming Li <xuemingl@nvidia.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
3 years agovhost: replace SMP with thread fence for control path
Joyce Kong [Mon, 21 Dec 2020 15:50:33 +0000 (23:50 +0800)]
vhost: replace SMP with thread fence for control path

Simply replace the smp barriers with atomic thread fence for vhost control
path, if there are no synchronization points.

Signed-off-by: Joyce Kong <joyce.kong@arm.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
3 years agovhost: replace SMP with thread fence for packed vring
Joyce Kong [Mon, 21 Dec 2020 15:50:32 +0000 (23:50 +0800)]
vhost: replace SMP with thread fence for packed vring

Simply replace smp barriers with atomic thread fence for
virtio packed vring.

Signed-off-by: Joyce Kong <joyce.kong@arm.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
3 years agovhost: relax full barriers for used idx
Joyce Kong [Mon, 21 Dec 2020 15:50:31 +0000 (23:50 +0800)]
vhost: relax full barriers for used idx

Used idx can be synchronized by one-way barrier instead of full
write barrier for split vring.

Signed-off-by: Joyce Kong <joyce.kong@arm.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
3 years agovhost: relax full barriers for desc flags
Joyce Kong [Mon, 21 Dec 2020 15:50:30 +0000 (23:50 +0800)]
vhost: relax full barriers for desc flags

Relax the full read barrier to one-way barrier for desc flags in
packed vring.

Signed-off-by: Joyce Kong <joyce.kong@arm.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
3 years agovhost: remove unnecessary SMP barrier for avail idx
Joyce Kong [Mon, 21 Dec 2020 15:50:29 +0000 (23:50 +0800)]
vhost: remove unnecessary SMP barrier for avail idx

The ordering between avail index and desc reads has been enforced
by load-acquire for split vring, so smp_rmb barrier is not needed
behind it.

Signed-off-by: Joyce Kong <joyce.kong@arm.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
3 years agovhost: remove unnecessary SMP barrier for desc flags
Joyce Kong [Mon, 21 Dec 2020 15:50:28 +0000 (23:50 +0800)]
vhost: remove unnecessary SMP barrier for desc flags

As function desc_is_avail performs a load-acquire barrier to
enforce the ordering between desc flags and desc content, it is
unnecessary to add a rte_smp_rmb barrier around the trace which
follows desc_is_avail.

Signed-off-by: Joyce Kong <joyce.kong@arm.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
3 years agoexamples/vhost_blk: replace SMP barrier with thread fence
Joyce Kong [Mon, 21 Dec 2020 15:50:27 +0000 (23:50 +0800)]
examples/vhost_blk: replace SMP barrier with thread fence

Simply replace the rte_smp_mb barriers with SEQ_CST atomic thread fence,
if there is no load/store operations.

Signed-off-by: Joyce Kong <joyce.kong@arm.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
3 years agoexamples/vhost: relax memory ordering when enqueue/dequeue
Joyce Kong [Mon, 21 Dec 2020 15:50:26 +0000 (23:50 +0800)]
examples/vhost: relax memory ordering when enqueue/dequeue

Use C11 atomic APIs with one-way barriers to replace two-way
barriers when operating enqueue/dequeue. Used->idx and avail->idx
are the synchronization points for split vring.

Signed-off-by: Joyce Kong <joyce.kong@arm.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
3 years agonet/virtio: replace full barrier with thread fence
Joyce Kong [Mon, 21 Dec 2020 14:23:21 +0000 (22:23 +0800)]
net/virtio: replace full barrier with thread fence

Replace the smp barriers with atomic thread fence for synchronization
between different threads, if there are no load/store operations.

Signed-off-by: Joyce Kong <joyce.kong@arm.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
3 years agonet/virtio: replace full barrier with relaxed ones for Arm
Joyce Kong [Mon, 21 Dec 2020 14:23:20 +0000 (22:23 +0800)]
net/virtio: replace full barrier with relaxed ones for Arm

Relax the full write barriers to one-way barriers for virtio
control path for Arm platform

Signed-off-by: Joyce Kong <joyce.kong@arm.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
3 years agonet/virtio: replace SMP barrier with IO barrier
Joyce Kong [Mon, 21 Dec 2020 14:23:19 +0000 (22:23 +0800)]
net/virtio: replace SMP barrier with IO barrier

Replace rte_smp_wmb/rmb with rte_io_wmb/rmb as they are the same on x86
and ppc platforms. Then, for function virtqueue_fetch_flags_packed/
virtqueue_store_flags_packed, the if and else branch are still identical
for the platforms except Arm.

Signed-off-by: Joyce Kong <joyce.kong@arm.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
3 years agonet/virtio: remove unnecessary read memory barrier
Joyce Kong [Mon, 21 Dec 2020 14:23:18 +0000 (22:23 +0800)]
net/virtio: remove unnecessary read memory barrier

As desc_is_used has a load-acquire or rte_io_rmb inside
and wait for used desc in virtqueue, it is ok to remove
virtio_rmb behind it.

Signed-off-by: Joyce Kong <joyce.kong@arm.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
3 years agonet/virtio-user: fix protocol features advertising
Olivier Matz [Fri, 18 Dec 2020 13:23:52 +0000 (14:23 +0100)]
net/virtio-user: fix protocol features advertising

When connected to a vhost-user backend, the flag
VHOST_USER_F_PROTOCOL_FEATURES is not advertised, preventing to do
multiqueue (the VHOST_USER_PROTOCOL_F_MQ protocol feature is ignored by
some backends if the VHOST_USER_F_PROTOCOL_FEATURES feature is not set).

When setting vhost-user features, advertise this flag if it was
advertised by our peer.

Fixes: 8e7561054ac7 ("net/virtio: support vhost-user protocol features")
Cc: stable@dpdk.org
Suggested-by: Maxime Coquelin <maxime.coquelin@redhat.com>
Signed-off-by: Olivier Matz <olivier.matz@6wind.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
3 years agonet/virtio-user: fix run closing stdin and close callfd
Jiawei Zhu [Fri, 11 Dec 2020 16:53:18 +0000 (00:53 +0800)]
net/virtio-user: fix run closing stdin and close callfd

When i < VIRTIO_MAX_VIRTQUEUES and j == i,
dev->callfds[i] and dev->kickfds[i] are default 0.
So it will close(0), close the standard input (stdin).

And when the code fails in kickfd creation,
it will leaves one callfd not closed.

Fixes: e6e7ad8b3024 ("net/virtio-user: move eventfd open/close into init/uninit")
Cc: stable@dpdk.org:
Signed-off-by: Jiawei Zhu <zhujiawei12@huawei.com>
Reviewed-by: Chenbo Xia <chenbo.xia@intel.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
3 years agovdpa/mlx5: set default event mode to polling
Xueming Li [Wed, 2 Dec 2020 23:36:43 +0000 (23:36 +0000)]
vdpa/mlx5: set default event mode to polling

For better performance and latency, this patch sets default event
handling mode to polling mode which uses dedicate thread per device to
poll and process event.

Signed-off-by: Xueming Li <xuemingl@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
3 years agovdpa/mlx5: add CPU core parameter to bind polling thread
Xueming Li [Wed, 2 Dec 2020 23:36:42 +0000 (23:36 +0000)]
vdpa/mlx5: add CPU core parameter to bind polling thread

This patch adds new device argument to specify cpu core affinity to
event polling thread for better latency and throughput. The thread
could be also located by name "vDPA-mlx5-<id>".

Signed-off-by: Xueming Li <xuemingl@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
3 years agovdpa/mlx5: default polling mode delay time to zero
Xueming Li [Wed, 2 Dec 2020 23:36:41 +0000 (23:36 +0000)]
vdpa/mlx5: default polling mode delay time to zero

To improve performance and latency, this patch sets Rx polling mode
default delay time to zero.

Signed-off-by: Xueming Li <xuemingl@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
3 years agovdpa/mlx5: set polling mode default delay to zero
Xueming Li [Wed, 2 Dec 2020 23:36:40 +0000 (23:36 +0000)]
vdpa/mlx5: set polling mode default delay to zero

To improve throughput and latency, this patch allows Rx polling timer
delay to 0us.

Signed-off-by: Xueming Li <xuemingl@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
3 years agonet/virtio: add election for packed vector NEON path
Joyce Kong [Tue, 17 Nov 2020 10:06:35 +0000 (18:06 +0800)]
net/virtio: add election for packed vector NEON path

Add NEON vectorized path selection logic. Default setting comes from
vectorized devarg, then checks each criteria.

Packed ring vectorized neon path need:
    NEON is supported by compiler and host
    VERSION_1 and IN_ORDER features are negotiated
    mergeable feature is not negotiated
    LRO offloading is disabled

Signed-off-by: Joyce Kong <joyce.kong@arm.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
3 years agonet/virtio: add vectorized packed ring NEON Tx
Joyce Kong [Tue, 17 Nov 2020 10:06:34 +0000 (18:06 +0800)]
net/virtio: add vectorized packed ring NEON Tx

Optimize packed ring Tx batch path with NEON instructions.

Signed-off-by: Joyce Kong <joyce.kong@arm.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
3 years agonet/virtio: add vectorized packed ring NEON Rx
Joyce Kong [Tue, 17 Nov 2020 10:06:33 +0000 (18:06 +0800)]
net/virtio: add vectorized packed ring NEON Rx

Optimize packed ring Rx batch path with NEON instructions.

Signed-off-by: Joyce Kong <joyce.kong@arm.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
3 years agonet/virtio: separate AVX Rx/Tx
Joyce Kong [Tue, 17 Nov 2020 10:06:32 +0000 (18:06 +0800)]
net/virtio: separate AVX Rx/Tx

Split out AVX instruction based virtio packed ring Rx and Tx
implementation to a separate file.

Signed-off-by: Joyce Kong <joyce.kong@arm.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
3 years agonet/mlx5: wrap sampling actions per OS
Ophir Munk [Sun, 3 Jan 2021 12:15:49 +0000 (12:15 +0000)]
net/mlx5: wrap sampling actions per OS

Wrap glue calls dr_create_flow_action_sampler() and
dr_create_flow_action_dest_array() as OS-specific functions.
This is a follow up on
commit b293fbf9672b ("net/mlx5: add OS specific flow actions operations")

On Windows, the sampling actions wrappers currently return ENOTSUP.
Using configuration definitions HAVE_MLX5_DR_CREATE_ACTION_FLOW_SAMPLE and
HAVE_MLX5_DR_CREATE_ACTION_DEST_ARRAY the missing sampling DV structs
are added as stubs to windows/mlx5_glue.h file.

Signed-off-by: Ophir Munk <ophirmu@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
3 years agonet/mlx5: fix leak on Tx queue creation failure
Michael Baum [Tue, 15 Dec 2020 08:48:32 +0000 (08:48 +0000)]
net/mlx5: fix leak on Tx queue creation failure

In Tx queue creation, there are two validations for the Tx
configuration.

When one of them fails, the MR btree memory was not freed what caused a
memory leak.

Free it.

Fixes: f6d9ab4e769f ("net/mlx5: check Tx queue size overflow")
Cc: stable@dpdk.org
Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
3 years agonet/mlx5: fix leak on Rx queue creation failure
Michael Baum [Tue, 15 Dec 2020 08:48:31 +0000 (08:48 +0000)]
net/mlx5: fix leak on Rx queue creation failure

In Rx queue creation, there are some validations for the Rx
configuration.

When one of them fails, the MR btree memory was not freed what caused a
memory leak.

Free it.

Fixes: 974f1e7ef146 ("net/mlx5: add new memory region support")
Cc: stable@dpdk.org
Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
3 years agonet/mlx5: fix VXLAN decap on non-VXLAN flow
Shiri Kuzin [Thu, 31 Dec 2020 09:33:28 +0000 (11:33 +0200)]
net/mlx5: fix VXLAN decap on non-VXLAN flow

The vxlan_decap action performs decapsulation of the VXLAN tunnel.

Currently we can create a flow with vxlan_decap without
matching on VXLAN header.

To solve this issue this patch adds validation verifying
that the VXLAN item was detected when specifying
vxlan_decap action.

Fixes: 49d6465af3e1 ("net/mlx5: add VXLAN decap action to Direct Verbs")
Cc: stable@dpdk.org
Signed-off-by: Shiri Kuzin <shirik@nvidia.com>
Reviewed-by: Suanming Mou <suanmingm@nvidia.com>
3 years agonet/mlx5: fix shared RSS and mark actions combination
Suanming Mou [Tue, 15 Dec 2020 03:46:24 +0000 (11:46 +0800)]
net/mlx5: fix shared RSS and mark actions combination

In order to allow mbuf mark ID update in Rx data-path, there is a
mechanism in the PMD to enable it according to the rte_flows.
When a flow with mark ID and RSS/QUEUE action exists, all the relevant
Rx queues will be enabled to report the mark ID.

When shared RSS action is combined with mark action, the PMD mechanism
misses the Rx queues updates.

This commit handles the shared RSS case in the mechanism too.

Fixes: e1592b6c4dea ("net/mlx5: make Rx queue thread safe")
Cc: stable@dpdk.org
Signed-off-by: Suanming Mou <suanmingm@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
3 years agonet/mlx5: fix comparison sign in flow engine
Tal Shnaiderman [Mon, 28 Dec 2020 12:33:02 +0000 (14:33 +0200)]
net/mlx5: fix comparison sign in flow engine

The clang compiler warns on size mismatches of several
comparisons.

warning: comparison of integers of different signs

To resolve those the right types is used/cast to.

Fixes: 3e8edd0ef848 ("net/mlx5: update metadata register ID query")
Fixes: e554b672aa05 ("net/mlx5: support flow tag")
Fixes: c8f0abe7f89d ("net/mlx5: fix meter color register consideration")
Cc: stable@dpdk.org
Signed-off-by: Tal Shnaiderman <talshn@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
3 years agonet/mlx5: skip IPv6 broadcast flow creation failure
Tal Shnaiderman [Mon, 28 Dec 2020 12:33:01 +0000 (14:33 +0200)]
net/mlx5: skip IPv6 broadcast flow creation failure

IPv6 broadcast flow creation is unsupported in Windows.
do not fail on IPv6 broadcast flow creation on this mast
to avoid entire default rules creation failure.

Signed-off-by: Tal Shnaiderman <talshn@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
3 years agonet/mlx5: wrap flow domain sync per OS
Tal Shnaiderman [Mon, 28 Dec 2020 12:33:00 +0000 (14:33 +0200)]
net/mlx5: wrap flow domain sync per OS

use OS functions for flow_dv_sync_domain to compile
Windows.

mlx5_os_flow_dr_sync_domain is unsupported for Windows.

Signed-off-by: Tal Shnaiderman <talshn@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
3 years agonet/mlx5: initialize context list mutex dynamically
Tal Shnaiderman [Mon, 28 Dec 2020 12:32:59 +0000 (14:32 +0200)]
net/mlx5: initialize context list mutex dynamically

The mutex mlx5_dev_ctx_list_mutex was initialized with
PTHREAD_MUTEX_INITIALIZER global macro however this macro
is not supported on Windows OS shim implementation of pthreads
in DPDK.

Moved the init of this mutex to RTE_INIT to support this mutex
on both OSs.

Signed-off-by: Tal Shnaiderman <talshn@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
3 years agonet/mlx5: use OS-independent code in ASO feature
Tal Shnaiderman [Mon, 28 Dec 2020 12:32:58 +0000 (14:32 +0200)]
net/mlx5: use OS-independent code in ASO feature

Modify the ASO feature to use OS independent code
not to break Windows build.

Signed-off-by: Tal Shnaiderman <talshn@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
3 years agonet/mlx5: fix device name size on Windows
Tal Shnaiderman [Mon, 28 Dec 2020 12:32:57 +0000 (14:32 +0200)]
net/mlx5: fix device name size on Windows

Windows Devx interface name is the same as device name with
different size then IF_NAMESIZE. To support it MLX5_NAMESIZE
is defined with IF_NAMESIZE value for Linux and MLX5_FS_NAME_MAX
value for Windows.

Fixes: e9c0b96e3526 ("net/mlx5: move Linux ifname function")
Cc: stable@dpdk.org
Signed-off-by: Tal Shnaiderman <talshn@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
3 years agonet/mlx5: unify operations for all OS
Ophir Munk [Mon, 28 Dec 2020 12:32:56 +0000 (14:32 +0200)]
net/mlx5: unify operations for all OS

There are three types of eth_dev_ops: primary, secondary and isolate
represented in three callback tables per OS.  In this commit the OS
specific eth dev tables are unified into shared tables in file mlx5.c.
Starting from this commit all operating systems must implement the same
eth dev APIs. In case an OS does not support an API - it can return in
its implementation an error ENOTSUP.

Fixes: 042f5c94fd3a ("net/mlx5: refactor device operations for Linux")
Cc: stable@dpdk.org
Signed-off-by: Ophir Munk <ophirmu@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
3 years agonet/mlx5: enable more shared code on Windows
Ophir Munk [Mon, 28 Dec 2020 12:32:55 +0000 (14:32 +0200)]
net/mlx5: enable more shared code on Windows

Use macro HAVE_INFINIBAND_VERBS_H to successfully compile files both
under Linux and Windows (or any non Linux in general). Under Windows
this macro:
1. Hides Verbs references.
2. Exposes required DV structs that are under ifdefs related to rdma
core.

Linux code under definitions such as #ifdef HAVE_IBV_FLOW_DV_SUPPORT is
required unconditionally under Windows however those definitions are
never effective without rdma-core presence. Therefore update the #ifdef
condition to consider HAVE_INFINIBAND_VERBS_H as well (undefined macro
when running without an rdma-core library).

For example:
-#ifdef HAVE_IBV_FLOW_DV_SUPPORT
+#if defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_INFINIBAND_VERBS_H)

Signed-off-by: Ophir Munk <ophirmu@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
3 years agonet/mlx5: create flow rule on Windows
Ophir Munk [Mon, 28 Dec 2020 12:32:54 +0000 (14:32 +0200)]
net/mlx5: create flow rule on Windows

This commit implements mlx5_flow_os_create_flow() API. It is equivalent
to Linux rdma-core implementation. The API receives the matcher mask,
matcher value and an array of actions. They are copied into a PRM-like
struct devx_fs_rule_add_in. Then glue API devx_fs_rule_add() is called.

Signed-off-by: Ophir Munk <ophirmu@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
3 years agonet/mlx5: create flow action dest TIR object on Windows
Ophir Munk [Mon, 28 Dec 2020 12:32:53 +0000 (14:32 +0200)]
net/mlx5: create flow action dest TIR object on Windows

This commit implements mlx5_flow_os_create_flow_action_dest_devx_tir()
API as the Linux rdma-core equivalent. Missing rdma-core parameters are
added to file mlx5_win_defs.h. The action TIR id and type
(MLX5_FLOW_CONTEXT_DEST_TYPE_TIR) are saved in the action struct.  The
action struct will be added to array of actions and will be used later
by the flow creation API.

Signed-off-by: Ophir Munk <ophirmu@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
3 years agonet/mlx5: create flow matcher object on Windows
Ophir Munk [Mon, 28 Dec 2020 12:32:52 +0000 (14:32 +0200)]
net/mlx5: create flow matcher object on Windows

This commit implements the mlx5_flow_os_create_flow_matcher() API. It is
the Linux rdma-core equivalent implementation. Missing rdma-core
parameters (e.g. struct mlx5dv_flow_match_parameters) are added to file
mlx5_win_defs.h. The API allocates space to hold the PRM bits in PRM
fte_match_param format and copy the DV translated PRM bits into the
matcher struct. This matcher struct will be used later by the flow
creation API.

Signed-off-by: Ophir Munk <ophirmu@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
3 years agonet/mlx5: introduce flow support on Windows
Ophir Munk [Mon, 28 Dec 2020 12:32:51 +0000 (14:32 +0200)]
net/mlx5: introduce flow support on Windows

This patch adds the initial flow framework under Windows OS. It supports
a subset of filters (ETH, IPV4, UDP) and a QUEUE action.  It is based on
DevX mechanism to send commands to the NIC through the kernel. It does
not support steering rules (i.e. writing directly to the NIC memory).
The Windows framework uses the existing DV framework where file
mlx5_flow_dv.c remains intact.

Steps involved in flow creation:
1. Create a domain (RX, TX, FDB). Since domains are created by steering
rules and not with DevX, Windows does not require a domain object (this
means switch dev mode which requires an FDB domain is not supported).
2. Create a table object. Windows only supports table 0. The call to
mlx5_flow_os_create_flow_tbl() silently returns successfully.
3. Create a matcher object. A matcher struct is created by calling
mlx5_flow_os_create_flow_matcher().  The matcher validation and
translation are part of the DV implementation. The matcher bits that
were created by DV in standard PRM format are copied into the matcher
struct.
4. Create an action object. The call to
mlx5_flow_os_create_flow_action_dest_devx_tir() creates an action struct
with the TIR type and id.  This struct will be a parameter later in a
call to flow creation.  All other action calls (e.g. packet reformat,
header modification, jump to flow table, etc) return with a non
supported error.
5. Create the flow. The call to mlx5_flow_os_create_flow() receives the
matcher struct, action struct, and copy them into Windows specific
fs_rule struct, then it calls glue API devx_fs_rule_add().

Details on additional APIs:
* mlx5_flow_os_get_type() is called during flow type selection. In
Windows it constantly returns MLX5_FLOW_TYPE_DV.
* mlx5_flow_os_item_supported() is called before starting DV items
validation or translation. It filters out the OS non supported items in
advance.
* mlx5_flow_os_action_supported() is called before starting DV actions
validation or translation. It filters out the OS non supported actions
in advance.
* mlx5_flow_adjust_priority() is an OS stub for flow priority
adjustment. Windows only supports flow priority 0.

Signed-off-by: Ophir Munk <ophirmu@nvidia.com>
Signed-off-by: Dekel Peled <dekelp@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
3 years agonet/mlx5: fix flow operation wrapper per OS
Ophir Munk [Mon, 28 Dec 2020 12:32:50 +0000 (14:32 +0200)]
net/mlx5: fix flow operation wrapper per OS

Wrap glue call dv_create_flow_action_dest_devx_tir() with an OS API.

Fixes: b293fbf9672b ("net/mlx5: add OS specific flow actions operations")
Cc: stable@dpdk.org
Signed-off-by: Ophir Munk <ophirmu@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
3 years agonet/mlx5: wrap default miss flow action per OS
Ophir Munk [Mon, 28 Dec 2020 12:32:49 +0000 (14:32 +0200)]
net/mlx5: wrap default miss flow action per OS

Wrap glue call dr_create_flow_action_default_miss() with an OS API. This
commit is a follow up on [1].

[1]
commit d4d85aa6f13a ("common/mlx5: add default miss action")
commit b293fbf9672b ("net/mlx5: add OS specific flow actions operations")

Signed-off-by: Ophir Munk <ophirmu@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
3 years agonet/mlx5: wrap adjust flow priority per OS
Ophir Munk [Mon, 28 Dec 2020 12:32:48 +0000 (14:32 +0200)]
net/mlx5: wrap adjust flow priority per OS

mlx5_flow_adjust_priority() is used to adjust priorities according to
priorities levels. It is Verbs based and it is called from shared code
(mlx5_flow_dv.c). Therefore, wrap it in an OS API.

Signed-off-by: Ophir Munk <ophirmu@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
3 years agonet/mlx5: support VF PCI address on Windows
Tal Shnaiderman [Mon, 28 Dec 2020 12:32:47 +0000 (14:32 +0200)]
net/mlx5: support VF PCI address on Windows

Support VF BDF scanning by checking both the BDF and raw BDF provided by
DevX. In Linux a PCI address is formatted as: domain, bus, device,
function (DBDF).  This is right for both a PF and a VF. In Windows a PF
also has a DBDF format, but the domain is always 0, while a VF has a
special "domain" called "Virtual PCI Bus, Serial" (for example: "Virtual
PCI Bus Slot 2 Serial 2") or segment.  The full VF format under Windows
is called raw DBF.  Windows special domain must be considered and DevX
must be called to support it.

Signed-off-by: Tal Shnaiderman <talshn@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
3 years agonet/mlx5: spawn ethdev ports on Windows
Ophir Munk [Mon, 28 Dec 2020 12:32:46 +0000 (14:32 +0200)]
net/mlx5: spawn ethdev ports on Windows

This commit implements mlx5_dev_spawn() API which allocates an eth
device (struct rte_eth_dev) for each PCI device. When working with
representors virtual functions (as in Linux), one PCI device may spawn
several eth devices: the master device for the main physical function
(PF) and several representors for the virtual functions (VFs).  However,
currently Windows does not work in switch dev mode, therefore, no VFs
are created and no representors are spawned. In this case one eth device
is created per one PCI main port.  In addition to device creation - the
device configuration must be correctly set. The device arguments
(devargs - set by the user) are parsed but they may be overridden by
Windows limitations or hardware configurations. Some associated network
parameters are stored in eth device (e.g. ifindex, MAC address, MTU) and
some callback (e.g. burst functions) are set.

Signed-off-by: Ophir Munk <ophirmu@nvidia.com>
Signed-off-by: Tal Shnaiderman <talshn@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
3 years agonet/mlx5: probe on Windows
Tal Shnaiderman [Mon, 28 Dec 2020 12:32:45 +0000 (14:32 +0200)]
net/mlx5: probe on Windows

This commit implements mlx5_os_pci_probe API under Windows. It does all
required initializations then it gets the PCI device list using glue API
get_device_list().  Next, all non MLX5 matched devices are filtered out.
The supported NIC types are: CONNECTX4VF, CONNECTX4LXVF, CONNECTX5VF,
CONNECTX5EXVF, CONNECTX5BFVF, CONNECTX6VF, MELLANOX_CONNECTX6DXVF.  Each
device in the list is assigned with default configuration parameters,
most of them are 0. The default dv_flow_en parameter value is 1 (which
means Windows match and action flows are based on DV code). Next for
each PCI device call mlx5_dev_spawn() to create an eth device (struct
rte_ethdev). The implementation of device spawn is in the follow up
commit.  Finally, the device list is free.

Signed-off-by: Tal Shnaiderman <talshn@nvidia.com>
Signed-off-by: Ophir Munk <ophirmu@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
3 years agonet/mlx5: open device on Windows
Ophir Munk [Mon, 28 Dec 2020 12:32:44 +0000 (14:32 +0200)]
net/mlx5: open device on Windows

This commit implements mlx5_os_open_device() API. It calls glue API
open_device() then glue API query_device() to fill in 'struct
mlx5_context' with data for later usage.

Signed-off-by: Ophir Munk <ophirmu@nvidia.com>
Signed-off-by: Tal Shnaiderman <talshn@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
3 years agonet/mlx5: support getting PDN on Windows
Tal Shnaiderman [Mon, 28 Dec 2020 12:32:43 +0000 (14:32 +0200)]
net/mlx5: support getting PDN on Windows

Implement OS function call to get pdn.

Signed-off-by: Tal Shnaiderman <talshn@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
3 years agonet/mlx5: add VLAN stubs on Windows
Ophir Munk [Mon, 28 Dec 2020 12:32:42 +0000 (14:32 +0200)]
net/mlx5: add VLAN stubs on Windows

This commit adds stubs to VLAN VM operations.  It is the Windows
equivalent implementation of [1].  The Linux implementation was based on
Netlink APIs which are not supported in Windows.

[1]
commit 7af10d29a4a0 ("net/mlx5/linux: refactor VLAN")

Signed-off-by: Ophir Munk <ophirmu@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
3 years agonet/mlx5: support device removed query on Windows
Tal Shnaiderman [Mon, 28 Dec 2020 12:32:41 +0000 (14:32 +0200)]
net/mlx5: support device removed query on Windows

This commit implements mlx5_is_removed() API. A new glue call
'init_shutdown_event' is added to support the new API.

Signed-off-by: Tal Shnaiderman <talshn@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
3 years agonet/mlx5: support getting interface name on Windows
Tal Shnaiderman [Mon, 28 Dec 2020 12:32:40 +0000 (14:32 +0200)]
net/mlx5: support getting interface name on Windows

This commit copies the interface name as saved in the device context
since its creation.

Signed-off-by: Tal Shnaiderman <talshn@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
3 years agonet/mlx5: support getting MTU on Windows
Tal Shnaiderman [Mon, 28 Dec 2020 12:32:39 +0000 (14:32 +0200)]
net/mlx5: support getting MTU on Windows

This commit implements API mlx5_get_mtu(). It returns the MTU size as
saved in the device context since its creation.

Signed-off-by: Tal Shnaiderman <talshn@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
3 years agonet/mlx5: support clock read on Windows
Tal Shnaiderman [Mon, 28 Dec 2020 12:32:38 +0000 (14:32 +0200)]
net/mlx5: support clock read on Windows

This commit adds a new glue function query_rt_values to support the new
API mlx5_read_clock().

Signed-off-by: Tal Shnaiderman <talshn@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
3 years agonet/mlx5: support link update on Windows
Tal Shnaiderman [Mon, 28 Dec 2020 12:32:37 +0000 (14:32 +0200)]
net/mlx5: support link update on Windows

Add support for mlx5_link_update() to get link speed and link state.
Other parameters are currently hard-coded.

Signed-off-by: Tal Shnaiderman <talshn@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
3 years agonet/mlx5: add stubs on Windows
Ophir Munk [Mon, 28 Dec 2020 12:32:36 +0000 (14:32 +0200)]
net/mlx5: add stubs on Windows

This commits adds ethdev stubs. These APIs are called from shared code
that must compile under Linux and Windows. The following stubs are added:
mlx5_set_mtu
mlx5_os_read_dev_counters
mlx5_intr_callback_unregister
mlx5_os_get_stats_n
mlx5_os_stats_init
mlx5_set_link_down
mlx5_set_link_up
mlx5_dev_get_flow_ctrl
mlx5_dev_set_flow_ctrl
mlx5_get_module_info
mlx5_get_module_eeprom

Signed-off-by: Ophir Munk <ophirmu@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
3 years agonet/mlx5: support getting MAC on Windows
Tal Shnaiderman [Mon, 28 Dec 2020 12:32:35 +0000 (14:32 +0200)]
net/mlx5: support getting MAC on Windows

This commits implements API mlx5_get_mac().  It returns the MAC address
saved in the device context since its creation.

Signed-off-by: Tal Shnaiderman <talshn@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
3 years agonet/mlx5: add stubs for MP requests on Windows
Ophir Munk [Mon, 28 Dec 2020 12:32:34 +0000 (14:32 +0200)]
net/mlx5: add stubs for MP requests on Windows

Windows supports the primary process with no secondary process control.
This commit adds stubs for requests to start/stop the data-path to the
secondary process and for requests to start/stop a queue of the primary
process.

Signed-off-by: Ophir Munk <ophirmu@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
3 years agonet/mlx5: add memory region callbacks on Windows
Ophir Munk [Mon, 28 Dec 2020 12:32:33 +0000 (14:32 +0200)]
net/mlx5: add memory region callbacks on Windows

This commit is the Windows part implementation of
commit d5ed8aa9449d ("net/mlx5: add memory region callbacks in per-device cache")

Signed-off-by: Ophir Munk <ophirmu@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
3 years agocommon/mlx5: wrap event channel functions on Windows
Tal Shnaiderman [Mon, 28 Dec 2020 12:32:32 +0000 (14:32 +0200)]
common/mlx5: wrap event channel functions on Windows

This commit is the Windows equivalent of the Linux implementation.
Windows returns an error ENOTSUP for the APIs to create/destroy event
channel or to subscribe an event.

Signed-off-by: Tal Shnaiderman <talshn@nvidia.com>
Signed-off-by: Ophir Munk <ophirmu@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
3 years agocommon/mlx5: add DevX UAR getters on Windows
Ophir Munk [Mon, 28 Dec 2020 12:32:31 +0000 (14:32 +0200)]
common/mlx5: add DevX UAR getters on Windows

The following getters are added: mlx5_os_get_devx_uar_mmap_offset,
mlx5_os_get_devx_uar_base_addr, mlx5_os_get_devx_uar_reg_addr,
mlx5_os_get_devx_uar_page_id.  This commit is the Windows equivalent of
the Linux implementation in [1].

[1]
commit 1f66ac5bbe89 ("net/mlx5: remove more Direct Verbs dependencies")

Signed-off-by: Ophir Munk <ophirmu@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
3 years agocommon/mlx5: include compatibility header file
Ophir Munk [Mon, 28 Dec 2020 12:32:30 +0000 (14:32 +0200)]
common/mlx5: include compatibility header file

Add #include <rte_compat.h> to file mlx5_devx_cmds.h. It is required for
Windows to identify the  __rte_internal definition.

Signed-off-by: Ophir Munk <ophirmu@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
3 years agonet/mlx5: add macros for file name and path
Tal Shnaiderman [Mon, 28 Dec 2020 12:32:29 +0000 (14:32 +0200)]
net/mlx5: add macros for file name and path

ibdev_name and ibdev_path sizes are defined in Windows DevX
differently from the sizes used in Linux with
IBV_SYSFS_NAME_MAX and IBV_SYSFS_PATH_MAX.

Added MLX5_FS_NAME_MAX and MLX5_FS_NAME_PATH in mlx5_os.h for both OSs.

Signed-off-by: Tal Shnaiderman <talshn@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
3 years agocommon/mlx5: add missing Verbs definitions on Windows
Ophir Munk [Mon, 28 Dec 2020 12:32:28 +0000 (14:32 +0200)]
common/mlx5: add missing Verbs definitions on Windows

Add missing DV and IBV definition to file mlx5_win_defs.h. The
definitions originated from rdma-core library which is not part of
Windows. They are referenced in shared files that must compile under
Windows such as mlx5_flow_dv.c and mlx5_rxtx.c.

Signed-off-by: Ophir Munk <ophirmu@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
3 years agonet/mlx5: refactor ops for Windows
Ophir Munk [Mon, 28 Dec 2020 09:54:36 +0000 (11:54 +0200)]
net/mlx5: refactor ops for Windows

There are two types of eth_dev_ops used under Windows: primary and
isolate mode. Their function calls initialization is added to the OS
specific file mlx5_os.c. Secondary process eth_dev_ops is nullified.

Signed-off-by: Ophir Munk <ophirmu@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
3 years agonet/mlx5: support adding MAC address on Windows
Tal Shnaiderman [Mon, 28 Dec 2020 09:54:35 +0000 (11:54 +0200)]
net/mlx5: support adding MAC address on Windows

Get the list of MAC addresses and verify if the input mac parameter
already exists. If not - return -ENOTSUP (as Windows does not support
adding new MAC addresses). If the MAC address exists (EEXIST) return 0
(the equivalent of Linux implementation of this API).

Signed-off-by: Tal Shnaiderman <talshn@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
3 years agonet/mlx5: add Windows stubs
Ophir Munk [Mon, 28 Dec 2020 09:54:34 +0000 (11:54 +0200)]
net/mlx5: add Windows stubs

mlx5_os_set_nonblock_channel_fd
mlx5_os_dev_shared_handler_install
mlx5_os_dev_shared_handler_uninstall
mlx5_os_read_dev_stat
mlx5_os_mac_addr_flush
mlx5_os_mac_addr_remove
mlx5_os_vf_mac_addr_modify
mlx5_os_set_promisc
mlx5_os_set_allmulti

Set struct mlx5_flow_driver_ops mlx5_flow_verbs_drv_ops with NULL
pointers.

Signed-off-by: Ophir Munk <ophirmu@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
3 years agonet/mlx5: implement device attribute getter on Windows
Ophir Munk [Mon, 28 Dec 2020 09:54:33 +0000 (11:54 +0200)]
net/mlx5: implement device attribute getter on Windows

This commit is the Windows implementation of mlx5_os_get_dev_attr() API.
It follows the commit in [1]. A new file named mlx5_os.c is added under
windows directory as its Linux counterpart file: linux/mlx5_os.c.

[1].
commit e85f623e13ea ("net/mlx5: remove attributes dependency on Verbs")

Signed-off-by: Ophir Munk <ophirmu@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
3 years agocommon/mlx5: add reg/dereg MR on Windows
Ophir Munk [Mon, 28 Dec 2020 09:54:32 +0000 (11:54 +0200)]
common/mlx5: add reg/dereg MR on Windows

This commits implements Windows API for MR registration and
deregistration. It is based on DevX.  Is support the relaxed ordering
flow in Windows by checking the capabilities and machine type.

Signed-off-by: Ophir Munk <ophirmu@nvidia.com>
Signed-off-by: Tal Shnaiderman <talshn@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
3 years agonet/mlx5: prepare MR prototypes for DevX
Ophir Munk [Mon, 28 Dec 2020 09:54:31 +0000 (11:54 +0200)]
net/mlx5: prepare MR prototypes for DevX

Currently MR operations are Verbs based. This commit updates MR
operations prototypes such that DevX MR operations callbacks can be used
as well.  Rename 'struct mlx5_verbs_ops' as 'struct mlx5_mr_ops' and
move it to shared file mlx5.h.

Signed-off-by: Ophir Munk <ophirmu@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
3 years agocommon/mlx5: add UMEM reg/dereg functions on Windows
Tal Shnaiderman [Mon, 28 Dec 2020 09:54:30 +0000 (11:54 +0200)]
common/mlx5: add UMEM reg/dereg functions on Windows

Implement Windows API mlx5_os_umem_reg() and mlx5_os_umem_dereg(). They
are equivalent to the Linux implementation.

Signed-off-by: Tal Shnaiderman <talshn@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
3 years agocommon/mlx5: add alloc/dealloc PD on Windows
Tal Shnaiderman [Mon, 28 Dec 2020 09:54:29 +0000 (11:54 +0200)]
common/mlx5: add alloc/dealloc PD on Windows

Implement Windows API mlx5_os_alloc_pd() and mlx5_os_dealloc_pd().
They are equivalent to the Linux implementation in [1].

[1] ("net/mlx5: wrap glue alloc/dealloc PD with OS calls")

Signed-off-by: Tal Shnaiderman <talshn@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
3 years agocommon/mlx5: add getter functions on Windows
Ophir Munk [Mon, 28 Dec 2020 09:54:28 +0000 (11:54 +0200)]
common/mlx5: add getter functions on Windows

Add file mlx5/windows/mlx5_common_os.h the equivalent of Linux file
mlx5/linux/mlx5_common_os.h. It contains getters functions
mlx5_os_get_dev_device_name, mlx5_os_get_ctx_device_name,
mlx5_os_get_ctx_device_path, mlx5_os_get_umem_id,
mlx5_os_get_devx_channel_fd.

Signed-off-by: Ophir Munk <ophirmu@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
3 years agocommon/mlx5: adjust PRM struct size on Windows
Tal Shnaiderman [Mon, 28 Dec 2020 09:54:27 +0000 (11:54 +0200)]
common/mlx5: adjust PRM struct size on Windows

Add reserved size to PRM 'struct mlx5_ifc_fte_match_param_bits' for non
Linux OS.  Windows drivers require this extension since their expected
size should match the actual struct size. Linux drivers do not require
this extension and already use calculations based on the shorter size.
Use a static assert to verify that the PRM fte_match_param struct size
remains correct.

Signed-off-by: Tal Shnaiderman <talshn@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
3 years agocommon/mlx5: generate autoconf file on Windows
Ophir Munk [Mon, 28 Dec 2020 09:54:26 +0000 (11:54 +0200)]
common/mlx5: generate autoconf file on Windows

File mlx5_autoconf.h is generated under Windows to maintain
compatibility with the Linux build system.  This file is included in
Linux/Windows shared source files therefore it is required. Currently
the file is created empty.

Signed-off-by: Ophir Munk <ophirmu@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
3 years agocommon/mlx5: add init for external lib on Windows
Ophir Munk [Mon, 28 Dec 2020 09:54:25 +0000 (11:54 +0200)]
common/mlx5: add init for external lib on Windows

Add function mlx5_glue_constructor() as an initialization routine for
run-time dependency on external lib.  Currently the routine has an empty
body. It is used for compatibility with Linux.

Signed-off-by: Ophir Munk <ophirmu@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
3 years agocommon/mlx5: add Windows meson file
Tal Shnaiderman [Mon, 28 Dec 2020 09:54:24 +0000 (11:54 +0200)]
common/mlx5: add Windows meson file

File drivers/common/mlx5/windows/meson.build is added to enable mlx5
source files compilation under common windows directory.
A Devx SDK tool must be installed to export two external H files:
mlx5devx.h and mlx5_ifc_devx.h. The installation is based on environment
variable DEVX_INC_PATH. In addition a DLL lib file is installed based on
environment variable DEVX_LIB_PATH. The meson file is using the
environment variables for compilation and linkage.

Signed-off-by: Tal Shnaiderman <talshn@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
3 years agocommon/mlx5: add glue functions on Windows
Tal Shnaiderman [Mon, 28 Dec 2020 09:54:23 +0000 (11:54 +0200)]
common/mlx5: add glue functions on Windows

Windows glue functions are added to file mlx5/windows/mlx5_glue.c.
The following APIs are supported:
get_device_list, free_device_list, open_device, close_device,
query_device, query_hca_iseg, devx_obj_create, devx_obj_destroy,
devx_obj_query, devx_obj_modify, devx_general_cmd, devx_umem_reg,
devx_umem_dereg, devx_alloc_uar, devx_free_uar, devx_fs_rule_add,
devx_fs_rule_del, devx_query_eqn
New added files:
mlx5_win_defs.h - this file imports missing definitions from Linux
rdma-core library and Linux OS.
mlx5_win_ext.h - this file contains structs that enable a unified
Linux/Windows API. Each struct has an equivalent (but different) Linux
struct. By calling with 'void *' pointers - the Linux/Windows API is
identical.

Signed-off-by: Tal Shnaiderman <talshn@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
3 years agocommon/mlx5: add DevX PD allocation command
Tal Shnaiderman [Mon, 28 Dec 2020 09:54:22 +0000 (11:54 +0200)]
common/mlx5: add DevX PD allocation command

Add a new DevX API mlx5_devx_cmd_alloc_pd() that creates a new protection
domain (PD).

Signed-off-by: Tal Shnaiderman <talshn@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
3 years agocommon/mlx5: extend DevX HCA attributes query
Tal Shnaiderman [Mon, 28 Dec 2020 09:54:21 +0000 (11:54 +0200)]
common/mlx5: extend DevX HCA attributes query

Extend DevX API mlx5_devx_cmd_query_hca_attr() to report on max number
of available objects including: CQ, QP, PD, SRQ.

Signed-off-by: Tal Shnaiderman <talshn@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
3 years agocommon/mlx5: add Windows exports file
Tal Shnaiderman [Mon, 28 Dec 2020 09:54:20 +0000 (11:54 +0200)]
common/mlx5: add Windows exports file

File drivers/common/mlx5/rte_common_mlx5_exports.def contains mlx5
Windows exported symbols under common/mlx5 directory (DLL file
name librte_common_mlx5*.dll). It is the equivalent of Linux map
file version.map but the list of symbols may be
different between the two operating systems.

Signed-off-by: Tal Shnaiderman <talshn@nvidia.com>
Signed-off-by: Ophir Munk <ophirmu@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
3 years agocommon/mlx5: wrap event channel functions per OS
Tal Shnaiderman [Mon, 28 Dec 2020 09:54:19 +0000 (11:54 +0200)]
common/mlx5: wrap event channel functions per OS

Wrap the API to create/destroy event channel and to subscribe an event
with OS calls. In Linux those calls are implemented by glue functions
while in Windows they are not supported.

Signed-off-by: Tal Shnaiderman <talshn@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
3 years agocommon/mlx5: wrap memory allocation on Windows
Ophir Munk [Mon, 28 Dec 2020 09:54:18 +0000 (11:54 +0200)]
common/mlx5: wrap memory allocation on Windows

This commit is the Windows equivalent of the Linux implementation.  The
APIs included in this commit: mlx5_os_malloc(), mlx5_os_free(). For
memory allocations (with or without alignment) we always call
_aligned_malloc(). Even if zero alignment was requested in the first
place - we always select a minimal alignment value. In this way when the
memory is free - it is always safe to call _aligned_free().

Signed-off-by: Ophir Munk <ophirmu@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
3 years agocommon/mlx5: wrap memory allocation on Linux
Ophir Munk [Mon, 28 Dec 2020 09:54:17 +0000 (11:54 +0200)]
common/mlx5: wrap memory allocation on Linux

mlx5_malloc() API has an alignment parameter for system memory
allocations. malloc() is called for non-aligned allocations and
posix_memalign() is called for aligned allocations. When calling
mlx5_free() there is no distinction whether the memory was originally
allocated with or without alignment. Freeing a memory may be handled
differently by operating systems. Therefore this commit wraps these APIs
with OS specific calls: mlx5_os_malloc(), mlx5_os_free().

Signed-off-by: Ophir Munk <ophirmu@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>